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Electrostatic Discharge Title Highlights

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Page 1: Electrostatic discarge title highlights

G l o b a l R i g h t s G u i d e 1 J o h n W i l e y & S o n s , I n c .

Electrostatic Discharge Title Highlights

Page 2: Electrostatic discarge title highlights

We are delighted to present a number of titles covering the highly pertinent topic of Electrostatic Discharge, from renowned author Dr. Steven Voldman. Voldman has been involved with ESD work since 1991. He has been Chairman of the ESD Association WG 5.5 on TLP testing since 2001 and he was Chairman of the SEMATECH ESD Working Group on ESD Technology from 1995 until 1998. He worked for 25 years at IBM before working at Qimonda in 2007 and then TSMC Corporation in 2008; he currently he holds 181 patents in the areas of ESD and latchup, and has 125 pending. His fields of expertise are electrostatic discharge (ESD) protection, latchup, ESD testing and ESD design. To date he has worked on many design architectures from SRAM, DRAM, ASICs, Microprocessors, NVRAMs, image processing designs and power technology. If you would like to review nay of the titles please contact Julie Attrill, [email protected] We look forward to receiving your requests.

Page 3: Electrostatic discarge title highlights

G l o b a l R i g h t s G u i d e 3 J o h n W i l e y & S o n s , I n c .

Circuit Theory & Design ...................................................... 4

ESD: Failure Mechanisms and Models/Voldman .............................................................................. 4 ESD: Test and Characterization/Voldman.......................................................................................... 5 ESD: Test and Characterization/Voldman.......................................................................................... 5

Circuits, Components & Devices ....................................... 6

ESD: Design and Synthesis/Voldman ................................................................................................ 6 ESD: Circuits and Devices/Voldman .................................................................................................. 7 ESD Physics and Devices/Voldman ................................................................................................... 8

Mobile & Wireless Communications .................................. 9

ESD: RF Technology and Circuits/Voldman ...................................................................................... 9

Power Electronics .............................................................. 10

ESD Basics: From Semiconductor Manufacturing to Use /Voldman ............................................ 10

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Circuit Theory & Design ESD: Failure Mechanisms and Models Steven H. Voldman 978-0-470-51137-4 / 0-470-51137-0 408 pp. Pub: 17/07/09 Circuit Theory & Design Electrostatic discharge (ESD) failure mechanisms continue to impact semiconductor components and systems as technologies scale from micro- to nano-electronics.

This book studies electrical overstress, ESD, and latchup from a failure analysis and case-study approach. It provides a clear insight into the physics of failure from a generalist perspective, followed by investigation of failure mechanisms in specific technologies, circuits, and systems. The book is unique in covering both the failure mechanism and the practical solutions to fix the problem from either a technology or circuit methodology.

ESD: Failure Mechanisms and Models is a continuation of the author's series of books on ESD protection. It is an essential reference and a useful insight into the issues that confront modern technology as we enter the Nano-electronic era.

• Provides a comprehensive analysis of ESD failure mechanisms over a wide range of semiconductor materials, devices, circuits and applications.

• Sets out methods for eliminating failure mechanisms through workable circuit solutions, including practical examples of failure defects.

• Discusses established and contemporary technologies, as well as emerging and future trends such as RF complementary metal-oxide semiconductor (CMOS) and digital applications, carbon nanotubes (CNTs), local oxidization of silicon (LOCOS)-based CMOS, STI-based CMOS, multi-gate devices (MUGFETs) and FinFET transistors.

• Addresses the historical trends in ESD failure mechanisms, including how ESD failure practice is used to design and improve semiconductor chips, and how technology scaling has affected this.

• Failure analysis engineers and technicians, ESD engineers, reliability and test engineers, semiconductor engineers and researchers who are working on improving reliability during the manufacture and design of semiconductor chips.

Click here to view a sample chapter

Page 5: Electrostatic discarge title highlights

G l o b a l R i g h t s G u i d e 5 J o h n W i l e y & S o n s , I n c .

ESD: Test and Characterization Steven H. Voldman 978-0-470-51191-6 / 0-470-51191-5 352 pp. Pub: 28/09/12 Circuit Theory & Design Focuses on the testing and analysis of ESD phenomena that occur in the manufacturing and design of semiconductor chips, in order to optimise the reliability and robustness of products and circuits.

• Sets out up-to-date ESD testing methods to ensure the reliability of semiconductor chips, and the robustness of electronic products and circuits, developed from direct current, latchup, and radio frequency (RF) techniques.

• Examines the basic physics and characterisation of semiconductor devices and passive elements, such as metal-oxide-semiconductor field-effect transistors (MOSFETs), diodes, resistors, capacitors, inductors and magnetic recording elements.

• Analyses the specifications and standards for a number of existing test systems, including the human body model (HBM), machine model (MM), charged device model (CDM), transmission line pulse (TLP) and very fast transmission line pulse (VF-TLP).

• Semiconductor technology is a rapidly growing and developing field, with wide-ranging applications, and it is necessary to develop efficient ESD test and characterisation methods to keep up with this.

Practising ESD engineers, test operators and technicians, circuit designers, semiconductor device design engineers, and electrical engineers working the in the semiconductor industry. Graduate students taking courses on ESD or CMOS/semiconductor technology.

Test and Characterization

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Circuits, Components & Devices ESD: Design and Synthesis Steven H. Voldman 978-0-470-68571-6 / 0-470-68571-9 290 pp. Pub: 11/03/11 Circuit Theory & Design A unique book focusing on ESD design synthesis and integration into a full semiconductor chip. This book studies electrical overstress, ESD, and latchup from a whole-chip ESD design synthesis approach. It provides a clear insight into the integration of ESD protection networks from a generalist perspective, followed by examples in specific technologies, circuits, and chips. Uniquely both the semiconductor chip integration issues and floorplanning of ESD networks are covered from a ‘top-down' design approach.

• Focuses on practical design techniques, providing good design practices and rules

• Contains essential information on chip floor-planning and architecture that has not been published in a single book before

• Covers up-to-date technology benchmarking and characterisation

• Uses state-of-the-art examples with detailed discussion

• Includes end-of-chapter design and integration problems

A reference for ESD engineers, circuit designers, semiconductor engineers, design synthesis team leaders, layout design engineers, characterisation engineers, technicians, floor-planning engineers, groundrule developers, test engineers and test site developers in the manufacturing and design of semiconductor chips.

3rd and 4th year undergraduate students in electrical engineering, semiconductor sciences, and manufacturing sciences, and on courses involving the design of ESD devices, chips and systems. Postgraduate students studying semiconductor chip design and reliability engineers. Graduate students in electrical engineering, graduate students in semiconductor and manufacturing science.

Click here to view a sample chapter

Page 7: Electrostatic discarge title highlights

G l o b a l R i g h t s G u i d e 7 J o h n W i l e y & S o n s , I n c .

ESD: Circuits and Devices Steven H. Voldman 978-0-470-84754-1 / 0-470-84754-9 412 pp. Pub: 04/11/05 Circuit Theory & Design The scaling of semiconductor devices from sub-micron to nanometer dimensions is driving the need for understanding the design of electrostatic discharge (ESD) circuits, and the response of these integrated circuits (IC) to ESD phenomena.

ESD Circuits and Devices provides a clear insight into the layout and design of circuitry for protection against electrical overstress (EOS) and ESD. With an emphasis on examples, this text:

• Explains ESD buffering, ballasting, current distribution, design segmentation, feedback, coupling, and de-coupling ESD design methods;

• Outlines the fundamental analytical models and experimental results for the ESD design of MOSFETs and diode semiconductor device elements, with a focus on CMOS, silicon on insulator (SOI), and Silicon Germanium (SiGe) technology;

• Focuses on the ESD design, optimization, integration and synthesis of these elements and concepts into ESD networks, as well as applying within the off-chip driver networks, and on-chip receivers; and

• Highlights state-of-the-art ESD input circuits, as well as ESD power clamps networks.

Practising engineers working in IC design, production, testing, semiconductor device and process development areas. Microelectronics engineers and VLSI design engineers. Senior and graduate students in microelectronics and IC design. Licensed: Simplified Chinese

Click here to view a sample chapter

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ESD Physics and Devices Steven H. Voldman 978-0-470-84753-4 / 0-470-84753-0 420 pp. Pub: 24/09/04 Components & Devices This volume is the first in a series of three books addressing Electrostatic Discharge (ESD) physics, devices, circuits and design across the full range of integrated circuit technologies. ESD Physics and Devices provides a concise treatment of the ESD phenomenon and the physics of devices operating under ESD conditions. Voldman presents an accessible introduction to the field for engineers and researchers requiring a solid grounding in this important area. The book contains advanced CMOS, Silicon On Insulator, Silicon Germanium, and Silicon Germanium Carbon. In addition it also addresses ESD in advanced CMOS with discussions on shallow trench isolation (STI), Copper and Low K materials.

• Provides a clear understanding of ESD device physics and the fundamentals of ESD phenomena.

• Analyses the behaviour of semiconductor devices under ESD conditions.

• Addresses the growing awareness of the problems resulting from ESD phenomena in advanced integrated circuits.

• Covers ESD testing, failure criteria and scaling theory for CMOS, SOI (silicon on insulator), BiCMOS and BiCMOS SiGe (Silicon Germanium) technologies for the first time.

• Discusses the design and development implications of ESD in semiconductor technologies.

An invaluable reference for EMC non-specialist engineers and researchers working in the fields of IC and transistor design. Also, suitable for researchers and advanced students in the fields of device/circuit modelling and semiconductor reliability.

Click here to view a sample chapter

Page 9: Electrostatic discarge title highlights

G l o b a l R i g h t s G u i d e 9 J o h n W i l e y & S o n s , I n c .

Mobile & Wireless Communications ESD: RF Technology and Circuits Steven H. Voldman 978-0-470-84755-8 / 0-470-84755-7 420 pp. Pub: 11/13/06 Mobile & Wireless Communications With the growth of high-speed telecommunications and wireless technology, it is becoming increasingly important for engineers to understand radio frequency (RF) applications and their sensitivity to electrostatic discharge (ESD) phenomena. This enables the development of ESD design methods for RF technology, leading to increased protection against electrical overstress (EOS) and ESD.

• Presents methods for co-synthesizisng ESD networks for RF applications to achieve improved performance and ESD protection of semiconductor chips;

• Discusses RF ESD design methods of capacitance load transformation, matching network co-synthesis, capacitance shunts, inductive shunts, impedance isolation, load cancellation methods, distributed loads, emitter degeneration, buffering and ballasting;

• Examines ESD protection and design of active and passive elements in RF complementary metal-oxide-semiconductor (CMOS), RF laterally-diffused metal oxide semiconductor (LDMOS), RF BiCMOS Silicon Germanium (SiGe), RF BiCMOS Silicon Germanium Carbon (SiGeC), and Gallim Arsenide technology;

• Gives information on RF ESD testing methodologies, RF degradation effects, and failure mechanisms for devices, circuits and systems;

• Highlights RF ESD mixed-signal design integration of digital, analog and RF circuitry;

• Sets out examples of RF ESD design computer aided design methodologies;

• Covers state-of-the-art RF ESD input circuits, as well as voltage-triggered to RC-triggered ESD power clamps networks in RF technologies, as well as off-chip protection concepts.

Licensed: Simplified Chinese

Click here to view a sample chapter

Page 10: Electrostatic discarge title highlights

Power Electronics ESD Basics: From Semiconductor Manufacturing to Use Steven H. Voldman 978-0-470-97971-6 / 0-470-97971-2 256 pp. Pub: 19/10/12 Power Electronics Electrostatic discharge (ESD) continues to impact semiconductor manufacturing, semiconductor components and systems, as technologies scale from micro- to nano electronics. This book introduces the fundamentals of ESD, electrical overstress (EOS), electromagnetic interference (EMI), electromagnetic compatibility (EMC), and latchup, as well as provides a coherent overview of the semiconductor manufacturing environment and the final system assembly. It provides an illuminating look into the integration of ESD protection networks followed by examples in specific technologies, circuits, and chips.

This text is unique in covering semiconductor chip manufacturing issues, ESD semiconductor chip design, and system problems confronted today as well as the future of ESD phenomena and nano-technology.

• The fundamentals of electrostatics, triboelectric charging, and how they relate to present day manufacturing environments of micro-electronics to nano-technology.

• Semiconductor manufacturing handling and auditing processing to avoid ESD failures.

• ESD, EOS, EMI, EMC, and latchup semiconductor component and system level testing to demonstrate product resilience from human body model (HBM), transmission line pulse (TLP), charged device model (CDM), human metal model (HMM), cable discharge events (CDE), to system level IEC 61000-4-2 tests.

For those new to the field, it is an essential reference.

ESD Basics

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