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USN 10cs72 Seventh Semester B.E. Degree Examination, Dec. 2O13/Jan.2Ol4 Embedded Gomputing System Time: 3 hrs. Max. Marks:100 Note: Answer FIVEfull questions, selecting atleast TWO questions from each part. PART - A 1 a. What is an embedded system? Explain the purpose of ES? List its major application areas and give one example for each? (08 Marks) c. d. d C) o I g o (J ! ox co- J' 6e ;r a* dr+ :oo Yo otr -O -! ()= od) ooi 26 .r? o 'ia OE IE o_l o: atE E.- LO JE >'! oo" co0 o= uo tr> ^-o 5" (r< :' () o '7 L E b. Differentiate the following, with an example : i) MicroproCessor and microcontroller ii) Embedded system and general purpose computers. 2a. b. c. d. Write a requirement chart for digital camera? v) Disadvantages of busy -- wait IO? What is an interrupt? Explain with neat diagram the interrupt mechanism. 6.5 ns and main memory access time is 80 ns? : a. :, Explain with neat diagram, the bus with a DMA controller. b. Explain the following briefly : i) Counter ii) Watchdog timer iii) Break point iv) Timer. c. Differentiate PCI and USB by their characteristics. d. Assume that the bus has a 1 MHz bus clock period, width transfer itself takes 1 clock cycles, address and handshaking List challenges of embedded computing system design? Explain briefly any two challenges. , (03 Marks) What are the major difference between Von neuman and Hardward architecture? (04 Marks) Explain the following : it Restrictions of MUL instruction ii) Ljses of MLA instruction iiil Register indirect addressing in ARM iv) Write a ARM assembly code for below C - statement z: (x122) and (y >> 2) (06 Marks) (03 Marks) (04 Marks) (04 Marks) (03 Marks) is 2 bltes per transfer, data signals before data is 2 clock (07 Marks) (05 Marks) Solve the following : i) What is the average memory access time of machine whose.hit rate is93o/o with cache access time of 5ns and mainmemory access time of 80 ns? ii) Calculate cache hit rate, if the cache access time is 5 ns, average memory access time is cycles and sending ACK after data is 1 clock cycles i) What is the total transfer time in clock cycles to transfers of total612000 bytes of data? ii) What is the total burst mode transfer time in clock cycle, if B : 2byte with 2 byte wide cfi.$?K&i- L$B.s{&&v w iii) Calculate the total real time to transfer data. (08 Marks) For More Question Papers Visit - www.pediawikiblog.com For More Question Papers Visit - www.pediawikiblog.com www.pediawikiblog.com

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Page 1: Embedded Computing System Jan 2014

USN 10cs72

Seventh Semester B.E. Degree Examination, Dec. 2O13/Jan.2Ol4Embedded Gomputing System

Time: 3 hrs. Max. Marks:100Note: Answer FIVEfull questions, selecting

atleast TWO questions from each part.

PART - A

1 a. What is an embedded system? Explain the purpose of ES? List its major application areas

and give one example for each? (08 Marks)

c.d.

dC)

oIg

o(J!

oxco-

J'6e

;ra*

dr+:ooYootr-O-!

()=

od)

ooi

26

.r? o'iaOE

IE

o_l

o:atEE.-LOJE

>'!oo"co0o=uotr>^-o5"(r<:'()o'7

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E

b. Differentiate the following, with an example :

i) MicroproCessor and microcontrollerii) Embedded system and general purpose computers.

2a.b.

c.d.

Write a requirement chart for digital camera?

v) Disadvantages of busy -- wait IO?What is an interrupt? Explain with neat diagram the interrupt mechanism.

6.5 ns and main memory access time is 80 ns?

:

a. :, Explain with neat diagram, the bus with a DMA controller.b. Explain the following briefly :

i) Counterii) Watchdog timeriii) Break pointiv) Timer.

c. Differentiate PCI and USB by their characteristics.d. Assume that the bus has a 1 MHz bus clock period, width

transfer itself takes 1 clock cycles, address and handshaking

List challenges of embedded computing system design? Explain briefly any two challenges., (03 Marks)

What are the major difference between Von neuman and Hardward architecture? (04 Marks)Explain the following :

it Restrictions of MUL instructionii) Ljses of MLA instructioniiil Register indirect addressing in ARMiv) Write a ARM assembly code for below C - statement z: (x122) and (y >> 2)

(06 Marks)(03 Marks)

(04 Marks)

(04 Marks)(03 Marks)

is 2 bltes per transfer, datasignals before data is 2 clock

(07 Marks)(05 Marks)

Solve the following :

i) What is the average memory access time of machine whose.hit rate is93o/o with cacheaccess time of 5ns and mainmemory access time of 80 ns?

ii) Calculate cache hit rate, if the cache access time is 5 ns, average memory access time is

cycles and sending ACK after data is 1 clock cyclesi) What is the total transfer time in clock cycles to transfers of total612000 bytes of data?ii) What is the total burst mode transfer time in clock cycle, if B : 2byte with 2 byte wide

cfi.$?K&i-L$B.s{&&vw

iii) Calculate the total real time to transfer data. (08 Marks)For More Question Papers Visit - www.pediawikiblog.com

For More Question Papers Visit - www.pediawikiblog.com

www.pediawikiblog.com

Page 2: Embedded Computing System Jan 2014

10cs72

4 a. Consider the following ARM assembly code, which illustrate some sample C statement.

LDR LDR ADD STR LDR LDR ADD STR LDR ADD STR LDR LDR SIJB STR

fo, B rr, b tz, fo,l1

f:.W llo. C rr, d tz, fo,

It,fz, X ft, e fo, ft

b.ro.u ro' o rr, b lu, rr

ro.

t\ L

Answer total following :

i) Write the sample C code fragment for the above ARM assembly codeii) Draw a lifetime graph that shows uses of register in register allocation for the above

C statementiii) Modify the obtained C code statement using operator scheduling for register allocationiv) Draw a lifetime graph for the modified 'C' code appearv) Write a ARM assembly code for the modified 'C' code using register allscation.

(10 Marks)b. Considerthe following'C' code statement

if(a>b)x:a+b;else . ,,. '"",.,

x:a-b:i) Write CDFG for the'above 'C' statementii) Generate the ARM asSembly code for the above 'C' statement.

c. Explain briefly different types of performance measures on programs.

PART - B

5a.b.

c.

d.

6a.b.

What is RTOS? Explain with an exanrple the hard real time and soft real time.Differentiate process and theads, What are the parameters of PCB of a

should each process have a distinct PCB?What is the significance of spinlock?What is semaphores? Explain briefly the different typ$o of semaphores?

Explain with neat diagram. the concept of memory mapped object.Explain the folibwing :

i) Message passingii) Remote procedure call for IPC.What are the factors needs to be evaluated in selection of an RTOS? Explain.

(06 Marks)process? Why

(08 Marks)(02 Marks)(04 Marks)

(08 Marks)

(06 Marks)(06 Marks)

(08 Marks)(04 Marks)(06 Marks)(02 Marks)

(07 Marks)(03 Marks)

(08 Marks)(06 Marks)(06 Marks)

c.

a. Explain with neat diagram the various fields of IP packet.b. List the features of internet LAN.c. With neat diagram, explain the various fields of CAN frame.d. Briefly explain any two features of HTTP protocols.

a. Explain the following :

i) Simulatorii) Target systemiii) Debuggingiv) Logic analyzer.

b. Explain features advantages and limitations of simulator based debugging.c. Explain the types of multitasking.

****iqFor More Question Papers Visit - www.pediawikiblog.com

For More Question Papers Visit - www.pediawikiblog.com

www.pediawikiblog.com