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ServiceManual

Model:GM600

Internal Use Only

Service ManualGM600

Date: April, 2010 / Issue 1.0


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- -Copyright 2010 LG Electronics. Inc. All right reserved.Only for training and service purposes

LGE Internal Use Only

G

REVISED HISTORY

Editor Date Issue Contents of Changes S/W Version

A

* The information in this manual is subject to change without notice and should not beconstrued as a commitment by LGE Inc. Furthermore, LGE Inc. reserves the right, withoutnotice, to make changes to equipment design as advances in engineering and manufacturingmethods warrant.

z This manual provides the information necessary to install, program, operate andmaintain the GM600.


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- -LGE Internal Use Only Copyright 2010 LG Electronics. Inc. All right reserved.Only for training and service purposes


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Table Of Contents

1. Introduction ...................................................7

1.1 Purpose ......................................................................7

1.2 Regulatory Inormation ............................. ....................7

2. General Performance ................................... 11

2.1 H/W Feature..............................................................11

2.2 Technical specifcation ...............................................12

3. Tecnical brief .............................................18

.1. GM600 Functional Block diagram. .............................18

.2 Baseband Processor (BBP) Introduction ......................19

. Power management IC...............................................29

. Power ON/OFF ..........................................................

. SIM & Micro SD interace ............................... ............

.6 Memory ....................................................................7

.7 LCD Display ..............................................................8

.8 Keypad Switching & Scanning ............................. .......0

.9 Keypad back-light illumination ............................. .......1

.10 LCD back-light illumination ......................................2

.11 JTAG & ETM interace connector ............................. .

.12 Audio .............................. ................................. .......

.1 Audio amplifer ........................................................6

.1 Microphone circuit ............................ .......................6

.1 Charging circuit ................................ .......................7

.16 FM radio & BLUETOOTH...........................................7

.17 u-USB Multi Media Interace connector .....................1

.18 Multimedia Chip ( TCC7921) ....................................2

.19 General Description ............................... ..................

.20 Receiver part .............................. .............................6.21 Transmitter part .......................................................7

.22 RF synthesizer ............................ .............................8

.2 DCXO .....................................................................8

.2 Front End Module control ............................. ............9

.2 Power Amplifer Module ............................... ............60

.26 PAM Schematic ................................ .......................61

.27 Broadcasting .............................. .............................62

4. Trouble Sooting ..........................................63

.1 Trouble shooting test setup ................................ ........6

.2 Power on Trouble ............................... ........................6

. Charging trouble........................................................67

. LCD display trouble ...................................................69

. Camera Trouble ................................. ........................71

.6 Receiver & Speaker trouble ................................ ........7

.7 Microphone trouble ...................................................7

.8 Vibrator trouble..........................................................77

.9 Keypad back light trouble ............................. ..............79

.10 SIM & uSD trouble ................................ ...................81

.11 Touch trouble ....................................................... ...8

.12 Trouble shooting o Receiver part ..............................87

.1 Trouble shooting o Transmitter part ..........................9

.1 Trouble shooting o Broadcasting part .....................100

5. Download ...................................................103

6. Block diagram ............................................116

7. Circuit Diagram ..........................................117

8. BGA Pin Map .............................................. 125

9. PCB Layout .................................................133

10. RF Calibration ..........................................137

10.1 Test Equipment Setup ........................................... .17

10.2 Calibration Step ............................... ......................17

11. Stand-alone Test ......................................142

11.1 Test Program Setting ............................................ .12

11.2 Tx Test ................................. ................................ .1

11. Rx Test ................................. ................................ .1

12. Exploded view & Replacement part list .147

12.1 Exploded view .......................................................17

12.2 Replacement Parts ................................................19

12. Accessory .............................................................172


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- 6 -LGE Internal Use Only Copyright 2010 LG Electronics. Inc. All right reserved.Only for training and service purposes


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- 7 -Copyright 2010 LG Electronics. Inc. All right reserved.Only for training and service purposes


1. Introduction

1. Introduction

G

1.1. Purpose

This manual provides the information necessary to repair, calibration, description and download thefeatures of the GM600.

1.2. Regulatory Information

1.2.1. Security

Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example,persons other than your companys employees, agents, subcontractors, or person working on your

companys behalf) can result in substantial additional charges youre your telecommunications services.System users are responsible for the security of own system. There are may be risks of toll fraudassociated with your telecommunications system. System users are responsible for programming andconfiguring the equipment to prevent unauthorized use. LGE does not warrant that this product isimmune from the above case but will prevent unauthorized use of common-carrier telecommunicationservice of facilities accessed through or connected to it. LGE will not be responsible for any charges thatresult from such unauthorized use.

1.2.2. Incidence of Harm

If a telephone company determines that the equipment provided to customer is faulty and possiblycausing harm or interruption in service to the telephone network, it should disconnect telephone serviceuntil repair can be done. A telephone company may temporarily disconnect service as long as repair isnot done.

1.2.3. Changes in Service

A local telephone company may make changes in its communications facilities or procedure. If thesechanges could reasonably be expected to affect the use of the GM600 or compatibility with the network,the telephone company is required to give advanced written notice to the user, allowing the user to takeappropriate steps to maintain telephone service.

1.2.4. Maintenance Limitations

Maintenance limitations on the GM600 must be performed only at the LGE or its authorized agents.The user may not make any changes and/or repairs expect as specifically noted in this manual.Therefore, note that unauthorized alternations or repair may affect the regulatory status of the systemand may void any remaining warranty.

1.2.5. Notice of Radiated Emissions

The GM600 complies with rules regarding radiation and radio frequency emission as defined by localregulatory agencies. In accordance with these agencies, you may be required to provide informationsuch as the following to the end user.


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1. Introduction

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1.2.6. Pictures

The pictures in this manual are for illustrative purposes only; your actual hardware may look slightlydifferent.

1.2.7. Interference and Attenuation

A GM600 may interfere with sensitive laboratory equipment, medical equipment, etc. Interference fromunsuppressed engines or electric motors may cause problems.

1.2.8. Electrostatic Sensitive Devices

ATTENTION

A board, which contains Electrostatic Sensitive Device (ESD), are indicated by the sign. Followinginformation is ESD handling: Service personnel should ground themselves by using a wrist strap whenexchange system boards.When repairs are made to a system board, they should spread the floor with anti-static mat which is alsogrounded. Use a suitable, grounded soldering iron. Keep sensitive parts in these protective packagesuntil these are used. When returning system boards or parts such as EEPROM to the factory, use theprotective package as described.


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1. Introduction

ABBREVIATION

G

For the purposes of this manual, following abbreviations apply:

APC Automatic Power Control

BB Baseband

BER Bit Error Ratio

CC-CV Constant Current Constant Voltage

CLA Cigar Lighter Adapter

DAC Digital to Analog Converter

DCS Digital Communication System

dBm dB relative to 1 milli-watt DSP Digital Signal Processing

EEPROM Electrical Erasable Programmable Read-Only Memory

GEGPRS Enhanced General Packet Radio ServiceG

EL ElectroluminescenceG

ESD Electrostatic Discharge

FPCB Flexible Printed Circuit Board

GMSK Gaussian Minimum Shift Keying

GPIB General Purpose Interface Bus

GPRS General Packet Radio Service

GSM Global System for Mobile Communications

IPUI International Portable User Identity

IF Intermediate Frequency

LCD Liquid Crystal Display

LDO Low Drop Output

LED Light Emitting Diode

LGE LG Electronics

OPLL Offset Phase Locked Loop

PAM Power Amplifier Module

PCB Printed Circuit Board

PGA Programmable Gain Amplifier PLL Phase Locked Loop

PSTN Public Switched Telephone Network

RF Radio Frequency

RLR Receiving Loudness Rating

RMS Root Mean Square

RTC Real Time Clock

SAW Surface Acoustic Wave

SIM Subscriber Identity Module

SLR Sending Loudness Rating


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1. Introduction

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SRAM Static Random Access Memory

STMR Side Tone Masking Rating

TA Travel Adapter

TDD Time Division Duplex

TDMA Time Division Multiple Access

UART Universal Asynchronous Receiver/Transmitter

VCO Voltage Controlled Oscillator

DCXO Digitally Controlled Crystal Oscillator WAP Wireless Application Protocol

G8PSK 8 Phase Shift Keying


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2. General Performance


G

2.1 H/W Feature

Item Feature Comment

Standard Battery Li-ion, 1100mAh

AVG TCVR Current 270mA typ. @PCL5

Standby Current 3.4mA typ. PP9

Talk time 4 hours (GSM TX Power Level 7)

Standby time Up to 320 hours (Paging Period:9, RSSI: -85dBm)

Charging time Under 3 hours

RX Sensitivity EGSM/GSM850:-108dBm,DCS/PCS:-107dBm

TX output powerEGSM/GSM850 : 33dBm (@PCL 5)DCS/PCS: 30dBm (@PCL 0)

GPRS compatibility Class 12

SIM card type 3V Small

Display Main 240 u 400 pixels, 3 WQVGA, 262K color

Status Indicator

Send Key, Shortcut Key, Volume Up/Down Key, PWR

Key, Camera Key, Lock Key

ANT Built in antenna

EAR Phone Jack u USB multi port Headset jack

PC Synchronization Yes

Speech coding HR/EFR/FR/AMR

Data and Fax Yes

Vibrator Yes

Buzzer NoVoice Recoding Yes

C-Mic Yes

Receiver Yes

Travel Adapter Yes

Options Bluetooth hands-free kit, Data Kit


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G

2.2 Technical specification

Item Description Specification

1 Frequency Band

GSM900

TX: 890 + 0.2 x n MHz

RX: 935 + 0.2 x n MHz ( n = 1 ~ 124 )

EGSM

TX: 890 + 0.2 x (n-1024) MHz

RX: 935 + 0.2 x (n-1024) MHz ( n = 975 ~ 1023 )DCS1800

TX: 1710 + ( n-511 ) u 0.2 MHz (n = 512 a 885)

RX: TX + 95 MHzPCS1900

TX: 1850.2 + ( n-512 ) u 0.2 MHz (n = 512 a 810)

RX: TX + 80MHz

2 Phase ErrorRMS < 5 degrees

Peak < 20 degrees

3 Frequency Error < 0.1ppm

GSM900/EGSM

Level Power Toler. Level Power Toler.

5 33 dBm 2dB 13 17 dBm 3dB

6 31 dBm 3dB 14 15 dBm 3dB

7 29 dBm 3dB 15 13 dBm 3dB

8 27 dBm 3dB 16 11 dBm 5dB

9 25 dBm 3dB 17 9 dBm 5dB

10 23 dBm 3dB 18 7 dBm 5dB

11 21 dBm 3dB 19 5 dBm 5dB

12 19 dBm 3dB

DCS1800/PCS1900




2 26 dBm 3dB 10 10 dBm 4dB





4 Power Level



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G

GSM900/EGSM

Offset from Carrier (kHz). Max. dBc

100 +0.5

200 -30

250 -33

400 -60

600 ~ 1,200 -60

1,200 ~ 1,800 -60

1,800 ~ 3,000 -63

3,000 ~ 6,000 -65

6,000 -71

DCS1800/PCS1900

Offset from Carrier (kHz). Max. dBc

100 +0.5

200 -30

250 -33

400 -60600 ~ 1,200 -60

1,200 ~ 1,800 -60

1,800 ~ 3,000 -65

3,000 ~ 6,000 -65

5Output RF Spectrum(due to modulation)

6,000 -73

GSM900/EGSM

Offset from Carrier (kHz) Max. (dBm)

400 -19

600 -21

1,200 -21

1,800 -24

DCS1800/PCS1900

Offset from Carrier (kHz) Max. (dBm)

400 -22

600 -24

1,200 -24

6Output RF Spectrum(due to switching transient)

1,800 -27


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G

7 Spurious EmissionsConduction, Emission Status

Conduction, Emission Status

8 Bit Error Ratio

EGSMBER (Class II) < 2.439% @-102dBm

DCS1800/PCS1900BER (Class II) < 2.439% @-102dBm

9 Rx Level Report accuracy r 3 dB

10 SLR 8 r 3 dB

Frequency (Hz) Max.(dB) Min.(dB)

100 -12 /

200 0 /

300 0 -12

1,000 0 -6

2,000 4 -6

3,000 4 -6

3,400 4 -9

11 Sending Response

4,000 0 /

12 RLR 2 r 3 dB

Frequency (Hz) Max.(dB) Min.(dB)

100 -12 /

200 0 /

300 2 -7

500 * -5

1,000 0 -5

3,000 2 -5

3,400 2 -10

4,000 2

13 Receiving Response

* Mean that Adopt a straight line in between 300Hz and 1,000 Hz to be Max. level in the range.

14 STMR 13 r 5 dB

15 Stability Margin > 6 dB

dB to ARL (dB) Level Ratio (dB)

-35 17.5

-30 22.5

-20 30.7

-10 33.3

0 33.7

7 31.7

16 Distortion

10 25.5


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17 Side tone Distortion Three stage distortion < 10%

18 System frequency (26 MHz)tolerance

d 2.5 ppm

19 32.768KHz tolerance d 30ppm

20 Power consumptionStandby

- Normald 3.4 mA(@PP9)

21 Talk Time EGSM/Lvl 7 (Battery Capacity 1100mA):240minEGSM/Lvl13(Battery Capacity 1100mA):480min

22 Standby Time

Under conditions, at least 320 hours:1. Brand new and full 1100mAh battery2. Full charge, no receive/send and keep GSM in

idle mode.3. Broadcast set off.4. Signal strength display set at 3 level above.5. Backlight of phone set off.

23 Ringer Volume

At least 65 dB under below conditions:1. Ringer set as ringer.

2. Test distance set as 50 cm

24 Charge CurrentFast Charge : < 400 mASlow Charge: < 120 mA

Antenna Bar Number Power

7 < -93dBm 3dB

7 5 -93dBm 3dB

5 4 -98dBm 3dB

4 2 -101dBm 3dB

2 1 -104dBm 3dB

1 0 -106dBm 3dB

25 Antenna Display

Off No service

Battery Bar Number Voltage (0.05V)

3 < 3.75 0.05

32 3.75 0.05

21 3.67 0.05

26 Battery Indicator

10 3.60 0.05

3.60V 0.05V (Call)27 Low Voltage Warning

3.60V 0.05V (Standby)

28 Forced shut down Voltage 3.36 r 0.05 V


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G

29 Battery Type

Li-ion BatteryStandard Voltage = 3.7 VBattery full charge voltage = 4.2 VCapacity: 1100mAh

30 Travel Charger

Switching-mode charger

Input: 100 a 240 V, 50/60HzOutput: 5.1V, 700mA

* EDGE RF Specification (Option: is not serviced for EDGE mode)

Item Description Specification1 RMS EVM 9%

2 Peak EVM 30%

3 95th

Percentile EVM 15%

4 Origin Offset Suppression 30dB

GSM900/EGSM


5 27dBm 3dB 13 17dBm 3dB






11 21dBm 3dB 19 5dBm 5dB12 19dBm 3dB

DCS1800, PCS1900


0 26/25dBm 3dB 8 14dBm 3dB

1 26/25dBm 3dB 9 12dBm 4dB

2 26/25dBm 3dB 10 10dBm 4dB





5 Power Level


GSM900/EGSM

Offset from carrier(kHz) Max. dBc100 +0.5

200 -30

250 -33

400 -54

600~


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600~


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3. TEChNICAL BRIEF

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3.2. Baseband Processor (BBP) Introduction

GFigure 2 Top level block diagram of the S-GOLD3

TM(PMB8877)

3.2.1. General Description

S-GOLD3

TM

is a GSM/EDGE single chip mixed signal Baseband IC containing all analog and digitalfunctionality of a cellular radio. Additionally S-GOLD3TM

Provides multimedia extensions such as camera,software MIDI, MP3 sound. It is designed as a single chip solution, integrating the digital and mixedsignal portions of the base band in 0.09um, 1.2V technology.The chip will fully support the FR, EFR, HR and AMR-NB vocoding.S-GOLD3

TMsupport multi-slot operation modes HSCSD (up to class 10), GPRS for high speed data

application (up to class 12) and EGPRS (up to class 12) without additional external hardware.


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3. TEChNICAL BRIEF

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3.2.2. Block Descriptionz Processing core

ARM926EJ-S 32 bit processor core for controller functions. The ARM926EJ-S includes an MMU, andthe Jazelle Java extension for Java acceleration.- TEAKLite DSP core

z ARM-Memory- 32k Byte Boot ROM on the AHB- 96k Byte SRAM on the AHB, flexibly usable as program or data RAM- 16k Byte Cache for Program (internal)- 8k Byte tightly coupled memory for Program(internal)- 8k Byte Cache for Data(internal)

- 8k Byte tightly coupled memory for Data(internal)

z DSP-Memory- 104K x 16bit Program ROM- 8k x 16bit Program RAM- 60k x 16bit Data ROM- 37k x 16bit Data RAM- Incremental Redundancy(IR) Memory of 35904 words of 16bit

z Shared Memory Block1.5K x 32bit Shared RAM(dual ported) between controller system and TEAKLite.

z Controller Bus systemThe processor cores and their peripherals are connected by powerful buses.

Multi-layer AHB for connecting the ARM and the other master capable building blocks with the internaland external memories and with the peripheral buses.

z Clock systemThe clock system allows widely independent selection of frequencies for the essential parts of theS-GOLD3. Thus power consumption and performance can be optimized for each application.

z Functional Hardware block- CPU and DSP Timers- MOVE coprocessor performing motion estimation for video encoding algorithms(H.263, MPEG-4)

- Programmable PLL with additional phase shifters for system clock generation- GSM Timer Module that off-loads the CPU from radio channel timing

- GMSK / 8-PSK Modulator according to GSM-standard 05.04 (5/2000)- GMSK Modulator: gauss-filter with B*T=0.3- EDGE Modulator: 8PSK-modulation with linearized GMSK-Pulse-Filter- Hardware accelerators for equalizer and channel decoding.- Incremental Redundancy memory for EDGE class 12 support- A5/1, A5/2, A5/3 Cipher unit- GEA1, GEA2, GEA3 Cipher Unit to support GPRS data transmission- Advanced static and dynamic power management features including TDMA-Framesynchronous low power mode and enhanced CPU modes(idle and sleep modes)


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3. TEChNICAL BRIEF

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- Pulse Number Modulation output for Automatic Frequency Correction(AFC)- Serial RF Control interface: support of direct conversion RF- A Universal Serial Interface(USIF) enabling asynchronous (UART) of synchronous (SPI)serial data transmission

- 3 USIF with autobaud detection, hardware flow control and integrated- A dedicated Fas IfDA Controller supporting IrDAs SIR,MIR and FIR standards(up to 4Mbps)

- I2C-bus interface (e.g. connection to S/M power)- A fast display interface supporting serial and parallel interconnection- An ITU-R BT.656 compatible Camera interface.- Programmable clock output for a camera- An multimedia/Secure Digital Card Interface (MMCI/SD:SDIO capable)

3.2.3. External Devices connected to memory interface

GTable 1 Memory interface

Device Name Maker Remark

FLASH K522H1HACB-B060 Samsung Synchronous / A synchronous

DDR K522H1HACB-B060 Samsung Synchronous 166MHz

3.2.4. RF Interface (T_OUT)

S-Gold3 uses this interface to control RF IC and Peripherals. 13 signals are provided switch on/off RFICs Periodically each TDMA frame.

Table 2 RF Interface Spec.

T_OUT

Resource Interconnection Description

T_OUT0 TXON_PA PAM Power on

T_OUT1 FE2 FEM control

T_OUT2 PA_BAND TX RF band selectT_OUT3 FE1 FEM control

T_OUT4 Other function -

T_OUT5 Other function -

T_OUT6 PA MODE PAM Mode select

G GGGGG


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3. TEChNICAL BRIEF

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3.2.5. USIF Interface

GM600 have three USIF Drivers as follow :- USIF1 : Hardware Flow Control / SW upgrade / Calibration- USIF2 : Not used Rx, Tx and CTS, RTS use BT Interface- USIF3 : BT Interface

Table 3 USIF Interface Spec.

3.2.6. ADC channel

BBP ADC block is composed of 10 external ADC channel. This block operates charging process andother related process by reading battery voltage and other analog values.

Table 4 S-Gold3 ADC channel usage

ADC channel

Resource Interconnection Description

M0 BAT_ID Battery temperature measure

M1 RF_TEMP RF block temperature measure

M2 N.C

M3 N.C

M4 N.C

M5 N.C

M6 N.C

M7 N.C

M8 VBAT (divide resistor) Battery supply voltage measure

M9 N.C

M10 N.C

Resource Name Remark

USIF1

USIF1_TXD UART_TX Transmit DataUSIF1_RXD UART_RX Receive Data

USIF1_CTS USB_SE0_VMUSIF1_RTS USB_DAT_VP

USIF2

USIF2_TXDUSIF2_RXDUSIF2_CTS UART_BT_CTSUSIF2_RTS UART_BT_RTS.

USIF3

USIF3_TXD UART_BT_TX BT Transmit tx

USIF3_RXDUSIF3_SCLK

UART_BT_RX BT Receive rx


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3. TEChNICAL BRIEF

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3.2.7. GPIO map

Over a hundred allowable resources, GM600 is using as follows except dedicated to SIM and Memory.GM600 GPIO(General Purpose Input/Output) Map, describing application, I/O state, and enable level, isshown in below table

Table 5 S-Gold3 GPIO pin Map

Port Function Net Name Description

KEY MATRIX GKP_IN0 KEYIN0 GKP_IN1 KEYIN1 GKP_IN2 KEYIN2 GKP_IN3 LCD_VSYNC GKP_IN4 TCC_USBIN GKP_IN5 NC GKP_IN6 NC GKP_OUT0 KPOUT0 GKP_OUT1 KPOUT1 GKP_OUT2 KPOUT2 GKP_OUT3 NC GUSIF1 GUSIF1_RXD UART_RX UART, RS232 Data

USIF1_TXD UART_TX UART, RS232 DataUSIF1_RTS_N USB_SE0_VM USB Data

USIF1_CTS_N USB_DAT_VP USB Data

USIF2 GUSIF2 _RXD NC

USIF2 _TXD NC

USIF2_RTS_N UART_BT_RTS Bluetooth RTS

USIF2_CTS_N UART_BT_CTS Bluetooth CTS

USIF3 GUSIF3 _RXD UART_BT_RX Bluetooth RX

USIF3 _TXD UART_BT_TX Bluetooth TX

CLK GCLK32K CLK32k For FM Radio, BT CLK32K

GPIO_22 G Not usedCAMERA I/F GCIF_D0 MM_AD0

CIF_D1 MM_AD1

CIF_D2 MM_AD2

CIF_D3 MM_AD3

CIF_D4 MM_AD4

CIF_D5 MM_AD5

CIF_D6 MM_AD6

CIF_D7 MM_AD7

CIF_PCLK LCD_RESETCIF_HSYNC USB_SELECT


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3. TEChNICAL BRIEF

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CIF_VSYNC LCD_BL_EN

CLKOUT LCD_BYPASS_EN

CIF_PD NC

CIF_RESET TCC_PMIC_EN

LCD I/F G

DIF_D0 MM_AD8

DIF_D1 MM_AD9

DIF_D2 MM_AD10

DIF_D3 MM_AD11

DIF_D4 MM_AD12

DIF_D5 MM_AD13

DIF_D6 MM_AD14

DIF_D7 MM_AD15

DIF_D8 LCD_ID

DIF_CS1 MM_CS1_N

DIF_CS2 CHG_EOC

DIF_CD MM_A16

DIF_WR MM_WR_N

DIF_RD MM_RD

DIF_HD HOOK_DETECT

DIF_RESET1 TCC_INT

DIF_RESET2 TOUCH_INT

I2C GI2C_SCL I2C_SCL For FM/BT/Amp/Camera

I2C_SDA I2C_SDA For FM/BT/Amp/Camera

PM_INT (EINT) PM_INT G

SIM I/F G

CC_IO SIM_IO SIM CARD I/O

CC_CLK SIM_CLK SIM CARD CLOCK

CC_RST SIM_RST SIM CARD RESET

I2S2

I2S2_CLK0 i{~hrl|w

I2S2_CLK1 NC

I2S2_RX _PPR

I2S2_TX ACCEL_INT

I2S2_WA0 TCC_MMC_WAKEUP

I2S2_WA1 uj

External Memory G

MMCI1_CMD NC T-flash

MMCI1_DAT[0] NC T-flash

MMCI1_DAT[1] MMC_DAT[1] T-flash



MMCI2_CMD LIN_MOTOR_EN

MMCI2_DAT[0] MAIN_KEY_EN


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3. TEChNICAL BRIEF

G

MMCI2_CLK MUIC_INT

IrDA G

IRDA_TX USB_OEN

IRDA_RX NC

I2S1 G

I2S1_CLK0 BT_PCM_CLK For Bluetooth

GPTU0_0 MMC_DAT Not Used

I2S1_RX BT_PCM_IN For Bluetooth

I2S1_TX BT_PCM_OUT For Bluetooth

I2S1_WA0 BT_PCM_SYNC For Bluetooth

Audio I/F G

EPN11 RCV_N For Headset

EPN12 RCV_N

EPP11 RCV_P For Headset

EPP12 RCV_P

EPPA11 EAR_SPK_L For Speaker

EPPA12 EAR_SPK_L

EPREF1 uj Reference

EPREF2 ujG

EPPA21 EAR_SPK_R For Speaker

EPPA22 EAR_SPK_R

MICN1 MAIN_MIC_N For Mic

MICP1 MAIN_MIC_P For Mic

MICN2 HS_MIC_N For Headset Mic

MICP2 HS_MIC_P For Headset Mic

VMICP VMIC_P Power for MIC

VMICN VMIC_N Power for MIC

ADC G

M0 BAT_ID Battery temperature measure

M1 RF_TEMP RF block temperature measure

M2

M3

M7M8 VSUPPLY Battery supply voltage measure

M9

M10

Reference G

VREF VREFN G

IREF PULL DOWN G

JTAG I/F G

TDO NC JTAG

TDI NC JTAG

TMS NC JTAG

TCK NC JTAG

TRST_n NC JTAG


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3. TEChNICAL BRIEF

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RTCK NC JTAG

ETM I/F GTRIG_IN TRIG_IN ETM (Embedded Trace Macro Cell)

MON1 PULL UP ETM

MON2 PULL DOWN ETM

TRACESYNC NC ETM

TRACECLK NC ETM

PIPESTAT[2] NC ETM

PIPESTAT[1] NC ETM

PIPESTAT[0] NC ETM

TRACEPKT[0] NC ETMTRACEPKT[1] NC ETM

TRACEPKT[2] NC ETM

TRACEPKT[3] NC ETM

TRACEPKT[4] NC ETM

TRACEPKT[5] NC ETM

TRACEPKT[6] NC ETM

TRACEPKT[7] NC ETM

Memory GMEM_AD[0] DATA(0) GMEM _AD[1] DATA (1) GMEM _AD[2] DATA (2) GMEM _AD[3] DATA (3) GMEM _AD[4] DATA (4) GMEM _AD[5] DATA (5) GMEM _AD[6] DATA (6) GMEM _AD[7] DATA (7) GMEM _AD[8] DATA (8) GMEM _AD[9] DATA (9) GMEM _AD[10] DATA (10) GMEM _AD[11] DATA (11) GMEM _AD[12] DATA (12) GMEM _AD[13] DATA (13) GMEM _AD[14] DATA (14) GMEM _AD[15] DATA (15) GMEM _WRn _WR GMEM _RDn _RD GMEM _BC0_n _BC0 GMEM _BC1_n _BC1 GMEM _BC2_n LDQS GMEM _BC3_n UDQS GMEM _A[0] ADD(0) GMEM _A[1] ADD (1) GMEM _A[2] ADD (2) GMEM _A[3] ADD (3) GMEM _A[4] ADD (4) GMEM _A[5] ADD (5) G


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3. TEChNICAL BRIEF

G

MEM _A[6] ADD (6) GMEM _A[7] ADD (7) GMEM _A[8] ADD (8) GMEM _A[9] ADD (9) GMEM _A[10] ADD (10) GMEM _A[11] ADD (11) GMEM _A[12] ADD (12) GMEM _A[13] ADD (13) GMEM _A[14] ADD (14) GMEM _A[15] ADD (15) GMEM _A[16] ADD (16)

GMEM _A[17] ADD (17) GMEM _A[18] ADD (18) GMEM _A[19] ADD (19) GMEM _A[20] ADD (20) GMEM _A[21] ADD (21) GMEM _A[22] ADD (22) GMEM _A[23] ADD (23) GMEM _A[24] ADD (24) GMEM _CS0_n _NAND_CS Samsung Nand (2GB)

MEM _CS1_n _RAM_CS Samsung SDRAM (1GB)

MEM _CS2_n TP103

MEM _CS3_n NC

MEM _ADVn BA1 GMEM _RAS_n _RAS GMEM _CAS_n _CAS GMEM _WAITn NC GMEM _SDCLKO SDCLKO For Burst mode

MEM _BFCLKO SDCLK1 For Burst mode

MEM _BFCLKI NC For Burst mode

MEM _CKE CKE GMemory GFCDP_RBn FCDP

TDMA I/F GT_OUT0 TXON_PA PAM

T_OUT1 FE2 PAM

T_OUT2 PA_BAND PAM

T_OUT3 FE1 PAM

T_OUT4 NC GT_OUT5 LIN_PWM_FREQ GT_OUT6 PA_MODE PAM

T_OUT7 CODEC_LDO_EN GT_OUT8 DSR

T_OUT9 I2C2_SDA

T_OU10 JACK_DETECT

T_IN0 I2C2_SCLT_IN1 _CHG_EN


27/171


3. TEChNICAL BRIEF

G

RF I/F GRF_STR0 RF_EN GRF_STR1 NC

RF_DATA RF_DA GRF_CLK RF_CLK GSystem Port GAFC NC GCLKOUT0 [


28/171



3. TEChNICAL BRIEF

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3.3. Power management IC

3.3.1. General Description

SM-POWER is a highly integrated Power and Battery Management IC for mobile handsets. It has beenspecially designed for usage with S-Gold3. Although optimized for usage with the Infineon S-GOLDbaseband device it is suitable for the S-GOLDlite and the E-GOLD+ baseband devices as well. It alsosupports the cellular RF devices like SMARTi-DC, SMARTi-DC+, SMARTi-SD and the BluemoonSingle, Infineons single chip solution for Bluetooth. If used with S-GOLD3 it provides all power supplyfunctions (except for the RF PA) for a complete advanced GSM Edge smart phone minimizing externaldevice count.

Block Description Highly efficient step-down converter for main digital baseband supply including Core, DSP and

memory interface (External Bus Unit). Support of S-GOLD standby power-down concept Low-drop-out (LDO) regulators for Flash and mobile RAM memory devices Voltage independent switching of two SIM cards LDO regulators for baseband I/O supply LDO regulator for analog mixed-signal section of S-GOLD Low-noise LDO regulators for RF devices Supply for Bluemoon Single, Infineons single chip solution for Bluetooth Audio amplifier 8 Ohms for handsfree operation and ringing Charge Control for charging Li-Ion/Polymer batteries under software control Pre-charge current generator with selectable current level

RTC regulator with ultra-low quiescent current USB interface support for peripheral and mini-host mode Backlight LEDs driver with current selection and PWM dimming function Two single LED driver outputs for signaling Vibrator driver with adjustable voltage Fully controlable by software via I2C Bus Temperature and battery voltage sensors Interrupt channels for peripherals System debug mode VQFN 48 package with heat sink and non-protruding leads Compatible with the Infineon E-GOLD+ V2 and V3

SM-POWER is a further step on the successful E-Power product line with enhanced and optimizedfunctionality.

SM-POWER features a baseband supply concept with a DC/DC step-down converter cascaded by twolinear regulators

SM-POWERs DC/DC converter makes up to 40 % reduction of battery current for smart phonefunctions (e.g. organizer functions, games, MP3 decoding) possible.

SDBB has high efficiency up to 95% and also a power save mode. Memory Interface is directly supported by the SDBB SDBB can also act as main supply voltage for E-GOLD+ or S-GOLDlite baseband devices. For S-GOLD two linear regulators for DSP and Core are cascaded after the SDBB.


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3. TEChNICAL BRIEF

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SM-POWER supports the standby power-down concept of S-GOLD by temporarily switching off thelinear regulator for the DSP during mobile standby whenever this subsystem is not used. In this phasethe ARM controller and most peripherals including parts of the on-chip SRAM are kept powered-up withpower being supplied by the other linear regulator.

SM-POWER includes a fully differential audio amplifier able to drive loads down to a nominal value of 8Ohm for usage in hands-free phones and for ringing

450 mW maximum output power

adjustable gain

mute switch SM-POWER also integrates a charging function for Li-Ion, Li-Polymer batteries

click and pop -protection SM-POWER also integrates a charging function for Li-Ion, Li-Polymer

batteries Precharge current source with two current levels Constant current / constant voltage charging with 3 different termination voltages Programable charge current limitation for use with different batteries Freely programable pulse charging to reduce the thermal power dissipation in the constant voltage

charging phase Top-off charge current sensing SM-POWER completes the USB interface of S-GOLD Regulated voltage for S-GOLD USB interface including reverse current and overvoltage protection Switch to supply USB pull-up resistor Mini-host pull down resistor functionality Charge pump with internal switching capacitor for USB host VBUS supply voltage SM-POWER fully

supports LED and Vibra Motor functionality no external components needed driver for backlight LEDs adjustable in steps up to 140mA and with soft turn on and off by PWM

dimming two driver outputs for single LEDs for precharge indication and signaling with i.e. change of colour

driver for Vibra Motor with adjustable voltages, soft startup / shutdown and currentlimitation SM-POWER offers several control functions

Power-on Reset Generator with logic state machine I2C bus interface

I2C bus configurable mode control logic with ON (push-button or RTC), VCXOEN and LRF3EN(wake-up by Bluetooth) inputs

Programable interrupt channels to handle peripherals like SIM, MMC and USB Monitoring of charging functions Undervoltage Shut-Down

Errorflags (volatile or non-volatile) from many power-supply functions and thermal sensor in order todebug system

Overtemperature Shut-Down Overtemperature Warning Support of S-GOLD standby power-down concept Support of S-GOLD Power-Down Pad Tristate Function


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3. TEChNICAL BRIEF

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Table 6 LDO Output Table of SM-Power

LDO Net name Output Voltage Output Current Usage

SD1 1V35_Core 1.35V 600mA Core & for LDO

SD2 1V8_SD 1.8V 300mA Audio Codec & Memory

VAUX 2V85_VFM 2.85V 100mA Audio Codec

VIO 2V62_VIO 2.62V 100mA Peripherals

VSIM 2V9_SIM 2.9V 70mA SIM card

VMME 2V9_VMME 2.9V 150mA u-SD

VUMTS 2V85_VLCD 2.85V 110mA LCD

VUSB VUSB 3.1V 40mA Switch USB And UART

VLED NC 2.9V 10mA Not usedVAUDIOa 2V5_VAUDA 2.5V 200mA Stereo headset, Mono earpiece

VAUDIOb 2V5_VAUDB 2.5V 50mA Analog parts of S-Gold

VRF1 2V85_VRF 2.85V 150mA2.85 V supply for SMARTi-PMRF transceiver

VRF2 1V5_VRF 1,53V 100mA1.5 V supply for SMARTi-PMRF transceiver

VRF3 2V65_VBT 2.7V 150mA Bluetooth

VPLL 1V35_VPLL 1.35V 30mA S-GOLD3 PLL

VRTC 2V11_RTC 2.11V 4mA Real Time Clock

VAFC 2V7_VRF 2.7V 5mA Not used

VVIB 2V8_AMP 2.8V 140mA Motor

Figure 3 SM-Power Circuit Diagram of GM600

002R

K7.4

PMB6821

U200

4H

8H

9D

6J

7H

6H

5H

9G

8G

7G

6G

5G

4G

3G

9F

8F

7F

6F

5F

4F

3F

9E

8E

7E

6E

5E

4E

8D

7D

6D

5D

4D

6C

L2

L10K2

J10K1

K11

J3

J11H3

H9J2

J1

H10

H1

H11H2

G10G1

G2

G11

F11F1

F10F2

E11E1

E10E2

D1

D11E3

D10

D2

C10C1

C11D3

C2

B1

11L

8A

9J

01K

9L

9K

8L

8K

7L

8J

7K

6L

7J

6K

5K

5J

5L

4L

4K

3L

3K

4J

1A

4B

11B

1L

11A

9B

01A

01B

9C

9A

8C

8B

6A

7C

7A

5A

7B

5C

6B

5B

4A

4C

3A

3B

3C

2A

2B

MV_

0ES

PV_

TAD

-CA

+CA

DNEPSUS

N_

EO

BSUV

BSU_

DDV

PNI_

ONOM

NNI_

ONOM

ONOM_

DDV

M_

XEFERV

PTUO_ONOM

ONOM_SSV

NTUO_ONOM

FERR

FERV

KNIHS_HSALF

NO_HSALF

APNOXT

LLPV

OILLPDDV

OIV

2DSV

3SMUP

2SMUP

1SMUP

TROPTUO

NO_REWOP

GODW

1FFO_NO

2FFO_NO

TUO_FFO_NO

LTRC_ECRUOSER

TNI_C2I

TAD_C2I

KLC_C2I

MWP_1LB

MWP_2LB

MWP_3LB

LRTNC_HC

ECRUOS_HC

CU_EGRAHC

EGRAHC_DDV

1NI_ESNES

2NI_ESNES

FER_DDV

DELV

1DSV

RCV

VPIN

VMIN VMME

D+ VDDMME

D-

VDDRF2

RESET_N VRF2

RESET2_N

SLEEP1_N VRF3

SLEEP2_N VDDRF13_AFC

VAUDIOA VRF1

VDDAUDIOA VVIB

VDDSIMVIB

VDDAUDIOB

VAUDIOB VSIM

VAUX VAFC

VDDAUX

VRTCSU1_GATE

SU1_GND VDDUMTS

SU1_FB VUMTS

SU1_ISENSE

VDDSD1

VDDSD2 SD1_FB

SD2_FB SD1_FBL

SD2_FBL

1SSV

2SSV

3SSV

4SSV

5SSV

6SSV

7SSV

8SSV

9SSV

01SSV

11SSV

21SSV

31SSV

41SSV

51SSV

61SSV

71SSV

81SSV

91SSV

02SSV

12SSV

22SSV

32SSV

42SSV

52SSV

62SSV

72SSV

82SSV

92SSV

03SSV

FERV_SSV

1DS_SSV

2DS_SSV

IND

102R

10u

C4

10u

L6

002PT

102C

u01

432C

u2.2

u1

302C

612C

u2.2

K7.4

502R

402C

u1

0

R206

2V9_SIM

VBAT

u2.2

502C

602C

u2.2

702C

u01

512C

u2.2

802C

u2.2

u2.2

012C

10u

L5

112C

u1.0

212C

u2.2

102PT

312C

u2.2

1V8_SD

u2.2

412C

202PT

2V5_VAUDB

202C

u2.2

VUSB

K7.4

312R

D200

2V11_RTC

C225

10uu2.2

712C

0

22

002BF

812C

u1.0

912C

u2.2

VBAT

u01

022C

VBAT

IND

512R

122C

u01

2V85_VRF

u1.0

222C

u1

322C

2V9_VMME

u2.2

422C

922C

u01

622C

u2.2

2V65_VBT

u1

722C

2V85_VFM

2V85_VLCD

402PT

822C

u1

1V8_SD

R218DNI

2V5_VAUDA

2V8_AMP

27K

R219

2V62_VIO

032C

u1.0

1V35_CORE

u2.2

132C

VBAT

D201

232C

u2.2

1V5_VRF

022R

K001

2V7_VRF

122R

IND

VBAT

222R

K001

VBAT

332C

u1

220FB201

1V35_VPLL

u2.2

532C

LRTC_ECRUOSER

USB_DAT_VP

USB_SE0_VM

PM_VCXO_EN

RTC_OUT

RPWRON_EN

USB_OEN

NORWP

PMRSTN

TNI_

REWOPS

ADS

BB_USB_DP

BB_USB_DM

LCS

NE_

YEK_

NIAM

GODW

LB_

YEK_

NIAM

C235=ECCH0000393-->10u Both changeExpired Part C219=22uF -->10uF both chage(crystal)

Expired Part

RTC ALARM ON


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3. TEChNICAL BRIEF

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Figure 4 SM-Power Circuit Diagram with charging part

56K

R225

27p

C253

R226

56K

2V62_VIO

0.1u

C236

VBAT

732C

p74

832C

p72

p01

932C

FB202

1800u2.2

042C

CN200

3

24

1

BAT_ID

C308

1u

U302

5 6

74

83

92

101

11PGND

IN BAT

ISET _PG

VSS1 CHG

LDO VSS2

EN_SETIFULL

C309

1u

C310

0.1u

R313

820

K001

513R

613R

K01

IND

713R

2V62_VIO

2V62_VIO

VBAT

2V62_VIO

V_BUS

3K

R314

_CHG_EN

RPWRON_EN

_PPR

_CHG_EOC

CHARGING IC for uUSB


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3. TEChNICAL BRIEF

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3.3.2. Charging

SM-POWER provides an external AC-adapter a complete charge control function for charging of

Li-Ion or Li-Ion-Polymer batteries. Either a 1-cell Li-Ion or Li-Ion-Polymer battery with 4.1, 4.2 or 4.4

Volts may be used.

4.2V~3.75V 3.75V~3.67V 3.67V~3.60V 3.60V~3.36V

Figure 5 Battery Block Indications

1. Charging method : CC-CV2. Charger detect voltage : 4.2 V3. Charging time : 2h 40m4. Charging current : 620 mA5. CV voltage : 4.2 V6. Cutoff current : 102 mA7. Full charge indication current (icon stop current) : 102 mA8. Recharge voltage : 4.15 V9. Low battery alarm

a. Idle : 3.60 V ~ 3.36 V

b. Dedicated : 3.60 V ~ 3.36 V10. Low battery alarm interval

a. Idle : 3 minb. Dedicated : 1 min

11. Switch-off voltage : 3.36 V12. Charging temperature ADC range

a. ~ -20 : low charging voltage operation (3.6 V ~ 3.8 V) .

b. -20G~ 60 : standard charging (up to 4.2 V)

c. 60~ : low charging voltage operation (3.6V ~ 3.8V)

C308

1u

U302

5 6

74

83

92

101

11PGND

IN BAT

ISET _PG

VSS1 CHG

LDO VSS2

EN_SETIFULL

C309

1u

C310

0.1u

R313

820

K001

513R

613R

K01

IND

713R

2V62_VIO

2V62_VIO

VBAT

2V62_VIO

V_BUS

3K

R314

_CHG_EN

RPWRON_EN

_PPR

_CHG_EOC



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3. TEChNICAL BRIEF

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3.4. Power ON/OFF

GM600 Power State: Defined 3cases as follow

Power-ON: Power key detect (SM-Powers ON port)

Power-ON-charging: Charger detect.

Figure 6 Power on application.

Input ON is a power-on input for SM-POWER with 2 active high levels (see Figure 6). It might be

triggered by a push button or by the RTCOUT output of the S-GOLD device as well. To detect if thepush-button is pressed during system operation the logical level at pin ON or its change (if Bit 1 EION inINTCTRL2 is asserted) is recorded in bit LON of the ISF register. If the high level of voltage at pin ONdoes not reach VIHdet (Vbat-0.8 ~ Vbat-0.3) the above-mentioned bit wont be set.

To support Remote power on function for factory mass production, applied an analog switch asfollowing figure. As monitoring the RPWRON and Key matrix KP_OUT(2) & KP_IN (6), GM600 systemrecognize whether remote power on or End-key pushed

Figure 7 Remote power on and End-key power on circuit

VA201

R202

0

0

R204

R207 0

R208

10K

R209

100K

100K

R212

Q200

321

456

2V11_RTC

R216

100K

2K

R217

RPWRON

RPWRON_EN

KEYIN1

KEYOUT1

PWRON

END_KEY

ADI RPWRON(H)

END


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3. TEChNICAL BRIEF

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3.5. SIM & Micro SD interface

GM600 supports 1.8V & 2.9V plug in SIM, SIM interface scheme is shown in (Figure 8).SIM_IO, SIM_CLK, SIM_RST ports are used to communicate with BBP(S-Gold3) and the SIM powersupply enabled by PMIC.

SIM InterfaceSIM_CLK : SIM card reference clockSIM_RST : SIM card Async /sync resetSIM_IO : SIM card bidirectional reset

GFigure 8 SIM CircuitG

Micro SD Interface

The MicroSD Memory Module has eight exposed contacts on one side.The S-Gold3 is connected to the module using a dedicated eight-pin connectorG

J400

9 8

10 7

6 3

5 2

4 1C1C5

C2C6

C3C7

GND1GND4

GND2GND3

R4034.7K

22p

C400

2V9_SIM

u1.0

104C

504C

p22

604C

IND

2V9_SIM

SIM_RST

SIM_CLKSIM_IO

47K

R301

2V62_VIO

30

R302

10K

R303

47

R304

100K

R305

C304

0.1u

003AV

103AV

203AV

2V8_TCC_MMCI

303AV

403AV

503AV

603AV

47K

R306 R307

47K47K

R308

S300

8

7

6

5

4

3

2

1

G 5 G 3 G1 SW

C1

C2

C3

C4

C5

C6

C7

C8

G 6 G 4 G2 COM

R320

47K

MMC_CMD

MMC_CLK

MMC_DAT[2]

MMC_DAT[1]

MMC_DET

MMC_DAT[0]

MMC_DAT[3]

MICRO SD SOCKET

CLOSELOW(DETECT)

HIGH OPEN

SWITCHMMC_DETECT


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3. TEChNICAL BRIEF

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Figure 9 Micro SD Memory Card Circuit & Detection Scheme

Table 7 Micro SD memory pin description

SD mode

Pin No. Name Type Description

1 DAT2 I/O Data bit [2]

2 CD/DAT3 I/O Data bit [3]

3 CMD I/O Command response4 VDD Power Power supply

5 CLK I Clock

6 VSS Ground Power ground




36/171



3. TEChNICAL BRIEF

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3.6. Memory

2Gbit NAND & 1Gbit DDRSDRAM employed on GM600 with 8 & 16 bit parallel data bus thru ADD(0)~ ADD(29). The 2Gbit NAND Flash memory with DDRAM stacked device family offers multiplehigh-performance solutions.

142C

n01

242C

n01

342C

n01

442C

n01

K3.3

322R

TP206

542C

u1.0

1V8_SD

K01

422R

642C

u1.0

742C

u1.0

1V8_SD

1V8_SD

TP207

TP208

TP209

TP210

TP211

n01

842C

942C

u1.0

052C

u1.0

152C

u1.0

252C

n01

U201

21T

11T

01T

3T

2T

1T

21R

11R

01R

3R

2R

1R

21P

11P

3P

2P

1P

2N

2M

2L

01K

9K

8K

5K

4K

2K

11J

01J

9J

8J

7J

6J

5J

4J

3J

P8D5

P4D6

E6

P6F6

C8F5

C4E5

D7

P5C7

C6

P9L7

P7L6

H10K7

G2K6

C9N9

C5M9

L9

H2N8

M8

N3L8

E3N7

K3M7

L3N6

F3M6

M3N5

G3M5

L5

D11N4

E11M4

F11L4

G11E9

K11E7

L11F7

M11G5

N11G7

C10D9

D10D8

E10E8

F10F8

L10G8

M10G4

N10F4

P10E4

D4

2J

9H

8H

7H

6H

5H

4H

3H

01G

9G

6G

9F

2F

11H

2E

3D

2D

1D

21C

11C

3C

2C

1C

21B

11B

01B

3B

2B

1B

21A

11A

01A

3A

2A

1A

1CN

2CN

3CN

4CN

5CN

6CN

7CN

8CN

9CN

01CN

11CN

21CN

31CN

41CN

51CN

61CN

71CN

81CN

91CN

02CN

12CN

22CN

32CN

42CN

52CN

62CN

72CN

82CN

92CN

03CN

13CN

23CN

33CN

43CN

53CN

A0

A1 I_O0

A2 I_O1

A3 I_O2

A4 I_O3

A5 I_O4

A6 I_O5

A7 I_O6

A8 I_O7

A9 I_O8

A10 I_O9

A11 I_O10

A12 I_O11

A13 I_O12

DQ0 I_O13

DQ1 I_O14

DQ2 I_O15

DQ3

DQ4 _CE

DQ5 _WEN

DQ6 _RE

DQ7 ALE

DQ8 CLE

DQ9 R__B

DQ10 _WP

DQ11

DQ12 VCCN1

DQ13

DQ14 VSS1

DQ15 VSS2

LDQM VSS3

UDQM VSS4

LDQS VSS5

UDQS VSS6

_CLK

CLK VSSQ

CKE

BA0 VDD1

BA1 VDD2

_RAS VDD3

_CAS

_WED VDDQ1

_CS VDDQ2

63CN

73CN

83CN

93CN

04CN

14CN

24CN

34CN

44CN

54CN

64CN

74CN

84CN

94CN

05CN

15CN

25CN

35CN

45CN

55CN

65CN

75CN

85CN

95CN

06CN

16CN

26CN

36CN

46CN

56CN

66CN

76CN

86CN

96CN

07CN

_NAND_CS

FCDP

_RD

_WP

_WR

_WR

SDCLKI

_BC1

_BC0

SDCLKO

BA1

ADD[16]

ADD[16]

ADD[17]

ADD[17]

ADD[18]

ADD[19]

ADD[20]

ADD[21]

ADD[22]

ADD[23]

ADD[24]ADD[25]

ADD[26]

ADD[27]

ADD[28]

ADD[29]

ADD[2]

ADD[3]

ADD[4]

ADD[5]

ADD[6]

ADD[7]

ADD[8]

ADD[9]

ADD[10]

ADD[11]

ADD[12]

ADD[13]

ADD[14]

ADD[15]

DATA[1]

DATA[2]

DATA[7]

DATA[4]

DATA[5]

DATA[6]

DATA[11]

DATA[8]

DATA[9]

DATA[10]

DATA[15]

DATA[12]

DATA[13]

DATA[14]

_RAM_CS

_RAS

BA0

CKE

UDQS

LDQS

ADD[0]

ADD[1]

_CAS

DATA[0]

DATA[3]

ADD[16:29]

ADD[0:15]

DATA[0:15]

G

Figure 10 Flash memory & DDR RAM MCP circuit diagram


37/171


3. TEChNICAL BRIEF

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3.7. LCD Display

LCD module include:

- Main LCD: 3.0 240x400 WQVGA, 262K color TFT

- Backlight : 6pcs edge light type white LED

Figure 10 LCD Circuit

2.2u

C428

100K

R404

15pF

FL404

01

5

6 4

7 3

8 2

9 1INOUT_A1INOUT_B1

INOUT_A2INOUT_B2

INOUT_A3INOUT_B3

INOUT_A4INOUT_B4

1G

2G

FL403

15pF

01

5

6 4

7 3

8 2

9 1INOUT_A1INOUT_B1

INOUT_A2INOUT_B2

INOUT_A3INOUT_B3

INOUT_A4INOUT_B4

1G

2G

VBAT

IND

214R

15pF

FL407

01

5

6 4

7 3

8 2

9 1INOUT_A1INOUT_B1

INOUT_A2INOUT_B2

INOUT_A3INOUT_B3

INOUT_A4INOUT_B4

1G

2G

2V85_VLCD

1u

C412

CN402

2120

2219

2318

2417

2516

2615

2714

2813

2912

3011

3110

329

338

347

356

365

374

383

392

401

15pF

FL408

01

5

6 4

7 3

8 2

9 1INOUT_A1INOUT_B1

INOUT_A2INOUT_B2

INOUT_A3INOUT_B3

INOUT_A4INOUT_B4

1G

2G

R413

100K

2V62_VIO

2V62_VIO

C426

1u

FL406

15pF

015

64

73

82

91INOUT_A1 INOUT_B1

INOUT_A2 INOUT_B2

INOUT_A3 INOUT_B3

INOUT_A4 INOUT_B4

1G

2G

804AV

414R

K001

DNI

R415

LCD_ID

LCD_VSYNC

MLED2

MLED3

MLED1

MLED4

MLED5

MLED6

LCD_ADS

LCD_DATA[8]

LCD_DATA[12]

LCD_DATA[15]

LCD_DATA[9]

LCD_DATA[10]

LCD_DATA[11]

LCD_DATA[13]

LCD_DATA[14]

LCD_CS

LCD_RD

LCD_WR

LCD_RESET

LCD_PWM

LCD_DATA[7]

LCD_DATA[6]

LCD_DATA[5]

LCD_DATA[4]

LCD_DATA[3]

LCD_DATA[2]

LCD_DATA[1]

LCD_DATA[0]

PIN21 PIN20

PIN40 PIN1

LCD Interface Mode

IF1

??

HSHARP

IF0

??

H

Maker

????

ADC DNI; GPIO connect


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3. TEChNICAL BRIEF

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Table 8 LCD FPC Interface Spec.


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3. TEChNICAL BRIEF

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3.8. Keypad Switching & Scanning

The keypad interface is a peripheral which can be used for scanning keypads up to 3 rows (outputs fromPort Control Logic) and 2columns (inputs to PCL). The number of rows and columns depend on settingsof the PCL.

Figure 11 Key pad part key matrix

KB401KB402

KB400

VA400

VBAT

VA401VA402

VA403

CN405

3

2

1

VA404

CN403

4

3

2

1

VA405

CN406

3

2

1

VA406VA407

KEYIN1

KEYIN1

KEYOUT1

1TUOYEK

KEYOUT0

KEYOUT0

KEYIN0

KEYIN0

KEYOUT2

2TUOYEK

END_KEY

KEYIN2

TV

CAM KEY

VOLUME KEY

HOLD KEY

SEND


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3. TEChNICAL BRIEF

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3.9. Keypad back-light illumination

There are 2 snow white color LEDs on Key FPCB for keypad illumination. Keypad Back-light iscontrolled by SM-Power Flash LED port which has constant current control function. The wholeconfiguration of the SM-POWER Flash LED drivers is shown in below Figure11.

GFigure 12 LED Driver in the SM-POWER3

G

Figure 12 Keypad Back-light LEDs

VA410

VBAT

120

R416

LD401

R417

120

LD402 LD403 LD404

120

R419

120

R420

MAIN_KEY_BL

KEY BACKLIGHT


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3. TEChNICAL BRIEF

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3.10. LCD back-light illumination

RT9396 is an integrated solution for backlighting and phone camera input supply .The part contains a 6 channels charge pump white LED driver and four low dropout linear regulators.

Figure 13 LCD Back light unit and Flash LED charge pump IC

100K

R418

1V2_CAM

1u

C413

VBAT

U401

24

23

22

21

20

19

18

8

7

6

5

9

4

10

3

11

2

12

1

31

41

51

61

71

LCS

ADS

NE

MWP

FC

DNGP

LDO1

N2C

LDO2

N1C

LDO3

P1C

LDO4

P2C

AGND

VIN

LDOIN

LED6

LED5

LED4

LED3

LED2

LED1

VOUT

2V8_ACAM

C414

0.1u

2V8_IOCAM

1u

C415

1uC416

C4172.2u

C418

1u

2V5_TOUCH

C419 1u

C420

2.2u1u

C421

MLED2

MLED3

MLED1

MLED4

MLED5MLED6

I2C1_SCL

I2C1_SDA

LCD_PWM

LCD_BL_EN

LCD Backlight


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3. TEChNICAL BRIEF

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Figure 14 I2C Serial data port control method


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3. TEChNICAL BRIEF

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3.11. JTAG & ETM interface connector

Figure 15 JTAG & ETM(Embedded Trace Module) interface connector

In case of GM600 mass production, the JTAG & ETM interface connector will not be mount on board.That is only for developing and software debugging purpose.( It will not be mounted on mass production

PCB)GGGGGGGGGGGGGGGGGGGGG

UART_TP

UART100

12

11

10

9

87

6

5

4

3

2

1GND

RX

TX

NC1

ON_SW

VBAT

NC2

NC3

NC4

DSR

RTS

CTS

GND

RX

TX

VCHAR

ON_SW

VBAT

PWR

URXD

UTXD

3G 2.5G

V_BUSV_BUS

VBAT

UART_TX

UART_RX

RPWRON_EN

DSR

BB_USB_DP

BB_USB_DM

J-TAG


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3. TEChNICAL BRIEF

G

G

G

3.12. Audio

GM600 Audio signal flow diagram as following diagram.

Figure 16 Audio signal flow diagram

BT+FM

WolfsonG~t_``Z

MIC

BBPPMB8877

SPKRCVG

mt

lGtpjG3.5 phiEarjackG

Muti-mediaICG

TCC7921G

kG

hG

yG

lVzwrG


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3. TEChNICAL BRIEF

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3.13. Audio amplifier

Audio amplifier sub system IC is an audio power amplifier capable of delivering 1.2 W of continuousaverage power into a mono 8 load, 50mW per channel of continuous average power into stereo 32single-ended (SE) loads. The MAX9877 features a 32-step digital volume control and ten distinct outputmodes. The digital volume control, output modes (mono/SE/OCL) are programmed through a two-wireI2C interface that allows flexibility in routing and mixing audio channels.

Figure 17 Audio amplifier

3.14. Microphone circuit

Figure 18 Microphone circuit

0

R500

2V62_VIO

0

305R

C 2 0 . 1u

22nC5

C 6 2 2 n

0.1uC9

2V62_VIO

IND

225R

TPTP500

U502

WM8993ECS-RV

3F

1F

3D

5E

4E

1G

2G

2F

A4B5

A2

A3A5

B3

B4

E3

C1

B2

A1

B1A7

A6

E7

D6C4

C3

G4

F4B7

G3B6

G6D5

F6C5

5G

5F

7G

7F

1D

2C

2D

1E

2E

7C

7D

6C

6E

1DDVA

CDIMV

DNGA

2DDVA

DDVCD

DDVBD

DNGD

DDVKPS

DNGKPS

DDVPC

DNGPC

PTUOV_

PC

NTUOV_

PC

IN1LN CPFB1

IN1LP CPFB2

IN2LN_GI7 HP_OUT1L

IN2LP_VRXN HP_OUT1R

HP_OUT1FB

IN1RN

IN1RP HP_OUT2P

HP_OUT2N

IN2RN_GI8

IN2RP_VRXP SPK_OUTLN

SPK_OUTLP

SPK_OUTRN

SPK_OUTRP

SPK_MONO

LINE_OUT1N

LINE_OUT1P

MIC_BIAS1 LINE_OUT2N

LINE_OUT2P

MIC_BIAS2 LINE_OUTFB

KLCM

KLCB

KLCRL

TADCDA

TADCAD

1OIPG

KLCS

TADS

R517

20

C519

0.1u

20

R518

0.1u

C520

EMR1107SFR1P

CN500

2

1

C521

27p27p

C522

100nL502

100nL503

2.2uC523

TP501

R519 100K

0.1u

C524C525

0.1u

C526

0.1u

1V8_SD

4.7u

C528

VBAT

C529

0.1u

2.2u

C530

2.2u

C531

4.7u

C532

2V85_VFM

R 52 0 1 0

R 52 1 1 0

C 5 33 1 u

1uC534

C 5 37 1 u

1uC538

C541

0.1u

405PT

505PT

PT

1uC542

1uC543

1V8_CODEC

HS_MIC_P

HS_MIC_N

MAIN_MIC_P

MAIN_MIC_N

RCV_P

RCV_N

EAR_SPK_R

EAR_SPK_L

SDA

SCL

HSO_R

HSO_LFM_RADIO_L

FM_RADIO_R

KLCM_

MM

ODS_

MM

M_MIC_P

M_MIC_N

H_MIC_N

H_MIC_P

KLCB_

MM

KLCRL_

MM

IDS_

MM

NO TURN OFF VOLTAGE

SPEAKER

AUDIO CODEC

DNI

R505

C500

27p

C501

27p 005AV

105AV

C502

100p

C503

10u

R506

0

C504

DNI L 50 0

100n

C505

0.1u

0.1u

C506

MIC500

4

3

2

1P

G1

G2

O

VMIC_P

M_MIC_P

M_MIC_N

VMIC_N

MICROPHONE


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3. TEChNICAL BRIEF

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3.15. Charging circuit

BQ25045 accepts one power input from a USB (Universal Serial Bus) port or desktop cradle.The BQ25045 features maximum voltages for the cradle and the USB inputs respectively. Due to the30V rating for the cradle input, low-cost, large output tolerance adapters can be used safely.

Figure 19 Charging circuit

3.16 FM radio & BLUETOOTH

z FM RadioGeneral Features 65 108 MHz FM + RDS/RBDS band support for world coverage, including OIRT support for Eastern

Europe Supports external or internal antenna configurations Host interface flexibility

- Control : UART, SDIO, SPI, BSC (I2C compatible)- Audio : Analog and I2S outputs

Superior FM receiver performance with -110 dBm typical sensitivity with a 26-dB SNR Advanced FM channel search algorithms Low power FM receive recording with an on-chip MP3 encoder

z BluetoothGeneral Features

Bluetooth 2.1 + EDR specification compliant

On-chip, integrated, Class 1 power amplifier Typical receive sensitivity of -90 dBm

SmartAudio technology, improving voice and music quality to Bluetooth headsets

Multiple simultaneous Advanced Audio Distribution Profile (A2DP) streams Wideband speech support Low current consumption in all Bluetooth modes WLAN and WiMAX coexistence support

Supports high-speed UART (H4, H5), secure digital I/Q (SDIO), and serial peripheral interface (SPI)

C308

1u

U302

5 6

74

83

92

101

11PGND

IN BAT

ISET _PG

VSS1 CHG

LDO VSS2

EN_SETIFULL

C309

1u

C310

0.1u

R313

820

K001

513R

613R

K01

IND

713R

2V62_VIO

2V62_VIO

VBAT

2V62_VIO

V_BUS

3K

R314

_CHG_EN

RPWRON_EN

_PPR

_CHG_EOC



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3. TEChNICAL BRIEF

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Figure 20 Bluetooth / FM Radio Circuit Diagram

1p

C141

L103

100pC103

7p

C104

0

R101

DNIR102

006

101BF

BT_VCXO_ENTP127

BT_RESETnTP128

2V65_VBT

u2.2

901C

011C

u1

600FB102

2.2u

C111 C112

100n

100n

C113

411C

u2.2

511C

u1

611C

n01

711C

p01

p01

811C

5.6pC119

1nC120

L102

DNI C121 10p

C122

DNI

2450MHz

FL101

IN OUT

GND1 GND2

7p

C123

ANT101

DNI

L105

26MHz

101X

AS5223XN

2

1

3

42DNG

2TOH

1TOH

1DNG

15KR105

1uC124

C125 1u

2V62_VIO

UART_BT_RTSTP116

UART_BT_CTSTP117

UART_BT_RXTP118

BT_PCM_OUTTP121BT_PCM_CLKTP120

BT_PCM_INTP123

BT_PCM_SYNCTP124

BT_HOST_WAKEUPTP126

BT_WAKEUPTP125

U104

1G

5H

3H

4H

1D

3G

8H

7D

8G

8D

D4

D3

E3

E6

F3

A1

B2

H1

G2

H2

F2

E2

F1

E1

E5

D5

F4

E4

D2

C1

B1

C3

G5

G6

H6

A2

G4

E8

B8

A8

A7

A6

B5

C7

A5

C8

3A

4A

3B

4B

6C

5C

6F

7F

7B

6B

2C

4C

8F

5F

7E

7G

7H

6D

1SSV

2SSV

3SSV

4SSV

5SSV

6SSV

7SSV

8SSV

9SSV

01SSV

SER

0MT

2MT

3MT

R_

TUOA_

MF

L_

TUOA_

MF

1_

ERAPS

2_

ERAPS

FM_LNA2

FM_VDDAUDIO

FM_VDDRF

SPARE_5

SPARE_4

SPARE_3

FM_RXP

FM_RXN

BT_RFP

LPO_CLK

TCXO_MODE

XIN

XOUT

VREG_CTL

UART_CTS_N

UART_RTS_N

UART_TXD

UART_RXD

I2S_CLK

I2S_DI

I2S_DO

I2S_WS

PCM_CLK

PCM_IN

PCM_OUT

PCM_SYNC

GPIO0_BT_WAKE

GPIO1_HOST_WAKE

GPIO2

GPIO5

GPIO6_FM_IRQ

COEX_IN

COEX_OUT0

COEX_OUT1

SDA_I2C_DA

SCL_I2C_CK

FTDDV_

TB

FRDDV_

TB

FIDDV_

TB

XPDDV_

TB

1CDDV

2CDDV

GERV

TABV

VHGERV

ODDV

UART_BT_TXTP119

BT_PCM_SYNC

BT_PCM_OUT

BT_PCM_IN

BT_PCM_CLK

CLK32K

BT_HOST_WAKEUP

BT_WAKEUP

FM_ANT

FM_RADIO_L

FM_RADIO_R

BT_RESETn

UART_BT_RTS

UART_BT_CTS

UART_BT_RX

UART_BT_TX

(1%)

CLOSE TO EACH PIN

CLOSE TO A5

CLOSE TO C7

BT & FM RADIO


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3. TEChNICAL BRIEF

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Bluetooth Radio Provide low cost, low power, robust communication in the globally available 2.4GHz (ISM) unlicensedband

Bluetooth v2.1 + EDR Specification compliant

Bluetooth TransmitterThe BCM20780 features a fully-integrated zero-IF transmitter. The baseband transmit data is digitallyGFSK-modulated in the modem block and upconverted to the 2.4GHz ISM band in the transmitter path.The transmitter path consists of signal filtering, I/Q upconversion, an output power amplifier (PA), aTX/RX switch, and RF filtering. The transmitter path also incorporates the EDR modulation scheme/4-DQPSK for 2 Mbps and 8-DPSK for 3 Mbps.

Bluetooth ReceiverThe receiver path uses a low-IF scheme to downconvert the received signal for demodulation in thedigital demodulator and bit synchronizer. The receiver path provides a high degree of linearity, anextended dynamic range, and high-order on-chip channel filtering to ensure reliable operation in thenoisy 2.4GHz ISM band. The front end topology with built-in out-of-band attenuation enables theBCM20780 to be used in most applications with no off-chip filtering. For mobile handset applicationswhere the Bluetooth function is located close to the cellular transmitter, minimal external filtering isrequired to eliminate the desensitization of the receiver caused by the cellular transmit signal.

Local Oscillator GenerationLocal Oscillator (LO) generation provides fast frequency hopping across the 79 maximum availablechannels at rates up to 1600 hops/second. The LO generation subblock employs an architecture for highimmunity to LO pulling during PA operation. The BCM20780 uses fully integrated phase-locked loop(PLL) loop filters.

BasebandThe Bluetooth Baseband Core(BBC) implements all of the time-critical functions required forhigh-performance Bluetooth operation. The BBC manages the buffering, segmentation, and routing ofdata for all connections. It also buffers data that passes through it, handles data flow control, schedulesboth synchronous connection oriented (SCO) and asynchronous connectionless (ACL) TX/RXtransactions, monitors Bluetooth slot usage, optimally segments and packages data into basebandpackets, manages connection status indicators, and composes and decodes HCI packets. In addition tothese functions, it independently handles HCI event types and HCI command types.

HCI InterfacesThe BCM20780 supports high-speed UART (H4, H5), PCM, SDIO and SPI as the set of selectable HCIinterfaces. The HCI interfaces are selected upon sensing the state of the signal levels on the SCL andSDA pins during power-up or reset.


49/171


3. TEChNICAL BRIEF

Figure 21 Bluetooth / FM Radio Block Diagram


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3. TEChNICAL BRIEF

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3.17. u-USB Multi Media Interface connector

Table 9 Multi media interface pin assign

GM600 MMI

Pin Function Description

1 V_BUS Charger voltage

2 MUIC_DM USB/ Remote control Key ADC/ Headset left sound

3 MUIC_DP USB/ Remote control interrupt/ Headset Right sound

4 MUIC_ID ID Detect

5 GND Power GND

6 GND Power GND

7 GND Power GND8 GND Power GND

9 GND Power GND

10 GND Power GND

11 GND Power GNDG

GFigure 22 u_USB Connector circuitGGGGGGG

CN300

11

10

9

5

4

3

2

1

8

7

6 FL300

4

3

2

1

NI

TUO

1G

2G

V_BUS

C300

DNI

MUIC_DMMUIC_DP

MUIC_ID

uUSB


51/171


3. TEChNICAL BRIEF

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3.18. Multimedia Chip ( TCC7921)

3.18.1 General Description

The TCC7921 is the system LSI for digital multimedia applications based on ARM926EJ-S, AMRsproprietary 32-bit RISC CPU core. It can decode and encode various type s of audio /video standardswith software and dedicated hardware acceleratorMP3/AAC/MPEG4-AAC,JECPG/MPEG1/MPEG2/MPEG4-SP/ASP/H.264 and other types of audio/video standard.

Figure 23. TCC7921 Block Diagram


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3. TEChNICAL BRIEF

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3.18.2 Block Description

32bit ARM926EJ-S RISC CPU Core for system and Audio processing

-16KB/16KB Instruction and Data Cashes-MMU Supported-Java Acceleration Supprted-JTAG interface for code debuggingMemory Organization

-Boot Rom of 8kbytes for various boot procedure ( HPI BOOT,NAND,USB) and security-Internal SRAM of 64Kb for program shared memory with hardware-Internal SARAM of 32KB for Video Processor- Memory controller for various memories including PROM,NOR type Flash, SRAM, and SDRAM

etc.VIDEO HARDWARE ACCELERATOR

-MPEG1/MPEG2/MPEG4/Divx/Xvid/ MPEG4-ASP/AVC- Supported Video Decoder

MPEG1, MPEG2, MPEG4-SP,MPEG-ASP,MPEG4-AVC(H.264)DIVX,H.263, WMV9

- Supported Video EncoderMPEG4-SP,H.263- Bit stream Accelerator- Hardwired VLD for MPEG4 Decoding- Bit stream DMA for Software Bit Manipulation- Hardwired CAVLD for MPEG4-AVC(H.264)VIDEO I/O

-LCD InterfaceProgressive or Interlaced Digital Video OutputSupport of STN LCDSupport of CCIR-601/656Support of TFT LCD

- 16/18/24bits output formats16-Level Image Overlay & Chroma-keying ,OSD

Color space converterThree 256-Level Color Look-Up Table

Dual-LCD Controller- Camera Interface

Supported of CCIR-601/656 FormatImage EffectHardware Scaler

Various Input Format: YCbCr 4:2:2/4:2:0,RGB 4:2:2,4:2:0,Bayer RGBUp-to 5M Pixels with ScalingAUDIO & STORAGE INTERFACES

- AUDIO I/OI2S Master& Slave InterfaceS/PDIF TX Interface- HIGH SPEED INTERFACEHigh speed USB2.0 device/USB 1.1 host- MISC. INTERFACE4-Channel UART for serial host interfaceON-CHIP PERIPHERALS- Four 16bit timer with PWM output/counters and one 32 bit timer- 8 channel General purpose 10-bit ADCG


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3. TEChNICAL BRIEF

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3.19. General Description

The RF transceiver (PMB 6272 SMARTi-PM) is an integrated single chip, quad-band transceiver forGSM850/GSM900/GSM1800/GSM1900 designed for voice and data transfer applications. Thetransceiver provides an analog I/Q baseband interface and consists of a direct conversion receiver and aquad-band polar transmitter for GSM and EDGE with integrated PGA functionality. Further on acompletely integrated SD-synthesizer with HSCSD and GPRS/EDGE capability, a digitally controlledreference oscillator with three outputs, a fully integrated quad-band RF oscillator and a three wire businterface with all necessary control circuits complete the transceiver.

Figure 24 RF transceiver PMB6272 SMARTi-PM functional block diagram


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3. TEChNICAL BRIEF

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Figure 25 RF transceiver PMB6272 SMARTi-PM schematic

5.6n

L706

10n

L700

207C

p4.2

p9.3

307C

p3

407C

1.5n

L708 L707

15n

4.7p

C735

3.3n

L704

C708

220n

R 7 03 1 0

C709

1u

2V85_VRF

4.7nC710

DNIC707

15n

L702

028

407R

2V85_VRF

220nC712

22pC713

10K

R709

18n

L703

517C

p2.2

22K

R708

617C

p3

DNI

R702

ANT700

717C

p9.3

1V5_VRF

R 7 06 1 0

2V85_VRF

TSX-3225

26MHz

X700

EXXY0025701

21

34

G N D 2 H O T 2

H O T 1 G N D 1

1nC718

U700PMB6272

20

19

18

17

16

15

14

13

12

21

22

11

32

01

42

9

52

8

62

7

72

6

82

5

92

4

03

3

13

2

23

1

33

34

35

36

37

38

39

40

41GND4

GND3

VDDMIX2V8

VDDTX2V8

TX2

TX1

VDDTX1V5

VBIAS

FE2

A

1EF

XA

8V2SAIBDDV

B

X1XR

XB

1XR

8V2GIDDDV

X2XR

AD

2XR

KLC

2DNG

5V1GIDDDV

X3XR

3SYSF

3XR

2SYSF

X4XR

OX

4XR

XOX

5V1ANLDDV

GND1

FSYS1

VDDXO2V8

EN

VDDVCO2V8

VCO_RC

VDDRX1V5

VDDRX2V8

ANT701

C719100n

C720100n

C721

47p

ANT702

1.8p

C711

10nC722

2V85_VRF1V5_VRF

327C

n74

100nC724

p2.2

527C

627C

p4.2

C727

47p

22u

C3

2V85_VRF1V5_VRF

L705

DNI

6.8n

L701

C72810n

C729100n

100nC730

100nC731

VBAT

10K

R707

SFAY0013301FL700

02

91

31

11

81

51

8

41

7

21

6

9

54

01

3

61

21

17ANT

1XR058MSG

2XR058MSG

4DNG

1XR009MSG

2CV

2XR009MSG

1XR0081MSG

1DNG

2XR0081MSG

2DNG

1XR0091MSG

1CV

2XR0091MSG

XT009

_058MSG

5DNG

XT0091

_0081MSG

3DNG

1CN

2CN

39pC733

SW700

4213

1G A C

2G

2.7p

C701

TQM7M5005H

U701

15 7

8 6

11

14 5

9 4

13 3

10 2

12 1DCS_PCS_INDCS_PCS_OUT

MODE_SELECTGSM850_900_OUT

BSBY_CAP1

VBATTBY_CAP2

VRAMPGND1

GND2

TX_ENGND3

GSM850_900_INPGND

100p

C734

1.5p

C706

0.5p

C714

C700

27p

PA_LEVEL

PA_MODE

VBAT

FE1

FE2

RF_EN

RF_DA

RF_CLK

QX

Q

IX

I

26MHZ_MCLK

LBAND_PAM_IN

LBAND_PAM_IN

HBAND_PAM_IN

HBAND_PAM_IN

TXON_PA

PA_BAND

RF_TEMP

HL

L

L

PCS1900DCS1800

DCS_PCSTX

GSM900

GSM850_EGSM TX

PIN13

VC2VC1

GSM850

PIN14

L

L

DCS_PCSRX

GSM850_EGSM RX

H L

RF_TEMP


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3. TEChNICAL BRIEF

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3.20. Receiver part

Figure 26 Receiver part block diagram

The constant gain direct conversion receiver contains all active circuits for a complete receiver chain forGSM/GPRS/EDGE (see Figure 39). The GSM850/900/DCS1800/ PCS1900 LNAs with balanced inputsare fully integrated. No inter-stage filtering is needed. The orthogonal LO signals are generated by adivider-by-four for GSM850/900 band and a divider-by-two for the DCS1800/PCS1900 band. Downconversion to baseband domain is performed by low/high band quadrature direct down conversionmixers. The baseband chain contains a LNB (low noise buffer), channel filter, output buffer andDC-offset compensation. The 3rd order low pass filter is fully integrated and provides sufficientsuppression of blocking signals as well as adjacent channel interferers and avoids anti-aliasing throughthe baseband ADC. The receive path is fully differential to suppress on-chip interferences. Several gain

steps are implemented to cope with the dynamic range of the input signals. Depending on the basebandADC dynamic range, single- or multiple gain step switching schemes are applicable. Furthermore anautomatic DC-offset compensation can be used (depending on the gain setting) to reduce the DC-offsetat baseband-output. A programmable gain correction can be applied to correct for front end- andreceiver gain tolerances.


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3. TEChNICAL BRIEF

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3.21. Transmitter part

The GMSK transmitter supports power class 4 for GSM850 and GSM900 as well as power class 1 forDCS1800 and PCS1900. The digital transmitter architecture is based on a very low power fractional-NSigma-Delta synthesizer without any external components (see Figure39). The analog I/Q modulationdata from the baseband is converted to digital, filtered and transformed to polar coordinates. Thephase/frequency signal is further on processed by the Sigma-Delta modulation loop. The output of itsassociated VCO is divided by four or two, respectively, and connected via an output buffer to theappropriate single ended output pin. This configuration ensures minimum noise level. The 8PSKtransmitter supports power class E2 for GSM850 and GSM900 as well as for DCS1800 and PCS1900.The digital transmitter architecture is based on a polar modulation architecture, where the analogmodulation data (rectangular I/Q coordinates) is converted to digital data stream and is subsequently

transformed to polar coordinates by means of a CORDIC algorithm. The resulting amplitude informationis fed into a digital multiplier for power ramping and level control. The ready processed amplitude signalis applied to a DAC followed by a low pass filter which reconstructs the analog amplitude information.The phase signal from the CORDIC is applied to the Sigma-Delta fractional-N modulation loop. Thedivided output of its associated VCO is fed to a highly linear amplitude modulator, recombining amplitudeand phase information. The output of the amplitude modulator is connected to a single ended output RFPGA for digitally setting the wanted transmit power. The PA interface of SMARTi-PM supports directcontrol of standard dual mode power amplifiers (PAs) which usually have a power control input VAPCand an optional bias

Figure 27 Transmitter part block diagram

control pin VBIAS for efficiency enhancement. In GMSK mode, the PA is in saturated high efficiencymode and is controlled via its VAPC pin directly by the baseband ramping DAC. In this way both up- /down-ramping and output power level are set. In 8PSK mode, the ramping functionality is assured by anon-chip ramping generator, whereas output power is controlled by the PGAs as described above.


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En GM600 SVC ENG 100416 Up by Nasirahmed