Engineering -Design 2015

Electronic Interconnect Corporation

The PCB Experts

Flow chart of PCB design and fabrication sequence

PCB Life Cycle

Engineering Hold

Array

Trace Copper

Engineering Hold

What Does DFM Do?

Use of design software to Verify and Analyze for Fabrication

Success

Ensures accurate

Gerber translation by

comparing Gerber

data against original

design Netlist

Detect DRC issues

missed on PCB layout

Identifies issues that

could create PCB

scrap

Intelligent Analysis Reduces Risk of Board Scrap

Todays designs are too complex and require more sophisticated

methods such as Netlist comparisons, DFF, and design comparisons to

ensure that errors during translation from layout to Gerber are caught

before bare board fabrication

Visual Inspection

Netlist Comparison

Design Comparison

Gerber DRC and

Design For Fab

Analysis

Tim

e

Possibility of Detecting Mfg Defects

Coutousy of cam 350

1. Clarify Copper Weight Intentions.

2. Finished Hole Size versus Annular Rings.

3. Via-in-Pad Type Structures

4. Utilizing 0.003" Traces and Spaces

5. Vague Material Callouts on Drawings or Read Me Notes

6. Internal Copper Weights versus Dielectrics

7. Board Stack-Up Symmetry

8. Blind or Buried Via Jobs

9. Unwanted or Unintentional Coupling

10. Consult Your Fabricator

PCB Design check list

Sample Fab Drawing

Clarify Copper Weight Intentions

Copper weights vs. Minimum Spacing

Finish

Copper- oz.

Copper

Height

Artwork

size

Min. space

on Artwork

Min. Spacing

on Gerbers

3 0.0042 0.0028 0.0042 0.007

4 0.0056 0.0042 0.0056 0.0098

5 0.007 0.0056 0.007 0.0126

6 0.0084 0.007 0.0084 0.0154

7 0.0094 0.0084 0.0098 0.0182

8 0.0112 0.0098 0.0112 0.021

Starting copper weights vs.

Minimum spacing

Starting

Copper (Before

plating)- oz.

Finished

Copper (After

Plating) oz.

Minimum

Spacing on

Gerbers

0.5 1 0.004

1 2 0.0054

2 3 0.007

3 4 0.0098

4 5 0.0126

5 6 0.0154

6 7 0.0182

7 8 0.021

Copper Weights Internal Layers

Finished Hole Size vs. Annular Rings

15mils+ per side

1oz finish

Positive Inner Layer (Plane to Plated Drill Clearance)

15mils+ per side

1oz finish

Negative Inner Layer: Plane to Plated Drill Clearance

10mils+ per side Ring ,10mils+ Spoke width

10mils+ Air Gap, 1oz finish

Negative Inner Layer: thermal pad

Via-in Pad Type Structures

Check for multiple drill layers for correct extraction of Netlists

Compared against an IPC-D-356A Netlist

Simplifies setup in Stream RC

Gerber layer sets to which drills go through which layer.

Eliminates a lot of the false errors seen in other analysis tools

Set automatically when intelligent data such as ODB++ is imported.

Via-in-Pad Type structures

5mils - 7mils 1oz Cu finish

Via Annular Rings

8mils+ for ET

1oz Cu finish

Component Pad Annular Rings

Utilizing 0.003 Trace and Space

5mils - 7mils, 1oz Cu finish

Air Gap: Copper to Copper Spacing

5mils to 7mils

1oz finish

External copper thieving is recommended

to be added to low density area to even out

copper distribution. Typical thieving pattern

is .030 diameter with .020 spacing.

The absence of copper thieving results in

high or over plating of isolated features,

typically differential pairs. It can cause

pitted or bumpy marks on fiducials pads.

Copper Plating:

Final Finish, surface plating coating

Electrical Test

Golden Board Testing

Intelligent Testing (Netlist Testing)

Flying probe and double grid testers

Split Testing

Alternate test points of small IC being tested

at different location on same fixture or on

different fixture

Small IC being tested on flying probe machine

and rest of test points being tested on fixture.

Electrical Test specifications

20mils+ for ET SMT Pitch

Positional Tolerance Over Bilateral Tolerance

Tooling and Fabrication Requirements

Clearances requirements between edges.

Purpose of Tooling holes.

Locate Tooling holes locations with

specifications.

Use of Scoring process while optimizing

material usage.

P

a

n

e

l

i

z

a

t

i

o

n

Offshore Panel Sizes:

36 x48

40x48

42x48

Domestic Panel

Size: 18x24

Spacing =0.30

Max Array Size:

8.1x 11.1

Max Usable for

2L: 16.5 x 22.5

4L: 16 x 22

0.125 Tooling Holes x4

0.050 Fiducials x3, with 0.100 Mask Clearance


Use of Scoring process while optimizing material


Use of eC-Registration Tooling Holes and Fiducials

Fab

ricatio

n C

on

sid

era

tion

s

7mils to 10mils for Routed Edge

15mils to 20mils for Scored Edge

Copper to Edge Clearance

Solder Mask Clearance

How solder mask clearance impacts solderbility.

3mils to 5mils+ per side

Solder Mask Clearance

6mils to 8mils+

2mils+ from soldermask clearance

Silk screen clipping

Carbon ink (spacing = 0.012+)

Gold Fingers.

No components should be in direct

line of fingers; pads should be

0.015+ away from fingers.

Reduce conflict in new design

The procurement contract

The master drawing

IPC standards

Other applicable documents

Fabrication process and spcs

Quality Requirements

IPC -600 standards, Acceptability of PWB

IPC 2221A, Printed Boards Design

Coupon requirements

Coupon Purpose Class 2 Class 3

Thermal Stress, inner layer

interconnect integrity

Optional Required

Hole solderbility Optional Optional

Moisture and insulation

resistance

Twice per

pnl

Opposite

corner

Fabrication Considerations

Coupon Purpose Class 2

Hole /Land Ratio:

Land size at least 0.024 greater than

hole size.

Prevents breakout

Large lands prevents Minimum

spacing

Hole solderbility Optional

Moisture and insulation resistance Twice per panel

Board Specification Summery

Coupon Frequency Requirements

Schematics

Footprints OR Data sheets

Net List

Stack-up Details

Input requirements to start

Layout Guideline

Mechanical Details

Other specific requirements

Circuit Design

PCB specification Check list

Artwork or Gerber Data contains a fab drawing.

Fab drawing contains dimensions

Fab drawing contain PCB thickness

Does PCB require panelization

Does PCB require borders/rails, (If so attach

array image)

Does PCB require fiducial (If so circle one)

PCB Check List (Cont.)

# of tooling holes requirements of .125"

Finish Requirements : ENIG, HASL, Silver

Solder mask color, silkscreen color

ROHS compliant assembly

FR4 Material Tg rating, 135C, 170C, 180C

IPC Class 2 or 3

Customer Data Checklist IPC 2524 PWB DATA QUALITY RATING FORM

Categories Check Notes

Package Completeness

Missing PWB artwork files

Missing fabrication drawing/files

Missing README file

Missing aperture information/file for 274-D artwork files

Drill files and layer connectivity not specified

Corrupted files

Data Quality

Fabrication drawing is not legible

Missing fabrication drawing information

Missing PWB material information

Missing layer sequence and stackup

Conformance to Customer Desing Rules

PWB data does not match fabrication drawing

PWB array data does not match fabrication drawing

OEM and assembler specifications conflict

Drill layers do not match PWB artwork files

Conformance to Fabricator Design Rules

Parameter is outside of fabricators capabilities

Does not confirm to fabricator reliability threshold

Non conformance to feature tolerances

Non conformance to soldermask requirements

PWB data file size is very large

Incomplete surface finish requirements

Non-conformance to finished hole requirements

Inefficient fabrication panel utilization

Non-conformance to rout, bevel or score requirements

Non conformance to PWB thickness tolerance

Nonconformance to impedance tolerance

Other issues

Category

Sub Category

Notes

Documents

Engineering -Design 2015