EVALSPEAr320CPU SPEAr320 CPU evaluation board...The CPU board has two 86-pin connectors (J12 and J13) that are used to extend the board. On the board the connectors are horizontally

EVALSPEAr320CPUSPEAr320 CPU

evaluation boardUM1015

User manual

Doc ID 18124 Rev 1

October 2010

www.st.com

STMicroelectronics

BLANK

October 2010 Doc ID 18124 Rev 1 3/38

UM1015User manual

EVALSPEAr320CPUSPEAr320 CPU evaluation board

IntroductionThis document applies to revision 2.0 SPEAr320 CPU evaluation boards.

This board can be used to evaluate SPEAr320 microprocessors; the evaluation board kit comprises one board, one serial cable interface, and one power supply.

CPU board features■ SPEAr320 embedded MPU

■ Up to 2 Gbit DDR2 333 MHz (standard 128 Mbytes)

■ Up to 16 Mbyte Serial Flash memory (standard 8 Mbytes)

■ Two USB 2.0 full host port channels

■ One USB 2.0 host device port

■ One serial port (up to 115 baud)

■ JTAG Debug ports

Figure 1. SPEAr320 CPU evaluation boardTop Bottom

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Contents UM1015

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Contents

1 Getting started . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.1 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.2 Booting procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3 Expansion connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4 Switch and jumper settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

4.1 Switch 1 settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

4.2 Switch 2 settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4.3 Jumpers and connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5 Board components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

6 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

7 Board layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

8.1 Hardware revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

8.2 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

A License agreements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

UM1015 List of tables

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List of tables

Table 1. Switch SW1 bits [2:1] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Table 2. CPU board extension connector J12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Table 3. CPU board extension connector J13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Table 4. Switch 1 (SoC functional configuration) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Table 5. Switch 1 (debug configuration) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Table 6. Switch 1 (functional configuration) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Table 7. Switch 2 settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16Table 8. CPU board components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Table 9. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

List of figures UM1015

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List of figures

Figure 1. SPEAr320 CPU evaluation board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Figure 2. EVALSPEAr320CPU board block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Figure 3. Serial cable setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Figure 4. 86-pin connectors (J12 and J13) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Figure 5. Schematic interconnections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22Figure 6. DDR interface schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23Figure 7. USB interface schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24Figure 8. USB power and optional part schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25Figure 9. Miscellaneous interfaces schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26Figure 10. Power supply schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27Figure 11. Customization interface schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28Figure 12. Daughterboard interface schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29Figure 13. Schematic revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30Figure 14. SPEAr320 CPU evaluation board layout (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31Figure 15. SPEAr320 CPU evaluation board layout (bottom view) . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

UM1015 Getting started

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1 Getting started

Warning: This board contains static sensitive devices.

The EVALSPEAr320CPU board is shipped in protective anti-static packaging. Do not submit the board to high electrostatic potentials, and follow good practices for working with static sensitive devices.

● Wear an anti-static wristband. Wearing a simple anti-static wristband can help prevent ESD from damaging the board.

● Zero potential. Always touch a grounded conducting material before handling the board, and periodically while handling it.

● Use an anti-static mat. When configuring the board, place it on and anti-static mat to reduce the possibility of ESD damage.

● Handle only the edges. Handle the board by its edges only, and avoid touching board components.

1.1 ConnectionsRefer to Figure 14 on page 31.

1. Connect a serial cable from connector J17 (serial link) to a host PC.

2. On the host PC running Windows or Linux, start the Terminal program.

3. Connect the +5 V voltage adapter (supplied in the EVALSPEAR320CPU package) to the J11 power voltage connector on the CPU board.

4. Apply power to the board.

5. The Terminal program displays a sequence of boot messages followed by the Linux console prompt.

For more information, refer to user manual UM0844 Getting started with Linux for SPEAr, available at www.st.com/spear.

1.2 Booting procedureThe SPEAr320 CPU evaluation board can boot a Linux kernel that has been pre-installed in the serial NOR Flash.

At power on, the serial port outputs a brief header message with some uBoot information (uBoot version, SDK version, and some internal hardware information). At this point you can choose to:

● Stop the system directly in uBoot: Press the spacebar on the host computer keyboard before the boot delay time expires (default is 3 seconds).

● Boot Linux: The system logs you in automatically as super user, and displays the Linux shell prompt on the screen.

Block diagram UM1015

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2 Block diagram

Figure 2. EVALSPEAr320CPU board block diagram

2.0.1 Dynamic memory subsystem

The Dynamic memory subsystem comprises three major parts:

Memory chip

The SPEAr320 MPU supports up to 256 Mbytes of memory. Place and route is provided for 2 chips but only one has been populated. The memory used is a Micron DDR2 device, its part number is MT47H64M16HR-3 and its size is 128 Mbits x 8 (16 Mbits x 8 x 8 banks).

Local power supply

The local power supply is based on a monolithic voltage regulator for the chip set and DDR2/3 (PM6641). It is generated locally in order to minimize the layout impact and also to avoid any noise injection between different subsystems.

Signal termination

A parallel termination is added on the clock lines to compensate, if needed, for the layout dissymmetry. Two 100k ohm resistors are used for each line in order to obtain an impedance of 50 ohms. All the other terminations are directly inside the pads (both on the SPEAr320 MPU and the memory sides).

UM1015 Block diagram

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2.0.2 Static memory subsystem (Serial Flash memory)

The SPEAr320 MPU supports up to 16 Mbytes of Serial Flash memory. Place and route for 2 blocks of 8 Mbytes are provided on the board, but only one is populated. It is based on an M25P64-VMF6P (Numonix) Serial Flash memory device.

Resistor R8 protects the Flash memory from any unwanted write access.

2.0.3 USB 2.0 subsystem

Host ports

The board has two host ports that are fully compliant with the USB 2.0 specification (two controllers with one port each). This means that the two hosts can work in concurrent mode with the maximum possible bandwidth. Each host has also full control of the VBUS supplied by the ST2052 power switch that also provides over current protection in case of a short circuit in the USB cable.

Device port

The board has one USB 2.0 device port.

2.0.4 Debug interface

The JTAG interface can be used for static debugging, which means that it is possible to set a breakpoint, and when the system stops, verify the contents of the memory or registers, or both, and modify them if needed.

To select the debug feature, set Switch SW1 bits [2:1].

For more information on the ETM interface, refer to the trace box manufacturer’s documentation (www.lauterbach.com, www.agilent.com, www.yokogawa.com).

2.0.5 Serial interface

One serial interface port is available. Typically used as an OS monitor, this port is available on the J17 connector. It is possible to simulate a cross cable by changing the position of the J22 jumpers.

Figure 3. Serial cable setting

Table 1. Switch SW1 bits [2:1]

Bit 2 Bit 1 Description

0 0 No debug features available

0 1 The ARM JTAG is connected to J4

NulModemCable

J22

2 4

1 3

CrossCable

J22

2 4

1 3

Block diagram UM1015

10/38 Doc ID 18124 Rev 1

2.0.6 Real time clock (battery powered)

The real time clock (RTC) is powered by an external battery (3V) in order to prevent data loss even if the main power supply is switched off.

2.0.7 General power supply

From a 5 V external AC/DC regulator power source, this block generates all the required voltages as follows:

● 1.2V (Switching regulator PM6641) to supply the internal logic of the SPEAr320 MPU

● 1.8V (Switching regulator PM6641) for the DDR2 memory

● 2.5V (LDO regulator) for the analog portion of SPEAr320

● 3.3V (Switching regulator PM6641) to supply the other interfaces

A power monitor is also present to provide the general reset of the board.

2.0.8 Reset button

A manual reset button (P1) on the top of the board (see Figure 14 on page 31) resets the microprocessor on the core board.

UM1015 Expansion connectors

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3 Expansion connectors

The CPU board has two 86-pin connectors (J12 and J13) that are used to extend the board. On the board the connectors are horizontally center-aligned, and the distance between the mechanical holes is 3400.00 th.

Table 2 lists connector J12 pins.

Table 3 on page 13 lists connector J13 pins.

Note: Connector through hole pins (10 pins) are connected to GND

Figure 4. 86-pin connectors (J12 and J13)

Table 2. CPU board extension connector J12

Pin Description Pin Description

1 +1.8V 2 +5V

3 +1.8V 4 +5V

5 +1.8V 6 +5V

7 +1.8V 8 +5V

9 PL_GPIO2 (RS232-TX LVTTL)(1) 10 PL_GPIO44

11 PL_GPIO3 (RS232-RX LVTTL)(2) 12 PL_GPIO39

13 RS232-TX(3) 14 PL_GPIO40

15 RS232-RX(4) 16 PL_GPIO38

17 PL_GPIO42 18 PL_GPIO29









1

2

75

76

Expansion connectors UM1015

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41 PL_GPIO14 42 NC

43 PL_GPIO36 44 NC

45 PL_GPIO41 46 NC

47 PL_GPIO35 48 NC

49 PL_GPIO31 50 +2.5V

51 PL_GPIO32 52 +2.5V

53 PL_GPIO25 54 +2.5V

55 PL_GPIO22 56 +2.5V

57 PL_GPIO21 58 INRESET

59 PL_GPIO17 60 nRESET

61 PL_GPIO12 62 +1.2V

63 PL_GPIO10 64 +1.2V

65 PL_GPIO7 66 +1.2V

67 PL_GPIO1 68 +1.2V

69 PL_GPIO0 70 +3.3V

71 NC 72 +3.3V

73 NC 74 +3.3V

75 NC 76 +3.3V

77

GND(5)

78

GND(5)

79 80

81 82

83 84

85 86

1. If J20 Jumper is set to pin2-3, otherwise NC.

2. If J21 Jumper is set to pin2-3, otherwise NC.

3. If J22 Jumper is set to pin2-4 and pin1-3, otherwise RS232-RX.

4. If J22 Jumper is set to pin2-4 and pin1-3, otherwise RS232-TX.

5. Physically connected to the internal metal plane of the connector. Pins 77 through 81 and 82 through 86 are shorted together.

Table 2. CPU board extension connector J12 (continued)


UM1015 Expansion connectors

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Table 3. CPU board extension connector J13


1 PL_GPIO47 2 +3.3V




















41 PL_GPIO78 42 ADC VREFN

43 PL_GPIO81 44 AIN0

45 PL_GPIO80 46 GND


49 PL_GPIO83 50 GND


53 PL_GPIO91 54 GND


57 PL_GPIO96 58 GND


61 PL_GPIO89 62 GND


65 PL_GPIO93 66 GND


69 PL_CLK4 70 GND

Expansion connectors UM1015

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71 PL_CLK3 72 AIN7

73 PL_CLK2 74 GND

75 PL_CLK1 76 ADC VREFP

77

GND(1)

78

GND(1)

79 80

81 82

83 84

85 86

1. Physically connected to the internal metal plane of the connector. Pins 77 through 81 and 82 through 86 are shorted together.

Table 3. CPU board extension connector J13 (continued)


UM1015 Switch and jumper settings

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4 Switch and jumper settings

4.1 Switch 1 settings

Note: When Switch SW1-x is in the ON position, the bit value is 0. When Switch 1 is in the OFF position, the bit value is 1.

Bits 3, 4, 5 and 6 enable you to set the Functional configuration. The default configuration is Configuration 3. For other configurations, refer to the SPEAr320 user manual available at www.st.com/spear.

Table 4. Switch 1 (SoC functional configuration)

Bit Description

1 Test – see Debug configuration below

2 Reserved

3 Reserved

4 Reserved

5 Reserved

6 BootSel – see Debug configuration below

Table 5. Switch 1 (debug configuration)

Test bitDebug configuration

2 1

0 0 Normal Mode (No debug enabled)

0 1 ARM1 JTAG connected to J4

1 0 Reserved

Table 6. Switch 1 (functional configuration)

Test bitFunctional configuration

6 5 4 3

1 0 1 1 Configuration 3

Switch and jumper settings UM1015

16/38 Doc ID 18124 Rev 1

4.2 Switch 2 settings

Note: If SW2-1 and SW2-2 are both off, B0 (pin PL_GPIO51) is in HiZ state, and can be controlled from the application board.

If SW2-3 and SW2-4 are both off, B1 (pin PL_GPIO52) is in HiZ state, and can be controlled from the application board.



SW2-1 and SW2-2 on: invalid condition SW2-3 and SW2-4 on: invalid condition SW2-5 and SW2-6 on: invalid condition SW2-7 and SW2-8 on: invalid condition

Table 7. Switch 2 settings

Boot from SW2-1 SW2-2 SW2-3 SW2-4 SW2-5 SW2-6 SW2-7 SW2-8

USB_BOOT Off On Off On Off On Off On

ETH (parameter from I2C ROM)

On Off Off On Off On Off On

ETH (parameter from SPI ROM)

Off On On Off Off On Off On

Serial NOR (default setting) On Off On Off Off On Off On

Parallel NOR 8 (EMI with ACK) Off On Off On On Off Off On

Parallel NOR 16 (EMI with ACK)

On Off Off On On Off Off On

Parallel NAND 8 Off On On Off On Off Off On

Parallel NAND 16 On Off On Off On Off Off On

Reserved for SPI Off On Off On Off On On Off

Reserved for I²C On Off Off On Off On On Off

UART_BOOT Off On On Off Off On On Off

BootROM bypass On Off On Off Off On On Off

Parallel NOR 8 (EMI without ACK)

Off On Off On On Off On Off

Parallel NOR 16 (EMI without ACK)

On Off Off On On Off On Off

Reserved Off On On Off On Off On Off

Reserved On Off On Off On Off On Off

UM1015 Switch and jumper settings

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4.3 Jumpers and connectorsThe jumpers and connectors numbered below refer to the CPU board schematics (available on www.st.com/spear).

Sheet 4

● Connector J3 is a standard 20-pin 2.54 mm connector used for JTAG connections.

● Jumper J5 enables the power supply to the Real Time Clock block. If jumper J5 is closed, the RTC is powered (standard).

● Connector J10 is a 2 vie 1.25 mm pitch connector for battery back-up with cable.

Sheet 5

● Connector J11 is a standard power connector for the ADC power supply with a 2.1-mm central pitch.

Sheet 6

● Jumpers J6, J7, J8 and J9 are serial jumpers for the SPEAr power rail. All jumpers MUST be closed. This configuration is used for power measurements.

Sheet 7

● Jumper J22 is a 4-pin symmetric IDC (or strip) connector that switches RX and TX signals for different types of RS-232 cables(a):

– Two pins are connected to the ST3232 Receive/Transmit side.

– Two pins are connected to the RS-232 Receive/Transmit connector side.

● Connector J17 is a connector for standard IDC-to-DSUB converters.

● Jumper J20 switches between RS-232 transmit signals or GPIO2:

– If jumper is on pins 1 and 2, pin PL_GPIO2 is connected to U12 (ST3232) and the COM0 is available on J17.

– If jumper is on pins 2 and 3, pin PL_GPIO2 is connected to the expansion connector J12 pin 9. In this case the COM0 is available on CN13.

● Jumper J21 switches between RS-232 receive signals or GPIO3:

– If jumper is on pins 1 and 2, pin PL_GPIO3 is connected to U12 (ST3232) and the COM0 is available on J17.

– If jumper is on pins 2 and 3, pin PL_GPIO3 is connected to the expansion connector J12 pin 11. In this case the COM0 is available on CN13.

a. With 2 jumpers (inserted) it is possible to switch between two jumper inserted vertically and two jumpers inserted horizontally. This enables the serial cable (null modem cable) to be adapted to the CPU board.

Board components UM1015

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5 Board components

Table 8. CPU board components

Component Designator Footprint Description

Capacitor

C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35 C36 C37 C38 C39 C40 C41 C42 C43 C44 C45 C46 C47 C48 C49 C50 C56 C57 C58 C59 C60 C99 C100 C101 C102

0402 Ceramic capacitor 0.1uF 10% 10V X5R 0402

Resistor

R42 R43 R44 R45 R46 R47 R48 R50

0603 Resistor 0603 0 ohm

Resistor

R30 R31 R32 R33 R34 R35 R36 R37 R38 R72 R73 R74

0603 Resistor 0603 1k ohm 1% 0.1W

Inductor L3 LPS3.9X3.9 Power Inductor 1uH 1.7A 3.9x3.9mm SMD

Capacitor C89 0603 Ceramic capacitor 2.2nF 10% 50V X7R 0603

Inductor L1 L2 LPS3.9X3.9 Power Inductor 2.2uH 1.2A 3.9x3.9mm SMD

Resistor R59 R60 0603 Resistor 0603 4.3 ohm 1% 0.1W

Resistor R27 R28 0603 Resistor 0603 4.7k ohm 1% 0.1W

UM1015 Board components

Doc ID 18124 Rev 1 19/38

Resistor

R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26

0603 Resistor 0603 10k ohm 1% 0.1W

CapacitorC75 C76 C77

0603 Ceramic capacitor 10 nF 10% 50V X7R 0603

Capacitor

C61 C62 C63 C64 C65 C66 C67 C68 C69 C70 C71 C72 C73 C74 C98

0805 Ceramic capacitor 10uF 10% 10V X5R 0805

Resistor R68 0603 Resistor 0603 15k ohm 1% 0.1W

Capacitor C78 C79 0603 Ceramic capacitor 15pF 5% 50V COG 0603

CapacitorC87 C88 C91

0603 Ceramic capacitor 22nF 10% 50V X7R 0603

Capacitor C93 1206 Ceramic capacitor 22 uF Y5V -20+80% 6.3V 1206

Crystal oscillator Y2 RAD-HC49 Crystal Oscillator 24MHz 30ppm through-hole


Crystal oscillator Y1 XT38T Crystal Oscillator 32.768KHz 20ppm d2x6mm

Capacitor C92 0603 Ceramic capacitor 33 nF 10% 50V X7R 0603

Capacitor C80 C81 0603 Ceramic capacitor 33pF 5% 50V COG 0603

Resistor R29 0805 Resistor 0805 43.2 ohm 0.1% 0.1W


Capacitor

C82 C83 C84 C85

C86 C94

C95 C96C97

3528+ Tantalium Capacitor 47uF 10% 10V 3528-21


ResistorR62 R63 R64 R65

R66 R670603 Resistor 0603 68k ohm 1% 0.1W


ResistorR2 R3 R4 R5 R6 R7

0603 Resistor 0603 100 ohm 1% 0.1W

Table 8. CPU board components (continued)


Board components UM1015

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Resistor R1 R53 0805 Resistor 0805 121k ohm 0.1% 0.1W

ResistorR55 R56 R57

0603 Resistor 0603 150 Kohm 1% 0.1W

Resistor R39 R40 0603 Resistor 0603 150 ohm 1% 0.1W

Resistor R75 0603 Resistor 0603 330 ohm 1% 0.1W


Resistor R8 R9 0603 Resistor 0603 470 ohm 1% 0.1W

Capacitor C90 0603 Ceramic capacitor 470 pF 10% 50V X7R 0603

Resistor R41 0603 Resistor 0603 680 ohm 1% 0.1W

Battery U8 BR2032 BATT BR2032: Coin type Lithium batterie 3V straight d20mm

Ferrite beadFB3 FB4 FB5 FB6

FB70805

Ferrite Murata BLM21BD601SN1D 600 ohm/100MHz 200mA 0.35hm 0805

Diode D3 SOT23Hi speed switching dual diode 200mA 70V D BAV70

DC power socket J11 DPS2.5MM DC Power socket 2.5mm

DIP switch SW1 SWM-6X-SMD Surface mount 6-way micro dip switch pitch1.27mm

DIP switch SW2 SWM-8X-SMD Surface mount 8-way micro dip switch pitch1.27mm

Ferrite bead

FB8 FB9 FB12 FB13 FB14 FB15 FB10 FB16

0603 Ferrite 2506033007Y0 SMD 400mA

LEDD5 D6 D7 D8 D9

0805P LED SMD 2,0 x 1,25mm Superbright Green

Connector J17 IDC5X2MDIDC 5X2 MD POL; IDC header 10pin p2.54mm straight male polarized

Connector J3 IDC10X2MD IDC header 20pin p2.54mm straight male polarized

LED D1 D2 0805P Led SMD 2,0 x 1,25mm Superbright red

Memory U5 SO16M25P64; Numonix 64Mbit SPI Serial Flash Memory 3.3V 16pin SO

Diode Z1 SOD123-C425 MMSZ5232BT1; Zener Diode 5.6V 0.5W

Connector J10 MLX-1.25MM-M MOLEX 1.25MM 2W M; Molex 1.25mm 2way male straight

SDRAM U2 U3 FBGA84 MT47H64M16HR3; MICRON DDR2 128MB 1.8V FBGA84

Transistor Q1 SOT23 NPN BC848; NPN transistor 30Vbc 5Vbe 100mA

Transistor Q2 Q3 SOT23NPN PDTD123Y; Digital transistor NPN Rb 2.2K Re 10K 500mA 250mW SOT23

Pad PD1 PDX280H60SQPADX2-80H60; Two square pad 80x80mils 60mils Hole 100mils pitch

Resistor R54 0603 R 0603 0 OHM; Resistor 0603 0 ohm



UM1015 Board components

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Connector J12 J13 MIS-038 SAMTEC-MIS-038; SAMTEC MIS series 76pin 0.64mm pitch

Rectifier D4 DPAK SCR TS420-B_1; Schottky barrier rectifier 1A 60V SMD

Embedded microprocessor

U1 SG-BGA-6004 SPEAR300; STmicroelectronics Spear330

Power distribution switch

U4 SO8 ST2052; STm Current limited power distribution switches

RS-232 driver and receiver

U12 SO16 ST3232C; STm RS-232 driver and receiver

Voltage regulator U9 SOT223ST LD1117S25TR; STm low drop fixed positive voltage regulator 2.5V 800mA

Reset circuit U7 SOT143-4STM811; STm Reset generator and power monitor 3.3V SOT143-4

Voltage regulator U10 VFQFPN-48 ST PM6641; STm DDR2/3 Voltage Regulator 48pin VFQFPN

ConnectorJ5 J6 J7 J8 J9

2X1-2.54-MD STRIP-2X1-2.54-MD; Strip vertical male 2X1 2.54mm

Connector J22 2X2-2.54-MD STRIP-2X2-2.54-MD; Strip vertical male 2X2 2.54mm

Connector J20 J21 3X1-2.54-MD STRIP-3X1; Strip vertical male 3X1 2.54mm

Overvoltage protection

U16 TDFN-10ST STBP120C; STm overvoltage protection device Vout max 5.5V

ESD protection circuit

U13 U14 U15

SOT23-6L ST USBLC6-2SC6; STm USB 2.0 ESD protections

Switch P1 SW-PB-SMD6x6.6SW-PB-SMD; Mechanical key switch SMD 6x6.6mm h4.3mm

Connector J2 USB-A-RA-DBUSB A-TYPE RA DOUBLE; USB double A-type connector right angle

Connector J1 USB-B-RA-1 USB B-TYPE RA SH; USB B-type connector right angle

Ferrite bead FB1 FB2 0805 WURTH 742792023; Ferrite Wurth 742792023 SMD 500mA



Schematics UM1015

22/38 Doc ID 18124 Rev 1

6 Schematics

Figure 5. Schematic interconnections

In Figure 5:

● 02: DDR2 intrface and power

● 03: USB interface

● 04: Miscellaneous (serial flash, RTC power, boot options, JTAG, reset)

● 05: Power supply

● 06: PL_GPIO interface, extended boot options

● 07: Daughterboard and UART connectors

PL_GPIO[0..97]PL_CLK[1..4]

AIN[0..7]

ADC_VREFPADC_VREFN

VREF

INRESET

nRESET

03 - USB Interface.SchDoc03 - USB Interface

06 - PL_GPIO.SchDoc06 - PL_GPIO

PL_GPIO[0..97]PL_CLK[1..4]

04 - Misc.SchDoc04 - Misc

ADC_VREFPADC_VREFNAIN[0..7]INRESET

nRESET

07 - OutCon.SchDoc07 - OutCon

AIN[0..7]ADC_VREFNADC_VREFPPL_GPIO[0..97]PL_CLK[1..4]

INRESET

nRESET

02 - DDR Interface.SchDoc02 - DDR Interface

VREF

05 - Power.SchDoc05 - Power

VREF

UM

1015S

chem

atics

Doc ID

18124 Rev 1

23/38

Figure 6. DDR interface schematic

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

4 4

3 3

2 2

1 1

Spear300 CPU Board

2.3DDR2 interface

2 820 Oct 2009

Place close to pin Place close to pin

Place close to pinPlace close to pin

Place close to DDR2 ChipPlace close to DDR2 Chip

Place close to LAST DDR2 Chip

Place close to pins

nCAS

nCS0

DQS0

DQS1

DQM0DQM1

BA0BA1BA2

CLK_ENCLKnCLK

nCS0nDQS0

nDQS1

nRAS

nWE

ODT0

ADDR0ADDR1ADDR2ADDR3ADDR4ADDR5ADDR6ADDR7ADDR8ADDR9

VREF

ODT0

DATA0DATA1DATA2DATA3

DATA5

DATA9

DATA7

ADDR10ADDR11ADDR12ADDR13

DATA4

DATA6

DATA11

DATA15

DATA13

DATA10

DATA8

DATA14

DATA12

DATA6

DATA15DATA10

DATA11

DATA2

DATA12

DATA7

DATA4

DATA8

DATA9

DATA1

DATA0

DATA13

DATA14

DATA3

DATA5ADDR1


ADDR11

ADDR7

ADDR12

ADDR8

ADDR13

ADDR9

ADDR0

ADDR10

ADDR2

BA2BA1BA0

nCS1nWE

nCASnRAS

nCLK

CLK_ENCLK

ODT1

DQS1nDQS1

nDQS0DQS0

DQM0DQM1

nCLK VREFCLK

DATA7

DATA10DATA15

DATA14

DATA1

DATA9

DATA6

DATA5

DATA13

DATA12

DATA2

DATA3

DATA8

DATA11

DATA0

DATA4ADDR1


ADDR11

ADDR7

ADDR12

ADDR8

ADDR13

ADDR9

ADDR0

ADDR10

ADDR2

BA2BA1BA0

nWE

nCASnRAS

nCLK

CLK_ENCLK

DQS1nDQS1

nDQS0DQS0

DQM0DQM1

nCS1

ODT1

DATA[0..15]

ADDR[0..13]

VREF VREF

VREF

1.8V_SP

1.8V_SP

1.8V_SP

1.8V_SP

1.8V_SP1.8V_SP

1.8V_SP

1.8V_SP

1.8V_SP

1.8V_SP

1.8V_SP 1.8V_SP

Rev

Date: Sheet of

Board

Title

Code

Project

Rev

Date: Sheet of

Board

Title

Code

Project

Rev

Date: Sheet of

Board

Title

Code

Project

C7

0.1

uF X

5R 1

0V

C7

0.1

uF X

5R 1

0V

C19

0.1

uF X

5R 1

0V

C19

0.1

uF X

5R 1

0V

C6210 uF X5R 10VC6210 uF X5R 10V

R9470 OhmR9470 Ohm

MIC

RO

N D

DR

28M

Bx1

6 M

T47H

64M

16H

R-3

U2

MT47H64M16HR3,NC

MIC

RO

N D

DR

28M

Bx1

6 M

T47H

64M

16H

R-3

U2

MT47H64M16HR3,NC

DATA0G8DATA1G2DATA2H7DATA3H3DATA4H1DATA5H9DATA6F1DATA7F9

DATA8C8DATA9C2DATA10D7DATA11D3DATA12D1DATA13D9DATA14B1DATA15B9

ADDR0 M8ADDR1 M3ADDR2 M7ADDR3 N2ADDR4 N8ADDR5 N3ADDR6 N7ADDR7 P2ADDR8 P8ADDR9 P3

ADDR10 M2ADDR11 P7ADDR12 R2ADDR13 R8

UDMB3 LDMF3

VREF J2

CKEK2

nWEK3

BA0 L2BA1 L3BA2 L1

nUDQSA8 UDQSB7 nLDQSE8 LDQSF7

CLKJ8nCLKK8

nRASK7nCASL7

nCSL8

ODTK9

RFU2R7 RFU1R3

NC2A2 NC1E2

VDD1V8_1 A1VDD1V8_2 E1VDD1V8_3 M9VDD1V8_4 R1VDD1V8_5 J9

VDDL1V8 J1

VDDQ1V8_1 A9VDDQ1V8_2 C1VDDQ1V8_3 C3VDDQ1V8_4 C7VDDQ1V8_5 C9

VDDQ1V8_7 G1VDDQ1V8_8 G3VDDQ1V8_9 G7

VDDQ1V8_10 G9

VSS5A3 VSS4E3 VSS3J3 VSS2N1 VSS1P9VSSDLJ7

VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2

VSSQ10 H8

VDDQ1V8_6 E9

C10

0.1

uF X

5R 1

0V

C10

0.1

uF X

5R 1

0V

C8

0.1

uF X

5R 1

0V

C8

0.1

uF X

5R 1

0V

R2100 OhmR2100 Ohm

C13

0.1

uF X

5R 1

0V

C13

0.1

uF X

5R 1

0V

R1

121 Kohm 1%

R1

121 Kohm 1%

C12

0.1

uF X

5R 1

0V

C12

0.1

uF X

5R 1

0V

REF7

FIDUCIAL

REF7

FIDUCIAL

C1

0.1

uF X

5R 1

0V C1

0.1

uF X

5R 1

0VR5100 OhmR5100 Ohm

C14

0.1

uF X

5R 1

0V

C14

0.1

uF X

5R 1

0V

REF8

FIDUCIAL

REF8

FIDUCIAL

C11

0.1

uF X

5R 1

0V

C11

0.1

uF X

5R 1

0V

R3100 OhmR3100 Ohm

C15

0.1

uF X

5R 1

0V

C15

0.1

uF X

5R 1

0V

C20

0.1

uF X

5R 1

0V

C20

0.1

uF X

5R 1

0V

REF1

FIDUCIAL

REF1

FIDUCIAL

C6

0.1

uF X

5R 1

0V

C6

0.1

uF X

5R 1

0V

TP30

TP_diff

TP30

TP_diff

1 12 2

C16

0.1

uF X

5R 1

0V

C16

0.1

uF X

5R 1

0V

C2

0.1 uF X5R 10V

C2

0.1 uF X5R 10V

REF2

FIDUCIAL

REF2

FIDUCIAL

R4100 OhmR4100 Ohm

C18

0.1

uF X

5R 1

0V

C18

0.1

uF X

5R 1

0V

C40.1 uF X5R 10VC40.1 uF X5R 10V

MIC

RO

N D

DR

28M

Bx1

6 M

T47H

64M

16H

R-3

U3

MT47H64M16HR3

MIC

RO

N D

DR

28M

Bx1

6 M

T47H

64M

16H

R-3

U3

MT47H64M16HR3

DATA0G8DATA1G2DATA2H7DATA3H3DATA4H1DATA5H9DATA6F1DATA7F9

DATA8C8DATA9C2DATA10D7DATA11D3DATA12D1DATA13D9DATA14B1DATA15B9

ADDR0 M8ADDR1 M3ADDR2 M7ADDR3 N2ADDR4 N8ADDR5 N3ADDR6 N7ADDR7 P2ADDR8 P8ADDR9 P3

ADDR10 M2ADDR11 P7ADDR12 R2ADDR13 R8

UDMB3 LDMF3

VREF J2

CKEK2

nWEK3

BA0 L2BA1 L3BA2 L1

nUDQSA8 UDQSB7 nLDQSE8 LDQSF7

CLKJ8nCLKK8

nRASK7nCASL7

nCSL8

ODTK9

RFU2R7 RFU1R3

NC2A2 NC1E2

VDD1V8_1 A1VDD1V8_2 E1VDD1V8_3 M9VDD1V8_4 R1VDD1V8_5 J9

VDDL1V8 J1

VDDQ1V8_1 A9VDDQ1V8_2 C1VDDQ1V8_3 C3VDDQ1V8_4 C7VDDQ1V8_5 C9

VDDQ1V8_7 G1VDDQ1V8_8 G3VDDQ1V8_9 G7

VDDQ1V8_10 G9

VSS5A3 VSS4E3 VSS3J3 VSS2N1 VSS1P9VSSDLJ7

VSSQ1 A7VSSQ2 B2VSSQ3 B8VSSQ4 D2VSSQ5 D8VSSQ6 E7VSSQ7 F2VSSQ8 F8VSSQ9 H2

VSSQ10 H8

VDDQ1V8_6 E9

C5

0.1

uF X

5R 1

0V

C5

0.1

uF X

5R 1

0V

Spea

r300

DD

R2

Inte

rfac

e

U1B

Spear300

Spea

r300

DD

R2

Inte

rfac

e

U1B

Spear300

DATA0P11DATA1R11DATA2T11DATA3U11DATA4T12DATA5R12DATA6P12DATA7P13DATA8T17DATA9T16DATA10U17DATA11U16DATA12U14DATA13U13DATA14T13DATA15R13

ADDR0 T2ADDR1 T1ADDR2 U1ADDR3 U2ADDR4 U3ADDR5 U4ADDR6 U5ADDR7 T5ADDR8 R5ADDR9 P5

ADDR10 P6ADDR11 R6ADDR12 T6ADDR13 U6ADDR14 R7

nRASU8nCAST8nWET7

nCS0P9nCS1R9

DQS0U10nDQS0T10

nDQS1T15 DQS1U15

ODT0T3ODT1T4

GATE_OPEN0R10GATE_OPEN1R14

DQM0U12DQM1T14

BA0 P7BA1 P8BA2 R8

CLK T9nCLK U9

CLK_EN U7

VREF P10

COMP_2V5_REXT P4

COMP_2V5_GND R4

C17

0.1

uF X

5R 1

0V

C17

0.1

uF X

5R 1

0V

R8470 OhmR8470 Ohm

C3

0.1

uF X

5R 1

0V C3

0.1

uF X

5R 1

0V

C9

0.1

uF X

5R 1

0V

C9

0.1

uF X

5R 1

0V

C99

0.1 uF X5R 10V

C99

0.1 uF X5R 10V

C6110 uF X5R 10VC6110 uF X5R 10V

FB1

WUR

TH 7

4279

2023

FB1

WUR

TH 7

4279

2023

FB2

WUR

TH 7

4279

2023

FB2

WUR

TH 7

4279

2023

Sch

ematics

UM

1015

24/38D

oc ID 18124 R

ev 1

Figure 7. USB interface schematic

USB Interface

USB Power

HOST0_5V

HOST0_OVERCUR

USB_DEV_DM

HOST1_OVERCUR

HOST1_VBUS

HOST0_VBUS

HOST1_5V

HOST0_DM

HOST0_INF_DM

HOST0_DP

HOST0_INF_DP

B_HOST_VDD3V3

USB_VDD1V2

USB_DEV_VBUS

HOST1_INF_DMHOST1_INF_DP

HOST1_DP

USB_DEV_5V

B_HOST_VDD2V5

USB_DEV_DPUSB_DEV_INF_DPUSB_DEV_INF_DM

HOST1_DM

B_DEV_VDD3V3

B_DEV_VDD2V5

2.5V_SP

3.3V_SP

1.2V_SP

FB7

BLM21BD601SN1D

FB7

BLM21BD601SN1D

FB8

FERRITE-0603

FB8

FERRITE-0603

FB6

BLM21BD601SN1D

FB6

BLM21BD601SN1D

C21

0.1

uF X

5R 1

0V

C21

0.1

uF X

5R 1

0V

FB9

FERRITE-0603

FB9

FERRITE-0603

FB5

BLM21BD601SN1D

FB5

BLM21BD601SN1D

R10

10 Kohm

R10

10 Kohm

FB10

FERRITE-0603

FB10

FERRITE-0603

Spear300

USB Interface

U1C

Spear300

Spear300

USB Interface

U1C

Spear300

USB_DEV_VBUSG3

USB_DEV_DMM2USB_DEV_DPM1

USB_HOST0_VBUSJ3

USB_HOST0_DMK2USB_HOST0_DPK1

USB_HOST1_VBUSH3

USB_HOST1_DMH2USB_HOST1_DPH1

USB_HOST1_OVERCURJ4

USB_HOST0_OVERCURH4

USB_TXR_TUNEK5

USB_ANALOG_TESTL4

USB_DEV_VDD3V3 N3USB_HOST0_VDD3V3 K4

USB_DEV_VDD2V5 N1

USB_HOST1_VDD3V3 J1

USB_HOST0_VDD2V5 L2USB_HOST1_VDD2V5 K3

USB_DVDD1V2 M3

USB_HOST1_VSSa J2USB_HOST0_VSSa L1USB_DEV_VSSa N2USB_DVSS L5USB_COMMON_VSSac L3

FB3

BLM21BD601SN1D

FB3

BLM21BD601SN1D

R27

4.7 Kohm

R27

4.7 Kohm

FB4

BLM21BD601SN1D

FB4

BLM21BD601SN1D

B

J1

USB B-TYPE RA

B

J1

USB B-TYPE RA

Vb 1D-- 2D+ 3Gn 4

Shield1 5Shield2 6

C75

10 nF X7R 50V

C75

10 nF X7R 50V

C22

0.1

uF X

5R 1

0V

C22

0.1

uF X

5R 1

0V

R29

43.2

Ohm

1% R29

43.2

Ohm

1%

C23

0.1

uF X

5R 1

0V

C23

0.1

uF X

5R 1

0V

TP1

TP-TH

TP1

TP-TH

FB16

FERRITE-0603

FB16

FERRITE-0603

C24

0.1

uF X

5R 1

0V

C24

0.1

uF X

5R 1

0V

A

J2

USB A-TYPE RA DOUBLE

A

J2

USB A-TYPE RA DOUBLE

H0-Vbus 1H0-DM 2H0-DP 3

H0-GND 4

H1-Vbus 5H1-DM 6H1-DP 7

H1-GND 8

Shield1 9Shield2 10Shield3 11Shield4 12

C25

0.1

uF X

5R 1

0V

C25

0.1

uF X

5R 1

0V

UM1015 Schematics

Doc ID 18124 Rev 1 25/38

Figure 8. USB power and optional part schematic

USB Power

HOST1_5VHOST0_VBUSHOST1_VBUS

HOST1_OVERCUR

HOST0_5V

HOST0_OVERCUR

5V

3.3V

5V C26

0.1 uF X5R 10V

C26

0.1 uF X5R 10V

ST2052

U4

ST2052

ST2052

U4

ST2052GND 1

IN2

EN13EN24

nOC2 5

OUT2 6OUT1 7

nOC1 8

D1Led redD1Led red

D2Led redD2Led red

R39150 OhmR39150 Ohm

R301 KohmR301 Kohm

R40150 OhmR40150 Ohm

R311 KohmR311 Kohm

Optional part

Place C102 close to U13.5 VBusPlace C101 close to U14.5 VBusPlace C100 close to U15.5 Vbus

HOST0_INF_DM

HOST1_INF_DP

USB_DEV_DMUSB_DEV_DP

USB_DEV_5V

USB_DEV_INF_DMUSB_DEV_INF_DP

HOST0_INF_DPHOST0_DMHOST0_DP

HOST0_5V

HOST1_INF_DMHOST1_DMHOST1_DP

HOST1_5V

C101

0.1

uF X

5R 1

0V

C101

0.1

uF X

5R 1

0V

C102

0.1

uF X

5R 1

0V

C102

0.1

uF X

5R 1

0V

USBLC6

U13

ST USBLC6-2SC6

USBLC6

U13

ST USBLC6-2SC6

I/O11I/O23 I/O1 6

I/O2 4

GND 2Vbus5

USBLC6

U14

ST USBLC6-2SC6

USBLC6

U14

ST USBLC6-2SC6

I/O11I/O23 I/O1 6

I/O2 4

GND 2Vbus5

USBLC6

U15

ST USBLC6-2SC6

USBLC6

U15

ST USBLC6-2SC6

I/O11I/O23 I/O1 6

I/O2 4

GND 2Vbus5

C100

0.1

uF X

5R 1

0V

C100

0.1

uF X

5R 1

0V

Sch

ematics

UM

1015

26/38D

oc ID 18124 R

ev 1

Figure 9. Miscellaneous interfaces schematic8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

4 4

3 3

2 2

1 1

Spear300 CPU Board

2.3Miscellaneus interface

4 820 Oct 2009

JTAG Connector

Boot Sel

Reset management

CS0

CS1

RTC Power

BOOT_SEL

TEST0TEST1

TEST3

SMI_CLKSMI_nWE0

SMI_DATAIN

SMI_nWE1

SMI_DATAOUT

SMI_nCS1

SMI_nCS0

RTC_VDD1V5

TEST2

TEST4

AIN0

AIN2

AIN4

AIN6

AIN1

AIN3

AIN5

AIN7

AIN[0..7]

SMI_CLKSMI_DATAIN

SMI_DATAINSMI_DATAINSMI_CLKSMI_CLK

SMI_DATAOUTSMI_DATAOUT

SMI_nCS0SMI_nCS1SMI_nCS1

INRESET

TDOTDO

DDR_EN

MCLK_VDD1V2

ADC_VREFPADC_VREFN

POWERGOOD

nTRST nTRSTTDI TDITMS TMSTCK TCK

SMI_DATAOUT

DITH_PLL_VDD2V5

nRESET

TEST2

BOOT_SELTEST4TEST3

TEST1TEST0

ADC_AVDD2V5

MCLK_VDD2V5

ADC_AGND

ADC_VREFPADC_VREFN

AIN[0..7]

INRESET

nRESET

2.5V_SP

2.5V_SP

3.3V 3.3V

1.2V_SP

2.5V_SP3.3V

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V3.3V

2.5V_SP

Rev

Date: Sheet of

Board

Title

Code

Project

Rev

Date: Sheet of

Board

Title

Code

Project

Rev

Date: Sheet of

Board

Title

Code

Project

C30

0.1 uF X5R 10V

C30

0.1 uF X5R 10V

M25

P64

U6

M25P64,NC

M25

P64

U6

M25P64,NC

HOLD1

Vcc2

CSEL7

SDO 8

WR-VPP9

GND 10

SDI15CLK16

NC3NC4NC5NC6

NC 11NC 12NC 13NC 14

C29

0.1 uF X5R 10V

C29

0.1 uF X5R 10V

R58

390 Kohm

R58

390 Kohm

R12

10 K

ohm R12

10 K

ohm

R20

10 K

ohm

R20

10 K

ohm

C80

33 pF COG 50V

C80

33 pF COG 50V

J10MOLEX 1.25MM 2W MJ10MOLEX 1.25MM 2W M

11

22

FB15FERRITEFB15FERRITE

R78

0 oh

m,N

C

R78

0 oh

m,N

C

R32

1 Kohm

R32

1 Kohm

C77

10 nF X7R 50V

C77

10 nF X7R 50V

R13

10 K

ohm R13

10 K

ohm

R44 0 OhmR44 0 Ohm

R21

10 K

ohm

R21

10 K

ohm

Y224MhzY224Mhz

J5

STRIP-2X1-2.54-MD

J5

STRIP-2X1-2.54-MD

12

R79

0 oh

m,N

C

R79

0 oh

m,N

C

U8

BATT BR2032

U8

BATT BR2032

GND3 +3V 1

+3V 2

R33

1 Kohm

R33

1 Kohm

C76

10 nF X7R 50V

C76

10 nF X7R 50V

R14

10 K

ohm R14

10 K

ohm R15

10 K

ohm R15

10 K

ohm

FB12

FERRITE

FB12

FERRITE

R341 KohmR341 Kohm

GN

D

Y132.768Khz

GN

D

Y132.768Khz

C280.1 uF X5R 10VC280.1 uF X5R 10V

A1

A2K

D3

D BAV70

A1

A2K

D3

D BAV70

R450 OhmR450 Ohm

FB13

FERRITE

FB13

FERRITER53

121

Kohm

1%

R53

121

Kohm

1%

C31

0.1

uF X

5R 1

0V

C31

0.1

uF X

5R 1

0V

C34

0.1 uF X5R 10V

C34

0.1 uF X5R 10V

R16

10 K

ohm

R16

10 K

ohm

R55

150 Kohm

R55

150 Kohm

FB14

FERRITE

FB14

FERRITE

M25

P64

U5

M25P64

M25

P64

U5

M25P64

HOLD1

Vcc2

CSEL7

SDO 8

WR-VPP9

GND 10

SDI15CLK16

NC3NC4NC5NC6

NC 11NC 12NC 13NC 14

R42

0 Ohm

R42

0 Ohm

C32

0.1

uF X

5R 1

0V

C32

0.1

uF X

5R 1

0V

Spear300

Jtag

Tes

tC

LO

CK

AD

CSM

I

Spear300

Jtag

Tes

tC

LO

CK

AD

CSM

I

nTRSTL16TDIL14TMSL13TCKL17TDOL15

TEST0K16TEST1K15TEST2K14TEST3K13TEST4J15

BOOT_SELJ14DDR2_ENJ13

RTC_XIE2

RTC_XOE1

MCLK_XIP1

MCLK_XOP2

MRESETM17

DIGITAL_REXTG4

DIGITAL_GND_BCOMPF4 RTC_GND F2MCLK_GND P3MCLK_GND_SUB R3

MCLK_VDD1V2 R1MCLK_VDD2V5 R2

RTC_VDD1V5 F1

DITH_PLL_VDD2V5 M4

DITH_PLL_VSS2V5 N4

DITH_PLL_AVDD_2V5 G2

DITH_PLL_AVSS_2V5 G1

ADC_AGND N12ADC_AVDD2V5 N13ADC_VREFN N14ADC_VREFP P14

AIN0 N16AIN1 N15AIN2 P17AIN3 P16AIN4 P15AIN5 R17AIN6 R16AIN7 R15

SMI_CLK N17SMI_DATAIN M13

SMI_DATAOUT M14

SMI_CS0 M15SMI_CS1 M16

R17

10 K

ohm

R17

10 K

ohm

23

45

61

ON

SW1

DIP SWITCH MICRO 6X SMD

23

45

61

ON

SW1


123456

789101112

STM811S

U7

STM811STM811S

U7

STM811

GND1 nRST 2RST IN3 VCC(3.3V)4

C78

15 pF COG 50V

C78

15 pF COG 50V

R76

NC

R76

NC

IDC

10x

2

J3

IDC 10X2 MD POL

IDC

10x

2

J3

IDC 10X2 MD POL

12345678910

11121314151617181920

C33

0.1

uF X

5R 1

0V

C33

0.1

uF X

5R 1

0V

R18

10 K

ohm

R18

10 K

ohm

R54

R 0603 0 OHM

R54

R 0603 0 OHM

C79

15 pF COG 50V

C79

15 pF COG 50V

R77NCR77NC

R11

10 K

ohm R11

10 K

ohm

P1

SW-PB-SMD

P1

SW-PB-SMD4

13

2

C27

0.1 uF X5R 10V

C27

0.1 uF X5R 10V

Q1

NPN BC848

Q1

NPN BC848

23

1

R19

10 K

ohm

R19

10 K

ohm

R43 0 OhmR43 0 Ohm

C81

33 pF COG 50V

C81

33 pF COG 50V

UM

1015S

chem

atics

Doc ID

18124 Rev 1

27/38

Figure 10. Power supply schematic8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

4 4

3 3

2 2

1 1

Spear300 CPU Board

2.3Power supply5 820 Oct 2009

Place near pin 33

From farthest point

Place near PM6641 Place faraway

From farthest 1.8V point

From

farth

est p

oint

From

farth

est p

oint

C94 Place close to IN(4,5) PIN

VTT

VREF VREF

5V

2.5V5V5V

AVCC

1.8V

3.3V

AVCC

1.8V

5V 3.3V 2.5V

5V1.8VAVCCAVCC

AVCC

AVCCAVCC

AVCC

1.2V

3.3V

1.2V 5V 1.8V 5V

1.2V

Rev

Date: Sheet of

Board

Title

Code

Project

Rev

Date: Sheet of

Board

Title

Code

Project

Rev

Date: Sheet of

Board

Title

Code

Project

REF3

FIDUCIAL

REF3

FIDUCIAL

C70

10 uF X5R 10V

C70

10 uF X5R 10V

R48

0 Ohm

R48

0 Ohm

+ C82

47 u

F Ta

n 10

V + C82

47 u

F Ta

n 10

V

C350.1 uF X5R 10VC350.1 uF X5R 10V

D9GREEND9GREEN

L22.2 uH 1.2AL22.2 uH 1.2A

R70

27 K

ohm

R70

27 K

ohm

C9322 uF Y5V 6.3VC9322 uF Y5V 6.3V

B

E

CQ2

NPN PDTD123Y

B

E

CQ2

NPN PDTD123Y

1

2

3

R49 56K OhmR49 56K Ohm

R62

68 K

ohm R62

68 K

ohm

R47

0 Ohm

R47

0 Ohm

R50

0 Ohm

R50

0 Ohm

C65

10 uF X5R 10V

C65

10 uF X5R 10V

C90470 pF X7RC90

470 pF X7R

C37

0.1

uF X

5R 1

0V

C37

0.1

uF X

5R 1

0V

+ C8547 uF Tan 10V

+ C8547 uF Tan 10V

R73

1K Ohm

R73

1K Ohm

R63

68 K

ohm R63

68 K

ohm

C66

10 uF X5R 10V

C66

10 uF X5R 10V

C91

22 n

F X7

R

C91

22 n

F X7

R

C9233 nF X7R 50VC9233 nF X7R 50V

+ C8647 uF Tan 10V

+ C8647 uF Tan 10V

LD1117S25TR

U9

ST LD1117S25TR

LD1117S25TR

U9

ST LD1117S25TR

Vin3

GND1Vout 2

Vout (tab) 4

D5GREEND5GREEN

R41

680 Ohm

R41

680 Ohm

STB

P120

B

U16

ST STBP120C

STB

P120

B

U16

ST STBP120C

NC1

GND 2

FLT 3

IN4IN5 OUT 6

OUT 7

NC8NC9

EN10

PAD111PAD212

R67

68 K

ohm R67

68 K

ohm C74

10 uF X5R 10V

C74

10 uF X5R 10V

R64

68 K

ohm R64

68 K

ohm

R51 0 ohm,NCR51 0 ohm,NC

+ C8447 uF Tan 10V

+ C8447 uF Tan 10V

R6100 OhmR6100 Ohm

R46

0 Ohm

R46

0 Ohm

L31 uH 1.7AL31 uH 1.7A

A

K GD4

SCR

TS42

0-B_

1

A

K GD4

SCR

TS42

0-B_

1

PD1PADX2-80H60

PD1PADX2-80H60

1

2

R61

75 K

ohm R61

75 K

ohm

C7310 uF X5R 10VC7310 uF X5R 10V

R66

68 K

ohm R66

68 K

ohm

R52 0 ohm,NCR52 0 ohm,NC

C69

10 uF X5R 10V

C69

10 uF X5R 10V

D6GREEND6GREEN

R72

1K Ohm

R72

1K Ohm

R284.7 KohmR284.7 Kohm

C87

22 n

F X7

R

C87

22 n

F X7

R

R65

68 K

ohm R65

68 K

ohm

C98

10 u

F X

5R 1

0V

C98

10 u

F X

5R 1

0V

C67

10 uF X5R 10V

C67

10 uF X5R 10V

R60

4.3

Ohm R60

4.3

Ohm

C6410 uF X5R 10VC6410 uF X5R 10V

C7210 uF X5R 10VC7210 uF X5R 10V

R7100 OhmR7100 Ohm

D8GREEND8GREEN

C892.2 nF X7RC892.2 nF X7R

Z1MMSZ5232BT1

Z1MMSZ5232BT1

R22

10 K

ohm R22

10 K

ohm

DC POWER2.1mm

J11

DC POWER SOCKET 2.1MM

DC POWER2.1mm

J11

DC POWER SOCKET 2.1MM

1

23

C7110 uF X5R 10VC7110 uF X5R 10V

R71

68 Kohm,NC

R71

68 Kohm,NC

C36

0.1

uF X

5R 1

0V

C36

0.1

uF X

5R 1

0V

+ C83

47 u

F Ta

n 10

V

+ C83

47 u

F Ta

n 10

VR74

1K Ohm

R74

1K Ohm

ST P

M66

41

U10

ST PM6641

ST P

M66

41

U10

ST PM6641

AGND1 1

SET_SWF2

VOUT_1S8 3

CSNS4

SGND1_1S8 5SGND2_1S8 6

VSW1_1S8 7VSW2 _1S8 8

VIN1_1S89VIN2_1S810

VFB_1S811COMP_1S812SS_1S813

SS_1S0514 COMP_1S0515 VFB_1S0516

SGND1_1S05 17SGND2_1S05 18

VSW1_1S05 19VSW2_1S05 20

VIN1_1S0521VIN2_1S0522

PG_1S0523

PG_1S824

PG_1S525 SS_1S526 COMP_1S527 VFB_1S528

SGND1_1S5 29SGND2_1S5 30

VSW1_1S5 31VSW2_1S5 32

VIN_1S533

EN_1S0534

EN_1S535

EN_VTT36

EN_1S837

AGND2 38

SET_PH139

AGND3 40

AVCC41

VTTGND 42

VTT 43

LDOIN44

VTTREF 45

DSCG46

VTTFB47

VCC48 THERMAL 49

R75

330 Ohm

R75

330 Ohm

R57

150

Kohm R57

150

Kohm

C88

22 n

F X7

R C88

22 n

F X7

R

R68

15 Kohm

R68

15 Kohm

REF4

FIDUCIAL

REF4

FIDUCIAL

C68

10 uF X5R 10V

C68

10 uF X5R 10V

C380.1 uF X5R 10VC380.1 uF X5R 10V

C63

10 u

F X

5R 1

0V

C63

10 u

F X

5R 1

0V

R594.3 OhmR594.3 Ohm

D7GREEND7GREEN

R69

47 K

ohm R69

47 K

ohm

B

E

CQ3

NPN PDTD123Y

B

E

CQ3

NPN PDTD123Y

1

2

3

L12.2 uH 1.2AL12.2 uH 1.2A

R56

150

Koh

m R56

150

Koh

m

Sch

ematics

UM

1015

28/38D

oc ID 18124 R

ev 1

Figure 11. Customization interface schematic8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

4 4

3 3

2 2

1 1

Spear300 CPU Board

2.3Customization interface

6 820 Oct 2009

Place Cap near jumpers

B0-3 booting options

PL_CLK3PL_CLK2PL_CLK1

PL_GPIO6PL_GPIO7

PL_GPIO2

PL_GPIO5PL_GPIO4

PL_GPIO0

PL_CLK4

PL_GPIO9PL_GPIO8

PL_GPIO18

PL_GPIO12

PL_GPIO14

PL_GPIO20

PL_GPIO10

PL_GPIO22

PL_GPIO16

PL_GPIO3

PL_GPIO37

PL_GPIO33PL_GPIO32

PL_GPIO36

PL_GPIO38PL_GPIO39

PL_GPIO30PL_GPIO29PL_GPIO28

PL_GPIO24

PL_GPIO35

PL_GPIO31

PL_GPIO26

PL_GPIO34

PL_GPIO50

PL_GPIO43

PL_GPIO47

PL_GPIO53

PL_GPIO49

PL_GPIO45

PL_GPIO40

PL_GPIO44

PL_GPIO42 PL_GPIO55

PL_GPIO48

PL_GPIO41

PL_GPIO52

PL_GPIO54

PL_GPIO46 PL_GPIO51

PL_GPIO70

PL_GPIO65

PL_GPIO71

PL_GPIO69PL_GPIO68

PL_GPIO57PL_GPIO56


PL_GPIO58

PL_GPIO67

PL_GPIO60PL_GPIO59

PL_GPIO66

PL_GPIO61

PL_GPIO73

PL_GPIO76

PL_GPIO82PL_GPIO81

PL_GPIO85

PL_GPIO87PL_GPIO86

PL_GPIO77

PL_GPIO79

PL_GPIO84

PL_GPIO75

PL_GPIO83

PL_GPIO78

PL_GPIO80

PL_GPIO88

PL_GPIO93

PL_GPIO89

PL_GPIO97

PL_GPIO95

PL_GPIO91

PL_GPIO74PL_GPIO23

PL_GPIO94

PL_GPIO25

PL_GPIO19

PL_GPIO11

PL_GPIO90

PL_GPIO13

PL_GPIO96

PL_GPIO72

PL_GPIO17

PL_GPIO27

PL_GPIO1

PL_GPIO15

PL_GPIO21

PL_GPIO92

PL_GPIO[0..97]PL_GPIO[0..97]

PL_GPIO52

PL_CLK[1..4]

PL_GPIO[0..97]

PL_GPIO54

PL_GPIO53

PL_GPIO51

PL_GPIO[0..97]

PL_CLK[1..4]

3.3V

1.2V_SP 3.3V_SP

1.8V_SP

1.2V_SP

3.3V_SP

1.8V_SP

1.8V_SP

3.3V_SP

1.8V

3.3V

1.2V_SP1.2V

2.5V_SP2.5V

Rev

Date: Sheet of

Board

Title

Code

Project

Rev

Date: Sheet of

Board

Title

Code

Project

Rev

Date: Sheet of

Board

Title

Code

Project

R36

1 Kohm

R36

1 Kohm

J7STRIP-2X1-2.54-MDJ7STRIP-2X1-2.54-MD

12

FM4

FMEC3.2

FM4

FMEC3.2GND1

+ C9747 uF Tan 10V

+ C9747 uF Tan 10V

C49

0.1

uF X

5R 1

0V

C49

0.1

uF X

5R 1

0V

FM3

FMEC3.2

FM3

FMEC3.2GND1R37

1 Kohm

R37

1 Kohm


12

C50

0.1

uF X

5R 1

0V

C50

0.1

uF X

5R 1

0V

C48

0.1

uF X

5R 1

0V

C48

0.1

uF X

5R 1

0V

+ C9547 uF Tan 10V

+ C9547 uF Tan 10V

23

45

61

ON

78

SW2


23

45

61

ON

78

SW2


12345678

910111213141516

C44

0.1

uF X

5R 1

0V

C44

0.1

uF X

5R 1

0V

C42

0.1

uF X

5R 1

0V

C42

0.1

uF X

5R 1

0V

R24

10 Kohm

R24

10 Kohm

Power

Spea

r300

Pow

er su

pply

U1A

Spear300

Power

Spea

r300

Pow

er su

pply

U1A

Spear300

VDD1V2_1F8VDD1V2_2F9VDD1V2_3G12VDD1V2_4H5VDD1V2_5H12VDD1V2_6J5VDD1V2_7L11VDD1V2_8M6VDD1V2_9M7VDD1V2_10M11

VDD3V3_1 F5VDD3V3_2 F6VDD3V3_3 F7VDD3V3_4 F10VDD3V3_5 F11VDD3V3_6 F12VDD3V3_7 G5VDD3V3_8 J12VDD3V3_9 K12

VDD3V3_10 L12VDD3V3_11 M12

DDR_VDD1V8_1M5DDR_VDD1V8_2N5DDR_VDD1V8_3N6DDR_VDD1V8_4N7DDR_VDD1V8_5N8DDR_VDD1V8_6N9DDR_VDD1V8_7N10DDR_VDD1V8_8N11

GND_1G6GND_2G7GND_3G8GND_4G9GND_5G10GND_6G11GND_7H6GND_8H7GND_9H8GND_10H9GND_11H10GND_12H11 GND_13 J6GND_14 J7GND_15 J8GND_16 J9GND_17 J10GND_18 J11GND_19 K6GND_20 K7GND_21 K8GND_22 K9GND_23 K10GND_24 K11GND_25 L6GND_26 L7GND_27 L8GND_28 L9GND_29 L10GND_30 M8GND_31 M9GND_32 M10

C47

0.1

uF X

5R 1

0V

C47

0.1

uF X

5R 1

0V

C45

0.1

uF X

5R 1

0V

C45

0.1

uF X

5R 1

0V

+ C9447 uF Tan 10V

+ C9447 uF Tan 10V

R23

10 Kohm

R23

10 Kohm

R38

1 Kohm

R38

1 Kohm

TP27

TP-TH-POWER

TP27

TP-TH-POWER

C40

0.1

uF X

5R 1

0V

C40

0.1

uF X

5R 1

0V

TP29

TP-TH-POWER

TP29

TP-TH-POWER

R25

10 Kohm

R25

10 Kohm


12

Spea

r300

Prog

ram

mab

le lo

gic

inte

rfac

e

U1E

Spear300

Spea

r300

Prog

ram

mab

le lo

gic

inte

rfac

e

U1E

Spear300

PL_GPIO0F3PL_GPIO1E3PL_GPIO2E4PL_GPIO3D1PL_GPIO4C1PL_GPIO5D2PL_GPIO6B1PL_GPIO7D3PL_GPIO8C2PL_GPIO9B2PL_GPIO10C3PL_GPIO11E5PL_GPIO12D4PL_GPIO13A1PL_GPIO14A2PL_GPIO15B3PL_GPIO16E6PL_GPIO17C4PL_GPIO18D5PL_GPIO19A3PL_GPIO20B4PL_GPIO21C5PL_GPIO22D6PL_GPIO23A4PL_GPIO24B5PL_GPIO25C6PL_GPIO26A5PL_GPIO27B6PL_GPIO28A6PL_GPIO29A7PL_GPIO30B7PL_GPIO31C7PL_GPIO32D7PL_GPIO33E7PL_GPIO34E8PL_GPIO35D8PL_GPIO36C8PL_GPIO37B8PL_GPIO38A8PL_GPIO39A9PL_GPIO40B9PL_GPIO41C9PL_GPIO42D9PL_GPIO43E9PL_GPIO44A10PL_GPIO45B10PL_GPIO46A11PL_GPIO47C10PL_GPIO48B11 PL_GPIO49 C11PL_GPIO50 A12PL_GPIO51 D10PL_GPIO52 B12PL_GPIO53 D11PL_GPIO54 E10PL_GPIO55 A13PL_GPIO56 C12PL_GPIO57 E11PL_GPIO58 D12PL_GPIO59 B13PL_GPIO60 A14PL_GPIO61 E12PL_GPIO62 A15PL_GPIO63 C13PL_GPIO64 D13PL_GPIO65 B14PL_GPIO66 E13PL_GPIO67 C14PL_GPIO68 B15PL_GPIO69 A16PL_GPIO70 C15PL_GPIO71 D14PL_GPIO72 B16PL_GPIO73 A17PL_GPIO74 C16PL_GPIO75 E14PL_GPIO76 F13PL_GPIO77 B17PL_GPIO78 D15PL_GPIO79 F14PL_GPIO80 D16PL_GPIO81 C17PL_GPIO82 E15PL_GPIO83 E16PL_GPIO84 D17PL_GPIO85 F15PL_GPIO86 E17PL_GPIO87 G13PL_GPIO88 F16PL_GPIO89 F17PL_GPIO90 G14PL_GPIO91 G15PL_GPIO92 G16PL_GPIO93 G17PL_GPIO94 H13PL_GPIO95 H14PL_GPIO96 H15PL_GPIO97 H16

PL_CLK1K17PL_CLK2J17PL_CLK3J16PL_CLK4H17

C43

0.1

uF X

5R 1

0V

C43

0.1

uF X

5R 1

0V

TP28

TP-TH-POWER

TP28

TP-TH-POWER


12

+ C9647 uF Tan 10V

+ C9647 uF Tan 10V

R26

10 Kohm

R26

10 Kohm

REF6

FIDUCIAL

REF6

FIDUCIAL

FM2

FMEC3.2

FM2

FMEC3.2GND1

C41

0.1

uF X

5R 1

0V

C41

0.1

uF X

5R 1

0V

R35

1 Kohm

R35

1 Kohm

C39

0.1

uF X

5R 1

0V

C39

0.1

uF X

5R 1

0V

REF5

FIDUCIAL

REF5

FIDUCIAL

FM1

FMEC3.2

FM1

FMEC3.2GND1

C46

0.1

uF X

5R 1

0V

C46

0.1

uF X

5R 1

0V

UM

1015S

chem

atics

Doc ID

18124 Rev 1

29/38

Figure 12. Daughterboard interface schematic

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

4 4

3 3

2 2

1 1

Spear300 CPU Board

2.3DaughterBoard interface

7 820 Oct 2009

PL_GPIO2PL_GPIO3

PL_CLK4PL_CLK3PL_CLK2PL_CLK1

PL_GPIO3PL_GPIO2

GPIO3GPIO2

PL_GPIO5

PL_CLK[1..4]

PL_GPIO95

PL_GPIO56PL_GPIO58

PL_GPIO49


PL_GPIO79

PL_GPIO55

PL_GPIO87

PL_GPIO57PL_GPIO61

PL_GPIO63PL_GPIO46

PL_GPIO66PL_GPIO69

PL_GPIO71

PL_GPIO85


PL_GPIO72PL_GPIO73PL_GPIO70PL_GPIO67

PL_GPIO68

PL_GPIO65

PL_GPIO59

PL_GPIO62

PL_GPIO60

PL_GPIO48

PL_GPIO64

PL_GPIO50

PL_GPIO45

RS232_TXD

ADC_VREFN

ADC_VREFP

AIN0

AIN1

AIN2

AIN3

AIN4

AIN5

AIN6

AIN7

AIN[0..7]

PL_GPIO15PL_GPIO14

PL_GPIO97PL_GPIO93

PL_GPIO96PL_GPIO90

INRESETnRESET

PL_GPIO74

PL_GPIO51

PL_GPIO52

PL_GPIO54

PL_GPIO53

PL_GPIO[0..97]

PL_GPIO39

PL_GPIO47

PL_GPIO40

PL_GPIO44

PL_GPIO29PL_GPIO37

PL_GPIO38

RS232_RXD

PL_GPIO94

PL_GPIO28PL_GPIO26

PL_GPIO30

RS232_RXDRS232_TXD

GPIO2GPIO3

PL_GPIO9PL_GPIO13

PL_GPIO27

PL_GPIO0

PL_GPIO10

PL_GPIO17PL_GPIO12

PL_GPIO7PL_GPIO1

PL_GPIO21

PL_GPIO25PL_GPIO22

PL_GPIO34

PL_GPIO42

PL_GPIO19

PL_GPIO18

PL_GPIO20

PL_GPIO16

PL_GPIO11

PL_GPIO23

PL_GPIO24

PL_GPIO33

PL_GPIO43

PL_GPIO35

PL_GPIO36

PL_GPIO6PL_GPIO4

PL_GPIO31

PL_GPIO41

PL_GPIO8

PL_GPIO81

PL_GPIO77PL_GPIO78

PL_GPIO32

PL_GPIO91

PL_GPIO83

PL_GPIO80

PL_GPIO86

PL_GPIO84

PL_GPIO[0..97]

PL_CLK[1..4]

AIN[0..7]

ADC_VREFN

ADC_VREFP

INRESETnRESET

1.8V

3.3V

3.3V

2.5V

1.2V

5V

3.3V

Rev

Date: Sheet of

Board

Title

Code

Project

Rev

Date: Sheet of

Board

Title

Code

Project

Rev

Date: Sheet of

Board

Title

Code

Project

C57

0.1 uF X5R 10V

C57

0.1 uF X5R 10V

SAM

TE

C M

IS 7

6pin

J13

SAMTEC-MIS-038

SAM

TE

C M

IS 7

6pin

J13

SAMTEC-MIS-038

11 2 233 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 161717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 38

3939 40 404141 42 424343 44 444545 46 464747 48 484949 50 505151 52 525353 54 545555 56 565757 58 585959 60 606161 62 626363 64 646565 66 666767 68 686969 70 707171 72 727373 74 747575 76 76

GB177GB278GB379GB480GB581

GB6 82GB7 83GB8 84GB9 85

GB10 86

J20STRIP-3X1J20STRIP-3X1

123

J22

STRIP-2X2-2.54-MD

J22

STRIP-2X2-2.54-MD

11 2 233 4 4

J21STRIP-3X1J21STRIP-3X1

123REF9

FIDUCIAL

REF9

FIDUCIAL

TP10 TP-THTP10 TP-TH

T1

T2

R1

R2

ST32

32C

U12

ST3232C

T1

T2

R1

R2

ST32

32C

U12

ST3232C

C1+1C1-3C2+4C2-5

V+2V-6

VCC 16

GND 15

R1IN 13R2IN 8

T1IN11T2IN10

R1OUT12R2OUT9

T1OUT 14T2OUT 7

REF10

FIDUCIAL

REF10

FIDUCIAL

REF11

FIDUCIAL

REF11

FIDUCIAL

IDC

5x2

J17

IDC 5X2 MD POL

IDC

5x2

J17

IDC 5X2 MD POL

1 23 45 67 89 10


C600.1 uF X5R 10V

C600.1 uF X5R 10V

TP8TP-TH TP8TP-TH

REF12

FIDUCIAL

REF12

FIDUCIAL

TP7TP-TH TP7TP-TH

C59

0.1

uF X

5R 1

0V

C59

0.1

uF X

5R 1

0V

SAM

TE

C M

IS 7

6pin

J12

SAMTEC-MIS-038SA

MT

EC

MIS

76p

in

J12

SAMTEC-MIS-038

11 2 233 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 161717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 38

3939 40 404141 42 424343 44 444545 46 464747 48 484949 50 505151 52 525353 54 545555 56 565757 58 585959 60 606161 62 626363 64 646565 66 666767 68 686969 70 707171 72 727373 74 747575 76 76

GB177GB278GB379GB480GB581

GB6 82GB7 83GB8 84GB9 85

GB10 86

TP9 TP-THTP9 TP-TH

TP6TP-TH TP6TP-TH

C58

0.1

uF X

5R 1

0V

C58

0.1

uF X

5R 1

0V

TP5TP-TH TP5TP-TH


C56

0.1 uF X5R 10V

C56

0.1 uF X5R 10V

Sch

ematics

UM

1015

30/38D

oc ID 18124 R

ev 1

Figure 13. Schematic revision history

4

4

3

3

2

2

1

1

4 4

3 3

2 2

1 1Spear300 CPU Board

2.3Release note

8 820 Oct 2009

Revision HistoryRevision Descriptions Date

1.0

NOTE:

Initial release 20 May 2009

1.1 C78, C79 : connected to GND instead of 2.5V 28 May 2009Add signal nRESET to daughter-board connectors (pinout to be defined)Add three optionals USBLC6 (U13, U14, U15) for ESD protectionAdd optional STBP120B (U16) for overvoltage protectionAdd two Spare Resistor for RTC Power (R76, R77)Add four 3.2mm mechanical holesAdd two GND pins on 32.768Khz oscillator for PCB footprintChanged daughter-board connectors (Tyco MICTOR instead Samtec QTH)Made some cosmetic changes

Changed daughter-board connectors ( Samtec MIS instead Tyco MICTOR)1.2 10 June 2009

1.3 Add four 47uF capacitor (C94, C95, C96, C97) 25 June 2009

1.4 Remove UART Solution 1 at Page 7

Remove JTAG alternativ Optional part at Page 4Add a 10uF capacitor at input pot of STBP120, C98Add two net: RS232_RXD and RS232_TXD at Page 7 U12-pin 14 and U12-pin13, these two net are connected to Pin40 and Pin42 of J13, Remove Test Point TP3 and TP4Change footprint of D4(TS420-B), from DO-214AC to DPAKAdd C99 0.1uF,0402 capacitor to Spear300 VREF pinAdd R78 0ohm resistor to Pin17 of J3 JTAG Port, and another pad be connected to GNDAdd R79 0ohm resistor to Pin19 of J3 JTAG Port, and another pad be connected to GND

03 July 2009

Add GND to C94, C95,C96,C97

1.5 FB8 is only connected to PIN 6 of J1 at Page3Add a FB16, FB16 is connected to PIN 5 of J1 at Page3

FB9 is connected to PIN 9 and PIN 11 of J2 at Page3FB10 is connected to PIN 10 and PIN 12 of J2 at Page3

03 July 2009

1.5.1 Swap U2 and U3 data signals for better pcb routing at Page2Swap Socket J12 and J13 signals and add four 1.8V power pins to J12 at Page7

R11~R21 pull up to 3.3V (change from 3.3V_SP)at Page4D3 Pin.A1 connect to 3.3V (change from 3.3V_SP)at Page4

10 July 2009

1.6 Change all "Motherboard" to "CPU Board"Apdate Fiducial (REF*) symbol.

17 July 2009

1.7 Pull down U10.4 CSNS to AGND 21 July 2009Connect U10.39 SET_PH1 to AGND

1.8 Change U13.5 net to USB_DEV_5V, Add C102 to Vbus pinChange U14.5 net to HOST0_5V, Add C101 to Vbus pinChange U15.5 net to HOST1_5V, Add C100 to Vbus pinModify USB ESD circuit design, insert ESD IC into USB signals: DM and DP, include USB DEV and Two USB Host

23 July 2009

1.9 Pull up R61 to 1.2VChange RS232-TXD net to J17.5 pinChange RS232-RXD net to J17.3 pinChange R72,R73,R74 value to 1K ohm Change R41 value to 680 ohmChange R75 value to 330 ohm

10 Sep 2009

Revision HistoryRevision Descriptions Date

2.0 Change R49 Value to 56K ohm 23 Sep 2009

2.1 Add TP30 for DQS1 test; Add J22 for serial cable jumper ; Use NC for no pop components 16 Oct 2009

2.2 Change R8 and R9 to "470 ohm" (remove NC), and R51 and R52 to "0 ohm,NC" 20 Oct 2009

2.3 20 Oct 2009Made some cosmetic changes

Rev

Date: Sheet of

Board

Title

Code

Project

Rev

Date: Sheet of

Board

Title

Code

Project

Rev

Date: Sheet of

Board

Title

Code

Project

UM1015 Board layout

Doc ID 18124 Rev 1 31/38

7 Board layout

Figure 14. SPEAr320 CPU evaluation board layout (top view)

Figure 15. SPEAr320 CPU evaluation board layout (bottom view)

JTAG (J3)JTAG (J3)USB device (J1)USBhost (J2)

Seriallink (J17)

Power (J11) Reset button (P1)

Exp

ansi

on c

onne

ctor

(J1

2)

Exp

ansi

on c

onne

ctor

(J1

3)

Revision history UM1015

32/38 Doc ID 18124 Rev 1

8 Revision history

8.1 Hardware revision historyRevision 2.0 SPEAr320 CPU evaluation boards are documented in revision 1 of the EVALSPEAr320CPU user manual.

Earlier board revisions are documented in UM0842, the EVALSPEAr320PLC user manual.

8.2 Document revision history

Table 9. Document revision history

Date Revision Changes

22-Oct-2010 1 Initial release.

UM1015 License agreements

Doc ID 18124 Rev 1 33/38

Appendix A License agreements

DEMO PRODUCT LICENSE AGREEMENT

By using this Demonstration Product, You are agreeing to be bound by the terms and conditions of this agreement. Do not use this Demonstration Product until You have read and agreed to the following terms and conditions. The use of the Demonstration Product implies automatically the acceptance of the following terms and conditions.

LICENSE. STMicroelectronics ("ST") grants You the right to use the enclosed demonstration board offering limited features only to evaluate and test ST products, including any incorporated and/or accompanying demo software, components and documentation identified with the order code "EVALSPEAr320CPU" (collectively, the "Demo Product") solely only for your evaluation and testing purposes. The Demo Product shall not be, in any case, directly or indirectly assembled as a part in any production of Yours as it is solely developed to serve demonstration purposes and has no direct function and is not a finished product. Certain demo software included with the Demo Product may be covered under a separate accompanying end user license agreement, in which case the terms and conditions of such end user license agreement shall apply to that demonstration software.

DEMO PRODUCT STATUS. The Demo Product is offering limited features allowing You only to evaluate and test the ST products. You are not authorized to use the Demo Product in any production system, and may not be offered for sale or lease, or sold, leased or otherwise distributed. If the Demo Product is incorporated in a demonstration system, the demonstration system may be used by You solely for your evaluation and testing purposes. Such demonstration system may not be offered for sale or lease or sold, leased or otherwise distributed and must be accompanied by a conspicuous notice as follows: "This device is not, and may not be, offered for sale or lease, or sold or leased or otherwise distributed".

OWNERSHIP AND COPYRIGHT. Title to the Demo Product, demo software, related documentation and all copies thereof remain with ST and/or its licensors. You may not remove the copyrights notices from the Demo Product. You may make one (1) copy of the software for back-up or archival purposes provided that You reproduce and apply to such copy any copyright or other proprietary rights notices included on or embedded in the demonstration software. You agree to prevent any unauthorized copying of the Demo Product, demonstration software and related documentation.

RESTRICTIONS. You may not sell, assign, sublicense, lease, rent or otherwise distribute the Demo Product for commercial purposes (unless you are an authorized ST distributor provided that all the other clauses of this DEMO PRODUCT LICENSE AGREEMENT shall apply entirely), in whole or in part, or use Demo Product in production system. Except as provided in this Agreement or in the Demo Product's documentation, You may not reproduce the demonstration software or related documentation, or modify, reverse engineer, de-compile or disassemble the demonstration software, in whole or in part.

You warrant to ST that the Demo Product will be used and managed solely and exclusively in a laboratory by skilled professional employees of Yours with proven expertise in the use and management of such products and that the Demo Product shall be used and managed according to the terms and conditions set forth in the related documentation provided with the Demo Product.

According to European Semiconductor Industry Association (ESIA) letter, "ESIA Response on WEEE Review (May 2008) of the Directive 2002/96/EC on Waste Electrical and Electronic Equipment (WEEE)"; Semiconductor products and evaluation & demonstration boards are not in the scope of the Directive 2002/96/EC of the European Parliament and of the Council on waste electrical and electronic equipment (WEEE). Consequently aforementioned products do not have to be registered nor are they subject to the subsequent obligations.

NO WARRANTY. The Demo Product is provided "as is" and "with all faults" without warranty of any kind expressed or implied. ST and its licensors expressly disclaim all warranties, expressed, implied or otherwise, including without limitation, warranties of merchantability, fitness for a particular purpose and non-infringement of intellectual property rights. ST does not warrant that the use in whole or in part of the Demo Product will be interrupted or error free, will meet your requirements, or will operate with the combination of hardware and software selected by You. You are responsible for determining whether the Demo Product will be suitable for your intended use or application or will achieve your intended results.

ST shall not have any liability in case of damages, losses, claims or actions anyhow caused from combination of the Demo Product with another product, board, software or device.

ST has not authorized anyone to make any representation or warranty for the Demo Product, and any technical, applications or design information or advice, quality characterization, reliability data or other services provided by ST shall not constitute any representation or warranty by ST or alter this disclaimer or warranty, and in no additional obligations or liabilities shall arise from ST's providing such information or services. ST does not assume or authorize any other person to assume for it any other liability in connection with its Demo Products.

All other warranties, conditions or other terms implied by law are excluded to the fullest extent permitted by law.

LIMITATION OF LIABILITIES. In no event ST or its licensors shall be liable to You or any third party for any indirect, special, consequential, incidental, punitive damages or other damages (including but not limited to, the cost of labour, re-qualification, delay, loss of profits, loss of revenues, loss of data, costs of procurement of substitute goods or services or the like) whether based on contract, tort, or any other legal theory, relating to or in connection with the Demo Product, the documentation or this Agreement, even if ST has been advised of the possibility of such damages. In no event shall ST's

License agreements UM1015

34/38 Doc ID 18124 Rev 1

aggregate liability to You or any third party under this agreement for any cause action, whether based on contract, tort, or any other legal theory, relating to or in connection with the Demo Product, the documentation or this agreement shall exceed the purchase price paid for the Demo Product if any.

TERMINATION. ST may terminate this license at any time if You are in breach of any of its terms and conditions. Upon termination, You will immediately destroy or return all copies of the demo software and documentation to ST.

APPLICABLE LAW AND JURISDICTION. In case of dispute and in the absence of an amicable settlement, the only competent jurisdiction shall be the Courts of Geneva, Switzerland. The applicable law shall be the law of Switzerland. The UN Convention on contracts for the International Sales of Goods shall not apply to these General Terms and Conditions of Sale.

SEVERABILITY. If any provision of this agreement is or becomes, at any time or for any reason, unenforceable or invalid, no other provision of this agreement shall be affected thereby, and the remaining provisions of this agreement shall continue with the same force and effect as if such unenforceable or invalid provisions had not been inserted in this Agreement.

WAIVER. The waiver by either party of any breach of any provisions of this Agreement shall not operate or be construed as a waiver of any other or a subsequent breach of the same or a different provision.

RELATIONSHIP OF THE PARTIES. Nothing in this Agreement shall create, or be deemed to create, a partnership or the relationship of principal and agent or employer and employee between the Parties. Neither Party has the authority or power to bind, to contract in the name of or to create a liability for the other in any way or for any purpose.

RECYCLING. The Demo Product is not to be disposed as an urban waste. At the end of its life cycle, differentiated waste collection must be followed, as stated in the directive 2002/96/EC.

In all the countries belonging to the European Union (EU Dir. 2002/96/EC) and those following differentiated recycling, the Demo Product is subject to differentiated recycling at the end of its life cycle, therefore:

It is forbidden to dispose the Demo Product as an undifferentiated waste or with other domestic wastes. Consult the local authorities for more information on the proper disposal channels.

It is mandatory to sort the demo product and deliver it to the appropriate collection centers, or, when possible, return the demo product to the seller.

An incorrect Demo Product disposal may cause damage to the environment and is punished by the law.

10-Nov-2008


Doc ID 18124 Rev 1 35/38

SOFTWARE LICENSE AGREEMENT

This Software License Agreement ("Agreement") is displayed for You to read prior to downloading and using the Licensed Software. If you choose not to agree with these provisions, do not download or install the enclosed Licensed Software and the related documentation and design tools. By using the Licensed Software, You are agreeing to be bound by the terms and conditions of this Agreement. Do not use the Licensed Software until You have read and agreed to the following terms and conditions. The use of the Licensed Software implies automatically the acceptance of the following terms and conditions.

DEFINITIONS

Licensed Software: means the enclosed demonstration software and all the related documentation and design tools licensed in the form of object and/or source code as the case maybe.

Product: means a product or a system that includes or incorporates solely and exclusively an executable version of the Licensed Software and provided further that such Licensed

Software executes solely and exclusively on ST products.

LICENSE

STMicroelectronics ("ST") grants You a non-exclusive, worldwide, non-transferable (whether by assignment, law, sublicense or otherwise), revocable, royalty-free limited license to:

(i) make copies, prepare derivatives works, display internally and use internally the source code version of the Licensed Software for the sole and exclusive purpose of developing executable versions of such Licensed Software only for use with the Product;

(ii) make copies, prepare derivatives works, display internally and use internally object code versions of the Licensed Software for the sole purpose of designing, developing and manufacturing the Products;

(iii) make, use, sell, offer to sell, import or otherwise distribute Products.

OWNERSHIP AND COPYRIGHT

Title to the Licensed Software, related documentation and all copies thereof remain with ST and/or its licensors. You may not remove the copyrights notices from the Licensed Software.

You may make one (1) copy of the Licensed Software for back-up or archival purposes provided that You reproduce and apply to such copy any copyright or other proprietary rights notices included on or embedded in the Licensed Software. You agree to prevent any unauthorized copying of the Licensed Software and related documentation.

RESTRICTIONS

Unless otherwise explicitly stated in this Agreement, You may not sell, assign, sublicense, lease, rent or otherwise distribute the Licensed for commercial purposes, in whole or in part purposes (unless you are an authorized ST distributor provided that all the other clauses of this DEMO PRODUCT LICENSE AGREEMENT shall apply entirely).

You acknowledge and agree that any use, adaptation translation or transcription of the

Licensed Software or any portion or derivative thereof, for use with processors manufactured by or for an entity other than ST is a material breach of this Agreement and requires a separate license from ST. No source code and/or object code relating to and/or based upon Licensed Software is to be made available by You to any third party for whatever reason.

You acknowledge and agrees that the protection of the source code of the Licensed Software warrants the imposition of security precautions and You agree to implement reasonable security measures to protect ST's proprietary rights in the source code of the Licensed Software. You shall not under any circumstances copy, duplicate or otherwise reproduce the source code of the Licensed Software in any manner, except as reasonably necessary to exercise Your rights hereunder and make one back-up copy. You are granted the right to make one archival or backup copy of the source code of the Licensed Software, which copy shall be marked as an archival copy and as the confidential information of ST. Access to the source code of the Licensed Software shall be restricted to only those of Your employees with a need-to-know for the purpose of this Agreement.

You will not under any circumstances permit the source code of the Licensed Software in any form or medium (including, but not limited to, hard copy or computer print-out) to be removed from your official premises as you have informed us. The source code of the Licensed Software must remain inside your official premises, as you have informed us. You will lock the source code of the Licensed Software and all copies thereof in a secured storage inside your official premises at all times when the source code of the Licensed Software is not being used as permitted under this Agreement.

License agreements UM1015

36/38 Doc ID 18124 Rev 1

You will inform all Your employees who are given access to the source code of the Licensed Software of the foregoing requirements, and You will take all reasonable precautions to ensure and monitor their compliance with such requirements. You agree to promptly notify ST in the event of a violation of any of the foregoing, and to cooperate with ST to take any remedial action appropriate to address the violation. You shall keep accurate records with respect to its use of the source code of the Licensed Software. In the event ST demonstrates to You a reasonable belief that the source code of the Licensed Software has been used or distributed in violation of this Agreement, ST may by written notification request certification as to whether such unauthorized use or distribution has occurred. You shall reasonably cooperate and assist ST in its determination of whether there has been unauthorized use or distribution of the source code of the Licensed Software and will take appropriate steps to remedy any unauthorized use or distribution.

You agree that ST shall have the right (where ST reasonably suspects that the terms and conditions of this Agreement with reference to Restriction clause have not been complied with) upon reasonable notice to enter Your official premises in order to verify your compliance with this Restriction clause.

NO WARRANTY

The Licensed Software is provided "as is" and "with all faults" without warranty of any kind expressed or implied. ST and its licensors expressly disclaim all warranties, expressed, implied or otherwise, including without limitation, warranties of merchantability, fitness for a particular purpose and non-infringement of intellectual property rights. ST does not warrant that the use in whole or in part of the Licensed Software will be interrupted or error free, will meet your requirements, or will operate with the combination of hardware and software selected by You.

You are responsible for determining whether the Licensed Software will be suitable for your intended use or application or will achieve your intended results. ST has not authorized anyone to make any representation or warranty for the Licensed Software, and any technical, applications or design information or advice, quality characterization, reliability data or other services provided by ST shall not constitute any representation or warranty by ST or alter this disclaimer or warranty, and in no additional obligations or liabilities shall arise from ST's providing such information or services. ST does not assume or authorize any other person to assume for it any other liability in connection with its Licensed Software.

Nothing contained in this Agreement will be construed as:

(i) a warranty or representation by ST to maintain production of any ST device or other hardware or software with which the Licensed Software may be used or to otherwise maintain or support the Licensed Software in any manner; and

(ii) a commitment from ST and/or its licensors to bring or prosecute actions or suits against

third parties for infringement of any of the rights licensed hereby, or conferring any rights to bring or prosecute actions or suits against third parties for infringement. However, ST has the right to terminate this Agreement immediately upon receiving notice of any claim, suit or proceeding that alleges that the Licensed Software or your use or distribution of the Licensed

Software infringes any third party intellectual property rights.

All other warranties, conditions or other terms implied by law are excluded to the fullest extent permitted by law.

LIMITATION OF LIABILITIES

In no event ST or its licensors shall be liable to You or any third party for any indirect, special, consequential, incidental, punitive damages or other damages (including but not limited to, the cost of labour, re-qualification, delay, loss of profits, loss of revenues, loss of data, costs of procurement of substitute goods or services or the like) whether based on contract, tort, or any other legal theory, relating to or in connection with the Licensed Software, the documentation or this Agreement, even if ST has been advised of the possibility of such damages.

In no event shall ST's liability to You or any third party under this Agreement, including any claim with respect of any third party intellectual property rights, for any cause of action exceed

100 US$. This section does not apply to the extent prohibited by law. For the purposes of this section, any liability of ST shall be treated in the aggregate.

TERMINATION

ST may terminate this license at any time if You are in breach of any of its terms and conditions. Upon termination, You will immediately destroy or return all copies of the software and documentation to ST.

APPLICABLE LAW AND JURISDICTION

In case of dispute and in the absence of an amicable settlement, the only competent jurisdiction shall be the Courts of Geneva, Switzerland. The applicable law shall be the law of Switzerland.


Doc ID 18124 Rev 1 37/38

SEVERABILITY

If any provision of this agreement is or becomes, at any time or for any reason, unenforceable or invalid, no other provision of this agreement shall be affected thereby, and the remaining provisions of this agreement shall continue with the same force and effect as if such unenforceable or invalid provisions had not been inserted in this Agreement.

WAIVER

The waiver by either party of any breach of any provisions of this Agreement shall not operate or be construed as a waiver of any other or a subsequent breach of the same or a different provision.

RELATIONSHIP OF THE PARTIES

Nothing in this Agreement shall create, or be deemed to create, a partnership or the relationship of principal and agent or employer and employee between the Parties. Neither Party has the authority or power to bind, to contract in the name of or to create a liability for the other in any way or for any purpose.

UM1015

38/38 Doc ID 18124 Rev 1

Please Read Carefully:

Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice.

All ST products are sold pursuant to ST’s terms and conditions of sale.

Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.

UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.

UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.

Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.

ST and the ST logo are trademarks or registered trademarks of ST in various countries.

Information in this document supersedes and replaces all information previously supplied.

The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.

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Documents

EVALSPEAr320CPU SPEAr320 CPU evaluation board...The CPU board has two 86-pin connectors (J12 and J13) that are used to extend the board. On the board the connectors are horizontally