FAILURE MECHANISM BASED STRESS TEST QUALIFICATION FOR … · 2020. 8. 6. · IATF 16949 Quality management system requirements for automotive production and relevant service parts

AEC - Q102 - Rev A April 6, 2020

FAILURE MECHANISM BASED STRESS TEST QUALIFICATION

FOR OPTOELECTRONIC SEMICONDUCTORS

IN AUTOMOTIVE APPLICATIONS

Component Technical Committee

Automotive Electronics Council




TABLE OF CONTENTS

AEC-Q102 Failure Mechanism Based Stress Test Qualification for Optoelectronic Semiconductors in Automotive Applications

Appendix 1: Definition of a Qualification Family Appendix 2: AEC-Q102 Certification of Design, Construction and Qualification Appendix 3: AEC-Q102 Qualification Test Plan Appendix 4: Data Presentation Format Appendix 5: Minimum Parametric Test Requirements and Failure Criteria Appendix 6: Destructive Physical Analysis (DPA) Appendix 7: AEC-Q102 and the Use of Mission Profiles Appendix 7a: Reliability Validation for Optoelectronic Semiconductors Attachments AEC-Q102-001: DEW TEST (DEW) AEC-Q102-002: BOARD FLEX TEST (BF) AEC-Q102-003: OPTOELECTRONIC MULTICHIP MODULES

(This attachment is not released at the time of the release of the AEC-Q102 Rev A main document. It is expected to be available in 2020.)




Acknowledgment Any document involving a complex technology brings together experience and skills from many sources. The Automotive Electronics Council would especially like to recognize the following significant contributors to the revision of this document: AEC Q102 Sub-Committee Members: Ebru Bakir Kandemir Automotive Lighting Bastian Kopp Automotive Lighting Martin Martinez Automotive Lighting Marcus Rühl Continental Corporation Mihai Sauciuc Continental Corporation Amber Abare Cree Steven Bergeron Cree Hartmut Wettengl Dominant Uwe Berger [Q102 Team Leader] Hella Ludger Kappius Hella Martin Rode Hella Melanie Reinhout Lumileds Sven Schellinger Lumileds Mark Spencer Lumileds Mark Urlaub Lumileds Saori Mitsuhashi Nichia Philipp Plathner Osram Manfred Bittner Osram Opto Semiconductors Christian Jung Osram Opto Semiconductors Markus Ritzer Osram Opto Semiconductors Stefan Tuebel Osram Opto Semiconductors Jean-Edmont Le Calve Valeo Thomas Koschmieder Veoneer Martin Gärtner Vishay Michael Pernkopf ZKW




NOTICE

AEC documents contain material that has been prepared, reviewed, and approved through the AEC Technical Committee. AEC documents are designed to serve the automotive electronics industry through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than AEC members, whether the standard is to be used either domestically or internationally. AEC documents are adopted without regard to whether or not their adoption may involve patents or articles, materials, or processes. By such action AEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the AEC documents. The information included in AEC documents represents a sound approach to product specification and application, principally from the automotive electronics system manufacturer viewpoint. No claims to be in Conformance with this document shall be made unless all requirements stated in the document are met. Inquiries, comments, and suggestions relative to the content of this AEC document should be addressed to the AEC Technical Committee on the link http://www.aecouncil.com. Published by the Automotive Electronics Council. This document may be downloaded free of charge, however AEC retains the copyright on this material. By downloading this file, the individual agrees not to charge for or resell the resulting material. Printed in the U.S.A. All rights reserved Copyright © 2020 by the Sustaining Members of the Automotive Electronics Council. This document may be freely reprinted with this copyright notice. This document cannot be changed without approval from the AEC Component Technical Committee.


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FAILURE MECHANISM BASED STRESS TEST QUALIFICATION FOR OPTOELECTRONIC SEMICONDUCTORS IN AUTOMOTIVE

APPLICATIONS

Text enhancements and differences made since the last revision of this document are shown as underlined areas. Several figures and tables have also been revised, but changes to these areas have not been underlined. Unless otherwise stated herein, the date of implementation of this standard for new qualifications and re-qualifications is as of the publish date above. 1. SCOPE

This document defines the minimum stress test driven qualification requirements and references test conditions for qualification of optoelectronic semiconductors (e.g., light emitting diodes, photodiodes, laser components (see Figure 1a & b)) in all exterior and interior automotive applications. It combines state of the art qualification testing, documented in various documents (e.g., JEDEC, IEC, MIL-STD) and manufacturer qualification standards. The qualification of multichip modules using optoelectronic functions together with other components (e.g., LEDs with integrated circuits, laser components with photodiodes, optocoupler) is described in Attachment AEC-Q102-003. (The document is not released at the time of the release of the AEC-Q102 rev. A main document, it is expected to be available in 2020) This document does not relieve the supplier of their responsibility to meet their own company's internal qualification program. Additionally, this document does not relieve the supplier from meeting any user requirements outside the scope of this document. In this document, "user" is defined as any company developing or using an optoelectronic semiconductor part in production. The user is responsible to confirm and validate all qualification and assessment data that substantiates conformance to this document.

1.1 Purpose

The purpose of this document is to determine that a part is capable of passing the specified stress tests and thus can be expected to give a certain level of quality / reliability in the application.

1.2 Reference Documents

Current revision of the referenced documents will be in effect at the date of agreement to the qualification plan. Subsequent qualification plans will automatically use updated revisions of these referenced documents.

1.2.1 Automotive

AEC-Q001 Guidelines for Part Average Testing AEC-Q002 Guidelines for Statistical Yield Analysis AEC-Q005 Pb-Free Test Requirements SAE/USCAR-33 Specification for testing LED Modules ZVEI Guideline for Customer Notifications of Product and/or Process Changes (PCN) of Electronic

Components specified for Automotive Applications The following document from AEC-Q101 is respectively valid also for qualification of optoelectronic semiconductors according to AEC-Q102:

AEC-Q101-005 Electrostatic Discharge Test - Charged Device Model


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1.2.2 Industrial

JEDEC JESD-22 Reliability Test Methods for Packaged Devices J-STD-002 Solderability Tests for Component Leads, Terminations, Lugs, Terminals and Wires. JESD51-50 Overview of Methodologies for the Thermal Measurement of Single- and Multi-Chip

Single- and Multi-PN Junction Light-Emitting Diodes (LEDs) JESD51-51 Implementation of the Electrical Test Method for the Measurement of Real Thermal

Resistance and Impedance of Light-Emitting Diodes with Exposed Cooling JESD51-52 Guidelines for Combining CIE 127-2007 Total Flux Measurements with Thermal

Measurements of LEDs with Exposed Cooling Surface ANSI/ESDA/JEDEC JS-001 Human Body Model (HBM) - Component Level IEC 60068-2-43 Hydrogen sulphide test for contacts and connections IEC 60068-2-20 Test methods for solderability and resistance to soldering heat of devices with leads IEC 60068-2-58 Test methods for solderability, resistance to dissolution of metallization and to

soldering heat of surface mounting devices (SMD) IEC 60068-2-60 Flowing mixed gas corrosion test

1.2.3 Military

MIL-STD-750-1 Environmental Test Methods for Semiconductor Devices MIL-STD-750-2 Mechanical Test Methods for Semiconductor Devices

1.2.4 Other

IATF 16949 Quality management system requirements for automotive production and relevant service parts organizations

1.3 Definitions 1.3.1 AEC-Q102 Qualification

Successful completion and documentation of the test results from requirements outlined in this document allows the supplier to claim that the part is “AEC-Q102 qualified”. The supplier, in agreement with the user, can perform qualification at sample sizes and conditions less stringent than what this document requires. However, that part cannot be considered “AEC-Q102 qualified” until such time that the unfulfilled requirements have been successfully completed. For ESD, it is highly recommended that the passing voltage be specified in the supplier datasheet with a footnote on any pin exceptions. Note that there are no "certifications" for AEC-Q102 qualification and there is no certification board run by AEC to qualify parts. The minimum temperature range for optoelectronic semiconductors per this document shall be -40oC up to the maximum operating temperature defined in the part specification.

1.3.2 Approval for Use in an Application

"Approval" is defined as the user’s approval for use of a part in their application. The user’s method of approval is beyond the scope of this document.


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1.3.3 Terminology

In this document, “part” refers to the same entity as would “device” or “component” that is a singulated light emitting diode (containing one or multiple dies), photo diode, photo transistor, etc., with a packaged die or an unpackaged die with solderable terminations for board attachment. It can be designed in various ways, sometimes using an integrated protection device for electrostatic discharge (e.g., ESD-diode). Not meant for bare die, needing an additional connection step (e.g., wire bonding of top contact) after the soldering process.

Figure 1a: Examples of Light Emitting Diodes

Figure 1b: Examples of Laser Components

Note: The term “laser component” within this document includes an assembled singular pure laser die as well as an assembled combination of laser die, collimator, and converter.

2. GENERAL REQUIREMENTS 2.1 Precedence of Requirements

In the event of conflict in the requirements of this document and those of any other documents, the following order of precedence applies:

a. The purchase order b. The individual agreed upon part specification c. This document d. The reference documents in Section 1.2 of this document e. The supplier's data sheet

For the part to be considered qualified per this document, the purchase order and/or individual part specification cannot waive or detract from the requirements of this document.


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2.2 The Use of Generic Data to Satisfy Qualification and Re-qualification Requirements

The use of generic (family) data to simplify the qualification/re-qualification process is encouraged. To be considered, the generic data must be based on the following criteria: a. Part qualification requirements listed in Table 2. b. Matrix of specific requirements associated with each characteristic of the part and

manufacturing process as shown in Table 3a-c. c. Definition of family guidelines established in Appendix 1. d. Represent a random sample of the normal population. e. Use of high risk parts within a product/process family. Appendix 1 defines the criteria by which parts are grouped into a qualification family for the purpose of considering the data from all family members to be equal and generically acceptable to the qualification of the part in question. With proper attention to these qualification family guidelines, information applicable to other parts in the family can be accumulated. This information can be used to demonstrate generic reliability of a part family and minimize the need for part-specific qualification test programs. This can be achieved through qualification of a range of parts representing the “four corners” of the qualification family (e.g., highest/lowest current, minimum/maximum amount of dies, etc.). Sources of generic data should come from supplier-certified test labs, and can include internal supplier's qualifications, user-specific qualifications and supplier's in-process monitors. The generic data to be submitted must meet or exceed the test conditions, sample size and number of lots specified in Table 2. Table 1 provides guidelines showing how the available part test data may be applied to reducing the number of lots required for qualification. Parametric verification to the individual user part specification must be performed for each part submission, generic characterization data is not allowed. Whenever appropriate generic data can be used, the supplier has to give a rationale to the user(s). The user(s) will be the final authority on the acceptance of generic data in lieu of specific part test data.

Part Information Lot Requirements for Qualification

New part, no applicable generic data. Lot and sample size requirements per Table 2.

A part in a family is qualified. The part to be qualified is less complex and meets the Family Qualification Definition per Appendix 1.

Only part specific tests as defined in Section 4.2 are required. Lot and sample size requirements per Table 2 for the required tests.

A new part that has some applicable generic data.

Review Section 2.2 above to determine required tests from Table 2. Lot and sample sizes per Table 2 for the required tests.

Part process change. Review Tables 3a-c to determine which tests from Table 2 should be considered. Lot and sample sizes per Table 2 for the required tests.

Qualification/Requalification involving multiple sites or families

Refer to Appendix 1, Section 3.

Table 1: Part Qualification/Re-qualification Lot Requirements


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Table 2 defines a set of qualification tests that must be considered for both new part qualifications and re-qualification associated with a design or process change. Tables 3a-c define a matrix of appropriate qualification tests that must be considered for any changes proposed for the part. Tables 3a-c are the same for both new processes and requalification associated with a process change. This table is a superset of tests that the supplier and the user should use as a baseline for discussion of tests that are required for the qualification/requalification in question. It is the supplier’s responsibility to present and document rationale for why any of the highlighted tests need not be performed.

2.3 Test Samples 2.3.1 Lot Requirements

Lot requirements are designated in Table 2, herein. If more than one lot is required, all lots have to be chosen randomly (when possible) from die manufacturing and assembly.

2.3.2 Production Requirements

All qualification parts shall be produced on tooling and processes at the manufacturing site that will be used to support part deliveries at projected production volumes.

2.3.3 Reusability of Test Samples

Parts that have been used for nondestructive qualification tests may be used to populate other qualification tests. Parts that have been used for destructive qualification tests may not be used any further except for engineering analysis.

2.3.4 Sample Size Requirements

Sample sizes used for qualification testing and/or generic data submission must be consistent with the specified minimum sample sizes and acceptance criteria in Table 2. If the supplier elects to submit generic data for qualification/requalification, the specific test conditions and results must be reported. Existing applicable generic data should first be used to satisfy these requirements and those of Section 2.2 for each test requirement in Table 2. Part specific qualification testing should be performed if the generic data does not satisfy these requirements.

The supplier must perform any combination of the specific part to be qualified and/or an acceptable generic part(s) that totals a minimum of pieces as defined in Table 2.

2.3.5 Time Limit for Acceptance of Generic Data

There are no time limits for the acceptability of generic data as long as the appropriate reliability data is submitted to the user for evaluation. Use the diagram below for appropriate sources of reliability data that can be used. This data must come from the specific part or a part in the same qualification family, as defined in Appendix 1. Potential sources of data could include any user specific data (withhold user’s name), process change qualification, and periodic reliability monitor data (see Figure 2).


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Note: Some process changes may affect the use of generic data such that data obtained before these types of changes will not be acceptable for use as generic data.

Figure 2: Generic Data Time Line

2.3.6 Assembly on Test Boards

If the parts have to be mounted on test boards, the supplier shall make an appropriate choice of process and materials, which shall be documented in the test report. It is recommended to prove the quality of the interconnection by adequate methods (e.g., X-ray, Rth measurement, Vf measurement, etc.) prior to stress testing.

2.3.7 Pre- and Post-Stress Test Requirements

Electrical and optical parameters as defined in Appendix 5 have to be measured before and after the stress testing at the nominal test conditions as mentioned in the appropriate part specification. For LEDs and laser components, the forward voltage has to be measured also at the minimum (or lower) and maximum specified drive current. If no minimum drive current is specified, 10% of the nominal current or ≤1mA should be chosen. For photodiode and phototransistor components the reverse dark current has to be measured at specified reverse voltage as mentioned in the appropriate part specification. All pre- and post-stress test parts must be tested to the electrical characteristics defined in the individual user part detail specification at room temperature. In addition, a simple functioning/no functioning test (e.g., LEDs: light/no light, photodiode: open/short) at minimum and maximum allowed temperature (with an allowed tolerance of +/- 5°) according to the manufacturer datasheet is mandatory for the following stress tests: WHTOL/H³TRB, TC, PTC/IOL, CA-VVF-MS, H2S and FMG


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The functioning/no functioning test is not applicable for laser components without casting (e.g., hermetic metal can (TO)) and pulse laser components with multiple bond wire operated at high currents. For all other laser components, the functioning/no functioning test can simply be verified by an open/short check below threshold. The functioning/no functioning test for photodiodes can be verified by a simple open/short check. The functioning/no functioning test for phototransistors can be verified by using a simple pragmatic illumination (e.g., bulb, torch). No quantitative results needed. The functioning/no functioning test must only be done after the stress tests. It is not necessary for intermediate read-outs. Alternatively, a failure detection during stress testing is possible.

2.4 Definition of Test Failure after Stressing

Test failures are defined as parts exhibiting any of the following criteria: a. Parts not meeting the electrical and optical test limits defined in the part specification. Minimum

test parametric requirements shall be as specified in Appendix 5. b. Parts not remaining within ± x% (as defined in Appendix 5) of the initial reading of each test

after completion of environmental testing. Parts exceeding these requirements must be justified by the supplier and approved by the user. For leakages below 100nA, tester accuracy may prevent a post stress analysis to initial reading.

c. Any part exhibiting physical damage attributable to the environmental test (migration, corrosion,

mechanical damage, delamination, other). For detection use optical microscope having magnification capability of up to 50X. Note that some physical damage may mutually be agreed by the supplier and the user as only non-functional defect with no effect on the part.

If the cause of failure is agreed (by the manufacturer and the user) to be due to mishandling, interconnect to the test board, ESD or some other cause unrelated to the test conditions, the failure shall be discounted after failure analysis, but reported as part of the data submission. Nevertheless, it is necessary that as many parts passed the tests as defined for the sample size in Table 2. That’s why it is recommended to start the test with more samples than needed and/or choose an appropriate test board. If testing more samples than required and at least one part failed, this must be reported.

2.5 Criteria for Passing Qualification/Re-qualification

Passing all appropriate qualification tests specified in Table 2, either by performing the tests (acceptance of zero failures using the specified minimum sample size) on the specific part or demonstrating acceptable family generic data (using the family definition guidelines defined in Appendix 1 and the total required lot and sample sizes), qualifies the part per this document. Parts that have failed the acceptance criteria of tests required by this document require the supplier to satisfactorily determine root cause, implement and verify the corrective action to assure the user that the failure mechanism is understood and contained. The part shall not be considered as passing stress-test qualification until the root cause of the failure is determined and the corrective and preventive actions are confirmed to be effective. New samples or data may be requested to verify the corrective action. If generic data contains any failures, the data is not usable as generic data unless the supplier


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has verified corrective action for the failure condition. In any case, communication between the supplier and the user is required to determine validity of the corrective action. It is strongly recommended to conduct deeper analysis to detect potential component weakness on tested parts that produce behavior or responses that are outside its sampling population, even if those parts are still marginally within acceptance criteria. Any unique reliability tests or conditions requested by the user and not specified in this document shall be agreed upon between the supplier and the user requesting the test, it will not preclude a part from passing stress-test qualification as defined by this document.

2.6 Alternative Testing Requirements

Any deviation from the test requirements and conditions listed in Table 2 are beyond the scope of this document. Deviations (e.g., accelerated test methods) must be demonstrated to the AEC for consideration and inclusion into future revisions of this document. See Appendix 7: Guideline on Relationship of Robustness Validation to AEC-Q102 for more information.

2.7 Temperature Measuring Position

For SMD parts, Tsolder is defined as the temperature measured at the hottest solder connection between the part and the board used for assembly (see Figure 3). For some parts types like “Chip on Board LED” or leaded laser components, other assembly methods like screwing or clinching are used. In this case, Tsolder can be replaced by Tcase measured at an appropriate position of the part (see Figure 3). Measuring Tsolder directly during stress testing may be very difficult for some package designs. In this case, an appropriate position to measure Tboard instead might be chosen. The position of the Tboard measurement should be chosen in the way that the thermal resistance to the Tsolder position is as low as possible. The supplier has to define and provide the used definition. In addition, the supplier has to provide the measured or calculated Ts and Tj (see Appendix 4). Note, that actual measured temperatures may deviate from the specified temperature because of additional thermal resistance of the used test setup.

Figure 3: Definition of Tambient, Tsolder, Tcase and Tjunction. For different LED designs, the definition of the measuring points must be done respectively.


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3. QUALIFICATION AND REQUALIFICATION 3.1 Qualification of a New Part

Stress test requirements and corresponding test conditions for a new part qualification are listed in Table 2. For each qualification, the supplier must present data for all of these tests (see Appendix 4), whether it is stress test results on the specific part or acceptable generic family data. A review is to be made of other parts in the same generic family to ensure that there are no common failure mechanisms in that family. Justification for the use of generic data, whenever it is used, must be demonstrated by the supplier and approved by the user. For each part qualification, the supplier must also present a Certificate of Design, Construction and Qualification to the requesting user. See Appendix 2.

3.2 Re-qualification of a Changed Part

Re-qualification of a part is required when the supplier makes a change to the product and/or process that impacts (or could potentially impact) the form, fit, function, quality and/or reliability of the part (see Tables 3a-c for guidelines).

3.2.1 Process Change Notification

In addition to Tables 3a-c, the supplier will meet mutually agreed upon requirements for product/process changes.

3.2.2 Changes Requiring Re-qualification

As a minimum, any change to the product, as defined above, requires performing the applicable tests listed in Table 2, using Tables 3a-c to determine the re-qualification test plan. Tables 3a-c should be used as a guide for determining which tests need to be performed.

3.2.3 Criteria for Passing Requalification

All requalification failures shall be analyzed for root cause, with corrective and preventive actions established as required. The part and/or qualification family may be granted “qualification status” if, as a minimum, proper containment is demonstrated and approved by the user with corrective and preventive actions established and verified, normally via requalification and rerun the failing test until it successfully passes.

3.2.4 User Approval

A change may not affect a part’s specification but may affect its performance in an application. Individual user authorization of a process change shall be based on a contract between the supplier and the user and is outside the scope of this document.

3.3 Qualification Test Plan

The supplier and the user may agree mutually on a signed Qualification Test Plan as soon as possible after supplier’s selection for new parts, and at the time of notification (see Section 3.2.2) prior to process changes. The Qualification Test Plan, as defined in Appendix 3, shall be used to provide a consistent method of documentation supporting what testing will be performed as required by Tables 2 & 3a-c.


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4 QUALIFICATION TESTS 4.1 General Tests

Test details are given in Table 2. Not all tests apply to all parts. For example, certain tests apply only to uncasted parts. The applicable tests for the particular part type are indicated in the "Note" column and the "Additional Requirements" column of Table 2. The "Additional Requirements" column of Table 2 also serves to highlight test requirements that supersede those described in the referenced test. Any unique qualification tests or conditions requested by the user and not specified in this document shall be negotiated between the supplier and user requesting the test.

4.2 Part Specific Tests

The following tests must be performed on the specific part (i.e., family data is not allowed for these tests): a. Electrostatic Discharge Characterization (Table 2, Test E3 & E4) b. Parametric Verification (Table 2, Test E2) - The supplier must demonstrate that the part is

capable of meeting parametric limits detailed in the individual user part specification. 4.3 Data Submission Format

A data summary shall be submitted as defined in Appendix 4. Raw data with a graphical presentation shall be submitted to the individual user upon request. All data and documents (e.g., justification for non-performed tests, etc.) shall be maintained by the supplier in accordance with IATF 16949 requirements.

4.4 Requirements for Testing Pb-free Components

The supplier shall follow the requirements of AEC-Q005 Pb-Free Test Requirements for all parts whose plating material on the leads/terminations contains


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Figure 4: Q102 Stress Test Flowchart


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Table 2: Qualification Test Methods

TEST GROUP A – ACCELERATED ENVIRONMENT STRESS TESTS

# STRESS ABV NOTES SAMPLE SIZE

/ LOT NUMBER OF LOTS

ACCEPT CRITERIA

TEST METHOD (current revision)

ADDITIONAL REQUIREMENTS

A1 Pre-conditioning PC G, S

SMD qualification parts at least before Test A2a-c, A3a-b, &

A4

0 Fails JEDEC

JESD22-A113

Performed on surface mount parts (SMDs) at least prior to Test A2a-c, A3a-b & A4. Where applicable, preconditioning level and Peak Reflow Temperature must be reported when preconditioning and/or MSL is performed. Any replacement of parts must be reported. Use soldering profile according to part specification with:

- max. allowed peak temperature - max. allowed time at peak temperature within -5°C - max. allowed time over liquidus temperature - max. allowed ramp-up temperature gradient - max. allowed ramp-down temperature gradient

(absolute value) TEST before (Alternatively production test data can be used to ensure use of non-defective parts for PC) and after PC.

A2a Wet High Temperature Operating Life

WHTOL1

D, G, X, Y

26 3 0 Fails JEDEC

JESD22-A101

Only for LEDs and laser components.

PC before WHTOL1.

Duration 1000 h at Tambient = 85 °C / 85% RH with maximum drive current according to derating curve defined in the part specification. Pulse operated laser components shall be operated at maximum stress condition (pulse current, pulse width & duty-cycle) according to part specification. Operated with power cycle 30 min on / 30 min off. LEDs and laser components using multiple emitters (e.g., RGB) must be operated with all emitters driven simultaneously. TEST before and after WHTOL1. DPA after WHTOL1.


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Table 2: Qualification Test Methods (continued)

TEST GROUP A – ACCELERATED ENVIRONMENT STRESS TESTS (CONTINUED)



ACCEPT CRITERIA



A2b Wet High Temperature Operating Life

WHTOL2

D, G, X, Y

26 3 0 Fails JEDEC

JESD22-A101

Only for LEDs and CW laser components, not for pulsed operated laser components.

PC before WHTOL2.

Duration 1000 h at Tambient = 85 °C / 85% RH with minimum drive current according to part specification. If no minimum rated drive current is specified, a drive current shall be chosen not to exceed a rise of 3 K for Tjunction. CW laser components shall be operated below threshold to avoid heating of the laser die. LEDs and laser components using multiple emitters (e.g., RGB) must be operated with all emitters driven simultaneously. TEST before and after WHTOL2. DPA after WHTOL2.

A2c High Humidity High Temperature Reverse Bias

H³TRB D, G, Z 26 3 0 Fails JEDEC

JESD22-A101

Only for photodiodes and phototransistors. PC before H³TRB.

Duration 1000 h at Tambient = 85 °C / 85% RH operated with continuous reverse bias:

Photodiodes: Vr = 0.8x maximum rated reverse voltage defined in part specification. Phototransistors: Vce = 0.8x maximum rated collector emitter voltage defined in part specification.

Maximum specified power dissipation according to derating curve. No light exposure. TEST before and after H³TRB. DPA after H³TRB.


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ACCEPT CRITERIA



A3a Power Temperature Cycling

PTC D, G, X,

Y 26 3 0 Fails

JEDEC JESD22-A105

Only for LEDs and laser components.

PC before PTC. Duration 1000 temperature cycles with maximum drive current according to derating curve specified in part specification at maximum Tsolder. For maximum temperature choose:

PTC condition 1: max Tsolder = 85 °C PTC condition 2: max Tsolder = 105 °C PTC condition 3: max Tsolder = 125 °C

PTC condition should be chosen closest to the operating temperature range within the appropriate part specification. Minimum temperature (during power off) as specified in part specification. Operated with power cycle 5 min on / 5 min off. PTC condition shall be mentioned in the test report. Pulse operated laser components shall be operated at maximum stress condition (pulse current, pulse width & duty-cycle) according to part specification. LEDs and laser components using multiple emitters (e.g., RGB) must be operated with all emitters driven simultaneously. For use within special application; a longer test duration may be needed to ensure reliability over application lifetime. For details, see Appendix 7a “Reliability Validation for LEDs”. TEST before and after PTC. DPA after PTC.

Additionally, for hermetic packages only: HER after PTC.


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ACCEPT CRITERIA



A3b Intermittent Operational Life

IOL D, G, Z 26 3 0 Fails MIL-STD-750-1 Method 1037

Only for photodiodes and phototransistors. Only to be performed if enough power can be generated to

achieve TJ 60 °C. Operated at Tambient = 25 °C with light exposure and:

• Photodiodes: Vr = maximum rated reverse voltage defined in part specification.

• Phototransistors: Vce = maximum rated collector emitter voltage defined in part specification.

but not to exceed absolute maximum ratings.

Number of cycles required: 60000/(x+y) with:

x = the minimum amount of minutes it takes for the part to

reach the required TJ from ambient temperature. y = the minimum amount of minutes it takes for the part to

cool to ambient temperature from required TJ. TEST before and after IOL. DPA after IOL.

Additionally, for hermetic packages only: HER after IOL.

A4 Temperature Cycling

TC D, G 26 3 0 Fails JEDEC

JESD22-A104

PC before TC. Duration 1000 cycles. Minimum soak & dwell time 15 min. Minimum and maximum temperature as specified in part specification. The supplier may use the following recommended standardized conditions if they exceed or are equal to the storage temperature according to the appropriate part specification:

TC condition 1: max Tsolder = 85 °C TC condition 2: max Tsolder = 100 °C TC condition 3: max Tsolder = 110 °C TC condition 4: max Tsolder = 125 °C TC condition 5: max Tsolder = 150 °C

TC condition and transfer time shall be mentioned in the test report. TEST before and after TC. DPA after TC.

Additionally, for hermetic packages only: HER after TC.


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TEST GROUP B – ACCELERATED LIFETIME STRESS TESTS



ACCEPT CRITERIA



B1a High Temperature Operating Life

HTOL1 D, G, X,

Y 26 3 0 Fails

JEDEC JESD22-A108

Only for LEDs and laser components. Duration 1000 h at maximum specified Tsolder. For LED and CW laser components, choose corresponding maximum drive current according to derating curve defined in the part specification. Test B1a is equivalent to B1b if no derating. Pulse operated laser components shall be operated at maximum stress condition (pulse current, pulse width & duty-cycle) according to part specification. LEDs and laser components using multiple chips (e.g., RGB) must be operated with all emitters driven simultaneously. For use within special application; a longer test duration may be needed to ensure reliability over application lifetime. For details, see Appendix 7a “Reliability Validation for LEDs”. TEST before and after HTOL1. DPA after HTOL1.

B1b High Temperature Operating Life

HTOL2 D, G, X,

Y 26 3 0 Fails

JEDEC JESD22-A108

Only for LEDs and CW laser component, not for pulsed operated laser components. Duration 1000 h at maximum specified drive current. Choose maximum corresponding Tsolder according to derating curve defined in the part specification. Test B1b is equivalent to B1a if no derating. LEDs and laser components using multiple emitters (e.g., RGB) must be operated with all emitters driven simultaneously. For use within special application; a longer test duration may be needed to ensure reliability over application lifetime. For details, see Appendix 7a “Reliability Validation for LEDs”. TEST before and after HTOL2. DPA after HTOL2.


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TEST GROUP B – ACCELERATED LIFETIME STRESS TESTS (CONTINUED)



ACCEPT CRITERIA



B1c High Temperature

Reverse Bias HTRB D, G, Z 26 3 0 Fails

JEDEC JESD22-A108

Only for photodiodes and phototransistors. Duration 1000 h at maximum specified Tsolder (equivalent to Tambient because no self-heating if no light exposure). Operated with continuous reverse bias:

• Photodiodes: Vr = maximum rated reverse voltage defined in part specification.

• Phototransistors: Vce = maximum rated collector emitter voltage defined in part specification.

No light exposure. Light exposure only required for Avalanche Photo Diodes. TEST before and after HTRB. * Note: Older parts, qualified according to AEC-Q101 up to rev. C, have been qualified with 0.8x maximum rated reverse / collector emitter voltage.

B2 Low Temperature Operating Life

LTOL D, G, X 26 3 0 Fails JEDEC JESD22-A108

Only for laser components. Duration 500 h at Tambient = min. For CW laser components choose corresponding maximum drive current according to derating curve defined in the part specification. Pulse operated laser components shall be operated at maximum stress condition (pulse current, pulse width & duty-cycle) according to part specification. Operated with power cycle 5 min on / 5 min off. If the minimum temperature cannot be reached at the solder point, a longer cycle time is requested. TEST before and after LTOL.

B3 Pulsed Life PLT D, G, X,

Y 26 3 0 Fails

JEDEC JESD22-A108

Only for LEDs and laser component operated in constant mode but in addition designed for pulsed operation with longer pulse length, typically ms and above. Not for pulsed operated laser components.

Duration 1000 h at Tsolder = 55 °C (Tsolder = 25 °C for interior LEDs alternatively possible). Operated with pulse width 100 µs and duty cycle 3%. Maximum pulse height according to part’s specification. LEDs and laser components using multiple emitters (e.g., RGB) must be operated with all emitters driven simultaneously. TEST before and after PLT.


Page 18 of 57




TEST GROUP C – PACKAGE ASSEMBLY INTEGRITY TESTS



ACCEPT CRITERIA



C1 Destructive Physical Analysis

DPA D, G

2

(for each test)

1 0 Fails Appendix 6 Random sample of parts that have successfully completed TC, PTC/IOL, HTOL, WHTOL/H³TRB, H2S, and FMG. (2 samples each). Provide also reference pictures.

C2 Physical Dimension

PD N, G 10 3 0 Fails JEDEC

JESD22-B100 Verify physical dimensions to the applicable user part packaging specification for dimensions and tolerances.

C3 Wire Bond Pull WBP D, G, W, E

10 bonds from min of

5 parts 3 0 Fails

MIL-STD-750-2

Method 2037 Data may be provided within PPAP (Cpk > 1.67).

C4 Wire Bond Shear WBS D, G, W, E

10 bonds from min of

5 parts 3 0 Fails JESD22-B116

Data may be provided within PPAP (Cpk > 1.67). Acceptance criteria: (minimum shear force value ÷ ball bond area) ≥ 61N/mm² or 4gf/mil².

C5 Die Shear DS D, G 5 3 0 Fails MIL-STD-750-2

Method 2017 Data may be provided within PPAP (Cpk > 1.67).

C6 Terminal Strength TS D, G, L 10 3 0 Fails MIL-STD-750-2 Method 2036

Evaluate lead integrity of through hole leaded parts only.

C7 Dew DEW D, G, X,

Y 26 3 0 Fails AEC-Q102-001

Only for LEDs and laser components, not for hermetic packages.

Operated with minimum drive current according to part specification. If no minimum rated drive current is specified, a drive current shall be chosen not to exceed a rise of 3 K for Tjunction. CW laser components shall be operated below threshold to avoid heating of laser components die. For pulse laser components no power operation or operating at maximum stress is recommended. LEDs and laser components using multiple emitters (e.g., RGB) must be operated with all emitters driven simultaneously. TEST before and after DEW.


Page 19 of 57




TEST GROUP C – PACKAGE ASSEMBLY INTEGRITY TESTS (CONTINUED)



ACCEPT CRITERIA



C8 Resistance to Solder Heat

RSH

(-wave) D, G 10 3 0 Fails

Lead containing devices per

JESD22-B106

Lead (Pb)-free devices per AEC-

Q005

No separate RSH (-reflow) test needed because already covered by test A1 (Pre-conditioning). Only for through hole leaded parts and if the supplier declared the part to be solderable by wave soldering. TEST before and after RSH.

Additionally, for hermetic packages only: HER after RSH.

C9 Thermal Resistance

TR D, G 10 1 0 Fails

JEDEC

JESD51-50

JESD51-51

JESD51-52

For LEDs and laser components. For photodiodes and phototransistor only if enough power can be generated to

achieve TJ 60 °C.

Measure thermal resistance according to JESD51-50, JESD51-51, and JESD51-52 to assure specification compliance.

C10 Solderability SD D, G 10 3 0 Fails

JEDEC J-STD-002

or

IEC 60068-2-58 (SMD)

IEC 60068-2-20 (Through hole)

Preconditioning / accelerated ageing required. Use 155°C dry heat for 4 hours (JEDEC J-STD-002 condition category E or IEC 60068-2-20 ageing 3a). For SMD use:

- JEDEC J-STD-002: test S1 - surface mount process simulation or

- IEC 60068-2-58: method 2 – reflow The supplier shall provide a detailed test report on request.

C11 Whisker Growth WG G see test method

see test method

see test method

AEC-Q005 Only for parts with Sn-based lead finishes. Test to be done on a family basis (plating metallization, lead configuration).


Page 20 of 57




TEST GROUP C – PACKAGE ASSEMBLY INTEGRITY TESTS (CONTINUED)



ACCEPT CRITERIA



C12 Hydrogen Sulphide

H2S D, G 26 3 0 Fails IEC 60068-2-43

Corrosion class A: (preferred) Duration 336 h at 40 °C and 90% RH. H2S concentration: 15ppm Corrosion class B: (acceptable for some application) Duration 500 h at 25 °C and 75% RH. H2S concentration: 10ppm The corrosion class has to be mentioned clearly in the test report. No corrosion allowed. If the supplier can show by means of additional testing or analysis that the corrosion has no impact on product reliability and lifetime, the device may be considered as passed. Nevertheless, the corrosion has to be mentioned within the test report. Details of additional testing or analysis have to be provided to the user if requested. TEST before and after H2S. DPA after H2S.

C13 Flowing Mixed Gas

FMG D, G 26 3 0 Fails IEC 60068-2-60 Test method 4

Duration 500 h at 25 °C and 75% RH. H2S concentration: 10ppb

SO2 concentration: 200ppb

NO2 concentration: 200ppb

Cl2 concentration: 10ppb

No corrosion allowed. If the supplier can show by means of additional testing or analysis that the corrosion has no impact on product reliability and lifetime, the device may be considered as passed. Nevertheless, the corrosion has to be mentioned within the test report. Details of additional testing or analysis have to be provided to the user if requested. TEST before and after FMG. DPA after FMG.

C14 Board Flex BF D, G, S 10 3 0 Fails AEC-Q102-002

Not for through-hole leaded parts.

If the electrical testing of a pulsed operated laser component is not possible because of a broken electronic circuit integrated on test board, it is sufficient to perform an electrical go/no go test only.


Page 21 of 57




TEST GROUP E – ELECTRO-OPTICAL VERIFICATION TESTS



ACCEPT CRITERIA



E0 External Visual EV N, G All qualification parts submitted for testing except DPA and PD

0 Fails JEDEC

JESD22-B101 Inspect part construction, marking and workmanship.

E1

Pre- and Post-Stress Electrical and Photometric Test

TEST N, G

All qualification parts tested per the

requirements of the appropriate part

specification.

0 Fails

Section 2.3.7 &

User specification or supplier’s standard

specification

Test is performed as specified in the applicable stress reference.

E2 Parametric Verification

PV N 26 3

Note A 0 Fails

Individual AEC user specification

Test all parameters according to the part specification over the part temperature range to insure the part specification compliance.

E3 Electrostatic Discharge Human Body Model

HBM D 10 3 0 Fails ANSI/ESDA/JEDEC

JS-001 TEST before and after HBM.

E4

Electrostatic Discharge Charged Device Model

CDM D, 1 10 3 0 Fails AEC Q101-005 CDM may not be applicable for some packages. For more details, see Note 1. TEST before and after CDM.


Page 22 of 57




TEST GROUP G – CAVITY PACKAGE INTEGRITY TESTS



ACCEPT CRITERIA



G1 Constant Acceleration

CA D, G, U

(seq1) Sample size:

10 pcs from 3 lots each

Items G1 through G4 are sequential tests

(seq1 to seq4) for uncasted

packages

(See Note U and H)

0 Fails MIL-STD-750-2 Method 2006

2000 g-force (gravity units) for 1 minute. Stress shall be applied to each of three mutually perpendicular axes in plus and minus directions. TEST before and after CA, alternatively TEST before CA and after MS only.

If the electrical testing of a pulsed operated laser component is not possible because of a broken electronic circuit, integrated on test board, it is sufficient to perform an electrical go/no go test only.

G2 Vibration Variable Frequency

VVF D, G, U

(seq2) 0 Fails

JEDEC JESD22-B103

Condition 1

TEST before and after VVF, alternatively TEST before CA and after MS only.

G3 Mechanical Shock

MS D, G, U

(seq3) 0 Fails

JEDEC

JESD22-B110

1500 g's for 0.5 ms, 5 blows, 3 orientations. TEST before and after MS, alternatively TEST before CA and after MS only.

G4 Hermeticity HER D, G, H

(seq4) 0 Fails

JEDEC

JESD22-A109 Fine and Gross leak test per individual user specification.


Page 23 of 57



LEGEND FOR TABLE 2

Notes: A For parametric verification data, sometimes circumstances may necessitate the acceptance of only one lot by the user. Should a

subsequent user decide to use a previous user’s qualification approval, it will be the subsequent user’s responsibility to verify an acceptable number of lots were used.

D Destructive test, parts are not to be reused for qualification or production. E Ensure that each size wire is represented in the sample size. G Generic data allowed. See Section 2.2. L Required for leaded parts only. N Nondestructive test, parts can be used to populate other tests or they can be used for production. S Required for surface mount parts only. U Required only for uncasted parts. These are parts with (in terms of mechanical stress) critical subcomponents (e.g.: wire bonds), that are

not surrounded and covered by rigid or flexible material (typically epoxy or silicone) to avoid free vibration. Items G1 through G4 are performed as a sequential test to evaluate mechanical integrity of packages containing internal cavities. Number in parentheses below notes indicates sequence.

H Required for hermetic packaged parts only. Items G1 through G4 are performed as a sequential test to evaluate mechanical integrity of packages containing internal cavities. Number in parentheses below notes indicates sequence.

W Required only for parts using internal wire bonds. X Required only for laser components. Y Required only for LED. Z Required only for photodiodes and phototransistors. 1 Small package consideration for CDM testing:

CDM testing of small packages is very challenging. The vacuum used to hold the package in place during testing may not be effective when the package is under a few square millimeters. (The same may apply for round shape parts.) The capacitance between the device under test and the field plate is also very small, which results in very fast CDM current pulses. These pulses have non-negligible peak currents but have very fast rise times and very narrow pulse widths, making the pulses impossible to measure with standard 1 GHz measurement systems. Additionally, the total charge within the pulses is so small that CDM failures of semiconductors in very small packages have seldom been seen. For these reasons, the testing of very small packages is often not performed (as agreed between the supplier and the user) due to the difficulty of testing and the very low chance of failure. Any device or package that could not be completely CDM stressed due to package size shall be recorded.


Page 24 of 57



Tables 3a-c: Process Change Guidelines for the Selection of Tests

Tables 3a-c are based on the ZVEI “Guideline for Customer Notifications of Product and/or Process Changes (PCN) of Electronic Components specified for Automotive Applications” (DeQuMa), combined with Table 2 of this AEC-Q102 document. Destructive Physical Analysis (see Appendix 6) has to be done after TC, PTC/IOL, HTOL, WHTOL / H³TRB, H2S, and FMG. Provide also reverence pictures. Note: A letter or "" indicates that performance of that stress test should be considered for the appropriate process change. Reason for not performing a considered test must be given in the qualification plan or results.

LEGEND FOR TABLES 3a-c

A Not applicable for Ag plated devices (Ag intended to fail for this test) B Only if bond area/wirebond is changed/affected C Only if dopant/implantation material is changed D Only if dimensions are changing E Only if min/max values are changing F Sequence change only H Non epoxy casted devices only J Only for chip technology using wafer bonding K Not applicable for Au plated devices L Only if leadframe/substrate dimensions are changed M Only if metal composition is changed including sequence N Only for glued chips O Only if process is changing P Only if material properties are changed Q Only if glue components are changing R Only if marking technology changes S Only if floor life is affected T Only if board reliability is affected U Only if underfill is affected V Only for non-hermetic devices W Only if risk of corrosion is increasing Y Only for layer technology Z Only if conversion technology changes 1 Only if data sheet parameters are affected 2 Only if outer dimensions are critical 3 Only for leaded parts 4 Only for hermetic parts 5 Only for uncasted parts


Page 25 of 57



Table 3a: Process Change Guideline for LEDs

Table 2 test numberA2

a&bA3a A4

B1

a&bB3 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14

E3

E4G1 G2 G3 G4

Wet

Hig

h t

em

pera

tur

Op

era

tin

g L

ife

Po

wer

Tem

pera

ture

Cycli

ng

Tem

pera

ture

Cycli

ng

Hig

h T

em

pera

ture

Op

era

tin

g L

ife

Pu

lse L

ife T

est

Ph

ysic

al

Dim

en

sio

ns

Wir

e B

on

d P

ull

Wir

e B

on

d S

hear

Die

Sh

ear

Term

inal

Str

en

gh

t

Dew

Test

Resis

tan

ce t

o S

old

er

Heat

Th

erm

al

Resis

tan

ce

So

ldera

bil

ity

Wh

isker

Gro

wth

Hyd

rog

en

Su

lph

ide

Flo

w M

ixed

Gas C

oro

sio

n

Bo

ard

Fle

x

ES

D C

hara

cte

rizati

on

Co

nsta

nt

Accele

rati

on

Vib

rati

on

Vari

ab

le F

req

uen

cy

Mech

an

ical

Sh

ock

Herm

eti

cit

y

Para

mete

r-A

naly

sis

:

Co

mp

ari

so

n o

f cu

rren

t w

ith

ch

an

ged

devic

e

WH

TO

L

PT

C

TC

HT

OL

PL

T

PD

WB

P

WB

S

DS

TS

DE

W

RS

H

TR

SD

WG

H2S

FM

G

BF

HB

M/C

DM

CA

VV

F

MS

HE

R

PA

Remarks

ANY

Any change with impact on agreed

upon contractual agreements

Any change with impact on

technical interface or

processability/manufacturabiliy of

customer

T S,T

DATA SHEET

Change of datasheet

parameters/electrical specification

(min./max./typ. values) and/or

Pulse/DC specification

E E E E S E E E

Correction of data sheet

Specification of additional

parameters ●

Formalism since this is not a

product change, any addtional

information.

DESIGN

Design changes in epitaxy. ● ● - ● ● H ● ●

Design changes in routing/layout. ● ● ● ● ● B B D,M M ● M M ● ●TR might be considered for

complex die bond technologies

Die shrink ● ● ● ● ● B B ● ● ● ● ●

LED package (except leadframe) ● ● ● ● ● B B D 3 D ● L T D D ● 5 5 5 4 ●

Design of leadframe ● ● ● ● ● B B D 3 ● ● T 2 ● ● 5 5 5 4 ●

PROCESS - WAFER PRODUCTION

New / change of wafer substrate or

carrier materialP ● P ● ● ● P ● ● P P P P ●

Wafer diameter ● ● ● ● ● P ●

New final wafer thickness P ● ● ● ● B B ● ● ● P ●

Change of electrically active

doping/implantation elementC C ● ● ● ● ●

Change of stacking ● ● F ● ● F ● ●

New / change of metallization

(specifically chip frontside)● ● ● ● ● ● ● M M M D,M M,B ●


(specifically chip backside)● ● ● ● ● ● D,M ● D,M D,M D,M D,M D,M ●

Change in process technique (e.g.

significant process changes like

lithography, etch, oxide deposition,

die back surface

preparation/backgrind, ...)

Process Integrity: Tuning within

specification

Change of material supplier with no

impact on agreed specifications

Change of specified wafer process

sequence (deletion and/or add.

process step)

Change in die coating or

passivaton● P ● ● P P P P P P P ●

New wafer production location or

transfer of wafer production to a

different not previously released

location/site/subcontractor

● ● ● ● ● ● ● ● J ● ●

Qualification effort depends on type of change.

Name of test

Type of change


Qualification effort depends on type of change. PPAP has to be updated.


Page 26 of 57



Table 3a: Process Change Guideline for LEDs (continued)


a&bA3a A4

B1


E3

E4G1 G2 G3 G4

Name of test

Type of change

WH

TO

L

PT

C

TC

HT

OL

PL

T

PD

WB

P

WB

S

DS

TS

DE

W

RS

H

TR

SD

WG

H2S

FM

G

BF

HB

M/C

DM

CA

VV

F

MS

HE

R

PA

Remarks

PROCESS - ASSEMBLY

Change of leadframe/carrier base

material● ● P ● ● ● 3 A ● P,1 ● P A A ●

Explanation to provide in case

H2S test is not applicable

Change of leadframe/carrier

finishing material (internal)● ● ● P ● ● ● A ● P,1 ● A A

Considered H2S test for exterior

applications. Explanation to

provide in case H2S test is not

applicable

Change of lead and heat slug

plating material/plating thickness

(external)

K ● P 1 A ● P,1 ● K A AExplanation to provide in case


Bump Material / Metall System

(internal)● ● ● ● ● W ● ● W W ●

Die attach material ● ● ● ● ● N ● ● Q Q ● N N N

Change of bond wire material P,D ● ● ● ● ● ● ● P,D P,D D D D

Change in material for sub-

components (excluding LED chip &

LED package related items) with


Die Overcoat / Underfill P ● ● ● ● - U - ● U - P P ● - P P P

Change of mold

compound/encapsulation/sealing

material

● ● - ● P D 3 P ● P T P P ● - D D D

Change of conversion material ● ● Y ● P P ● Y P P ● Y Y Y ●

Change of direct supplier for

converter material● ● P ● P P ● P P P P P P P ●

Change of converter process

technology● ● Y ● Z Z ● Y Z Z Z Y Y Y ●

Change of product marking O T T


die attach, molding, plating, trim &

form,.. )


specification

Change of direct material supplier

with no impact on specificationSee change of material.

Change of specified assembly

process sequence

(additional or deletion of process

step)

New assembly location or transfer

of assembly to a different not

previously released


PACKING/SHIPPING

Inner Packing/shipping

specification changeT P

Outer Packing/shipping

specification change

Change of labelling

Dry pack requirement change






Page 27 of 57



Table 3a: Process Change Guideline for LEDs (continued)


a&bA3a A4

B1


E3

E4G1 G2 G3 G4

Name of test

Type of change

WH

TO

L

PT

C

TC

HT

OL

PL

T

PD

WB

P

WB

S

DS

TS

DE

W

RS

H

TR

SD

WG

H2S

FM

G

HB

M/C

DM

VV

F

MS

PA

Remarks

EQUIPMENT

Production from a new

equipment/tool which uses a

different basic technology


equipment/tool which uses the

same basic technology

(replacement equipment or

extension of existing equipment

pool) without change of process.

Change in final test equipment type

that uses a different technologyT ● ● Gage R&R / delta correlation

TEST FLOW

Move of all or part of electrical

wafer test and/or final test to a



● B ● B B B B B ● T ● ●Gage R&R / delta correlation;

addtional specification check

Q-GATE

Change of the test coverage/testing

process flow used by the supplier

to ensure data sheet compliance

(e.g. elimination/addition of

electrical measurement/test flow

block; relaxation/enhancement of

monitoring procedure or sampling)

●




Page 28 of 57



Table 3b: Process Change Guideline for Laser Components


a&bA3 A4

B1

a&bB2 B3 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14

E3

E4G1 G2 G3 G4

Wet

Hig

h t

em

pera

tur

Op

era

tin

g L

ife

Po

wer

Tem

pera

ture

Cycli

ng

Tem

pera

ture

Cycli

ng

Hig

h T

em

pera

ture

Op

era

tin

g L

ife

Lo

w T

em

pera

ture

Op

era

tin

g L

ife

Pu

lse L

ife T

est

Ph

ysic

al

Dim

en

sio

ns

Wir

e B

on

d P

ull

Wir

e B

on

d S

hear

Die

Sh

ear

Term

inal

Str

en

gh

t

Dew

Test

Resis

tan

ce t

o S

old

er

Heat

Th

erm

al

Resis

tan

ce

So

ldera

bil

ity

Wh

isker

Gro

wth

Hyd

rog

en

Su

lph

ide

Flo

w M

ixed

Gas C

oro

sio

n

Bo

ard

Fle

x

ES

D C

hara

cte

rizati

on

Co

nsta

nt

Accele

rati

on

Vib

rati

on

Vari

ab

le F

req

uen

cy

Mech

an

ical

Sh

ock

Herm

eti

cit

y

Para

mete

r-A

naly

sis

:

Co

mp

ari

so

n o

f cu

rren

t w

ith

ch

an

ged

WH

TO

L

PT

C

TC

HT

OL

LT

OL

PL

T

PD

WB

P

WB

S

DS

TS

Dew

RS

H

TR

SD

WG

H2S

FM

GC

BF

HB

M/C

DM

CA

VV

F

MS

HE

R

PA

Remarks

ANY






customer

T S,T

DATA SHEET

Change of datasheet




E E E E E S E E E



parameters ●



information.

DESIGN

Design changes in epitaxy. ● ● ● ● H ● ●

Design changes in routing/layout. ● ● ● ● ● B B D,M M ● M M ● ●TR might be considered for


Die shrink ● ● ● ● ● ● B B ● ● ● ● ●

Laser package (except leadframe,

but including internal components)● ● ● ● ● ● B B D 3 D ● L T D D ● 5 5 5 4 ●




carrier materialP, V ● P ● ● ● P, V ● ● P P P P ●

Wafer diameter V ● ● ● ● P ●

New final wafer thickness P, V ● ● ● ● B B ● ● ● P ●


doping/implantation elementC, V C ● ● ● ● ●

Change of stacking V ● F ● ● F, V ● ●


(specifically chip frontside)V ● ● ● ● ● ● M, V M M D,M M,B ●


(specifically chip backside)V ● ● ● ● ● D,M,V ● D,M D,M D,M D,M D,M ●




die back surface



specification

Change of material supplier with no



sequence (deletion and/or

additional process step)

New / change of facet passivation V ● ● ● ● ● V ● P,V P,V ●


passivatonV P ● ● P P P,V P,V P,V P P ●





V ● ● ● ● ● ● ● J ● ●

Name of test

Type of change





Page 29 of 57



Table 3b: Process Change Guideline for Laser Components (continued)


a&bA3 A4

B1


E3

E4G1 G2 G3 G4

Name of test

Type of changeW

HT

OL

PT

C

TC

HT

OL

LT

OL

PL

T

PD

WB

P

WB

S

DS

TS

Dew

RS

H

TR

SD

WG

H2S

FM

GC

BF

HB

M/C

DM

CA

VV

F

MS

HE

R

PA

Remarks

PROCESS - ASSEMBLY


material● ● ● P ● ● ● 3 A ● P,1 ● P A A ●

Explanation should be provided

in case H2S test is not

applicable


finishing material (internal)● ● ● P ● ● ● A ● P,1 ● A A

H2S test should be considered

for automotive exterior

applications.

explanation should be provided


applicable



(external)

K ● P 1 A ● P,1 ● K A A

Explanation should be provided


applicable


(internal)● ● ● ● ● W ● ● W W ●

Die attach material ● ● ● ● ● N ● ● Q Q ● N N N

Change of bond wire material P,D ● ● ● ● ● ● ● P,D P,D D D D


components (excluding Laser chip

& Laser package related items)

with impact on agreed

specifications

Die Overcoat / Underfill P ● ● ● ● U ● U P P ● P P P

Change of mold


material

● ● ● P D 3 P ● P T P P ● D D D 4

Change of conversion material ● ● Y ● P P ● Y P P ● Y Y Y ●

Change of direct supplier for

converter material● ● P ● P P ● P P P P P P P ●

Change of converter process

technology● ● Y ● Z Z ● Y Z Z Z Y Y Y ●

Assembly of additional internal

components (e.g. lenses)

Change of material and / or

supplier of additional internal

components (e.g. lenses)

Generation of hermeticity (e.g.

welding, gluing of transmissive

window)

4 4 4 4 4 4 4 4 4 4


Change in process technique (e.g.,

die attach, bonding, moulding,

plating, trim and form, …)


specification




process sequence (additional or

deletion of process step)



previously released


PACKING/SHIPPING





Change of labelling









Page 30 of 57



Table 3b: Process Change Guideline for Laser Components (continued)


a&bA3 A4

B1


E3

E4G1 G2 G3 G4

Name of test

Type of changeW

HT

OL

PT

C

TC

HT

OL

LT

OL

PL

T

PD

WB

P

WB

S

DS

TS

Dew

RS

H

TR

SD

WG

H2S

FM

GC

BF

HB

M/C

DM

CA

VV

F

MS

HE

R

PA

Remarks

EQUIPMENT










Change in final test equipment type

that uses a different technologyT ● ● Gage R&R / delta correlation

TEST FLOW





● B ● B B B B B ● T ● ●Gage R&R / delta correlation;


Q-GATE

Change of the test coverage/testing

process flow used by the supplier

to ensure data sheet compliance

(e.g. elimination/addition of

electrical measurement/test flow

block; relaxation/enhancement of


●




Page 31 of 57



Table 3c: Process Change Guideline for Photodiodes & Phototransistors

Table 2 test number A2c A3b A4 B1c C2 C3 C4 C5 C6 C8 C9 C10 C11 C12 C13 C14E3

E4G1 G2 G3 G4

Hig

h H

um

idit

y H

igh

Tem

pera

ture

Revers

e B

ias

Inte

rmit

ten

d O

pera

tin

g L

ife

Tem

pera

ture

Cycli

ng

Hig

h T

em

pera

ture

Revers

e B

ias

Ph

ysic

al

Dim

en

sio

ns

Wir

e B

on

d P

ull

Wir

e B

on

d S

hear

Die

Sh

ear

Term

inal

Str

en

gh

t

Resis

t. t

o S

old

er

Heat

Th

erm

al

resis

tan

ce

So

ldera

bil

ity

Wh

isker

Gro

wth

Hyd

rog

en

Su

lph

ide

Flo

w M

ixed

Gas C

oro

sio

n

Bo

ard

Fle

x

ES

D C

hara

cte

rizati

on

Co

nsta

nt

Accele

rati

on

Vib

rati

on

Vari

ab

le F

req

uen

cy

Mech

an

ical

Sh

ock

Herm

eti

cit

y

Para

mete

r-A

naly

sis

:

Co

mp

ari

so

n o

f cu

rren

t w

ith

ch

an

ged

devic

e

H³T

RB

IOL

TC

HT

RB

PD

WB

P

WB

S

DS

TS

RS

H

TR

SD

WG

H2S

FM

GC

BF

HB

M/C

DM

CA

VV

F

MS

HE

R

PA

Remarks

ANY






customer

T S,T

DATA SHEET

Change of datasheet




E E E S E E E



parameters ●



information.

DESIGN

Design changes in epitaxy. ● ● ● ● ●

Design changes in routing/layout. ● ● ● ● B B D,M ● M M ● ●TR might be considered for


Die shrink ● ● ● ● B B ● ● ● ● ●

Component package (except

leadframe)● ● ● ● ● B B D 3 ● L T D D ● 5 5 5 4 ●




carrier materialP ● P ● ● ● ● P P P P ●

Wafer diameter ● ● ● ● P ●

New final wafer thickness P ● ● ● B B ● ● ● P ●


doping/implantation elementC C ● ● ● ●

Change of stacking ● ● F ● ● ●


(specifically chip frontside)● ● ● ● ● ● M M D,M M,B ●


(specifically chip backside)● ● ● ● ● ● D,M D,M D,M D,M D,M ●




die back surface



specification

Change of material supplier with

no impact on agreed specifications


sequence (deletion and/or add.

process step)

Name of test

Type of change





Page 32 of 57



Table 3c: Process Change Guideline for Photodiodes & Phototransistors (continued)


E4G1 G2 G3 G4

Name of test

Type of change H³T

RB

IOL

TC

HT

RB

PD

WB

P

WB

S

DS

TS

RS

H

TR

SD

WG

H2S

FM

GC

BF

HB

M/C

DM

CA

VV

F

MS

HE

R

PA

Remarks

PROCESS - WAFER PRODUCTION - continued


passivaton● P ● ● P P P P P P ●





● ● ● ● ● ● ● J ● ●

PROCESS - ASSEMBLY


material● ● P ● ● ● 3 ● P,1 ● P A A ●

Explanation to provide in case



finishing material (internal)● ● ● P ● ● ● ● P,1 ● A A

Consider H2S test for exterior

applications. Explanation to

provide in case H2S test is not

applicable



(external)

K ● P 1 ● P,1 ● K A AExplanation to provide in case



(internal)● ● ● ● ● ● ● W W ●

Die attach material ● ● ● ● ● ● ● Q Q ● N N N

Change of bond wire material P,D ● ● ● ● ● ● P,D P,D D D D


components (excluding

photodiode/transistor chip &

package related items) with impact

on agreed specifications

Die Overcoat / Underfill P ● ● ● U ● U P P ● P P P

Change of mold


material

● ● ● ● D 3 ● P T P P ● D D D



die attach, molding, plating, trim &

form,.. )


specification




process sequence (additional or

deletion of process step)



previously released







Page 33 of 57



Table 3c: Process Change Guideline for Photodiodes & Phototransistors (continued)


E4G1 G2 G3 G4

Name of test

Type of change H³T

RB

IOL

TC

HT

RB

PD

WB

P

WB

S

DS

TS

RS

H

TR

SD

WG

H2S

FM

GC

BF

HB

M/C

DM

CA

VV

F

MS

HE

R

PA

Remarks

PACKING/SHIPPING





Change of labelling


EQUIPMENT










Change in final test equipment

type that uses a different

technology

T ● ● Gage R&R / delta correlation

TEST FLOW





● B ● B B B B ● T ● ●Gage R&R / delta correlation;


Q-GATE

Change of the test

coverage/testing process flow used

by the supplier to ensure data

sheet compliance (e.g.

elimination/addition of electrical

measurement/test flow block;

relaxation/enhancement of


●




Page 34 of 57



Appendix 1: Definition of a Qualification Family The qualification of a particular process will be defined within, but not limited to, the categories listed below. The supplier will provide a complete description of each process and material of significance. Valid evidence for the link between the data and the subject of qualification has to be provided by the supplier. For parts to be categorized in a qualification family, they all must share the same major process and materials elements as defined below. For each qualification test, two or more qualification families can be combined if the reasoning is technically sound (i.e., supported by rationale clearly detailing similarity). All parts using the same process and materials are to be categorized in the same qualification family for that process and are acceptable by association when one family member successfully completes qualification with the exception of the device specific requirements of Section 4.2.

Prior qualification data 3 years old or newer obtained from a part in a specific family may be extended to the qualification of subsequent parts in that family provided the supplier can insure no process changes