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Faulty Stochastic LDPC Decoders Over the Binary Symmetric Channel C. Kameni Ngassa 12 , V. Savin 2 & D. Declercq 1 1 ETIS / ENSEA - Université de Cergy-Pontoise - CNRS UMR 8051 95000 Cergy-Pontoise Cedex, France 2 CEA-LETI Minatec Campus, 38054 Grenoble cedex 9, France August 19, 2014

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Faulty Stochastic LDPC Decoders Over the Binary SymmetricChannel

C. Kameni Ngassa 1 2, V. Savin 2 & D. Declercq 1

1 ETIS / ENSEA - Université de Cergy-Pontoise - CNRS UMR 805195000 Cergy-Pontoise Cedex, France

2 CEA-LETIMinatec Campus, 38054 Grenoble cedex 9, France

August 19, 2014

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

Contents

1 Introduction

2 LDPC Codes and Stochastic Decoding

3 Faulty Stochastic Decoder

4 Monte-Carlo Simulation

5 Conclusion

ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 2 / 20

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

Introduction

MotivationsFuture generation of communication systems will need to deal with hardware failureIncreasing interest on LDPC decoders in presence of unreliable components :

recent works on faulty Gallager A [Varshney’11] and Gallager B [Yazdi’13] decoderswe previously studied faulty Min-Sum decoders [Kameni’13]

Our previous resultsThe robutness to hardware of the Min-Sum decoder is significantly improved whenthe sign bit of exchanged messages is protected.

However it might be difficult to protect only the most significant bit of messages

IntuitionStochastic decoder might be inherently robust to noise from unreliable componentbecause

messages exchanged in the decoder are random ;

information is represented using bits of similar significance ;

timing errors can be tolerated in stochastic decoder [Perez’13].

ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 3 / 20

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

LDPC Codes and Stochastic Decoding

LDPC Codes and Belief Propagation algorithmCapacity approaching linear block codes

Sparse parity check matrix

Bipartite graph representation and message-passing algorithmBelief Propagation decoding

Drawback : computationally complex

Stochastic DecodingStochastic implementation of the probability-domain BP

Convert probability beliefs into streams of random bitsAdvantages :

simple logic gates to perform complex arithmetic operationsonly one bit exchanged at each iterationless the number of wires in the circuit [Sharifi’08]

ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 4 / 20

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

Probability to Stochastic Stream Conversion

R < P

P

Probability

R

Sequence ofrandom numbers

0100101000 · · ·Stochastic stream

FIGURE: Stochastic Stream Generator

P probability to convert (quantized on q bits)R random number uniformly generated (quantized on q bits)Output = 1 if R < PP = the frequency of 1 in the stochastic streamrepresentation not unique

0 1 1 0 0 0 0 1 0 00 0 0 1 0 0 1 0 0 10 0 0 0 1 1 0 1 0 0

}−→ 0.3

one error occurring on any bit has a limited impact on the probability value.ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 5 / 20

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

From Belief Propagation to Stochastic DecodingAlgorithm

Check-to-variable node processing

Probability domain BP

αm,1

αm,2

αm,k

βm,n

1

2

k

m n

βm,n =12− 1

2

∏n′∈H(m)\n

(1− 2αm,n′ ) (1)

Stochastic Decoding Algorithm

am,1am,2

am,k−1am,k

bm,n

bm,n = XORn′∈H(m)\n

(am,n′

)(2)

ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 6 / 20

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

From Belief Propagation to Stochastic Decoding

Variable-to-check node processing

Probability domain BP

β1,n

β2,n

βl,n

αm,n

γn

1

2

l

n m

αm,n =

γn∏

m′∈H(n)\mβm′,n(

γn∏

m′∈H(n)\mβm′,n

)+

((1− γn)

∏m′∈H(n)\m

(1− βm′,n)

) (3)

ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 7 / 20

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

From Belief Propagation to Stochastic Decoding

Variable-to-check node processing

Stochastic Decoding AlgorithmDivision in stochastic computing : JK flip-flop

J

K

Q

b1,nb2,nbl,n cn

am,n

j(`) k(`) q(`)

0 0 q(`−1)

0 1 01 0 11 1 q(`−1)

TABLE: JK flip-flop truth table

Pq =Pj

Pj + Pk(4)

a(`)m,n =

{c(`)

n , if c(`)n = b(`)

m′,n, ∀m′ ∈ H(n) \m

a(`−1)m,n , otherwise

(5)

ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 8 / 20

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

From Belief Propagation to Stochastic DecodingA Posteriori UpdateProbability domain BP

γ̃n =

γn∏

m∈H(n)βm,n(

γn∏

m∈H(n)βm,n

)+(

(1− γn)∏

m∈H(n)(1− βm,n)

) (6)

Stochastic Decoding Algorithm : up/down counter

θn = θn +∑

m∈H(n)

(2am,n − 1) (7)

not equivalent to the BP a posteriori update

Hard decision

Probability domain BP

x̂n ={

1, if γ̃n > 0.50, otherwise (8)

Stochastic Decoding Algorithm

x̂n ={

1, if θn > 00, otherwise (9)

ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 9 / 20

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

Improving the Stochastic Decoder Performance

Latching Problemcycles in the graph −→ correlation in stochastic streams

a(`)m,n = a(`−1)

m,n −→ hold state and low level of switching activity

Consequence : groups of nodes locked into fixed states which prevents proper decodingand leads to poor performance.

Noise-Dependent ScalingGoal : ensure similar switching activity for different channel noise levelAchieved by replacing ε by a constant µ [Huang’13] as follows.

Pr(cn = 1) ={

1− ε, if yn = 1ε, if yn = 0 −→ Pr(cn = 1) =

{1− µ, if yn = 1µ, if yn = 0 (10)

Edge-MemoriesGoal :decorrelate bits in stochastic streams

S-bit shift register assigned to one edge of the decoder

ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 10 / 20

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

Improving the Stochastic Decoder Performance

bm1,nbm2,nbm(dv−1),ncn

amdv ,n

in

addressi

update

out 0

1

E.M.

FIGURE: Variable node of stochastic decoder with edge-memories

VN Processing with Edge-Memories

At cycle `, for ∀ n ∈ {1, . . . ,N} and m ∈ H(n) if ∀m′ ∈ H(n)\m, b(`)m′,n = cn

a(`)m,n = cn

cn → EM(the new value of am,n is stored in the memory)

otherwise, a(`)m,n = EM(i) (a bit is randomly chosen from the memory)

i = random position in the edge-memory.

ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 11 / 20

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

Faulty Stochastic Decoder (1)

Stochastic Decoders with Noisy Edge-MemoriesEM(i) = bit read at address i from the noiseless EM

EMpr(i) = bit read at address i from the noisy EM

EMpr(i) ={

EM(i), with probability 1− pem

EM(i), with probability pem(11)

VN Processing with Edge-Memories

At cycle `, for ∀ n ∈ {1, . . . ,N} and m ∈ H(n) if ∀m′ ∈ H(n)\m, b(`)m′,n = cn

a(`)m,n = cn

cn → EM(the new value of am,n is stored in the memory with no error)

otherwise, a(`)m,n = EMpr(i) (a bit is randomly chosen from the faulty memory)

i = random position in the edge-memory.

ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 12 / 20

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

Faulty Stochastic Decoder (2)

Full Noisy Stochastic DecoderOutput of the Noisy Stochastic Stream Generator :

πpr(p) ={

π(p), with probability 1− pτπ(p), with probability pτ

πpr(pn) behaves like the noiseless π(p(1− pτ ) + (1− p)pτ ).

Output of the Noisy Check Node Processing :

Cpr ={

C, with probability 1− pc

C, with probability pc

Output of the Noisy Variable Node Processing :

Vpr ={

V, with probability 1− pv

V, with probability pv

ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 13 / 20

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

Robustness Assessment of Noisy Stochastic Decoders

No density evolution analysisbecause variable-to-check node messages are computed as functions of dependentrandom variables.

a(`)m,n is a function of cn, (b(`)

m′,n)m′∈H(n)\m, and a(`−1)m,n

but (b(`)m′,n)m′∈H(n)\m and a(`−1)

m,n are dependent.

Monte-Carlo Simulation(3, 6)-regular LDPC code with length N = 1008 bits

channel input probabilities are quantized on q = 8 bits,

the noise dependent scale factor is µ = 0.12,

all decoders use 48-bit edge-memories,

the maximum number of decoding cycles is set to 1000.

For comparison : floating-point BP decoding with maximum number of iterationsequals to 100

ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 14 / 20

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

Numerical Results for the Noisy EM Stochastic Decoder

0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.110

−7

10−6

10−5

10−4

10−3

10−2

10−1

100

BSC error probability p0

Bit

Err

or R

ates

float−point BPnoiseless STOnoisy STO p

em = 0.0001

noisy STO pem

= 0.005

noisy STO pem

= 0.01

noisy STO pem

= 0.02

noisy STO pem

= 0.05

FIGURE: BER performance of the stochastic decoder with noisy edge-memories

ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 15 / 20

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

Numerical Results for the Full Noisy Stochastic Decoder

0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.110

−7

10−6

10−5

10−4

10−3

10−2

10−1

100

BSC error probability p0

Bit

Err

or R

ates

float−point BPnoiseless STOnoisy STO pτ = 0.01

noisy STO pc = 0.01

noisy STO pv = 0.01

noisy STO pτ =pc = p

v = 0.01

FIGURE: BER performance of the full noisy stochastic decoder

ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 16 / 20

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

Numerical Results with Only Noisy Variable Node Units

0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.110

−7

10−6

10−5

10−4

10−3

10−2

10−1

100

BSC error probability p0

Bit

Err

or R

ates

float−point BPnoiseless STOnoisy STO p

v = 0.001

noisy STO pv = 0.01

noisy STO pv = 0.05

FIGURE: BER performance with only noisy Variable Node Units

ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 17 / 20

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

Conclusion and Perspectives

ConclusionWe investigated of faulty Stochastic decoders

Two error models introducedStochastic decoders managed to operate with high level of errors due to differentcomponents

Edge-Memories can be unreliableResults can be used to reduce the energy consumption of Edge-Memories throughvoltage scaling

PerspectivesInvestigate faulty stochastic decoders with technology dependent error modelsunder aggressive voltage scaling

Study other noisy re-randomization units (besides edge-memories)

ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 18 / 20

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

References

K.-L. Huang, V. Gaudet, and M. Salehi, “A scaling method for stochastic ldpcdecoding over the binary symmetric channel,” in Information Sciences and Systems(CISS), 47th Annual Conference on, 2013.

C. L. Kameni Ngassa, V. Savin, and D. Declercq, “Min-sum-based decoders runningon noisy hardware,” in proc. of IEEE Global Communications Conference(GLOBECOM), 2013.

I. Perez-Andrade, X. Zuo, R. Maunder, B. Al-Hashimi, and L. Hanzo, “Analysis ofvoltage- and clock-scaling-induced timing errors in stochastic ldpc decoders,” inWireless Communications and Networking Conference (WCNC), 2013 IEEE, April2013, pp. 4293–4298.

S. Sharifi Tehrani, S. Mannor, and W. J. Gross, “Fully parallel stochastic LDPCdecoders,” IEEE Trans. on Signal Processing, vol. 56, no. 11, pp. 5692–5703, 2008.

L. R. Varshney, “Performance of LDPC codes under faulty iterative decoding,” IEEETrans. Inf. Theory, vol. 57, no. 7, pp. 4427–4444, 2011.

S. Yazdi, H. Cho, and L. Dolecek, “Gallager b decoder on noisy hardware,” IEEETrans. on Comm., vol. 66, no. 5, pp. 1660–1673, 2013.

ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 19 / 20

Introduction LDPC Codes and Stochastic Decoding Faulty Stochastic Decoder Monte-Carlo Simulation Conclusion

Thank You for Your Attention !

ISTC 2014 | Kameni Ngassa, Savin, Declercq | August 19, 2014 20 / 20