Filter Design for an HVDC protection IED

IN DEGREE PROJECT ELECTRICAL ENGINEERING,SECOND CYCLE, 30 CREDITS

, STOCKHOLM SWEDEN 2020

Filter Design for an HVDC protection IED

EVGENY GENOV

KTH ROYAL INSTITUTE OF TECHNOLOGYSCHOOL OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE

Filter Design for an HVDC protection IED

The School of Electrical Engineering and Computer ScienceKTH Royal Institute of Technology.

Master’s thesis project.

Evgeny Genov

Abstract

A selective fault detection approach is necessary for successful implementation ofmulti-terminal high-voltage direct-current (HVDC) grids. Fault detection is per-formed by an intelligent electronic device (IED) that takes in voltage and currentmeasurements, performs fault detection algorithms, and outputs, e.g., trip signalsfor circuit breakers. A digital low-pass filter is utilised for removing the noise fromthe signal monitored. The amount of delay imposed on the signal by the filterimplementation is critical for speed requirements of DC fault detection. The goalof this research is selecting the best performing design of a digital filter based onconsiderations, which are application-specific. After considering the theoreticalconstraints and previous research conducted, a filter design most suitable for thefault detection in HVDC grids is proposed. A series of specifications of Butter-worth filters are tested in a lab environment using the intelligent electronic device(IED) prototype and the dv/dt fault detection algorithm. The behaviour of thefilter is studied with respect to changes in threshold setting and slope of a voltagecollapse. The speed and accuracy of fault detection are the criteria used for as-sessment of filter performance. The suggested filter design improves the accuracyof fault detection to −2.5 % as compared to −8 % when using no filter (both — forthe lowest dv/dt threshold setting). The improved filter shows a more consistentperformance across the operational range of threshold settings in the IED.

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Filter Design for HVDC protection IED

The School of Electrical Engineering and Computer ScienceKTH Royal Institute of Technology.

Master’s thesis project.

Evgeny Genov

Abstrakt

For ett valfungerande hogspand likstroms system (HVDC) med fler terminaler antva (MTDC) ar det nodvandigt att ha en selektiv feldetektering. Feldetekterin-gen utfors av en IED (intelligent electronic device) som laser in spannings- ochstrommatningar, kor algoritmer for feldetektering och skickar ut t.ex. brytsig-naler till strombrytare. Ett digitalt lagpassfilter implementeras for att reducerastorningar pa de overvakade signalerna. Den fordrojning som uppkommer pa grundav filtret, ar kritisk for de tidsbegransningar som finns for att upptacka fel i lik-stromssystem. Malet med denna studie ar att valja den digitala filter design medbast prestanda, baserat pa overvaganden som ar applikationsspecifika. Efter att haovervagt de teoretiska begrasningarna och tidigare genomford forskning, foreslas enfilter design bast lampad for felsokning inom MTDC. En serie av Butterworth filterar testade i labbmiljo med en IED prototyp och dv/dt algoritm for feldetektering.Filtrets beteende analyseras med avseende pa forandringar i troskelnivaer och lut-ningen av spanningskollapsen. Hastigheten och noggrannheten i felsokningen arkriterier som anvands vid utvarderingen av filters beteende. Den foreslagna filterdesignen forbattrar noggrannheten i feldetekteringen med −2.5 % i jamforelse med−8 % med det ursprungliga filtret (dar bada har den lagsta dv/dt troskelnivan).Det forbattrade filtret visar mer konsekvent prestanda over hela det operativaomradet av troskelnivaerna i IEDn.

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Contents

1 Introduction 51.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51.2 Scope of the work . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2 Theoretical background 72.1 Travelling waves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82.2 Fault detection algorithms . . . . . . . . . . . . . . . . . . . . . . . 82.3 Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.4 False detection signals . . . . . . . . . . . . . . . . . . . . . . . . . 102.5 Digital filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.5.1 FIR filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122.5.2 IIR filter design . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.6 Relevant research on filter design . . . . . . . . . . . . . . . . . . . 142.6.1 Wavelet-based protection strategies . . . . . . . . . . . . . . 142.6.2 Resonant filter and discretization methods . . . . . . . . . . 15

3 Method 173.1 Experimental Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.1.1 Analog pre-filter . . . . . . . . . . . . . . . . . . . . . . . . 183.1.2 Digital filter . . . . . . . . . . . . . . . . . . . . . . . . . . . 183.1.3 Playing Waveforms to the IED . . . . . . . . . . . . . . . . . 203.1.4 Fault detection algorithm . . . . . . . . . . . . . . . . . . . 21

3.2 IIR designs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223.2.1 Butterworth . . . . . . . . . . . . . . . . . . . . . . . . . . . 223.2.2 Bessel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.3 Filter specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . 223.3.1 Filter order . . . . . . . . . . . . . . . . . . . . . . . . . . . 233.3.2 Phase response . . . . . . . . . . . . . . . . . . . . . . . . . 233.3.3 Cut-off frequency . . . . . . . . . . . . . . . . . . . . . . . . 23

3.4 Filter assessment . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243.4.1 Theoretical vs measured frequency responses . . . . . . . . . 24

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3.4.2 Functional testing . . . . . . . . . . . . . . . . . . . . . . . . 25

4 Results 294.1 Compliance with theory . . . . . . . . . . . . . . . . . . . . . . . . 294.2 Spectrum analysis of noise . . . . . . . . . . . . . . . . . . . . . . . 314.3 Step response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 324.4 Functional testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

5 Discussion 365.1 Characteristic accuracy . . . . . . . . . . . . . . . . . . . . . . . . . 375.2 Performance in time domain . . . . . . . . . . . . . . . . . . . . . . 375.3 Further research . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

5.3.1 Floating-point arithmetic . . . . . . . . . . . . . . . . . . . . 385.3.2 Differentiator low-pass filter . . . . . . . . . . . . . . . . . . 38

6 Conclusion 39

A Filter coefficients 42

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Chapter 1

Introduction

1.1 Background

Integration of renewable energy generation into the grid sets new challenges to theoperation and the design of power systems. As opposed to conventional powerplants running on fossil fuels, the wind power plants and photovoltaics are inter-mittent. Therefore, the energy generation is variable and cannot be dispatched atany given time. Furthermore, the generation sites are much more geographicallydispersed as compared to conventional power plants running on fossil fuel. Windturbines are increasingly moving offshore, further and deeper into the sea. Dueto the intermittency of renewable sources, more generation capacity has to be in-stalled. The resulting power flows increase, which makes it necessary to improvethe energy transmission infrastructure.

Offshore wind energy is envisioned at the core of European energy transition.The European Commission estimates the total capacity installed to be in the rangebetween 230 and 450 GW by 2050 [3]. In all scenarios, scaling up from 22 GW in2019 to the projected capacity will require an appropriate upgrade to electricitygrid infrastructure [18]. High-voltage direct-current (HVDC) technology enablesflexible and efficient power transfer while reducing losses associated with alternat-ing current (AC) solutions. HVDC will play a more prominent role in the futureof the European power system. Meshed grid connections, including combined gridsolutions and interconnector tie-ins between countries, are integral to the Euro-pean vision on offshore development. The ‘PROgress on Meshed HVDC OffshoreTransmission Networks’ (PROMOTioN) project was established as a part of theEU Horizon 2020 initiative in order to ensure there is a technical and regulatoryframework in place for such developments. Among other technologies, the projectsets out to develop and demonstrate the DC Grid protection methodologies.

The HVDC grid protection poses a number of challenges for engineering the

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next generation electricity infrastructure. In case of faults, the existing point-to-point voltage source converter (VSC) HVDC systems disconnect the entire DC lineby activating the switchgear at the AC side. For multi-terminal HVDC systems,this approach is not suitable. Disconnection of the complete grid in case of faultsresults in a great loss of power which can be detrimental for the surrounding ACgrid. Therefore, it is important to isolate the faulted line while keeping the rest ofthe system in operation. In a typical cable system, if a fault occurs, the resultingdischarge wave propagates extremely fast. The wave has a steep wavefront andleads to high short-circuit currents [8]. The mentioned currents can do damageto the power electronic components in DC converters. Therefore, a successful DCfault clearing strategy includes prompt fault detection, discrimination and selectiveopening of the affected line within a few milliseconds. The opening of the line isfacilitated with DC circuit breakers (DCCBs). In this study the main focus lieson on a fully-selective protection strategy using DCCBs.

High speed fault detection is essential for attaining a sufficiently fast DC-sideprotection. The speed of fault detection depends on the properties of the actualsurrounding grid and the properties of intelligent electronic device (IED), the de-cide that processes the fault signal. The fault distance and the grid structure areimportant factors which determine the clearance time of the fault. For example, ifa very remote fault in a grid with long cables is to be detected, the waveform hasbeen dampened and detection will take longer as compared to a grid with shortcables where the wavefront is not dampened as much. On the IED side the typeof signal being monitored as well as delay produced by the processing hardwareand the digital filtering all factor in the speed of fault detection. Digital filteringis important to avoid false fault detection caused by noise.

1.2 Scope of the work

This study presents a comparative analysis of digital filters and their specificationsin an HVDC protection intelligent electronic device (IED). The filters need to beoptimally designed to provide a trade-off between noise suppression and fast faultdetection. The filters investigated are implemented on an IED prototype. Theimplemented filters were tested using analogue input signals representing faultsoccurring at different distances from the point of measurement. The quality of afilter design in assessed empirically by observing the accuracy of voltage derivativedetection. The effect of a filter design on the time delay imposed on the fault de-tection time is investigated. The relative error between the actual IED operationoutput and a pre-defined slope of input signal is measured throughout the opera-tional range of the IED. Discrepancies between theoretical frequency response andthe practical implementation of the filter are also considered.

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Chapter 2

Theoretical background

This chapter provides the theoretical background for fast HVDC fault detection.The focus of this study will be on DC meshed grid topologies with a redundancy inthe system. That means that connections can be done within DC system withoutconversion to and from AC. In a Multi-Terminal DC (MTDC) grid the redundancyneeds to be supported on the fault clearing level, for example by using a fully se-lective protection with DC circuit breakers. If a fault occurs, the ultimate goal isto detect and isolate the fault only for a part of the grid, while keeping the rest ofthe system operational. For example, in Fig. 2.1, if a fault emerges in the cable14, only the faulted part gets disconnected, while the rest of the grid continuesoperation.

Figure 2.1: Example of an MTDC grid

The main advantages behind using MTDC grid for energy transmission arelow impedance and low losses. Furthermore, the grid layout enables saving thenumber of converter stations as opposed to several point-to-point links. At thesame time the same advantages present challenges in fault detection and clearing.

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A short circuit induces high currents propagating in the grid very fast. The DCfault clearing time needs to be in an order of a few to a few tens milliseconds [8].

2.1 Travelling waves

Unlike for high-voltage AC (HVAC) systems, impedance-measurement methodsare difficult to realise in DC grids. In DC, it is not possible to measure voltage andcurrent for one period at e.g. 50 Hz. Due to small timescale and large influence oftransient effects calculation of impedance employed in distance protection methodsis too slow and unreliable [5]. The DC fault current rises quickly and has a largesteady-state value. In order to comply with the required high speed of detectiona travelling wave based protection approach is often suggested.

The travelling wave refers to an electromagnetic transient wave emerging whena short circuit fault happens. The said wave propagates at a speed near half thespeed of light for cables and around the speed of light for overhead lines. [5] Thewave increases locally measured current magnitude and decreases voltage magni-tude while propagating through a line. Conventionally, the sign of the currentwave is same as sign of the voltage wave in positive direction and opposite of it –in negative direction. [14]

At points of impedance discontinuity, e.g. the end of a transmission line, thetravelling wave gets partially reflected. Throughout the grid the travelling wavekeeps propagating and there are more reflections creating forward and backwardwaves. The result is the consequent fault signal gets attenuated and distorted. Themeasurement for the IED is placed such that the first wavefront on a faulty linemay be dampened through propagation in the line, but should not be distorted byreflections. The Bewley diagrams make a useful visual representation of travellingwaves in the time domain. An example of such diagram from [5] is shown below.As can be seen in the diagram 2.2, the forward and reflected voltage waves, u−and u+, are related by the voltage reflection coefficient r, defined as

r =u−u+

=Zl − ZcZl + Zc

(2.1)

where Zl is a constant impedance at the terminal, different from the characteristicimpedance Zc of the transmission line.

2.2 Fault detection algorithms

The objective for fault detection in VSC HVDC grids is to operate reliably withinits designed protection zone. That means that the protection system should be ac-

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Figure 2.2: Bewley lattice diagram

tivated when intended and not disturb the regular flow of operation. Furthermore,it is especially critical for DC grids to make the detection fast enough to minimisethe possibility of damage done to the converters. If the detection happens notswiftly enough, there is also a possibility that the current exceeds the breakingcapability of DC breakers.

For fault detection there are two main categories of methods employed: single-ended and double-ended protection schemes. The difference is a utilization ofa communication link. Single-ended protection algorithms are used in non-unitprotection, making use of measurements at a single location. Double-ended algo-rithms use measurements at two different ends of a line. A communication link isnecessary in order to compare the two signals.

Within the scope of this research the focus primarily lies on a single-endedmethod. The most commonly referenced algorithm uses a calculation of a volt-age derivative of the signal. An incremental change in a voltage measurement iscompared with respect to a threshold. A fault is detected if

∆υ ≤ ∆υref (2.2)

This algorithm relies on a rapid collapse of voltage when a fault occurs. Themethod is influenced by the magnitude of a wave-front, which can be partiallydamped while traversing through the line. [6] The quality of the voltage deriva-tive based detection also depends on the impedance of the line and bus. If the

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impedance is mainly inductive, a reflection of the fault signal reinforces a voltagecollapse. If is is capacitive, a current-based detection method is preferred. [6]

2.3 Noise

The electric signal in HVDC networks carries noise that may affect the precisionof fault detection. The noise is attributed to various kinds of sources, e.g., partialreflections of travelling waves at cable segments, stray inductances and capaci-tances in cables and bus bars, measurement noise, quantization noise, noise dueto electronics or noise due to converter switching [9]. The stray inductances andcapacitances are known to generate noise dominant in high frequencies [9].

The issues arising from presence of noise can be partially resolved with a suf-ficiently high sampling rate. The Digital Signal Processing (DSP) theory statesthat statistical noise uncertainty is inversely proportional to the square root of thenumber of samples used [16]. However, there are relevant trade-offs, particularlythe cost and hardware limitations with the speed of operation.

2.4 False detection signals

An important criterion for implementation of fault protection in MTDC grids is se-lectivity. It means that the detection would react only to faults within designatedrange and ignore signals coming from external DC faults and non-DC transients.External faults are faults occurring outside of the protected line.

The only electrical difference influencing internal and external fault behavioris a DC reactor. The DC reactor adds inductive reactance, which helps achievingprotection selectivity based only on local measurements. [11] The measurementfor the IED is on the line side of the reactor, not the converter side. The reason isthat the IED measurement should get the travelling wave that is not impacted bythe inductor. After the wave has gone through the inductor it is much dampenedsuch that all other IEDs, for example on neighbouring lines, would see this muchdecreased travelling wave and not trip. The added electrical distance is used forlimiting the reach of the protection zone. The steady-state fault current levelswould be significantly damped when travelling the said distance before reachingthe IED.

Another utility of the reactors in ends of line is protection and current limitation

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Figure 2.3: Example of an MTDC grid

in the breakers. The reactors limit the rate of change in current and therefore,they grant extra time for breakers to trip while currents have not reached harmfullevels yet [6].

2.5 Digital filters

For a successful implementation of a selective fault detection method in meshedHVDC networks a digital filter is needed in the IED. The digital filter enablesdiscrimination between true signal and noise. The most important trade-off tobe made is between removing noise and sufficient speed. A digital filter is a sys-tem of mathematical operations performed on data for signal separation or signalrestoration. In many ways digital filters are similar to their analog counterparts,with the main difference being the sampled discretized, not continuous, input data.

Compared to analog, digital filters are largely superior in terms of performance.In terms of accuracy and stability, analog filters are constrained with limitations ofelectronics and characteristics of its their components. The superior performanceof digital filters manifests in higher complexity and selective design. Analog filtersare subject to component non-linearities, which in turn build up variable errors.Digital filter performance would be constrained only with accessible computermemory and processing speed requirements.

Generally, there are two ways to implement a digital filter: by convolution andby recursion. All possible linear filters can be designed by convolving the inputsignal with an impulse response of a filter. This type of filters are referred to asfinite impulse response (FIR) filters. An alternative approach to filter design isusing recursion. The final output calculated with such filter would depend not onlyon input samples but also on previously calculated values. Therefore, the filter

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operation and is recursive. The class of filter that uses feedback from previousoutputs, i.e. recursion, is commonly referred as an infinite impulse response (IIR)filter.

For convenience of calculation the discrete time systems are converted to thefrequency domain. The conversion is done by means of a Z-transform, or itsspecial form — discrete Fourier transform. The representation in the Z is usefulfor analysis of designed filter and construction of the transfer function. The transferfunction for a linear, time-invariant digital filter can be expressed in a form

H(z) =B(z)

A(z)=b0 + b1z

−1 + b2z−2 + · · ·+ bNz

−N

1 + a1z−1 + a2z−2 + · · ·+ aMz−M(2.3)

The order of a filter would be the greater value of N or M. The numerator rootsare called the zeros of the transfer function. The denominator roots are the poles.If there is no feedback incorporated in the system, i.e. denominator is equal tounity, the resulting operation leads to a FIR filter.

2.5.1 FIR filters

Filters carried out by convolution (FIR) tend to be more numerically stable andhave a constant linear phase response. IIR filters require less coefficients andmemory as compared to FIR. To satisfy the same set of specifications, i.e. cut-offfrequency and stopband attenuation, such filter would require less buffer length.IIR filters also have low latency, which makes them more suitable for high-speedreal-time applications [15].

2.5.2 IIR filter design

To this date the most common design method for IIR filter design is configuringa reference analog filter. This includes the design of a continuous-type prototyperesonator and subsequent discretization for digital implementation. Z. Milivojevic[12] outlines the following steps in IIR filter design

• Defining filter specification

• Specifying analog prototype filter

• Computing a suitable filter order

• Formulating the transfer function

• Scaling

• Conversion from analog to digital

• Reiterate steps 3-7 until satisfactory

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Design in frequency domain

In order to determine IIR filter specifications one needs to identify the desirablecutoff frequency, transition width, maximum passband attenuation and minimumstopband attenuation. The classic analog filter design methods are Elliptic, But-terworth, Chebyshev Type I and Chebyshev Type II. Each of them makes certaintrade-offs, e.g. ripple in passband versus wide transition band. The final selectionshould be the design that meets the specifications with the lowest order.

Once the type and order of the filter are determined, it is possible to evaluatethe transfer function of an analog prototype. Moreover, the reference prototypeshould be scaled with respect to the desirable cut-off frequency.

Lastly, the transfer function of the analog prototype filter needs to be convertedinto its digital counterpart. The most commonly utilized conversion is knownas bilinear transformation. Bilinear transformations are advocated for numericalstability of the resulting filter. Filter stability is questioned only due to coefficientquantization which is performed at the end of the design process.

In the event that the resulting filter does not fulfill the given specifications, orthe filter order can be lowered, a part of the design process is reiterated until asatisfactory output.

Design in time domain

An approach to filter design is application specific. Some applications are not onlyconcerned with preserving the shape of the original signal but also the amountof delay imposed by the filter’s implementation. Real-time detection, akin to thedetection performed in the IED, falls into this category of time-critical applica-tions. If the filter designed in frequency domain has great attenuation with smallfilter complexity, there can be unwanted distortions in the time domain causedfrom different components of the signal being delayed to a different extent [17].This effect is commonly referred as a ’non-linear phase delay’. An example of suchdisturbance would be ringing on a filter output that can lead to a false triggerdetection.

Step response is an important characteristics subject to analysis in time domainapplications. Step response has three important parameters: risetime, overshoot,and phase linearity. Risetime is the number of samples between 90% and 10%level change in the output signal. The faster risetime is a desired quality foridentifying trigger events like electrical faults. Overshoot is another parameterimportant in step response. Overshoot describes the ringing, ripples at the edgesof the output step. The distortions from overshot are not desired, as they canmask the information about the original input signal changes. Phase linearity is a

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third parameter that is often considered. In the context of a step response, phaselinearity refers to a symmetry above and below the 50% level.

2.6 Relevant research on filter design

2.6.1 Wavelet-based protection strategies

A methodology for fault detection using wavelets was presented in [2]. The so-called fast dyadic wavelet transform (FDWT) was used, commonly applied inde-noising applications. The FDWT is notably a translation-invariant wavelettransform with fast enough performance enabled by dyadic scales. For calculatingthe wavelet coefficients, the Haar wavelet was employed as mother wavelet. Theworkings of the final algorithm used in the study are described in [10].

It is concluded that only compactly supported wavelets can be useful. This im-plies that the wavelets need windows with lowest number of samples. In testing,the proposed protection strategy uses a combination of three fault detection cri-teria: voltage wavelet coefficients, current wavelet coefficients, voltage derivativeand magnitude. The proposed scheme was performed with a detection time of lessthan 1.0 ms.

It is also shown that adding load variation and converter switching noise to thesimulated signal does not influence the selectivity properties of the studied faultdetection strategy. Using only current wavelet criteria causes a lack of selectivity.

A study [9] investigates the impact of non-ideal measurements on DC faultdetection. Application of matched filter theory is proposed for optimal discrimi-nation between fault signal and noise. Assuming a DC fault as a step input, thematched filter corresponds to a dilation of the Haar wavelet and has the digitalform

hl[k] =

−1/√l for 0 ≤ k ≥ l/2

1/√l for l/2 < k ≥ l

(2.4)

The matched filter is configured for faults at different locations by adjusting thefilter length l. Longer windows showed to successfully detect remote faults wherefilters of shorter outputs fail. Therefore, the required signal-to-noise ratio (SNR)decreases with increasing filter length or with decreasing distance of the fault tothe relay location. With simulated fault detection signals at different distance andassociated filters, the employed fault detection methods were found to comply withselectivity requirements.

The filters designed with the use of wavelet coefficients can be considered asdigital FIR filter coefficients in the filter design.

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2.6.2 Resonant filter and discretization methods

As a part of the larger study on design, control and application of modular mul-tilevel controllers a design for DC-bus voltage controller was proposed in [13] pro-posed. The system included a phase-locked loop (PLL) low-pass filter. The filter isused to suppress ripple and other high-frequency disturbances. The design choicewas a second-order Butterworth filter

Hp(s) =a2b

s2 +√

2abs+ a2b(2.5)

The transfer function given in (2.5) can be formulated as a special case to a moregeneral continuous-time resonant filter

Hh(s) = Kh(s cosφh − hωl sinφh)s2 + ahs+ (hωl)2

(2.6)

where Kh is the DC gain, ah is the bandwidth, φh is the compensation angle andωl is the angular resonant frequency. In the low-pass variant in (2.5) the followingparameters hold

h =abωl

Kh = ab ah =√

2ab φh = −π2

(2.7)

We can point out that ab would be the desired cut-off frequency, also knows as3-dB bandwidth of the filter. The quality factor for the second-order Butterworthfilter is Qp = 1/

√2.

For realization in the IED, the continuous-time prototype resonator in (2.6)needs to be discretized. The most commonly used conversion method is prewarpedTustin discretization, also called Bilinear transformation. The method reliably suc-ceeds with the main objective of such conversion — a stable system with unalteredresonant frequency. [4] The conversion involves the following substitution with az-transform

s→ wr

tan wrT2

z − 1

z + 1(2.8)

where the prewarping frequency is the resonant frequency wr and T is the samplingperiod. The generalized direct-form II transposed (DFIIt) structure used for thediscretization of resonator filters is based on the inverse of the delta operatorδ = z − 1. The transformation in (2.8) is modified respectively

s→ wr

tan wrT2

δ

δ + 2(2.9)

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Implementing the transform (2.9) to the resonator transform function (2.6) yieldsthe transfer function from the input signal u to output y

H(z) =b0δ

2 + b1δ + b2δ2 + a1δ + a2

(2.10)

The DFIIt structure used in this implementation is shown in a scheme 2.4. Theexpressions for coefficients α1,2 and β0,1,2 in the recursive and transversal paths aregiven in [13]. The compensation angle φh is considered zero.

Figure 2.4: DFIIt structure for resonator discretization

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Chapter 3

Method

3.1 Experimental Setup

The digital filter is designed and tested for protection applications in an intelligentelectronic device (IED) prototype. The prototype used in this study has beendeveloped as a part of the PROMOTioN Project [7]. The hardware and softwareconfigurations to the prototype are available open-source.

An HVDC IED processes the electric signal measured in MTDC grid and ex-ecutes fault detection algorithms. If the employed protection algorithms identifya DC fault, the device sends commands for other protection equipment, such asDC breakers. The prototype is a modular solution built on the base of a develop-ment board Zedboard. The board incorporates Xilinx Zynq-7000 System-on-Chip(SoC) and many peripheral interfaces. This SoC circuit tightly integrates field-programmable logic (PL) and dual-core processing unit (PS). While the PL dealswith data-acquisition and peripheral communication, the central processing unit isused for algorithm implementation, filtering and memory management. The func-tionality of the development board is also extended with custom and off-the-shelfperipheral modules PMODs. PMODs add the ability for processing digital inputsand outputs, as well as converting to and from analogue signals.

The PL and PS parts of the IED are programmed in different platforms. Theprogrammable logic is coded in Hardware Description Language (HDL) and notspecifically touched upon in this research. The processing system is rather withinscope of interest, as it is used for higher order computation. Among other func-tions, like communication with a graphical user interface (GUI), the digital filteris run on one of the cores in the processor. Its implementation is coded in Clanguage and programmed to the device via USB-UART interface or a boot filepre-loaded on an SD card. The software filtering calculation adds a fixed groupdelay. However, this delay is constant and negligible within the sampling period

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of 20 µs.

Figure 3.1: Experimental IED configuration used in filter tests. Analogue inputports are located at the back panel of the device

3.1.1 Analog pre-filter

The analog-to-digital converter peripheral module (PMOD) includes an analog RCpre-filter aimed to prevent aliasing of noise. The resistance on the PMOD is 90 Ωand capacitance is 2.7 nF resulting in a cut-off frequency

fcutoff = 1/(2 ∗ pi ∗RC) = 655kHz

This analog pre-filter is configured only to eliminate high frequency noise.

3.1.2 Digital filter

The current previous version of the IED implementation uses an infinite impulseresponse (IIR) filter. This filter will be modified in the remainder of this masterthesis. More precisely, the implemented designs are discrete time realizations of aresonant filter. The transfer function and the discretization method are discussedin the previous chapter 2.6.2. The coefficients α1,2 and β0,1,2 in the transfer function

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are calculated using the following expressions

rh =1

1 + αh

2hω1sin (hω1Ts)

(3.1)

K ′h =Khrh2hω1

(3.2)

b0 = K ′h [sin (hω1Ts + φh)− sinφh] (3.3)

b1 = K ′h [3 sin (hω1Ts + φh)− 4 sinφh − sin (hω1Ts − φh)] (3.4)

b2 = K ′h [2 sin (hω1Ts + φh)− 4 sinφh − 2 sin (hω1Ts − φh)] (3.5)

a1 = 2 [1− rh cos (hω1Ts)] (3.6)

a2 = 2rh [1− cos (hω1Ts)] (3.7)

The coefficients are pre-calculated for the selected filter design, which can be repre-sented as a special case for a resonant filter. The formulations for different designscan be obtained by modifying the variables h,Kh, ah and φh. For example, thefilter used in current implementation is configured with the coefficients

h =abw1

Kh = ab ah = 3√

2 ·√

2ab φh = −π2

(3.8)

w1 is defined to be an angular resonant frequency. In the currently implementedcase it is formulated as

w1 = 2π · 1

Ts· 0.25 (3.9)

which is equivalent to 12.5 kHz. The final filter design that is currently used hasthe frequency response within the band of interest from 0 to 25 kHz, which isthe Nyquist frequency at a sampling frequency of 50 kHz. The resulting filtershares the flat amplitude response quality with Butterworth filters. However, theroll off starts sooner with a slower by 3

√2 damping. The numeric coefficients that

constitute the transfer function are found with the expressions given in (3.2) - (3.7)

b0 = 0.125

b1 = 0.5

b2 = 0.5

a1 = 2

a2 = 0.5

The filter is coded in the equation form in C-language in SDK (Software Develop-ment Kit). The coefficients calculated for the each design under test are inputs inthe same script. Once it is done, a boot file is generated from the coded software

19

Figure 3.2: Frequency response of the current filter implementation

and inserted to the IED for programming. The filter algorithm can be expressedas the following

y(n) = b0u(n) + x1(n)

x1(n+ 1) = x1(n) + x2(n) + b1u(n)− a1y(n)

x2(n+ 1) = x2(n) + b2u(n)− a2y(n)

(3.10)

All variables are initialized as 0. The current implementation of the DFIIt res-onator negates the effects of quantizers and overflow characteristic. These phe-nomena are potentially inclined to cause overflow effects, errors and instability inoperation of filter, as discussed in a general overview on resonant controllers infixed-point arithmetic [4]. However, in the IED test case, these occurrences areconsidered negligible and a simplified system of equations is studied.

3.1.3 Playing Waveforms to the IED

In this study a simple configuration is used. Voltage and currents waveforms aregenerated and sent to IED analogue inputs by means of the portable signal gener-ator and data acquisition (DAQ) devices — ’Digilent Analog Discovery 2’. Morerealistic fault signals, and corresponding voltage waveform, can be extracted froma power system design software, PSCAD. Simpler waveforms for functional andfrequency response tests are formulated in MATLAB, as well as, in the provided’WaveForms SDK’ interface from Digilent. The scripts used for reading and writ-ing custom waveforms to the IED are programmed in the MATLAB environment.MATLAB supports the ’Digilent Analog Discovery’ hardware by using an add-on

20

’Data Acquisition Toolbox’. MATLAB support allows no operation in the back-ground. This means that one cannot write a signal from one signal generator andsimultaneously read the trip signal with a data acquisition device. There is alsoa limitation on a hardware side, since no more than two analogue inputs or out-puts can be used simultaneously with this setup. An inherent limitation of thisapproach is inability to set up a closed loop test. The utility of ’Analog Discovery’devices can possibly be expanded with more functionality accessible via commandsin ’Digilent Waveforms’ software development kit (SDK). The tools provided inthe SDK require an implementation programmed in C++ or Python.

Data capture

After a fault is detected by the IED or the manual trip signal has been triggered,the data log is saved via the graphical user interface (GUI) to the local computer.The IED GUI is implemented within the MATLAB environment. The currentIED implementation allows to record 800 data points at 50 kHz. Therefore, therecorded window covers the duration of 16 ms. The data log has capacity to storesignals from multiple links, positive and negative poles, both in raw signal andfiltered form.

3.1.4 Fault detection algorithm

This study centers its attention at the dv/dt algorithm. The dv/dt algorithm isthe most commonly referenced algorithm for multi-terminal HVDC grid protec-tion. The reason for that is that it is easier to achieve selective fault detectionas compared to purely current-based measurements. As a result of having to usevoltage measurements, the voltage measurement difficulties have to be taken intoaccount. The associated noise is substantially higher in field voltage measurementsas compared to current measurements. The reason is the underlying technical chal-lenge imposed by measuring voltage in HVDC grids. The solution to this challengeis a cascade of voltage dividers with highly accurate RC-elements. This way theoutput signal is scaled down to a level agreeable with voltage measurement speci-fications. Parasitic inductances in RC dividers add up to a noise and disturbancesobserved in voltage measurements. The noise constitutes the demand in a digitalfilter employed by the IED.

21

3.2 IIR designs

3.2.1 Butterworth

A Butterworth filter has a maximally flat magnitude in the passband and a mono-tonic frequency response. Having no ripples in the passband makes it particularlysuitable for DC applications. An additional benefit is linear passband phase re-sponse. The trade off is the slowest roll-off of all analogue designs of equivalentorder. The roll-off becomes steeper with increasing order but the filter’s overshootalso increases [16]. The magnitude response of an n-th order Butterworth filter isgiven by

|H(jw)|2 =1

1 + (w/wc)2n(3.11)

where wc is the cut-off frequency. The Butterworth filter is most-commonly usedas an anti-aliasing filter due to its maximum flat band nature. Butterworth filtershave a more linear phase response in pass-band than the alternative designs, suchas Chebyshev or elliptic filters. This is advantageous for best performance of theIED in the time domain: low group delay, no discrepancy in delay in differentfrequency bands and a lower level of overshoot. Butterworth is a low-pass filterdesign of choice in DC voltage control applications in [13] and [9].

3.2.2 Bessel

Thr Bessel filter is another type of analog IIR filter. Its main characteristic ismaximally flat phase delay in the passband. Therefore, the filter of this type hasthe best linear phase response qualities. However, it is inappropriate to applythe bilinear transformation to digitally convert the analog Bessel filter. The bi-linear transformation does not preserve the maximally-flat group delay, just theamplitude response.

3.3 Filter specifications

The specifications of the digital filter need to be formulated by following the pro-cedure outlined in section 2.5.2. The relevant specifications typically used in IIRfilter design are cut-off frequency, transition width, maximum passband attenua-tion and minimum stopband attenuation. However, the problem examined in thisstudy is non-trivial. It means that there is a lack of information about the meshedHVDC system that makes strict constraints and specifications impossible. Someconsiderations and justifiable assumptions about the systems in question are maderegarding the qualities sought upon in the digital filter for applications in DC fault

22

detection. The utility of implemented filters is assessed in functional tests. Thefunctional tests evaluate the characteristic accuracy of a voltage derivative faultdetection algorithm run on the IED.

3.3.1 Filter order

Butterworth and Chebsyhev filters have an increasing overshoot as the order, i.e.number of poles, increases [16]. What is unique to digital Butterworth filters, theamount of overshoot and ringing also depends on the cut-off frequency of the filter.This happens when the filter design is overoptimized for performance in frequencyresponse at the expense of the time-domain. In [13], a second-order low-passButterworth filter is used for a similar application in a dc-bus-voltage controller.In [9] it is noted that an increase in order of Butterworth filter significantly impactsthe delay on fault detection for sampling rates lower than 50 kHz.The design approach used in this study is focusing on filter designs of minimal,second order. The choice is motivated by speed considerations and thus, minimumcomplexity in filter discretization is desired. If the test results expose errors arisingfrom slow roll-off in the transition band and too narrow pass band, the higher orderfilter designs should be studied.

3.3.2 Phase response

A linear phase response is a desirable characteristic. The slope of the linear func-tion is indicative of the amount of delay, by which the input signal is shifted. Alinear phase filter will minimize the disruptions in the signal shape in the timedomain. It can be important since the excessive ringing would add excessive noisethat could affect the performance of the IED.

3.3.3 Cut-off frequency

The exact frequency spectrum of noise is unknown. A realistic assumption fornoise level in field made in this study is ±1 kV. This translates to a maximumpossible change in voltage of 2 kV over one sample period (20 µs). The range ofdv/dt signal of interest in HVDC grid is from 6 kV to 40 kV. At the IED side themaximum change due to noise in input analogue signal is 12.5 mV/20 µs. A usefuldetectable dv/dt signal is from 75 mV to 250 mV per sample at the sampling rateof 50 kHz. The resulting minimum signal to noise ratio (SNR) is

SNR =75 mV

12.5 mV=

6

1(3.12)

This approximation takes in noise from the field measurement as a benchmark fornoise levels. At the hardware side, the noise levels of ±2 mV have been indicated in

23

IED tests [7]. The combined noise should be attributed as main source of relativeerror to the overall characteristic accuracy of the dv/dt fault detection algorithmin the IED.

Another purpose to a filter is anti-aliasing. The anti-aliasing filter is purposedto remove the unwanted input frequencies. According to the Shannon’s samplingtheorem, the frequencies above half of the sampling frequency contribute to alias-ing, ambiguous reconstruction of the signal from its samples. In this paper, theIED sampling frequency is pre-determined, the filter cut-off frequency should beassessed for values equal or lower than the Nyquist frequency — 25 kHz. Accordingto [17], there is no general rule of thumb for picking the particular fraction of theNyquist frequency as the cut-off frequency. Particularly with Butterworth filterswith slower roll-off, there is a sharp roll-off. A significant portion of filter responseremains active outside of a filter’s defined passband.

In some cases it is beneficial to pick a lower cut-off frequency, as it would relaxa sharp cut-off requirement for the anti-aliasing filter. This can be done if thesampling rate well exceeds the Nyquist rate, twice the the maximum componentfrequency of the function being sampled. Furthermore, there can be disturbancesof lower frequencies and a lower-cut off frequency would cancel them out.

In this study different Butterworth filters of several cut-off frequencies areselected for comparison: 20 kHz, 12.5 kHz, 6.25 kHz and 3.125 kHz. The corre-sponding coefficients, calculated according with the method in the section 3.1.2,are provided in the appendix A.

3.4 Filter assessment

3.4.1 Theoretical vs measured frequency responses

In order to validate the correct experimental setup the comparison between the-oretical and measured frequency response of the implemented filter is done. Themeasured data is obtained from recording the response to input sinusoidal withparticular frequencies. Theoretical and measured are slightly different but withinreasonable limits. Towards high frequencies, 10 kHz and more, the deviations be-come more significant. An alternative method was trialed for evaluating the com-pliance with theoretical performance. A step function from 5 V to 0 V is fed to ananalogue input with a waveform generator. The transfer function is estimated fromknown input and filtered output signals. This test is a less laborious method. Theapproximation of the practical frequency response is more approximate and showsmore variance rather than testing individual frequencies. Nevertheless, the resultsshown in 3.4 checks with the frequency response in 3.3. In the band near Nyquist

24

Figure 3.3: Bode diagram. Amplitude and phase response of a resonant low-passfilter. Line: theoretical frequency response. Scatter points: practical data asresponse of a system to sinusoidal inputs

frequency the performance starts deviating from the performance expected fromthe theoretical transfer function. Regarding the method, for sake of better accuracythe response to individual sinsusoidal input as shown in 3.3 is used thenceforth.The response to step function remains in use for initial design validations.

3.4.2 Functional testing

The procedure for the functional type testing of the IED was adapted from [1].The objective of the testing is to determine the relative error between the actualIED operation point and the operation point defined in the device settings. This isdone by comparing the actual thresholds at which the IED detects faults with thethreshold set in the setting of the device’s fault detection algorithm. The thresholdunder test is the fixed dv/dt script values in the operational range of the IED —from 6 kV to 40 kV per sample (20 µs), as suggested in [1].The waveforms with a ramp of predefined dv/dt slopes are applied to the IED.These slopes are superimposed on a signal with a typical steady-state value (320 kV.The ramp rolls off after 0.25 s of flat steady-state signal. The amount of slope in-crementally changes by a fixed interval δ with every iteration.

The initial test procedure as described in [1] is shown in 3.5b. The ramp tran-sients with incrementally increasing slope are applied to the IED. The first testshot has the slope at a value that is lower than the threshold by an expectedmaximum error band εb. While initially chosen to be 10 %, εb was increased to

25

Figure 3.4: Bode diagram. Amplitude and phase response of a resonant low-passfilter. Line: theoretical frequency response. Scatter points: practical data asresponse to an input step function

20 % for filter design showing a more significant deviation in operation range. IfIED does not trip, a new test shot is applied with a slope closer to the set thresh-old, increased by δ = 0.05% every iteration. Five threshold settings are tested:6 kV/20 µs, 10 kV/20 µs, 15 kV/20 µs, 20 kV/20 µs, 40 kV/20 µs. These values coverfull range of operational conditions expected from the IED. Different thresholdsare necessary for applications dependant on the type of HVDC system and cablelengths requiring different threshold settings.

During the test it was discovered that the IED setup demonstrates a peculiarbehaviour after the first trip. There is a region of dv/dt values for the thresholdwhere the fault detection algorithm performs inconsistently. Trip signal reliabilityover the said region is low. The functional testing procedure has been adjusted toaccount for the new-found transitional band of operation. The updated situationis shown in 3.6. There are two error values that are evaluated to determine theaccuracy of the IED. ε1 is the percentage difference between the threshold in theIED setting and the slope of the test shot applied at the input for which the tripsignal is first observed. ε2 is the percentage difference between the threshold inthe IED setting and the slope of the test shot for which the IED sends trip signalconsistently. Here it is defined as the threshold value after which the IED trips in10 next consecutive iterations.

26

(a) dv/dt slope iterations until first trip(b) Routine for evaluating dv/dt algo-rithm actual threshold

Figure 3.5: Functional testing procedure for evaluation of dv/dt algorithm accu-racy as in [1]

Figure 3.6: Threshold test ramp with sparse trip region

The accuracy metrics ε1 and ε2 are evaluated for different threshold settings. Themeasurements are repeated 3 times for each setting, the characteristic accuracy isdetermined by mean values. An example of plotted results 3.7 is provided for thefilter design used initially. The yellow area shows the transitional region where thefault detection is inconsistent. The blue line is the accuracy for which the IEDfirst trips, measured as a percentage difference to the set threshold. The orangeline is accuracy for which the IED trips consistently for threshold values above it.The red dotted line represents the threshold level programmed in the IED setting.

27

Figure 3.7: IED dv/dt algorithm threshold accuracy (earlier used filter)

28

Chapter 4

Results

This chapter presents the results from testing different Butterworth filters of dif-ferent cutoff frequencies compared with the initial filter and no filter.

4.1 Compliance with theory

The frequency responses of digital filters implemented on the IED are comparedto their theoretical counterparts. The Bode diagrams for the transfer functions offilters in testing are shown in Fig. 4.1. The scatter points in Fig. 4.2 demonstratethe frequency response in practice. The observation is that there is major disparitybetween the theoretical phase response and the realization of the filter for theButterworth filters with higher cut-off frequency. The practical phase responseis more linearized than predicted by theory. The practical magnitude response ismore attenuated in the passband, closer to the Nyquist frequency. The attenuationis clearly visible in the response for the filter with 6.25 kHz in 4.2c. In the regionclose to the Nyquist frequency, the hardware delay and aliasing effects disrupt theintegrity of the filers.

29

Figure 4.1: Frequency response of Butterworth filters

(a) Cut-off frequency 20 kHz (b) Cut-off frequency 12.5 kHz

(c) Cut-off frequency 6.25 kHz (d) Cut-off frequency 3.125 kHz

Figure 4.2: dv/dt algorithm accuracy for Butterworth filters

30

4.2 Spectrum analysis of noise

The frequency content of noise is valuable information for designing the filter, thetool of suppressing noise. It is possible to estimate the noise content if the inputsignal is stationary, e.g. in a steady state. The Fig. 4.3 is a power spectral densityplot. It is the frequency content of the output signal when a steady state wave-form at 4 V is generated at the analogue input. The DC frequency component isexcluded from the plot, as it evidently dominates in signal power density distri-bution. As seen in the plot, the biggest noise contributions appear at frequencies6 kHz and higher.

Figure 4.3: Frequency spectrum of measured signal (DC excluded)

31

4.3 Step response

A simple step function was generated at the analogue input of the IED. The stepresponse of the Butterworth filters under test are shown in Fig. 4.5. Butterworthfilters show an overshoot in their step responses. The overshoot is of 17% to 4%depending on a cut-off frequency. Filters with lower 3-db bandwidth show thehigher overshoot values. The rise time, fall time in Fig. 4.5, is clearly inverselyproportional to a cut-off frequency. The fall time changes within a range from20 µs to 130 µs. The fluctuations in the lower half of the step response, and thuslack of symmetry between halves, highlight the non-ideal linear phase in the filter.The prolonged fall time for the filter of a lower 3-db bandwidth makes a directinfluence on the IED operation time. Fig. 4.4 shows an example oscilloscopemeasurement for two extreme cases. Here, for 20 kHz cut-off frequency and lowdv/dt threshold the IED operating time is 100.2 µs. For lower cut-off frequency,3.125 kHz, and high dv/dt threshold, the operating time is 120.3 µs, one samplingperiod longer.

(a) 20 kHz cut-off frequency.dv/dt threshold at 6 kV/20 µs

(b) 3.125 kHz cut-off frequency.dv/dt threshold at 40 kV/20 µs

Figure 4.4: Operational time of a Butterworth filter. Orange is a step functionat IED input. Blue is the trip signal. The area represents the distribution of thewaveform with lower population density.

32

Figure 4.5: Step response of Butterworth filters with different cut-off frequencies

4.4 Functional testing

Five settings for the dv/dt threshold covering the suggested operational rangeof the IED are tested: 6 kV/20 µs, 10 kV/20 µs, 15 kV/20 µs, 20 kV/20 µs and40 kV/20 µs. The overall accuracy has been determined for each setting, as shownin plots 4.6a-4.6b, 4.7a-4.7d and tables 4.1-4.4. Two values for accuracy are pro-vided, a lower bound ε1 is a relative accuracy when the IED trips first. An uppedbound ε2 is a relative accuracy when the tripping of the IED becomes consistent.The yellow area in figure 4.7 shows the transitional region where the fault detec-tion is inconsistent.As seen from 4.7, the overall basic accuracy improves with the cut-off frequency.The transitional region narrows down and the value for accuracy converges to−2 %. Compared to the older implementation (Fig. 4.6b) and the implementationwithout filter (Fig. 4.6a), the error of the Butterworth filter is flat and consistentacross the full range of threshold settings 4.7a-4.7d.

33

(a) No filter (b) Earlier used filter

Figure 4.6: dv/dt algorithm accuracy for reference settings

(a) Cut-off frequency 20 kHz (b) Cut-off frequency 12.5 kHz

(c) Cut-off frequency 6.25 kHz (d) Cut-off frequency 3.125 kHz

Figure 4.7: dv/dt algorithm accuracy for Butterworth filters

34

IED dv/dt setting (kV/20 µs) ε1 (%), first trip ε2 (%), always trip6 kV/20 µs -20.13% -8.61%10 kV/20 µs -17.93% -3.94%15 kV/20 µs -16.55% -3.91%20 kV/20 µs -15.00% -2.75%40 kV/20 µs -14.22% -3.00%

Table 4.1: Characteristic accuracy for dv/dt algorithm (δ = 0.05%) on IED.Butterworth filter with a cut-off frequency 20 kHz


Table 4.2: Characteristic accuracy for dv/dt algorithm (δ = 0.05%) on IED.Butterworth filter with a cut-off frequency 12.5 kHz





35

Chapter 5

Discussion

In designing a sampled-time system, a filter design consists of a series of trade offsbetween signal accuracy and resources (computation power, memory, cost, powerconsumption) imposed on the system implementation. With the fixed samplingrate, the design of the digital filter is the main tool in optimization of a sampled-time system’s response. This study deals with a task of finding the filter settingsthat enable a) matching the filter’s output frequency spectrum to the spectrum ofthe input fault signal, b) matching the output’s time domain properties to the timedomain properties at the input, c) imposing a time delay acceptable for HVDCfault detection requirements. These objectives are commonly reached at makingreasonable trade-offs specific to the application of such system. For example, im-plementation of a digital filter bears added group delay and frequency-dependentdelay due to non-linearities in the phase response. If the magnitude response ofthe filter is over-optimized, the shape of signal over time and the amount of delaybecome a concern.

The use case of the IED, being DC fault detection, puts up significant con-straints on the speed of operation. Therefore, IIR minimal-order designs are uti-lized as the most time-efficient topology. Therefore, the analogue prototypes areused in the design of filter, with Butterworth filter being the design with bestlinear phase delay properties. In given conditions, picking the right specificationsfor the filter is a matter of trade-off between best characteristic accuracy and theamount of time delay.

36

5.1 Characteristic accuracy

The functional testing results in Fig.4.7 indicate that there is a systematic offsetin dv/dt signal persistent with any filter configuration. The IED trips for wave-forms with voltage at a slope at about 2 % lower than the threshold set in thedv/dt algorithm. It is suggested that the bias can be originating from a wronglycalibrated waveform generator as well as quantization error in ADCs.From the accuracy standpoint, among the tested set of specifications, the Butter-worth filters with the lowest cut-off frequency delivers the best performance. Thisconclusion is consistent with the observed noise frequency density plot shown inFig.4.3. The majority of noise is present in the frequency range of 6 kHz and above.

Furthermore, a sharp roll-off in frequency response of the filter enables uniformperformance within entire settings range from 6 kV/20 µs to 40 kV/20 µs. Filterswith a slower roll-off let in more signal disrupted with noise in higher frequencies.The result is divergence in characteristic accuracy between lower and higher dv/dtthresholds. An example of this phenomenon is seen in Fig.3.7.

5.2 Performance in time domain

The results for step response of the filters show that the cut-off frequency is in-versely proportional to the fall time of the voltage signal in the time domain. Thefall time is 20 µs for a filter with a 20 kHz cut-off and 130 µs for a filter with a3.125 kHz cut-off. This means that for the filter with the highest cut-off the delaylies within one sampling period (20 µs) and is completely negligible. For filterswith higher cut-off than 20 kHz the delay could comprise of 1 sampling period ormore. A more accurate calculation of the impact of the filter on the IED operationtime requires a real-time simulator. As reported in [1], the IED operation timeranges from 100 µs to 150 µs for fault locations at 0 to 200 km from the IED forthe initial filter with 12.5 kHz cutoff and slow roll-off.The time delay considerations are confirmed in a test oscilloscope measurementfor extreme cases in Figures 4.4a and 4.4b. 20 kHz cut-off frequency and low dv/dtthreshold enables faster fast detection by 20.1 µs than the filter with a 3.125 kHzcut-off and high dv/dt threshold. Therefore, for the extreme case, difference isequivalent to one sampling period of the IED. The amount of delay is comparableto a total variability of 23.2 µs in the operation time of the IED found in [7] whenapplying the same waveform repeatedly.

37

5.3 Further research

5.3.1 Floating-point arithmetic

The current IED implementation uses the fixed point arithmetic and stores thedata measured as a 32-bit unsigned integer. The filter outputs are also stored ina fixed-point 32-bit format. The floating point arithmetic had a more dynamicrange. Numbers are no longer uniformly spaced, as it is in the fixed-point format.The floating point representation has smaller gaps between small numbers andlarger gaps between large numbers. As a result, the floating computation assuresa better precision. The qunatisation error, resulting from rounding to the nearestvalue that can be stored, is smaller for floating-point arithmetic. Therefore, thequantisation error is much more pronounced with the fixed-point computations.Quantisation error is expected to be one of the primary noise contributors to thenoise spectrum as shown in Fig. 4.3.

Floating-point processing potentially yields a much better precision. It shouldbe possible to remake the current C code implementation of the digital filter andreplace the int types with float or double data types.

5.3.2 Differentiator low-pass filter

The algorithm used for fault detection tracks the differential voltage signal. There-fore, the final output data from the IED can be seen as a convolution of a differ-entiator at low frequencies, acting as a high-pass filter, and a low-pass filter thatremoves the high-frequency noise. Therefore, the combined transformation wouldcomprise a band-pass filter. One of the consequences is that the signal-to-noise ra-tio of the final output would be lower due to differentiation. A more sophisticatedfilter design procedure would benefit from analysis of such transformation in thefrequency domain.

38

Chapter 6

Conclusion

This thesis project outlined and followed the design process of a digital filter usedfor fault detection in the IED. Furthermore, a methodology on evaluating theperformance of the digital filter was presented. Unlike with the classic approachto filter design, it was not possible to infer the precise filter specifications fromfield data due to a lack of such. The chosen approach combined the assumptionsmade about the HVDC fault detection system. A range of filter specifications wasselected for testing, namely Butterworth filters with the cut-off frequencies: 20 kHz,12.5 kHz, 6.25 kHz and 3.125 kHz. Implementations with no filter and with aninitial filter used in earlier studies were used as references. The filter outputs wereevaluated in the frequency and time domains. An agreement between theoreticaland actual performance of the filters was also assessed. The tested accuracy of afilter is the accuracy of the voltage derivative slope detection for a given threshold.It was assessed via a functional test adapted from [1]. One of the insights was anuncertainty range of thresholds, where the IED was not secured to trip on everytest run. The accuracy of the Butterworth filters with higher cut-off frequencies,6.25 kHz and 3.125 kHz, showed a significant improvement from −8 % when usingno filter to −2.5 % (both — for the lowest dv/dt threshold setting). For higherdv/dt threshold settings, the improvement was still valid, yet of lower magnitude.The overall characteristic accuracy became a flat value, consistent across the fulloperational range of dv/dt thresholds in the IED.

39

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41

Appendix A

Filter coefficients

// filter coefficients LPF Butterworth 20 kHz cutoff

//-- for 50 kHz measurement

#define lpf_b0 0.638945525159023f

#define lpf_b1 2.555782100636090f

#define lpf_b2 2.555782100636090f

#define lpf_a1 3.1429805025399f

#define lpf_a2 2.555782100636090f

// filter coefficients LPF Butterworth 12.5 kHz cutoff


#define lpf_b0 0.292893218813452f

#define lpf_b1 1.171572875253810f

#define lpf_b2 1.171572875253810f

#define lpf_a1 2.0f

#define lpf_a2 1.171572875253810f



#define lpf_b0 0.097631072937818f

#define lpf_b1 0.390524291751270f

#define lpf_b2 0.390524291751270f

#define lpf_a1 1.057190958417937f

#define lpf_a2 0.390524291751270f

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#define lpf_b0 0.029954582208092f

#define lpf_b1 0.119818328832370f

#define lpf_b2 0.119818328832370f

#define lpf_a1 0.545756413748415f

#define lpf_a2 0.119818328832370f

// filter coefficients LPF 12.5 kHz cutoff 3*sqrt (2) damping


#define lpf_b0 0.125f

#define lpf_b1 0.5f

#define lpf_b2 0.5f

#define lpf_a1 2.0f

#define lpf_a2 0.5f

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