13
First look at digital module testing at UIC Susan Dittmer, Titas Roy RD53A testing meeting, 13/05/19 1

First look at digital module testing at UIC€¦ · the chipID (4-7) • ROC0 (chipID 5 ... • Tune ToT for differential FE; check difference between good and bad pixel results

  • Upload
    others

  • View
    0

  • Download
    0

Embed Size (px)

Citation preview

  • First look at digital module testing at UIC

    Susan Dittmer, Titas Roy

    RD53A testing meeting, 13/05/19

    1

  • S. Dittmer RD53A testing meeting, 13/05/19

    • In February we got the first module from ETH, Zurich.

    • This module is referred to as S3 and has four RD53A chips without any sensor.

    • We used the new multichip readout feature in the Yarr firmware to verify some basic tests that ETH had performed using bdaq.

    • We will be showing some preliminary results of S3.

    Outline

    2

    coldboxcomputer with Yarr FPGA, and tools to

    control coldbox

    adaptor card 4 ROCs

    display port to communicate with ROCs

  • S. Dittmer RD53A testing meeting, 13/05/19 3

    0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2input I (A)

    0.8

    1

    1.2

    1.4

    1.6

    1.8

    Volts

    digitalanalog

    S3:IV curve

    LV IV curve at supply• Varied the input current source (as measured on the PS) and plotted the corresponding analog

    and digital voltages as measured at the supply

    • Need probe station to measure IV curves for individual ROCs

    • The turn on point is lower than what ETH had reported.

  • S. Dittmer RD53A testing meeting, 13/05/19 4

    Module S3

    ROC1 100

    ROC0 101

    ROC3 111

    ROC2 110

    • Each chip has three wirebond connections determining the chipID (4-7)

    • ROC0 (chipID 5) does not turn on (same as reported by ETH)

    • ROC1 (chipID 4) connected to Rx1

    • ROC2 (connected to Rx 2) seems to have lost the connection on the MSB and responds to chipID 2 instead of chipID 6

    • ROC3 (chipID 7) connected to Rx3

    • We are reading out all four chips through one display port on the adaptor card

  • S. Dittmer RD53A testing meeting, 13/05/19

    • Looking at the response of 3 out of 4 chips to a digital scan

    • ROC0 did not turn on at ETH and we didn’t get a response either.

    5

    Digital scan

    Occupancy Maps of the 3 chips: we expect ~100 hits

    ROC1 ROC2 ROC3

    SYNC LINEAR DIFF

  • S. Dittmer RD53A testing meeting, 13/05/19 6

    Analog scan

    • ROC1 and 2 show that all pixels are enabled during an analog scan

    • ROC3 does not turn on (also as reported by ETH)

    ROC1 ROC2 ROC3

  • S. Dittmer RD53A testing meeting, 13/05/19 7

    Threshold and ToT Tuning

    • Multi-ROC tuning in Yarr

    • ROCs tuned in parallel — same time to tune module as single ROC

    • Iterative tunings continue until both ROCs reach target, allowing for different settings per ROC

    • Target values still same for all ROCs

    • Threshold tuning

    • First, attempt to tune all FEs to uniform threshold

    • Next, attempt to tune each FE to lowest stable threshold

    • ToT tuning

    • Target ToT 8 for 12000 e- (MIP charge)

    • Tune ToT for differential FE; check difference between good and bad pixel results

  • S. Dittmer RD53A testing meeting, 13/05/19

    0 50 100 150 200 250 300 350 400Column

    0

    20

    40

    60

    80

    100

    120

    140

    160

    180Row

    1400

    1600

    1800

    2000

    2200

    2400

    2600

    2800

    Thre

    shol

    d [e

    ]RD53A Internal Chip SN: JohnDoe

    0 50 100 150 200 250 300 350 400Column

    0

    20

    40

    60

    80

    100

    120

    140

    160

    180Row

    1200

    1400

    1600

    1800

    2000

    2200

    2400

    2600

    Thre

    shol

    d [e

    ]RD53A Internal Chip SN: JohnDoe

    8

    Threshold scan, uniform threshold

    1200 1400 1600 1800 2000 2200 2400 2600

    Threshold [e]

    0

    1000

    2000

    3000

    4000

    5000

    6000

    Num

    ber o

    f Pix

    els

    Analog FEsSynchronousLinearDifferential

    RD53A Internal Chip SN: JohnDoeRD53A Internal Chip SN: JohnDoe = 1895.3histMean = 146.3histRMS

    1200 1400 1600 1800 2000 2200 2400 2600 2800

    Threshold [e]

    0

    1000

    2000

    3000

    4000

    5000

    6000

    7000

    Num

    ber o

    f Pix

    els

    Analog FEsSynchronousLinearDifferential

    RD53A Internal Chip SN: JohnDoeRD53A Internal Chip SN: JohnDoe = 2010.6histMean = 161.2histRMS

    Sync FE: threshold ~1800e-, 897 untuned pixels Lin FE: threshold ~1900e-, 11 untuned pixels Diff FE: threshold ~1000e-, 195 untuned pixels

    Sync FE: threshold ~2000e- , 258 untuned pixels Lin FE: threshold ~2000e-, 22 untuned pixels Diff FE: threshold ~2000e-, 302 untuned pixels

    One pixel per 8x8 core

    enabled for each scan iteration

    Lost communication

    after 52nd iteration -- no

    data for 18.75% of

    pixels

    Chip SN: ROC1

    Chip SN: ROC1

    Chip SN: ROC2

    Chip SN: ROC2

  • S. Dittmer RD53A testing meeting, 13/05/19 9

    Threshold scan, lowest threshold

    0 500 1000 1500 2000

    Threshold [e]

    0

    1000

    2000

    3000

    4000

    5000

    6000

    Num

    ber o

    f Pix

    els

    Analog FEsSynchronousLinearDifferential

    RD53A Internal Chip SN: JohnDoeRD53A Internal Chip SN: JohnDoe = 861.9histMean = 323.8histRMS

    0 500 1000 1500 2000 2500

    Threshold [e]

    0

    500

    1000

    1500

    2000

    2500

    3000

    3500

    4000

    Num

    ber o

    f Pix

    els

    Analog FEsSynchronousLinearDifferential

    RD53A Internal Chip SN: JohnDoeRD53A Internal Chip SN: JohnDoe = 816.3histMean = 387.3histRMS

    Linear FE should probably operate

    at higher threshold —

    large number of untuned pixels

    Sync FE performance very poor for ROC2 — can

    threshold dispersion be

    improved?

    Sync FE: threshold ~1300e-, 540 untuned pixels Lin FE: threshold ~750e-, 2207 untuned pixels Diff FE: threshold ~600e-, 779 untuned pixels

    Sync FE: threshold ~1500e- , 14582 untuned pixels Lin FE: threshold ~800e-, 9596 untuned pixels Diff FE: threshold ~600e-, 3695 untuned pixels

    0 50 100 150 200 250 300 350 400Column

    0

    20

    40

    60

    80

    100

    120

    140

    160

    180Row

    0

    500

    1000

    1500

    2000Th

    resh

    old

    [e]RD53A Internal Chip SN: JohnDoe

    0 50 100 150 200 250 300 350 400Column

    0

    20

    40

    60

    80

    100

    120

    140

    160

    180Row

    0

    500

    1000

    1500

    2000

    2500

    Thre

    shol

    d [e

    ]RD53A Internal Chip SN: JohnDoe

    Chip SN: ROC1

    Chip SN: ROC1

    Chip SN: ROC2

    Chip SN: ROC2

  • S. Dittmer RD53A testing meeting, 13/05/19 10

    ToT for 12000 electrons (targeting 8)

    2 4 6 8 10 12 14

    Mean ToT [bc]

    0

    5000

    10000

    15000

    20000

    25000

    30000

    35000

    Num

    ber o

    f Pix

    els Analog FEs

    Synchronous Linear Differential

    RD53A Internal Chip SN: JohnDoe

    2 4 6 8 10 12 14

    Mean ToT [bc]

    0

    5000

    10000

    15000

    20000

    25000

    Num

    ber o

    f Pix

    els Analog FEs

    Synchronous Linear Differential

    RD53A Internal Chip SN: JohnDoe

    Pixels with unmeasurable

    threshold in linear FE also have

    unmeasurable ToT

    Settings not optimal for bad

    pixels in differential FE (as

    expected)

    Sync FE: ToT ~7.3 Lin FE: ToT ~7.8Diff FE: ToT ~8.2

    Sync FE: ToT ~7.1Lin FE: ToT ~7.2Diff FE: ToT ~8.5

    0 50 100 150 200 250 300 350 400Column

    0

    20

    40

    60

    80

    100

    120

    140

    160

    180Row

    0

    2

    4

    6

    8

    10

    12

    14

    Mea

    n To

    T [b

    c]

    RD53A Internal Chip SN: JohnDoe

    0 50 100 150 200 250 300 350 400Column

    0

    20

    40

    60

    80

    100

    120

    140

    160

    180Row

    0

    2

    4

    6

    8

    10

    12

    14M

    ean

    ToT

    [bc]

    RD53A Internal Chip SN: JohnDoe

    Chip SN: ROC1

    Chip SN: ROC1

    Chip SN: ROC2

    Chip SN: ROC2

  • S. Dittmer RD53A testing meeting, 13/05/19 11

    Improving Sync FE threshold for ROC2

    • From sync FE manual: threshold dispersion can be improved at price of higher power consumption (by adjusting IBIAS_DISC_SYNC)

    • Maybe we are already power limited?

    • Had been running at 1.8A ISupply — seemed to give most stable operation

    • Increase current to 2.0A and redo threshold scan at same settings

  • S. Dittmer RD53A testing meeting, 13/05/19

    0 50 100 150 200 250 300 350 400Column

    0

    20

    40

    60

    80

    100

    120

    140

    160

    180Row

    0

    500

    1000

    1500

    2000Th

    resh

    old

    [e]RD53A Internal Chip SN: JohnDoe

    12

    Redoing Threshold Scan at 2.0A

    0 500 1000 1500 2000

    Threshold [e]

    0

    1000

    2000

    3000

    4000

    5000

    6000

    Num

    ber o

    f Pix

    els

    Analog FEsSynchronousLinearDifferential

    RD53A Internal Chip SN: JohnDoeRD53A Internal Chip SN: JohnDoe = 852.6histMean = 279.3histRMS

    0 500 1000 1500 2000 2500 3000 3500

    Threshold [e]

    0

    500

    1000

    1500

    2000

    2500

    3000

    3500

    Num

    ber o

    f Pix

    els

    Analog FEsSynchronousLinearDifferential

    RD53A Internal Chip SN: JohnDoeRD53A Internal Chip SN: JohnDoe = 1107.4histMean = 504.1histRMS

    Much better performance for

    sync FE in ROC2; slightly better performance

    even for ROC1

    Also slightly better

    performance for lin FE in ROC2

    Sync FE: threshold ~1200e-, 145 untuned pixels Lin FE: threshold ~800e-, 2199 untuned pixels Diff FE: threshold ~600e-, 777 untuned pixels

    Sync FE: threshold ~1700e- , 81 untuned pixels Lin FE: threshold ~900e-, 7808 untuned pixels Diff FE: threshold ~600e-, 3398 untuned pixels

    0 50 100 150 200 250 300 350 400Column

    0

    20

    40

    60

    80

    100

    120

    140

    160

    180Row

    0

    500

    1000

    1500

    2000

    2500

    3000

    3500

    Thre

    shol

    d [e

    ]RD53A Internal Chip SN: JohnDoe

    Chip SN: ROC1

    Chip SN: ROC1

    Chip SN: ROC2

    Chip SN: ROC2

  • S. Dittmer RD53A testing meeting, 13/05/19 13

    Summary• Received digital module from ETH; confirmed no changes to functionality

    • 3/4 ROCs active in digital scan; 2/4 in analog

    • Need probe station to confirm IV curves for each ROC

    • Reasonable success at tuning threshold and ToT of two active chips

    • Issues observed during tuning

    • Occasional loss of communication during longer scans

    • Sync FE needs full power budget to operate stably at low threshold

    • Next: measure individual IV curves for each ROC to check if we are working in the optimum current range

    • Need a needle probe station / training to operate

    • Not related to modules, but we want to be able to get the sync FE working with external trigger for the upcoming testbeam at Fermilab—any help/suggestion in this regard will be much appreciated.