Upload
others
View
1
Download
0
Embed Size (px)
Citation preview
Flash Memory Overview
Steven Swanson
Welcome to the Data Age • The world processed 9 Ze>abytes of data in 2008*
• Acquiring data is easy • ExtracIng knowledge is hard – Storage performance is major bo>leneck
– Solid-‐state storage can help
*h>p://hmi.ucsd.edu
Hardware/SoQware Prototyping
Programming interfaces
Data Security
ECC & Device CharacterizaIon
The Flash Juggernaut
Flash is Fast!
Lat.: 7.1ms BW: 2.6MB/s
1x 1x
68us 250MB/s 104x 96x
• Random 4KB Reads from user space
Hard Drives PCIe-‐Flash 2007
Flash Opera+ons
Erase
Read
Floa
+ng Gate
Program
20V
0V
0V
5V
0V
1V
20V 0V
Organizing Flash Cells into Chips
Select transistors
Select Transistors
Data storage
One NAND chain
One block
One page
Organizing Flash Cells into Chips
• ~16K blocks/chip • ~16-‐64Gbits/chip
Peripheral Logic
One Block
Flash OperaIons
…
…
Block 0
Block 1
Block 2
Block n
…
Page: 0 1 2 3 4 n n-‐1 n-‐2 n-‐3 n-‐4
…
…
…
…
Erase Blocks
Program Pages
SLC: Single Level Cell
MLC: MulI Level Cell
== 1 bit
== 2 bits
TLC: Triple Level Cell
== 3 bits
Single-‐Level Cell
== 1 bit
Charge on the floating gate
Likelihood 1 0
Endurance: 100,000 Cycles Data retenIon: 10 years Read Latency: 25us Program Latency: 100-‐200us
MulI-‐Level Cell (2 bits)
== 2 bits
Charge on the floating gate
Likelihood
11 10 00 01
Endurance: 5000-‐10,000 Cycles Data retenIon: 3-‐10 years Read Latency: 25-‐37us Program Latency: 600-‐1800us
Triple-‐level Cell (3bits)
== 3 bits
Charge on the floating gate
Likelihood
111 110 100 101 001 000 010 011
Endurance: ~500-‐1000 Cycles Data retenIon: 3 years Read Time: 60-‐120us Program Time: 500-‐6500us
Flash Failure Mechanisms
• Program/Erase (PE) Wear – Permanent damaged to the gate oxide at each flash cell
– Caused by high program/erase voltages – Damage causes charge to leak off the floaIng gate
• Program disturb – Data corrupIon caused by interference from programming adjacent cells.
– No permanent damage
Making Disks out Flash Chips
Peripheral Logic
Read Pages Write Pages Erase Blocks Hierarchical addresses PE Wear
Read Write Flat address space No wear limitaIons
WriIng Data
SSD Maintain a map between “virtual” logical block addresses and “physical” flash locaIons.
WriIng more data…
When you overwrite data, it goes to a new locaIon.
Flash TranslaIon Layer (FTL) User • Logical Block Address Flash • Write pages in order • Erase/Write granularity • Wears out FTL • Logical à Physical map • Wear leveling • Power cycle recovery
SoQware
FTL
Flash
101001011010001
010100100101011
101010110101001
111111111111111
111111111111111
111111111111111
Centralized FTL State Write Point Map
Block Info Table
LBA Physical Page Address
0 Block 5 Page 7
2k Block 27 Page 0
4k Block 10 Page 2
Block Erased Erase Count
Valid Page Count
Sequence Number
Bad Block Indicator
0 False 3 15 5 False
1 True 7 0 -‐ False
2 False 0 4 9 False
Next Sequence Number: 12
Read
2. Map
LBA Physical Page Address
0 Block 5 Page 7
2k Block 27 Page 0
4k Block 10 Page 2
SoQware
FTL
Flash
1. Read Data at LBA 2k
3. Flash Opera+on
Write – Mid Block
1010010111010101
0101001010111011
1010101101001010
Write Point = Block 2, Page 5
Map
Block Info Table
LBA Physical Page Address
0 Block 5 Page 7
2k Block 0 Page 0
4k Block 10 Page 2
Block Erased Erase Count
Valid Page Count
Sequence Number
Bad Block Indicator
0 False 3 15 5 False
1 True 7 0 -‐ False
2 False 0 4 9 False
Write 0101101011001010 to LBA 2k
Next Sequence Number: 12
Write – Mid Block
1010010111010101
0101001010111011
1010101101001010
0101101011001010
Write Point = Block 2, Page 6
Map
Block Info Table Block Erased Erase
Count Valid Page Count
Sequence Number
Bad Block Indicator
0 False 3 15 14 5 False
1 True 7 0 -‐ False
2 False 0 4 5 9 False
Next Sequence Number: 12
Write Point = Block 2, Page 5
LBA Physical Page Address
0 Block 5 Page 7
2k Block 0 2 Page 0 5
4k Block 10 Page 2
Write 0101101011001010 to LBA 2k
Write – Block Jump (1)
1010010111010101
0101001010111011
1010101101001010
0101011010100111
0101110100010110
1011101000101010
0101101001101010
Write Point = Block 2, Page 63 Write Point = Block 1, Page 0
Map
Block Info Table
LBA Physical Page Address
0 Block 5 Page 7
2k Block 0 Page 5
4k Block 0 Page 2
Block Erased Erase Count
Valid Page Count
Sequence Number
Bad Block Indicator
0 False 3 15 5 False
1 True 7 0 -‐ False
2 False 0 4 9 False
Write 0101001010100110 to LBA 2k
0101011010101010
1010001010111010
0101011010010101
0101110100101000
Next Sequence Number: 12
Block 1
Write – Block Jump (1)
1010010111010101
0101001010111011
1010101101001010
0101001010100110
0101011010100111
0101110100010110
1011101000101010
0101101001101010
Map
Block Info Table
LBA Physical Page Address
0 Block 5 Page 7
2k Block 0 2 Page 5 63
4k Block 0 Page 2
Block Erased Erase Count
Valid Page Count
Sequence Number
Bad Block Indicator
0 False 3 15 14 5 False
1 True 7 0 -‐ False
2 False 0 4 5 9 False
0101011010101010
1010001010111010
0101011010010101
0101110100101000
Next Sequence Number: 12
Block 1
Write 0101001010100110 to LBA 2k Write Point = Block 2, Page 63 Write Point = Block 1, Page 0
Write – Block Jump (2)
1010010111010101
0101001010111011
1010101101001010
0101001010100110
0101011010100111
0101110100010110
1011101000101010
0101101001101010
Map
Block Info Table
LBA Physical Page Address
0 Block 5 Page 7
2k Block 2 Page 63
4k Block 0 Page 2
Block Erased Erase Count
Valid Page Count
Sequence Number
Bad Block Indicator
0 False 3 14 5 False
1 True 7 0 -‐ False
2 False 0 5 9 False
Write 1101000101101001 to LBA 4k
0101011010101010
1010001010111010
0101011010010101
0101110100101000
Next Sequence Number: 12
Write Point = Block 1, Page 0 Write Point = Block 1, Page 1
Write – Block Jump (2)
1010010111010101
0101001010111011
1010101101001010
0101001010100110
0101011010100111
0101110100010110
1011101000101010
0101101001101010
Map
Block Info Table
LBA Physical Page Address
0 Block 5 Page 7
2k Block 2 Page 63
4k Block 0 1 Page 2 0
Block Erased Erase Count
Valid Page Count
Sequence Number
Bad Block Indicator
0 False 3 14 13 5 False
1 T F 7 0 1 12 False
2 False 0 5 9 False
0101011010101010
1010001010111010
0101011010010101
0101110100101000
1101000101101001
Next Sequence Number: 12 13
Write 1101000101101001 to LBA 4k Write Point = Block 1, Page 0 Write Point = Block 1, Page 1
Erase Block Info Table Block Erased Erase
Count Valid Page Count
Sequence Number
Bad Block Indicator
0 False 3 13 5 False
1 False 7 1 12 False
2 False 0 3 9 False
1010010111010101
0101001010111011
1010101101001010
Move Valid Pages
0101011010101010
1010001010111010
0101011010010101
0101110100101000
1101000101101001
0101011010100111
0101110100010110
1011101000101010
Block 2
Erase Block Info Table Block Erased Erase
Count Valid Page Count
Sequence Number
Bad Block Indicator
0 False 3 13 5 False
1 False 7 1 12 False
2 False 0 3 0 9 False
1010010111010101
0101001010111011
1010101101001010
1010001010111010
1101000101101001
0101011010100111
Move Valid Pages
0101011010101010
1010001010111010
0101011010010101
0101110100101000
1101000101101001
0101011010100111
0101110100010110
1011101000101010
Block 2 Update:
• Map • Valid Pg Counts • etc.
Erase Block Info Table Block Erased Erase
Count Valid Page Count
Sequence Number
Bad Block Indicator
0 False 3 13 5 False
1 False 7 1 12 False
2 F T 01 0 -‐ False
1010010111010101
0101001010111011
1010101101001010
1010001010111010
1101000101101001
0101011010100111
Move Valid Pages
Block 2 Update:
• Map • Valid Pg Counts • etc.
Distributed FTL State
Summary Page
Metadata
Physical Page
Logical Block Address
0 10k
1 32k
2 14k
LBA ECC EDC
Erase Count
Erase Seal
Sequence Number
Bad Block Indicator
2k 3 False 5 False
Page 0
Page 1
Page 2
.
.
.
Page n
Only Necessary in First and Last Page of Block
Out of Band Data
Data
Typical Page
Typical Block
Power Cycle
1010010111010101
0101001010111011
1010101101001010
Write Point Map
Block Info Table
LBA Physical Page Address
0 Block 5 Page 7
2k Block 27 Page 0
4k Block 10 Page 2
Block Erased Erase Count
Valid Page Count
Sequence Number
Bad Block Indicator
0 False 3 15 5 False
1 True 7 0 0 False
2 False 0 4 9 False
Next Sequence Number: 12
Scan each block: 1. Summary page 2. First Page 3. All Pages