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8/13/2019 Flip Flops Edited
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Name:_________________________________________ Date:_____________________
Section:_______________________
Flip Flops
I. OBJECTIVE
To familiarize with the input/output characteristics of RS, D, T and JK flip-flop deices and theconersion amon! them"
II.BACKGROUND INFORMATION
# flip-flop, as stated earlier, is a $i-sta$le circuit" %oth of its output states are sta$le" The circuit remainsin a particular output state indefinitel& until somethin! is done to chan!e that output status" 'o!ic circuit whoseoutputs depend upon circuit inputs as well as preious alues of circuit outputs descri$ed as their present states are(nown as se)uential lo!ic circuits" # se)uential s&stem can $e defined in terms of its inputs and present state" Thatis, the ne*t state of the se)uential s&stem can $e determined from these two )uantities" The +cloc(ed RS, D, JK andT flip-flops are characterized $& the followin! state ta$les"
The . in the RS flip-flop state ta$le means that when R 0 1 and S 0 1 then the ne*t state is notdetermined e*plicitl&"
S Qt Qt+12 2 2
2 1 1
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1 2 1
1 1 1
222
2 1 2
1 2 .
1 1 .
III. MATERIALS REQUIRED
Sl"No" 34564N7NT S6738983#T84N T;"
1" S" D8=8T#'
4S38''4S3467D?#' D
9'869'46
74LS74 TTL IC 1
@" Dual JK 9lip 9lop 74LS76 TTL IC 1
A" 6#T3< 34RDS - >2
IV. EXERIMENTAL ROCEDURE
1.3onstruct the cross-coupled N#ND !ate $asic RS flip-flop depicted in the fi!ure $elow and erif& its se)uentialoperation $& completin! the timin! dia!ram shown"
>" 3onstruct the
cloc(ed RS flip flop of fi!@" Determine itsstate ta$le" ?se mono-sta$le circuit as&our cloc( source"3omplete the timin!dia!ram $elow"
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@" Simultaneousl& application of ones to R and S of the cloc(ed RS flip flop, o$sere the outputs"
4) Since the constructed cloc(ed RS flip flop is s&mmetric, we can chan!e the position of R B S, and and C" 8t isstill a cloc(ed RS flip flop"Repeat step @, see what has happened" =ie &our conclusion"
" ?sin! the EA'SEA dual D flip flop, inesti!ate the operation of the D flip-flop " 3ompare &our result with the stateta$le !ien a$oe" 6a& attention to the chan!e in state of the deice as the cloc( si!nal is risin! or fallin!"3ompare the followin! timin! dia!ram"
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F" 'et input R open, !round the input S, watch the output and then let S open, !round R, watch the output"Determine the usa!e of R and S"
E"?sin! the EA'SEF dual JK flip flop, determine its lo!ical operation" The circuit dia!ram is shown in fi! F " 6a&attention to the chan!e in state of the deice as the cloc( si!nal is risin! or fallin!" 3ompare the followin! timin!
dia!ram"
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G" The flip flop can simulate each other" 3onstruct the circuit shown $elow" Herif& its se)uential operation as a D flip flop"3omplete the followin! timin! dia!ram" 3ompare it with the timin! dia!ram of procedure E"
I"Wiring the circuit shown in figure below, verify that it is a T fli flo! Co"lete the ti"ing #iagra"!
V. Co!"l#sio!$
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%.
VI. Q#&stio! '!( A!s)&*$
1" hat is a cloc(ed J-K flip-flop. hat improement does it hae oer a cloc(ed R-S flip-flop.
______________________________________________________________________________________
__________________________________________________________________________________________________________________________________________________________________________"
>" hat is meant $& the race pro$lem in flip-flops.
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" ith the help of a suita$le circuit, $riefl& e*plain how a D flip-flop can $e used to detect the se)uence ofoccurrence of ed!es of s&nchronous inputs"
________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________"