Force Commutated Inverters

8/10/2019 Force Commutated Inverters

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Force-CommutatedForce-Commutated

InvertersInverters

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Figure 1. The single-phase H-bridge inverter

The Single-Phase Full-Bridge (H-bridge) Inverter

It consists of a dc source, four forced-commutated switches, and aload.

It is the basic building block of the multilevel inverters withindependent dc sources.

vo

Vdc

S1 S3

S4 S2


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(i) S1 and S2 closed

vo !dc

(ii) S" and S# closed

vo

Vdc

S1

S2

vo

Vdc

S3

S4

vo - !dc

$igure 2

(a) (b)

%he re&uired ac output waveform is s'nthesised from a dc input b'closing and opening the switches in an appropriate se&uence.


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vo

Vdc

S3S1

(iii) S1 and S" closed

vo

(iv) S2 and S# closed

vo

Vdc

S2S4

vo

$igure 2

(c) (d)


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Switches Closed Output Voltage vo

S1 and S2 + Vdc

S3 and S4 - Vdc

S1 and S3 0

S2 and S4 0

Summar'

ased on the waveform s'nthesis method emplo'ed, twot'pes of inverters can be identified.

i. S&uare-wave inverters

ii. *ulse-width modulated (*+) inverters

%he following discussion focuses on the s&uare-wave inverter. %he*+ inverter will be discussed separatel' elsewhere.


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The Square-Wave Inverter

It uses the simplest switching scheme for the full-bridgeconverter to produce a s&uare wave output voltage.

%he switches connect the load to !dcwhen S1 and S2 are

closed to !dcwhen S" and S# are closed.

%he periodic switching of the load voltage between !dc

and !dcproduces a s&uare wave voltage across the load.

Output voltage, vo

Time

S1 and S2 are closed

S3 and S4 are closed

Vdc

- Vdc

0

$igure "


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Notesi. /lthough this alternating output is non-sinusoidal. It ma' be an

ade&uate ac waveform for some applications.

ii. %he current waveform in the load depends on the loadcomponents. $or the resistive load, the current waveformmatches the shape of the output voltage.

iii. /n inductive load will have a current that has more of asinusoidal &ualit' than the voltage because of the filteringpropert' of the inductance.

iv. /n inductive load presents some considerations in designing theswitches in the full-bridge circuit because the switch currents

must be bidirectional.


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$igure # shows the full-bridge inverter with switches implementedas insulated gate bipolar transistors (I0%s) with feedback diodes.

peration

+hen I0%s 31 and 32are turned off, the loadcurrent must becontinuous and will

transfer to diodes 4" and4#, making the outputvoltage !dc, effectivel'

turning on the switchpaths " and # before 3"and 3# are turned on.

I0%s 3" and 3# mustbe turned on before theload current deca's to5ero.

vo

Vdc

Q3

Q2

Q1

Q4

D1 D3

D4D2

$igure #


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The Half-Bridge Inverter

vo

Vdc

Vdc

2

Vdc

2

S1

S2

Figure 5. hal!-bridge inverter using "#$Ts.

"n this %ir%uit& the nu'ber (!

s)it%hes is redu%ed t( 2 b*

dividing the d% s(ur%e v(ltage

int( t)( parts )ith the %apa%it(rs

+1 and +2.

+1 and +2 are large and e,ual in

value.

a%h %apa%it(r )ill have v(ltage

d%/2 a%r(ss it.


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Circuit Operation

a%h %apa%it(r )ill be the sa'e value and

)ill have v(ltage d%/2 a%r(ss it. hen 1is %l(sed& the l(ad v(ltage is

-d%/2.

hen 2is %l(sed& the l(ad v(ltage is

d%/2.

utput v(ltage v(is s,uare )ave.

The v(ltage a%r(ss an (pen s)it%h is t)i%e

the l(ad v(ltage v(.

$laning ti'e !(r the s)it%h is re,uired t(prevent a sh(rt-%ir%uit a%r(ss the s(ur%e.

The !eedba% di(des are re,uired t(

pr(vide a %(ntinuit* (! %urrent !(r indu%tive

l(ads.

vo

Vdc

Vdc

2

Vdc

2

vo

Vdc

Vdc

2

Vdc

2

a

(b)

Figure 6 Hal!-bridge e,uivalent %ir%uit )hen a 1is %l(sed& b 2is %l(sed.


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The (utput v(ltage is a re%tangular a% )ave!(r' (! !re,uen%*

rads2

T

=

here T is the s)it%hing peri(d (! the "#$Ts. Fre,uen%* (! the inverter

(utput v(ltage %an be %hanged b* %(ntr(lling T.

The (utput )ave!(r' !eeds the l(ad )hi%h 'a* in general %('prise +

%('p(nents.


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T1 T3 T5

T4 T6 T2

+

:

$ +

Three-Phase Step-ave !oltage Source Inverters (!SI)

$ridge %(n!igurati(n is '(st %(''(nl* used !(r generating p(l*phase(utput be%ause the trans!(r'er re,uired in this %ase is n(t as %('pli%ated

as in the %ase (! (ther inverter %ir%uits.

F(r high p()er appli%ati(ns ;use !ast-s)it%hing th*rist(rs inverter-grade

)hi%h are available in high v(ltage and %urrent ratings.

F(r l()- and 'ediu' p()er appli%ati(ns ; use "#$Ts

$igure 6


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$asi%all*& t)( di!!erent '(des (! (perati(n %an be (btained !r(' this %ir%uits !re,uen%*.

The (utput v(ltage a'plitude 'a* be varied b* %hanging the d%

input v(ltage.


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or,ed .a%ple "

three-phase "#$T bridge inverter has a )*e-%(nne%ted resistive l(ad

= 2 ?. "! the inverter !re,uen%* is 50 H@ and the + input v(ltage iss= 220 & !ind the average& A& and pea %urrents !l()ing thr(ugh

the "#$T.

T1 T3 T5

T4 T6 T2

220

2 B 2 B 2 B

:

$ +

$igure 18


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Solution

Here = 2 ?& ! = 50 H@& s = 220 & T = 1/! = 0.02 se%. The r's line-t(-

line v(ltage is

SsLL VtdVV3

2!"

132

0

2 ==

The phase v(ltage is

V103#$%V220&3

414#1

3

2

3==== S

LLP V

VV

The line %urrent is

AR

VI PL '(#(12

$%#103===

The l(ad p()er is

)1$12%#4((1#'(&103#$%&33 === PPO

IVP


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The average suppl* %urrent is

API OS 31$#*3220

==

verage transist(r %urrent is

AI

i SavT 44#243

31$#*3

3!" ===

$e%ause the line %urrent is shared b* t)( "#$Ts& the A "#$T

%urrent is

+$*#3$2

'(#(1

2!" ===

L

rmsT

I

i

Cea "#$T %urrent is

+(1#'(2&3$#$*,&2!" rms ===peakiT


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or,ed .a%ple *

three-phase bridge inverter (perating in the 180('(de is !ed !r(' a

d% s(ur%e (! 200 . "! the l(ad is star-%(nne%ted (! 10 B/phase pure

resistan%e& deter'ine the r's l(ad %urrent& the r's %urrent rating (! the

th*rist(rs& and the l(ad p()er.

T1 T3 T5

T4 T6 T2

9+= 200

10 B

:

$ +

10 B 10 B

i i$ i+

$igure 2


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Solution

F(r 180('(de (! (perati(n&

pea l(ad %urrent

+13#33103

2002!" =

=peakiL

A l(ad

43#%3

$$#$33#13$$#$!"222=++=rmsi

L

Th*rist(r r's %urrent

+$*#$$

$$#$33#13$$#$!"

222

=++

=rmsiT

(ad p()er

)2$$*31034#% 2 ==L

P


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"*$o-/ode

"n this parti%ular '(de (! (perati(n& t)( th*rist(rs )ill be %(ndu%ting at

an* ti'e& e.g.& th*rist(rs T1 and T6 )ill %(ndu%t !(r 60(

and then !(r theneDt 60(& T1 and T2 )ill %(ndu%t. F(r the neDt %*%le (! 60(& T2 and T3 )ill

%(ndu%t.

T1

T2

T3

T4

T5

T6

)it%hing

Ti'e

$igure 21


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This '(de (! (perati(n has the advantage that there is n( p(ssibilit* (! a

sh(rt %ir%uit a%r(ss the d% input as the peri(d (! 60(elapses bet)een the

end (! %(ndu%ti(n (! (ne th*rist(r and the beginning (! %(ndu%ti(n (! the

(ther th*rist(r (! the sa'e bran%h.


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T"& T On Others Off

$= +

$+=

+= -+

9+

:

$ +

$igure 22


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T"& T On Others Off

=ANV

=CN

V

=BNV9+

:

$ +

$igure 2"


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Figure 24. +('plete phase v(ltage )ave!(r's !(r 120(%(ndu%ti(n.


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Figure 25. +('plete line-t(-line v(ltage )ave!(r's !(r 120(%(ndu%ti(n.


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Figure *0+('plete %urrent )ave!(r's (! a three-phase bridge

inverter )ith 120(%(ndu%ti(n and resistive l(ad.


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T1 T3 T5

T4 T6 T2

9+= 200

10 B

:

$ +

10 B 10 B

i i$ i+

.a%ple +

three-phase bridge inverter (perating in the 120('(de is !ed !r(' a

d% s(ur%e (! 200 . "! the l(ad is star-%(nne%ted (! 10 B/phase pure

resistan%e& deter'ine the r's l(ad %urrent& the r's %urrent rating (!

the th*rist(rs& and the l(ad p()er.

$igure 26


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Solution

F(r 120('(de (! (perati(n&

pea l(ad and th*rist(r %urrent

+10102

200!" =

=peakiL

A l(ad %urrent

+1$#'3

01010!"

222

=++

=rmsiL

+'#(310!" ==rmsiT

A th*rist(r %urrent

(ad p()er

)20003101$#' 2 ==L

P


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The H-bridge and the hal!-bridge inverters %an be %lassi!ied as t)(-

level inverters.

e%entl*& 'ultilevel v(ltage inverters have eD%ited )idespread

interest.

Aultilevel inverters (!!er better per!(r'an%e than t)(-level inverters&but the* are '(re %('pleD and %(stl* and are e'pl(*ed pri'aril* in

high-v(ltage appli%ati(ns.

/ultilevel Inverters


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s'nthesi5es a desired voltage from several independentsources of dc voltages, which ma' be obtained from eitherbatteries, fuel cells, or solar cells.

%his inverter topolog' can avoid e9tra clamping diodes or

voltage-balancing capacitors.

/ 6-level cascaded-inverters based inverter, for e9ample, willhave three independent 4: sources and three full-bridgecells.

inimum harmonic distortion can be obtained b' controllingthe conducting angles at different inverter level.

/ single-phase m-level configuration of such an inverter is shown in$ig 27

Multilevel Inverters with Independent DC Sources


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$or a three-phase s'stem, the output voltage of the three cascadedinverters can be connected in either w'e or delta configuration.

$igure 28. / general three-phase w'e-configuration multilevel cascaded-inverter.


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Figure 30 illustrate the basi% idea !(r

realising a single-phase di(de-%la'ped 'ultilevel inverter&

spe%i!i%all* a !ive-level inverter.

1iode-Cla%ped /ultilevel Inverters

80E

Figure 30. #eneri% !ive-level inverter.

Vdc

Vdc

4

Vdc

4

Vdc

4

Vdc

4

S1

S3

S4

S(

S2

vo

V1

V2

V3

V4

V(

'ultilevel inverter %ir%uit that has the

advantage (! using a single d% s(ur%e

rather than 'ultiple s(ur%es is the

di(de-%la'ped 'ultilevel inverter.


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+ir%uit design The !(ur %apa%it(rs +1 thr(ugh +4 'ae

up a v(ltage divider&

The %entre n(de (! the divider and (ne

ter'inal (! the l(ad are gr(unded.

:(de v(ltages %reated are 1thr(ugh

5& )ith %entre n(de v(ltage 3= 0.

nl* (ne (! the !ive s)it%hes 1 thr(ugh

5 are %l(sed at an* (ne ti'e

"nstantane(us l(ad v(ltage is e,ual t(the %(rresp(nding n(de v(ltage (! the

%l(sed s)it%h.

Vdc

Vdc

4

Vdc

4

Vdc

4

Vdc

4

S1

S3

S4

S(

S2

vo

V1

V2

V3

V4

V(

$igure "1


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F(r the sa'e nu'ber (! n(de v(ltage levels& the nu'ber (! v(ltage-

divider %apa%it(rs in the di(de-%la'ped t(p(l(g* %an be redu%ed b*

hal! using a bridge stru%ture& as sh()n in Figure 32.

d%

v(

+ir%uit (perati(n

The d% v(ltage s(ur%e is

%(nne%ted t( a pair (! series

%apa%it(rs a%h %apa%it(r %harged t(

d%/2

The (utput v(ltage has !ive

levels& na'el*& d%& d%/2& 0&

-d%/2& and ;d%.

$igure "2


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2nal3sis for one-half of circuit for v24 !dc

d%

v= d%

1

2

3

4

ith 1 and 2 %l(sed and 3

and 4 (pen& v= d%.

The di(des are (!! !(r this

%(nditi(n.

$igure ""


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2nal3sis for one-half of circuit for v24 $

d%

v= 0

1

2

3

4

ith 1 and 2 (pen and 3

and 4 %l(sed& v= 0.

The di(des are als( (!! !(r this

%(nditi(n.

$igure "#


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sing a si'ilar anal*sis& the right hal! (! the bridge %an als( pr(du%e

the v(ltages d%& 0 & and d%/2.

The (utput v(ltage is the di!!eren%e (! the v(ltages bet)een ea%h

hal! bridge& resulting in the !ive levels&

dcdcdcdc V-,V

2

1-,0,V

2

1,V

ov

A(re (utput v(ltage levels are a%hieved )ith additi(nal %apa%it(rs and

s)it%hes.


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Three-Phase 1iode-Cla%ped /ultilevel Inverters

1. ie the single-phase !ull-bridge %ir%uit& the hal!-bridge single-phase

inverters %an be eDpanded t( three-phase appli%ati(ns.

2. Figure 36 sh()s a three-phase di(de-%la'ped 'ultilevel inverter

%ir%uit.

3. This %ir%uit %an be (perated t( have a stepped-level (utput si'ilart( the siD-step %(nverter& (r& as is '(st (!ten the %ase& it %an be

(perated t( have a pulse-)idth-'(dulated (utput.


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d%

80E

Figure 36. three-phase di(de-%la'pled 'ultilevel

inverter.


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Summary1. In high power s'stem, the multilevel inverters can appropriatel'

replace the e9ist s'stem that use traditional multi-pulseconverters without the need for transformers.

2. /ll three multilevel inverters can be used in reactive powercompensation without having the voltage unbalance problem.

". In back-to-back intertie application, however, it is not possible touse multilevel inverter using cascaded-inverters with separate 4:sources because a short circuit will be introduced when two back-to-back inverter are not switching s'nchronousl'.

#. n the other hand, the structure of separated dc sources is wellsuited for various renewable energ' sources such as fuel cell,photovoltaic, biomass, etc.

;. %his structure is, therefore, suited for an ac power suppl' invehicle s'stem utilities.


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1. %able 1.# compares the power component re&uirements perphase leg among the three multilevel voltage source inverter

mentioned above.2. %able 1.# shows that the number of main switches and maindiodes, needed b' the inverters to achieve the same numberof voltage levels, is the same.

". :lamping diodes do not need in fl'ing-capacitor and cascaded-inverter configuration, while balancing capacitors do not need

in diode clamp and cascaded-inverter configuration.#. Implicitl', the multilevel converter using cascaded-inverters

re&uires the least number of components.

/nother advantage of cascaded-inverter is circuit la'outfle9ibilit'. odulari5ed circuit la'out and packaging is possible

because each level has the same structure, and there are noe9tra clamping diodes or voltage balancing capacitor. %henumber of output voltage levels can be easil' ad=usted b'adding or removing the full-bridge cells.


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Table 2. Comparison of power component

requirements per phase leg between the separateDC sources- and diode-clamped multilevelinverters.

Documents

Force Commutated Inverters