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8/13/2019 FPGA Implementation of a Multimode Transmultiplexer
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Institutionen fr systemteknik
Department of Electrical Engineering
Examensarbete
FPGA Implementation of a MultimodeTransmultiplexer
Master tesis performed in Electronics !ystems
by
"a#e A$i$i
%iT&'I!('E) ' ' *+,--.. ' ' !E
%inkping */ 0une .+*+
TE"1I!"A &2G!"3%A1
%I1"2PI1G! 41I5E6!ITET
Department of Electrical Engineering%inkping 4ni#ersity !'/7* 78%inkping9 !:eden
%inkpings tekniska gskolaInstitutionen fr systemteknik/7* 78 %inkping
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FPGA Implementation of a Multimode Transmultiplexer
Master Tesis in Electronics !ystems
%inkping Institute of Tecnology
by
"a#e A$i$i
%iT&'I!('E) ' ' *+,--.. ' ' !E
!uper#isor; Amir Egbali
Examiner; "ent Palmk#ist
%inkping */ 0une .+*+
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AbstractAs te complexity of 5ery %arge !cale Integration ?ile tere are many platform a#ailable for tis sift9 Field Programmable Gate
Arrays 4sually in digital domain tere is a tradeoff bet:een performance and flexibility9comparing :it Application !pecific Integrated @ircuit Altoug9 D!P can implement #ersatile functions9 its computational po:eris not ig enoug to support te ig data rate of FPGA>
Tis report is te outcome and result of a master tesis at 4ni#ersity of %inkping9 !:eden> In tisreport it is tried to co#er bot teoretical and ard:are aspects of implementation of a Farro: structurefor sample rate con#ersion on FPGA>
Intention of tis :ork :as to contribute to :at is no:adays te main focus of communicationengineers; designing flexible radio systems> Flexible radio systems are interacti#e and dynamic bydefinition> Tat is :y a lo:'cost9 flexible multimode terminal is crucially important to supportdifferent telecommunication standards and scenarios> In tis tesis9 FPGA implementation of completeFarro: system is presented> Matlab,!imulink9 and 5&D% are used in tis tesis as te prime soft:are>
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AcknowledgementsTis tesis is te result of :at I did as my master tesis at Department of Electrical Engineering9Electronics !ystems> I :ould like to express my sincere appreciation to all of tose people especially atte Electronic !ystems :o supported my tesis :ork>
I sould not forget to sincerely and deeply tank all of my family specially my parents and broters forall of teir emotional supports and encouragements>
In addition9 I :ould like to express my gratefulness to te people in Electronic !ystems> In particular9 I:ould like to tank Professor &kan 0oansson9 for is understanding of my situation9 also my sinceretanks :ould go to Dr> "ent Palmk#ist for is comments and te time e spent for me9 and all tefacilities tat :ere #ery easy to a#e tanks to im> My special tanks :ould go to my co'super#isorP>D> student9 Amir Egbali for all of is effort9 patience and long discussions for te tesis>
Finally my special tanks :ould go to all of my friends in !:eden9 tose :o made my stay in !:eden
noting but a pleasure>
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Table of Contents
Abstract...................................................................................................................................................... vAcknowledgements..................................................................................................................................vii1. Introduction............................................................................................................................................1
1.1 Background..................................................................................................................................... 1
1.2 Purpose and Goals........................................................................................................................... 11.3 Chapter verview ...........................................................................................................................2
2. Basics o! "arrow #tructure.....................................................................................................................32.1 verview ........................................................................................................................................ 32.2 Conventional #ampling $ate Conversion ...................................................................................... 32.3 "arrow as #ample $ate Converter .................................................................................................. 32.% Application o! "arrow #tructure......................................................................................................&
2.%.1 'iming #(nchroni)er............................................................................................................... &2.%.2 *!!icient "ractional +ela( ,ilbert 'rans!orm "ilter................................................................ -2.%.3 *!!icient #uperresolution Image $econstruction ................................................................. 112.%.% $econstruction o! /onuni!orml( #ampled #ignal 0sing 'ransposed "arrow #tructure. .12
3. #(stem verview o! a '0............................................................................................................. 1&3.1 Introduction................................................................................................................................... 1&3.2 0p+own#ampling........................................................................................................................1&3.3 +igital "ilters.................................................................................................................................14
3.3.1 /(5uist 6thband7 "ilters....................................................................................................1-3.% "re5uenc( #hi!ting........................................................................................................................ 283.9 Complete '0 on Both #ender and 'ransmitter.......................................................................283.: "arrow #tructure............................................................................................................................223.& "arrow Based '0....................................................................................................................23
%. ,ardware Implementation....................................................................................................................29%.1 verview....................................................................................................................................... 29
%.2 "PGA "amilies.............................................................................................................................. 29%.3 #o!tware ........................................................................................................................................2&%.% Practical Issues !or "ilter Implementation.....................................................................................2&%.9 Implementing "arrowbased '0 ............................................................................................24
%.9.1 0psampler +ownsampler ................................................................................................... 24%.9.2 AntiAliasing and AntiImaging "ilter...................................................................................24%.9.3 "arrow #tructure.................................................................................................................... 31%.9.% "re5uenc( #hi!ters.................................................................................................................39
%.: Implementation $esults and Comparison......................................................................................3&9. Conclusion and "uture ;ork................................................................................................................%3$e!erences................................................................................................................................................%9
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============================================================
/otation
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>ist o! Abbreviation
?>#I ?er( >arge #cale Integration
"PGA "ield Programmable Gate Arra(
A#IC Application #peci!ic Integrated Circuit+#P +igital #ignal Processor
#+$ #o!tware +e!ined $adio
#$C #ample $ate Conversion
"I$ "inite Impulse $esponse
CIC Cascaded IntegratorComb
'0 'ransmultiple 5&!I@ ard:are description language
#/$ #ignal to /oise $atio
#$$C #5uare $oot $aised Cosine
/+A*>+ /one +ata Aided *arl( >ate +ela(
@P# Buadrature Pase !ift "eying
"+,'" "ractional +ela( ,ilbert 'rans!er "ilter
A#* Adaptive #ubsample *stimation
"+" "ractional +ela( "ilter
?"+" ?ariable "ractional +ela( "ilter
?"+$ ?ariable "ractional +ela( $otated
A"B Anal(sis "ilter Bank
#"B #(nthesis "ilter Bank
"B "ilter Bank
CC+ Charge Coupled +evice
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,$ ,igh $esolution
>$ >ow $esolution
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Chapter 1
1. Introduction1.1 Background
Tese days9 because tere are so many communication scenarios and tecniCues9 te complexity of tecommunication systems is increasing #ery fast> At te same time9 te number of communicationstandards is increasing by introduction of more sopisticated ard:are> Terefore9 it is not possible toa#e one ard:are module dedicated to one standard> !o9 it could be easily understood :y a systemcapable of andling se#eral standards at once and :it one time design before installing is abreaktroug> !oft:are Defined 6adio ut9 te main difficulty in tese protocols is tat mostof tem are using different data rates> Tis makes sampling rate con#ersion Amongte many solutions proposed in literature --9 -/9 -9 -9 -79 -H9 particularly one can mentionmultistage Finite Impulse 6esponse @onsidering multistage FI6 filter9 te main dra:back :ould be tegreat complexity of designing a generic system :orking :it all system standards> ?it respect topolypase FI6 filter9 te problem :ould rise up :en :e :ant to a#e a generic !6@> In tis case9uge amount of resource is reCuired>
Te Farro: structure is one of te solutions for integrating more flexibility into a digital system :ilea#oiding ig complexity> !ince Farro: introduced is system in 0une *H77 --9 te system as gone
troug a lot of impro#ement> Te polynomial filter based on te Farro: structure is an efficientsolution to perform !6@> In tis tesis9 a multimode TM4)9 using te Farro: structure9 isimplemented in FPGA9 :ic only needs one'time filter design beforeand> Also9 different band:idts:it different center freCuencies are obtained by some careful adJustments>
1.2 Purpose and Goals
In tis tesis9 a complete transmultiplexer Tis TM4) issupposed to simulate at least t:o cannels9 or say t:o users> To sum up te tasks for tis tesis; at tebeginning9 a finite :ord lengt analysis of te TM4) :as done to coose proper reali$ationparameters> A study on te reali$ation tecniCues :as also done to find efficient implementations> Also9
an effort as been spent to make sure tat system is reliable for at least t:o cannel communication andcould be easily expanded to more number of users> And finally a study on different applications of teFarro: structure :as done ranging from Digital'to'Analog @on#ertor to &ilbert transform>
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:
Figure 2.$ : !utput of Farrow Structure for ".%&
Figure 2.%: !utput of Farrow Structure for '".#
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In te rest of tis capter9 it is tried to co#er some of te latest applications found for te Farro:structure> 3b#iously non'uniform sampling co#ers great range of applications from image processingto different communication systems> !ome of te most recent publications is mentioned and re#ie:edere>
2." #pplication of Farrow Structure
2.".1 $iing S%nchroni&er
3ne of te applications of te Farro: structure9 is in Buadrature Pase !ift "eying &ere a recei#eddo:n'con#erted baseband I,B signals are sampled by a free'running clock :it te freCuency fs set to.6s9 :ere 6s denotes te sample rate> Te sampled signal is first passed troug a digital T,.'spaced!Cuare 6oot 6aised @osine Ten te output is fed to te interpolation'basedtiming reco#ery circuit :ic is used to adJust te timing offset> In tis part9 1on'Data'Aided Early'%ate'Delay
&
Figure 2.& : !utput of Farrow Structure for '".%&
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Figure 2.( : )ll Digital *+S, -eceier
Interpolation for timing reco#ery is te process of calculating one output sampley(kTi)at a time using aset of adJacent input samplesx(mTs)and a fractional timing offset kobtained from te timing control
unit> Te interpolation process can be expressed as follo:s ;
y kTi = i=N/.
N/.*
x [mi*Ts]h [ ikTs] /=
:ere kis #arying in te range '*9*=9 Tsis te sampling inter#al9 Tiis te output inter#al9 :ereas m iste largest integer for :ic mTs kTi >
In tis design9 interpolation is implemented as @ubic Interpolator9 :ic is a member of polynomial'based approximating interpolation filter9 and can :ork :ell in typical recei#er application .-> @ubicinterpolator can eiter use a %4T or online calculation> For online calculation ./9 tree FI6 filter :itfixed'tap coefficients is used :ic are independent of > Terefore9 tis structure uses less memory
tan te %4T #ersion>As so:n in Fig> .>79 te output could be calculated as ;
y kT={[ v8 kv. ]kv * }kv + =
4
A,D@on#erter
DigitalMatcedFilter
InterpolatorandDecimation
Pase 6eco#ery4nit
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Figure 2. : 0ubic Farrow nterpolator
According to =9 if te result of eac intermediate stage is not truncated9 longer number format isneeded to represent te output signal> According to .9 Cuanti$ation error introduced because oftruncation can be calculated as in =;
e=ev k8k.k*eqk.k*et =
:ere e is tetotal Cuanti$ation error9 evis te Cuanti$ation error of te input v(n), eq is te Cuanti$ationerror :it k and etis te Cuanti$ation error Just before te interpolatorKs output>
2.".2 'fficient Fractional (ela% )il*ert $ransfor Filter
As te eading implies9 anoter application of te Farro: structure is in te Fractional Delay &ilbertTransform Filter
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ck[n ]=*nc k[n ] n=+9>>>, n* *7=
Te resulting filter9 as depicted in Fig> .>H9 is called 5ariable Fractional Delayer 6otated 1otetat te difference in delays is to properly interlace filterKs coefficients>
Figure 2.# : loc3 Scheme of the FD45F mplementation
Te transfer function of te resulting FD&TF :it fractional delay of d=.* /. is;
H#DHT#z=k=+
N*
"kz. kjz*
k=+
N*
"kz.* /.k *H=
2.".3 'fficient Super+resolution ,age !econstruction
!uper'resolution is a metod of acCuiring a &ig 6esolution Tese effects can be expressed in te follo:ing eCuation 8* ;
y k=Dk"kMkxn k, k=*9>>>, $ .+=
:erex, is te ig resolution image9 yk, is te kt lo: resolution image9 Dk is te do:nsamplingoperator9 Mk represent te :arping or sift9 @krepresent te blur> Tere are tree steps in super'resolution reconstruction out of lo: resolution image 8* ;
registration ; Estimating motion parameters to align te %6 images to &6 grid>
Interpolation ; Generating pixels at te &6 grid
restoration ; @ompensating for blurring and noise presence>
In 8+9 it is assumed tat te motion parameters a#e been already estimated using a suitableregistration tecniCue9 and also te image Just a#e a pure translational mo#ement> According to 8.9for sift in#ariant blur9 matrices Mk and @kcan commute and *= could be re:ritten as ;
y k=DkM k"kxnk, *k$ .*=EC> .*=9 suggest tat one can perform deblurring and denoising after generating te &6 image>
As it is mentioned in 8+9 Milanfar in 8. propose a least sCuare tecniCue9 but it is computationallyintensi#e> 3b#iously9 te aim is to a#e a least sCuare tecniCue :it fast computation and lo: storagereCuirement>
11
5FD6@
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In order to get an efficient implementation for te reconstruction filter9 a>>9 1'*> In tis case ..= is expressible as ;
y 2& Tout=m=+
M
vm & Tout 8+=
:ere
vm& Tout=n=+
N*
k=
cm nxtkmn , & T outtk 8*=
In general :e can express tkas functions of output sampling inter#al as ;
tk= k&kTout 8.=
:ere &k is an index of te output sample tat occurs at or before kth input sample9 k is a fractionalinter#al tat determines te distance bet:een current kthinput sample and &kth output sample> Tus9 te
time #ariable of .-= become ; t=n*kTout 88=
:ic yields to ;
m n , & T outtk=*. km k=tk[
tk
Tout] 8-=
ased on tese eCuations9 te desired output seCuence of ya .>*8 8-> In tis structure;
"mz=n=+
N*
cm nzn
8/=
for m L +9 *9 >>>9 M are transfer functions of linear'pase FI6 filters satisfying te symmetry propertiesof 8*= 8H> Tese filters are :orking at te output sample rate of #out=* /Tout > All tese filters are:orking normally like oter FI6 filters except tis fact tat output sample of y2(&Tout) for te gi#en#alue of &, use te input samplesx(tk):itin te time inter#al of &*Toutt & T out >
1%
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Figure 2.12 : )nalog odel for the -econstruction Filter
Figure 2.1 : 5ransposed odified Farrow Structure
19
a
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Chapter3
3. System Oeriew o! a "#$%
3.1 ,ntroduction
In tis capter different components of a Transmultiplexer
3.2 -p(ownSapling
In te upsampling process9 te sampling rate is multiplied by a factor tat is usually an integer9 say L9and greater tan *> In our case9 Lis eCual to *.> Te reason beind tis number is tat9 tis tesis issupposed to be in accordance :it some earlier publication> In upsampling9 L6! $eros are addedbet:een eac consecuti#e t:o sample and te output becomes 9;
y n={x n
L i n=+9L ,.%,>>>
+ othe/4ise*
*=
In te freCuency domain *= can be re:ritten as;
7z=8zL .=
Tis so:s tat te :ole freCuency spectrum is compressed by L9 so tere are images tat must beremo#ed>
In te do:nsampling9 te process is te opposite> Te sampling rate is di#ided by a factor tat usuallyis integer and greater tan *> In do:nsampling9 one data is cosen out of M6! sample> Its outputseCuence according to 9 becomes ;
y n=x nM > 8=
?ic in te freCuency domain 9 becomes ;
7z= *
Mk=+
M*
8z*
M9 k
M -=
:ere 9M is defined as ej
.
M >
1&
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4nless te input signal is strictly bandlimited9 do:nsampling results in aliasing and terefore9 similarto upsampling9 a lo:pass filter is reCuired> Tis anti'aliasing filter must limit te band:idt of tedo:nsampler input as te original content of te signal can only be preser#ed if it is bandlimited to
M>
3.3 (igital Filters
Interpolation filter is a lo:pass filter tat is necessary after upsampling> Te reason beind tis lies inte fact tat except for te sample eCual to mL9 te rest of samples are not correct> Te correct #alues
are produced by applying te samples to an ideal lo: pass filter :it passband up to
L>
Tis lo:pass anti'imaging filter remo#es te extra images caused by te upsampler> Tus9 te timedomain expression for te output signaly(n)of Fig> 8>* can be :ritten as ;
y n= k=
x kh nkL /=
#i.u/e :*!1 ;nte/3o&2tion
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are also cascaded> Tis in turn :ould lead to a ne: filter :it a ne: transfer function9 say =(z)> Tus
te output seCuence of tey(n) after decimatingx(n)by a ratioM
Lcan be :ritten as
y n= k=
x kh nMkL =
In TM4) design9 tese filters also a#e anoter critical importance> Tey suppress te cannel cross
talk and make te o#erall transfer function bet:een te input and output9 an approximate unity> As it isdiscussed in !ection 8>/9 TM4) is better to be redundant9 tis means tat9 te le#el of cross talk andaliasing resulting from te rational !6@ is determined by te stopband attenuation of tese filters andtus can be easily suppressed to any desired le#el> Furter9 ignoring te rational !6@s9 it is :ell kno:ntat te transfer function from input to output is te $erot polypase component of #z# >z *>In order to a#e tis polypase component unity te transfer function of #z# >z must be a1yCuist filter>
3.3.1 /%0uist th+*and Filters
According to 79 a lo:pass non'casual filter is said to be Mt'band if one of its kthpolypase
component9 is ;
HkzM=
*M
7=
Furtermore9 te passband and stopband edges are9 respecti#ely9 gi#en by H;
c T=*
M H=
sT=*
M *+=
&ere Q is te roll'off factor and + R Q R * meaning tat te transition band sould al:ays contain
T=M
>
Furtermore9 te passband and stopband ripples are related to eac oter as
cM*s **=
In te time domain9 te impulse response of an Mt'band filter satisfies
hn ={ *M i n=+ ?+ i n=M ,.M, >>> *.=Tis means tat e#eryMthsample9 except te center tap is $ero :ic brings reductions in te numberof multipliers and adders reCuired to reali$e te filter>
Tere are many interesting matematical calculations for designing FI6 1yCuist filters summed up in*9 but tey are beyond te scope of tis tesis>
1-
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3." Fre0uenc% Shifting
&ere9 before :e pro#ide te antenna :it data9 usually :e are reCuired to sift te data in freCuencydomain9 so tat :e can transmit tem in appropriate freCuency band> Tis could be done :it a1umerically @ontrolled 3scillator Implementing suc a system :as beyond te scope of tistesis9 so it :as decided to a#e a #ery simple freCuency sifter> As te Fig> 8>8 so:s9 tis systembasically include t:o multipliers :ere one of tem as sinus and data as inputs9 :ile te oter oneas data and cosine as inputs> Te product of tis multiplication is later fed to a special block :osetask is to make a complex signal out of its inputs>
Figure . : -eal Data to 0omplex 0onerter
3n te recei#er side9 te generated complex signal9 :ill pass a block tat :ill produce te real andimaginary parts again 8>-=> Tese signals are ten multiplied :it cosine and sine respecti#ely9follo:ed by adding tem togeter> 3ne :ill a#e te reconstructed signal again> Te only importantmatter ere is tat attention sould be payed so sine and cosine must be in negati#e pase on terecei#er side>
Figure .%: 0omplex Data to -eal 0onerter
3.4 Coplete $-5 on Both Sender and $ransitter
Transmultiplexers a#e been part of digital communication systems for many years> Teir istoricalimportance in tis field lies in teir ability to con#ert from time multiplexed components of a signal toa freCuency multiplexed #ersion and back *+> Tis means tat tey allo: se#eral signals &o:e#er9 teir matematical representation supports more applications like canneleCuali$ation and cannel identification> Also9 in ** it is mentioned tat a filter bank and a TM4) areduals and te transposition of te dual analysis ,syntesis filter banks gi#es te dual TM4)>
In a TM4) different source signals9 say sk(n)9 passed troug te interpolation filters and multiplexedinto one transmit signal to producex(n)9 :ic according to Fig> 8>/9 can be represented as ;
28
@os
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xkn=i
ski kni$ *8=
Te filters#k(z) are also called pulse saping filters because tey take eac sample of sk(n) and put apulsek(n) around it **>
@annel is described as a linear'time in#ariant filter "(z)> In te recei#er side a set of analysis filtersHk(z) follo:ing te do:nsamplers :ill separatex(n) into te original signals of s kn >
According to *+9 because :e a#eM signals multiplexing into one cannel9 one sould design tissystem in a redundant manner> Tis system is a redundant transmultiplexer9 :en M users saring onecannel9 a#e te interpolation factor of $ @ M > In te case $=M te system is called minimaltransmultiplexer *+> Also9 it is :ort mentioning tat generally s kn is different from itscounterpartsk(n)because ofMu&ti6Ase/ ;nte/e/ence
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3.6 Farrow Structure
As discussed earlier9 te Farro: structure :ill cange te sample rate by adding or remo#ing samplesbet:een t:o consecuti#e samples> To explain te Fig> 8>9 it must be said tat in te case of
decimation9 te ratio ofTout
Tin3utis greater tan *> In tis example te !6@ is *>.9 and Tin is *> It could
be seen tat for te first sample . and it :ould be fed into te follo:ing systems> Tis could beeasily explained by considering .=9 and keeping in mind tat ere :ould be +>.> For te nextsample9 :ic is sample t:o9 :ould cange to +>-> Terefore9 sample .>- :ould be generated> Teinteresting and callenging point ere is for te tird case> Assume tat sample tree :ould be used9ten sample 8> sould be generated9 but for generating tis sample :e can not use te tird sampleitself9 because in tis case :ould be +> :ic :ould contradict tis fact tat '+>/R R+>/ so tesolution :ould be using te fourt sample and using as '+>-> Tis means tat one sample as beenJumped and it is not used at all> In !ection ->/>89 a detailed report on o: tis is implemented exists>
In case of interpolation9 one sould first pay attention to tis fact tatTout
Tin3utis smaller tan unity> !o
te number of samples generated9 :ould be more tan te original number of samples9 contrary to tecase of decimation>
In Fig> 8> !6@ is cosen to be +>> As te Fig> 8> depicts9 sample + is produced from itself> Forproducing sample +>9 sample * is used> Te interesting point is tat for producing sample *>.9 againsample * is used> For producing sample *>7 and .>- sample . is used> And ten again sample 8 is usedto produce its counterpart in te ne: generated signal>
22
Figure .& : Farrow Decimation
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Figure .( : Farrow nterpolation
3.7 Farrow Based $-5
Todays communication systems are extremely complex9 and tere is a tendency to e#en moresopisticated and complex ones> Tis :ill empasi$e on te role of a system tat can adapt itself9 toany communication standard> In -+9 it is stated tat @ode Di#ision Multiple Access !F and AF are composed of a parallel connection of number of brances -*> Eac branc isreali$ed by digital bandpass interpolators,decimators :ere in te case of uniform TM4)9 teband:idt and center freCuencies of te bandpass interpolators,decimators are fixed -.>
Multimode communication systems reCuire multimode TM4)s tat support different band:idt :icmay #ary :it time> Tis means tat users can occupy different band:idt at any time depending on:at is teir reCuired band:idt9 e>g>9 text9 audio and #ideo9 can take more efficient band:idt of tecannel> 3ne :ay to co#er tis increasing need is to construct blocks tat a#e #ariable parameters9like #ariable upsampling or do:nsampling ratios and bandpass filters :ic a#e #ariable centerfreCuencies and band:idts> ?e sould keep in mind tat as te number of modes increases9 tecomplexity of tese systems :ill also gro: and could e#en make it impossible to build or at least tereis not muc of financial interest in suc a system>
&o:e#er9 multimode TM4)s reCuire interpolators,decimators :it #ariable band:idts and centerfreCuencies -.> Tese blocks can be constructed using #ariable upsamplers Altoug9 tere is tisproblem of gro:ing complexity :it increasing number of modes> As an example9 one may need toa#e suc a ig interpolation or decimation factors9 to obtain te desired band:idt and centerfreCuency9 tat may make te system impossible to implement> A solution to tis problem is introduced
23
.. .
..
0
1
2
3
.. .
.
0.6
1.2
1.8
2.4
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in -89 tis structure utili$es fixed integer !6@ blocks9 Farro:'based #ariable interpolation anddecimation structures9 and #ariable freCuency sifters> Tis TM4) is capable of generating a large setof user'band:idt and center freCuencies :it relati#ely simple building blocks> Anoter ad#antage oftis system is tat te filters in#ol#ed in tis structure sould be designed Just one time beforeand9 andall te possible combinations of band:idt and center freCuencies are ten obtained by properlyadJusting te delay coefficient of Farro:'based filters and te #ariable parameters of freCuency sifters>
As depicted in Fig> 8>79 an upsampling by Lis done follo:ed by a lo:pass filter> As users can a#eband:idts tat are rational multiples of te granularity band9 te Farro:'based filter performsdecimation by rational #alues> To place te users in appropriate positions in te freCuency spectrum9#ariable freCuency sifters are utili$ed> Finally9 all users are summed for transmission in te cannel> Inte AF9 te recei#ed signal is first freCuency sifted suc tat te desired signal can be processed inte baseband> Ten9 a Farro:'based interpolator by te same ratio
#i.u/e :*B 1 $/o3osed mu&timode TMA8 consistin. o ixed inte.e/ S'", v2/i2
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!ince EP.@8/ and enoug of oter ard:are :as a#ailable on te DE. board9 tis board :as used intis tesis> 3ter board dependent ard:are tat :as used in tis tesis is toggle s:itces tat :ereused to gi#e te #alue of from te outside> Also tese s:itces could be used later for te sake ofpro#iding rational 6p>
@yclone II as embedded multipliers optimi$ed for ea#y calculations like FI6 filters or fast Fouriertransform Maximum si$e of teir input is *7'bit so tey can be used eiter as one *7'bitmultiplier or as t:o independent H'bit multipliers>
Tese multipliers can operate at te speed of ./+ M&$
Table ->. gi#es a brief comparison of te number of a#ailable multipliers in different de#ices in tisfamily>
De#ice Embedded Multiplier @olumns EmbeddedMultipliers HUH Multipliers *7U*7 Multipliers
EP.@/ * *8 . *8
EP.@7 * *7 8 *7
EP.@*/ * . /. .
EP.@.+ * . /. .
EP.@8/ * 8/ + 8/
EP.@/+ . 7 *. 7
EP.@+ 8 */+ 8++ */+5able %.2: 8umber of ;mbedded ultipliers in 09clone Deices T:o signals9 si.n2 andsi.n A logic K*K for si.n2 :ill so: tat te numberon input port of A is signed and a logic K+K :ill so: tat te number is unsigned *> 6esult of
2:
Figure %.1: D;2 09clone oard
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multiplication :ould be signed if eiter of te input is signed> Table ->8 summari$es te abo#ediscussion>
DATA KAK DATA KK 6esult
4nsigned 4nsigned 4nsigned
4nsigned !igned !igned
!igned 4nsigned !igned
!igned !igned !igned
5able %.: ultiplier Sign -epresentation
".3 Software
For tis tesis9 5&D% :as used as te programming language> Also9 Te Mat:ork !imulink :as usedfor its strong ability in grapical representation of te results and its full compatibility :it Altera IPcores like Vmegacore functionsW :ere Cuite interesting for tis tesis> Especially9 te megacore for FI6
filter implementation :as used in tis tesis> Also9 data :as sa#ed in a #ery comfortable :ay andcompatible :it te MAT%A9 :ic later :as used for obser#ing te outcome>
"." Practical ,ssues for Filter ,pleentation
Filter implementation as been in te center of focus for decades no:> ot FI6 and II6 filters are #eryimportant according to teir applications> !ince tey consist of sub'blocks like multipliers and adders9most of te ne: designs are more focused on tese building blocks9 like structures tat are more po:erefficient or tose :it lo:er delay and iger trougput> !pecifically9 multiplication is #ery importantbecause it is costly and #ery energy consuming> For tis reason9 resource saring is #ery common indigital design9 :atKs more tese elements can be seCuentially or in parallel implemented> Te
implementation policy depends on te design strategy9 also implementations tat are multiplier'less area#ailable>
!imilar circumstances exist in 5%!I :ere te cip area9 and po:er consumption are important> At tesame time9 limited registers lengt is imposing te problem of finite precision> In fact9 systemperformance may be igly degraded because of tis effect> To fit a transfer function of a digital systemin a digital ard:are9 one :ill need to digiti$e te system> In case of digital filter9 for example9 onesould digiti$e inputs9 outputs9 coefficients9 etc> At te first step one sould determine te input :ordlengt and filter coefficient to make sure tat minimum ard:are is used but still a reasonably goodoutput is produced> In case amplitude Cuanti$ation is done uniformly9 !16 is increased by d foreac additional bit9 tis means tat if :e a#e *+ bit :ord lengt for our input :e a#e about + d*> Buanti$ation of filter coefficients can de#iate $eros and poles from teir original place and
produce a totally ne: transfer function> Tere are se#eral algoritms to minimi$e te Cuanti$ationeffects9 :ere most of tem are based on tis fact tat not all te coefficients a#e te same effect onte output>
In *79*H9.+9 tere are tree different no#el metods introduced for coefficient Cuanti$ation>@oefficient minimi$ation is usually done by comparing te output of te Cuanti$ed #ersion :it anideal case In
2&
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In tis core9 one can eiter design te filter from scratc or load te filter coefficient as a >txt file ..>Te FI6 compiler contains a coefficient analysis tool9 tat can perform operations like scaling> T:oKscomplement and signed binary fractional notation are supported in tis core>
4sing tis core9 one can specify te number of output bits e :ants to a#e> (ou can also lea#e tis tote core itself9 so it :ould recommend for full precision o: many bits is reCuired ..> Tere arese#eral arcitectures supported in tis compiler like;
Fully Parallel !tructures ; Tis structure :ould be useful for maximum trougput>
Fully !erial !tructures ; Tis structure :ould be for te case te minimal area is reCuired>
Table ->-9 summari$es te trade'offs bet:een tese t:o arcitectures
'echnolog( ption Area #peed6'hroughput7
+istributed arithmetic "ull( Parallel >arge Area Creates a !aster !ilter
+istributed arithmetic "ull( #erial #mall Area $e5uires multiple clock c(cles !or a singlecomputation
5able %.%: )rchitecture 5rade'!ffs
2-
Figure %.: )ltera >enerated F- Filter for Sender
Figure %.%: )ltera >enerated F- Filter for -eceier
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Parameter Description
Data !torage !pecifies te de#ice resources used for data storage> (ou can select %ogic @ells9 M/*.9 M-"9 M'6AM9 M%A9MH"9 M*--"9 or Auto> If you select Auto9 te Buartus II soft:are may store data in logic cells or memory9depending on te resources in te selected de#ice9 te si$e of te data storage9 and te number of input cannels>
@oefficient!torage
!pecifies te de#ice resources used for coefficient storage> (ou can select %ogic @ells9 M/*.9 M-"9 M%A9 MH"9or Auto> If you select Auto9 te Buartus II soft:are automatically selects te most appropriate memory block si$efor te selected de#ice>
Te option list canges depending on :ic de#ice you select> !electing embedded memory reduces logic cellusage and may increase te speed of te filter>
5able %.$: Full9 Serial Filter )rchitecture (ou can select %ogic @ells or Auto> If you select Auto9 teBuartus II soft:are may store data in logic cells or memory9 depending on te resources in te selected de#ice9 tesi$e of te data storage9 and te number of input cannels>
@oefficient!torage
!pecifies te de#ice resources used for coefficient storage> (ou can select %ogic @ells9 M/*.9 M-"9 M%A9 MH"9or Auto> If you select Auto9 te Buartus II soft:are automatically selects te most appropriate memory block si$efor te selected de#ice>Te option list canges depending on :ic de#ice you select> !electing embedded memory reduces logic cell
usage and may increase te speed of te filter>
5able %.&: Full9 +arallel Filter )rchitecture Tis compiler support signed and unsigned fixed'point numbersfrom - to 8. bit :ide in t:oKs complement and signed binary fractional formats>
Tere are also se#eral coefficient scaling metods a#ailable in tis compiler ..;
Auto !cale>
Auto !cale :it a po:er of .>
Manual>
!igned inary Fractional>
1one>
In VAuto !caleW approac9 since te coefficients are represented by a limited number of bits9 it ispossible to multiply all te coefficients by a gain factor so te maximum coefficient #alue becomes tebiggest possible #alue for te representation :it tose bits> Tis approac produces coefficients #alues:it te maximum signal'to'noise ratio ..>
Finally9 a list of signals a#ailable on te module is brougt ere;
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!ignal Direction Description
resetXn Input !yncronous acti#e lo: reset signal> 6esets te FI6 filter control circuit on te rising edgeof clk> Tis signal sould last longer tan one clock cycle>
astXsinkXready 3utput Asserted by te FI6 filter :en it is able to accept data in te current clock cycle>
astXsinkX#alid Input Asserted :en input data is #alid> ?en astXsinkX#alid is not asserted9 te FI6 processing isstopped if ne: data is reCuired and no data is left in te A#alon' !T input FIF3> 3ter:ise9
te FI6 processing continues>astXsinkXdata Input !ample input data>
astXsourceXready Input Asserted by te do:nstream module if it is able to accept data>
astXsinkXerror Input Error signal indicating A#alon'!T protocol #iolations on te sink side; ++; 1o error
+*; Missing !3P
*+; Missing E3P
**; 4nexpected E3P3ter types of errors are also marked as **>
astXsourceX#alid 3utput Asserted by te FI6 filter :en tere is #alid data to output
astXsourceXdata 3utputFilter output> Te data :idt depends on te parameter settings>
astXsourceXerror 3utput Error signal indicating A#alon'!T protocol #iolations on te source side; ++; 1o error
+*; Missing !3P
*+; Missing E3P
**; 4nexpected E3P3ter types of errors are also marked as **
5able %.(: Signals
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:ould be responsible for letting te buffer to sift data seCuentially to te rigt or perform te reCuiredsifting :it te generatedaddress in te center tap> Tis block ad se#eral complex problem to sol#e>Te first problem :as to make sure tat is correctly generated> Te codes belo: describe o: isgenerated in 5&D%>
In te first section of te code in Fig> ->9 toggle s:itces are introduced for pro#iding te desired !6@ratio from te board> &ere9 fi#e bits are used for integer part and fi#e for fractional part> A K+K is
concatenated at te beginning to make sure tat te number :ould be interpreted as a positi#e numberin later calculations> It is :ort mentioning tat in tis #ersion of 5&D%9 most of te operations arealready introduced for signed number calculations> Terefore9 it is preferred to a#oid furtercomplications for introducing o:n':ritten code for multiplier9 for example> Te second part of tecodes in Fig> ->9 represent te buffer :ile te follo:ing section pro#ides a mecanism to make suretat te buffer is filled enoug :it samples>
Anoter fact about is tat it canges periodically according to te !6@ ratio> It means tat dependingon te ratio after eac -9 79 *9 8. or - samples start o#er 7=> In section tree of te codeabo#e9 a period of * samples as been cosen> Te signal VcounterXsigW is responsible for counting tenumber of incoming samples and it :ould be reset after eac * samples> It :as assumed ere tat :iteac rising edge of te clock9 one sample comes inside te buffer> In te fift part of te code9 it couldbe obser#ed o: is generated> To explain more9 for calculating t:o #ariables are needed9 erenamed as VmtlXsigW and VnmXsigW> Te VmtlXsigW is responsible for olding te product of samplenumber in ratio
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6atio L *>/ H 7 ; Examples of Periodic
Anoter callenge to meet and maybe te most important of tem is to make sure tat te reCuiredsample is at te center tap at te rigt time :ic conseCuently means tat samples on its rigt and leftsides are also at te rigt place at te rigt time> For tis9 :e a#e to make sure tat :e a#e sufficientnumber of samples a#ailable> Terefore9 a rater large buffer is created> efore tis block starts
:orking9 it :ould :ait until it make sure tat te buffer is filled enoug so te reCuired sample number:ould definitely exist to be passed immediately> 3ter:ise it :ould Just simply produce :rong result>
"igure %.& Part o! the Code !or Implementing the "arrow #tructure
Anoter interesting callenge ere :as tat at te #ery beginning9 :en for example sample one souldbe in te center tap ten samples prior to it :ould not exist> To sol#e tis problem :e decide to a#e *Hextra registers and :en gi#ing te address9 simply add te address :it *H> In fact9 in tis process :esift te te beginning of te buffer> Te #alue of *H9 is alf of te filter order
All te structures a#ailable for digital filters a#e registers in teir implementation> Tis is to make suretat signal :ould remain constant enoug for te multiplier before it as a transition because of tenext sample arri#al>
In our design9 :e a#e se#en FI6 filters> Also9 :e kno: tat in our design data from te buffer istransferred to all of te filters at te same time> Tis means tat data on te center tap of te filters ateac instant of time and data on its left and rigt :ings are te same> Terefore9 to make te designreali$able and also more area efficient9 it :as decided to a#e one set of registers for all of te filters>!ince for our design9 Vdirect formW :as cosen for te FI6 filters tis :as Cuite easy to reali$e> Figures->7 and ->H depict tis fact>
3%
fi!%us_out_38
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As Figs> ->7 and ->H so:s9 in our design :e Just mo#e te registers up:ard and use one set of registersfor all of te filters>
".4." Fre0uenc% Shifters
For implementing te freCuency sifter9 some assumption :as made> It :as noticed tat data input didnot include any complex part9 also te filters are real filters but te output of tis block must be incomplex format> In te sender9 Euler formula of
ejn
=cosn jsinn 8=
:as used to generatee
jn >
39
Figure %.1": loc3 Diagram of Fre@uenc9 Shifter
Figure %.# : Direct Form Filter -ealiAation in Farrow
Figure %.: Direct Form -ealiAation of an 8th'order F- Filter
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".6 ,pleentation !esults and Coparison
As it is mentioned in capter 89 tis tesis is done in accordance to a pre#iously defined P>D> tesis atte Department of Electronics !ystems9 %inkping 4ni#ersity> Tere are se#eral filters :it differentorder designed in tis tesis> 3ne sould expect to a#e better system performance by increasing teorder of FI6 filters> Altoug9 uge effort :as spent9 filters of order iger tan 8-H9 :ere notsuccessfully generated by Altera lock !et> Tis :ould be important issue :en one tries to comparete results of different systems> Disappointingly9 Altera lock !et doesnKt let us to a#e more tan four
IP core on eac design9 tis means tat :e :ere not able to simulate te :ole system for more tant:o cannel>
In tis !ection9 te performance of TM4) implementations :it filters of order ..9 8.- and 8-H As te numbers on te Figs> ->*8'->* so:s9 tere is nosignificance difference bet:een tese results> In all of tese figures9 te solid line represent te input9:ic is a single tone9 and te dotted line represents te output> Figures ->*8 and ->*- belong to tefirst cannel9 :ile Figs> ->*/ and ->* are for te second cannel>
Figures ->*'->.+ so:s te obtained results for a t:o'tone input> 3ne can easily conclude tat9 sincetere is not a uge difference in filters order9 tere is not a significant difference bet:een tem> Fig>->.* is put ere9 Just to mention9 tis system :ould not :ork good enoug :it filter order of .> Ascould be seen in tis figure9 te second tone is completely lost9 comparing :it te noise next to it>
3&
Figure %.12: -eceier Fre@uenc9 Shifter mplementation
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#i.u/e *! 1 'esu&t o/ the #i&te/ 4ith :%E "oeicients
34
Figure %.1 : -esult For the Filter with %# 0oefficients
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"igure %.19 #econd Channel $esult "or the "ilter with 3%- Coe!!icients
"igure %.1: #econd Channel $esult "or the "ilter with 329 Coe!!icients
3-
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Figure %.1( : 5wo 5one 0hannel -esult For the Filter with %# 0oefficients For 0hannel !ne
Figure %.1 : 5wo 5one 0hannel -esult For the Filter with %# 0oefficients For 0hannel 5wo
%8
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Figure %.21 : 5wo 5one 0hannel -esult For the Filter with 22( 0oefficients For 0hannel one
%2
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Chapter &
4. Conclusion and Future 8orkIn tis tesis9 nonuniform flexible TM4) as been implemented in FPGA> Tese TM4)s can supportmultimode dynamic communication scenarios and are easily reconfigurable> Furtermore9 tey reCuireneiter redesign of filters nor ard:are canges> !pecifically9 te TM4) filters are designed only once>For tis TM4)9 te coefficient must be kno:n> Tere are t:o :ays possible for a#ing te #alue of> First one9 is to a#e a %4T Teoter :ay9 is to calculate it online according to stream of data>
FI6 filters used in tis design are implemented using Altera D!P builder> A 5&D% code is importedusing V&D% ImportW block> 4nfortunately9 te resources used on te FPGA are not so:n because ofsome bugs in te Altera D!P builder> In capter -9 it is so:n tat9 tis structure could not be
implemented using less tan 8+* coefficients :it te settings pro#ided in te implementation> Also9 inte same capter it is concluded a better system performance could be obtained using iger order FI6filters or a#ing less truncation and rounding in te system>
Additionally9 a troug re#ie: of !6@ is brougt in capter . and 8> Also9 in capter .9 a rater detailre#ie: of Farro:'based systems is pro#ided>
For future :orks9 it is recommended to a#e te Farro: structure built based on online calculation of 9because tere are rising applications of tis structure in digital systems and it :ould be costly to a#e itsa#ed on %4T>
%3
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%%
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