FTF-IND-F0414 - Multi-core processing for Safe and Secure ... · SMP, AMP, and Virtualization ... Network node consolidation • Routers adding appliance services • ... Firewall

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Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2009.

FTF-IND-F0414 - Multi-core processing for Safe and Secure Industrial applications

Solutions from Freescale

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2009.

© 2009 Wind River Systems, Inc. The Wind River logo is a trademark of Wind River Systems,Inc,. And Wind River and VxWorks are registered trademarks of Wind River Systems. Inc. 03/09

Agenda

Trends

Case Studies and Summary

Power Architecture Multi-Core technology

Software Components

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Agenda

Trends



Software Components

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Vision:

Global leadership ininembedded processing and

connectivity solutionsLeadership in chosen markets/sub-segments

– Target markets: Automotive, Consumer, Industrial, Networking, Wireless

– Target position: #1, #2 or #3 in all chosen segments

– IDC ranks Freescale #1 in Power Architecture communications market at 52% and predicts that comm processors will outperform other networking silicon categories – Jan 20, 2009

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You touch us every day.

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A New Era Where Every Connection Matters

• Architecting the next wave of collaboration– Friend-to-friend, supplier-to-consumer, peer-to-peer– Rapid service introduction and flexible implementations, assured security and

privacy• Delivery of a seamless new service experience:

– Grows with our preferences, behaviors, and capabilities– Flexibility to craft, integrate, and introduce new services that enhance our

productivity and collaboration.

At HomeRicher Consumer Experience

In the OfficeImproved Business Productivity

On the RoadGlobal Mobility

Application complexity drives scalable software-based solutions that preserve and extend the user experience through new services.

Presenter

Presentation Notes

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The Industrial Market - Trends

Transportation

Power / Energy

MedicalControl Automation

Process Automation

OpenessConsolidationConnectivity

Safety / Security

Aerospace

DO-178B/254

IEC61513

IEC61508

IEC61511CDRH938,585

CENELEC-5012

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• Multicore Adoption– Choice: SMP, AMP, and Virtualization– Performance & Scalability

• Offload strategies• Improved separation, safety,

and security

Technology Enablers

Challenge: Balancing Business & Market Demands

Market DemandsBusiness Constraints

• Time-to-market pressure• Price erosion• Fewer resources• Lower cost• Government Regulations

Business Constraints• Increased functionality• Lower SWaP• Lower operations cost• Increased safety and

security

Market Demands

Business Drivers & Benefits1. Performance: Throughput, Scalability, Power2. Cost: Consolidation, Migration/Evolution (Reuse), Safety and Security Certification3. Robustness

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Agenda

Trends

Software Components



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The Right Core Matters for Multicore• Frequency does still matter

• Higher efficiency (IPC) means higher performance

• Cache size impacts performance

• Cache “stashing” and warming

• Hypervisor hardware

• Floating point is useful in many applications

• Performance monitoring and instruction trace are keys to debug

I-FetcherDispatch Unit

BranchUnit

IntegerUnit (2)

Ld/StUnit

GPR

CompleteUnit

e500mc Core

APUs

e500mc Core Complex

MMUD-Cache/

SRAM (32KB)

I-Cache/SRAM(32KB)

Processor Interface Unit

12812864WriteRead-2Read-1Address

FPU

Presenter

Presentation Notes

There is clearly a trade-off between the complexity of individual cores (big core vs little core) and the number of cores you can fit on a target die size (power/cost). There is also a trade-off with regards the parallelization which can be achieved in networking applications, particularly for integrated control and dataplane implementations. Until multicore software development methodologies and tools catch up, having higher performance cores will be of benefit in networking applications. Higher frequency cores are still required in networking applications to run control and management plane applications, which are quite difficult to parallelize. Single chip control/data plane processor (combining control and data plane on a single chip) drives the need for higher frequency CPU cores. Control plane software has fewer computations and more conditional branches than typical applications. The size of the caches are a trade-off between die size, performance, memory bandwidth, latency and power. Doubling L2/L3 cache sizes has been proven to have significant performance impacts (50% increase) in networking control applications. Backside L2 caches integrated on the CPU core can provide substantial reductions in latency for critical code and data, as opposed to only having shared frontside caches. Cache stashing and warming – ability to place I/O data (packet headers) and packet context information (frame data, buffering and queueing information) into the L1 and L2 caches in order to reduce the latency when accessing this data during packet processing. Hypervisor hardware allows for efficient implementation for hypervisor software and partitioning. Floating point is often used in military/aerospace and industrial applications as well as in other networking applications (packet schedulers, traffic shaping). Debug hardware – performance monitor counters (cache hit rate, instructions executed, etc.) and instruction trace

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Why Multicore – Network Integration and Consolidation

• Service providers and enterprises are looking to reduce power and cost

• Network node consolidation• Routers adding appliance services• Discrete devices being integrated into

single SoC, driving system cost down• Multicore processors becoming a true

networking “system on a chip”

SSL TerminationIPS

WAN OptimizerFirewall

Integrated Service Switch

Server Load Balancer

Secure Load Balancer

IntegratedAccess Router

CPUCPU CPUCPUCPUCPU CPUCPU CPUCPU CPUCPU

AccelAccel I/OI/O I/OI/O AccelAccel

DR

AM

DR

AM

DR

AM

DR

AM

DR

AM

DR

AM

DR

AMD

RAM

DR

AMD

RAM

DR

AMD

RAM

Shared Bus Shared Bus

Shared Bus Shared Bus

DR

AMD

RAM

DR

AMD

RAM

DR

AMD

RAM

Bridge

Bridge

Bridge

Bridge

I/OI/O I/OI/O

Accel

Accel

I/OI/O I/OI/O

Accel

Accel

Presenter

Presentation Notes

Significant cost, power and space reductions are required in future networking equipment. Access to communication services will be available practically everywhere. However, this objective can only be realized in the emerging markets if the devices and services are affordable. This is a challenge for the industry, that also presents a huge opportunity. Multicore can help to drive down the network equipment costs. Collapsing multiple discrete functions in the network which are now implemented as separate “appliances” into a single network element. Move to all IP creates QoE and Security concerns. Systems where there used to be multiple, standalone CPUs (on a single board or across multiple boards in the system) are being consolidated onto multicore devices. An example of this is wireless basestations. Multicore processors targeted at networking are “systems on a chip” – integrating multiple CPU cores, network I/O and hardware accelerators. Essentially taking functionality that was previously implemented on a board or multiple boards and integrating that into a single device/chip. “Silicon is cheaper than copper”

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Platform Interconnect is Critical to Delivering Multicore Scalability• Multicore interconnects must address:

– Scalability of CPU cores, memory and I/O bandwidth– Flexible inter-processor communication programming models– QoS differentiation for control/data plane and network traffic– Efficient memory subsystem, including caching and hardware coherency

• The CoreNetTM interconnect fabric on the QorIQ™ P4080 addresses the scalability needs of multicore processors

P4080

Read Bandwidth

1 core 2 cores 8 coresP4080

Agg

rega

ted

inte

rface

ban

dwid

th (M

B/s

)

Presenter

Presentation Notes

To address the issue of performance scalability for the multicore SoC interconnect, Freescale has designed the CoreNet interconnect fabric for the P4080 Concurrent, non-blocking fabric, enabling multiple simultaneous transactions at the same time. Read bandwidth shows scalability of fabric based platform – 2.0x for 1 to 2 cores and 7.4x for 1 to 8 cores. These bandwidths were achieved without increases in access latency over a single CPU core. Flexible inter-processor communication Programming models: shared-memory, process-to-completion, message-passing, pipelined The challenge in implementing a fabric which supports hardware coherent chip-wide caches. CoreNet supports up to 102.4 Gbps read and write bandwidth on a per port/core interface. CoreNet is scalable up to minimum of 32 CPU cores.

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Power Architecture® Technology Platform RoadmapD

ecre

asin

g Po

wer

Increasing Performance, Reducing Power

Increasing Performance (Frequency, System Performance)

PowerQUICC® I

PowerQUICC II

PowerQUICC II Pro

PowerQUICC III

MPC86XX

QorIQ™ P1platform

QorIQ P2platform

QorIQ P3 platform

QorIQ - T1platform

QorIQ - T2platform

QorIQ - T3platform

QorIQ – T4platform

QorIQ P4platform

QorIQ P5platform QorIQ - T5

platform

Incr

easi

ng P

erfo

rman

ce

QorIQ - X1platform

QorIQ - X2platform

QorIQ - X3platform

QorIQ – X4platform

First Generation45 nm

Second Generation32 nm

Third Generation22 nm

QorIQ – X5platform

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Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2009. 14

In the News: Three 45 nm SOI Products – Sampling Now

PowerQUICC® MPC8569Flip chip PBGA130 M transistors>1B vias and contacts

PowerQUICC® MPC8569Flip chip PBGA130 M transistors>1B vias and contacts

StarCore® MSC8156 DSPFlip chip PBGA0.5 B transistors2.5 B vias and contacts>2 miles of interconnect

StarCore® MSC8156 DSPFlip chip PBGA0.5 B transistors2.5 B vias and contacts>2 miles of interconnect

QorIQ™ P2020 Wire bond TEPBGA-II ~100 M transistors>1B vias and contacts

QorIQ™ P2020 Wire bond TEPBGA-II~100 M transistors>1B vias and contacts

• Six 1 GHz SC3850 DSP cores with MAPLE-B baseband accelerator

• Designed for next-generation wireless standards (LTE, WiMAX, HSPA+ and TDD-LTE)

• Currently sampling

• Single 1.33 GHz e500 core with quad core QUICC Engine™ modules

• Designed for broadband access equipment


• Dual 1.2 GHz e500 V2 processor cores

• Designed for networking, Industrial wireless infrastructure and telecommunications architecture


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Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2009. 15

45 nm SOI Process – Power Savings• Provides 50% savings in static and

dynamic power over 90nm SOI• SOI provides lower Ceff, allowing

improved performance/power trade-off• Multi-VTH transistor options

–Multiple performance/power transistor options available

–Design flow and tools make use of Multi-VTH transistors to optimize performance/leakage

• Transistor and gate-oxide optimization–Optimization of transistor and gate dielectric provides reduced static power

15

FSL 90SOIFmax = 1.33GHz

PWR = 11 W


PWR = 6.6 W

90SOIVdd=1.0V

45SOIVdd=1.0V

Freq= +15-20%Pwr = -35-40%

Freq= 0%Pwr = -50%


PWR = 5.5 W

45SOIVdd=1.0V

or

Example of power savings for a “typical” PowerQUICC® product

Presenter

Presentation Notes

quotes

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Power Architecture® Product RoadmapD

ecre

asin

g P

ower

Scaleable Price, Performance and Features for your Applications

Increasing Performance

PowerQUICC® I

PowerQUICC II

PowerQUICC II Pro

PowerQUICC III

MPC86XX

QorIQ P2

QorIQ P4

PQI Platform (16 Families)* 50 to 133MHz* <1W * QUICC, 100bT, USB,

PQII Platform (15 Families)* 603 core (166 to 450MHz)* < 1W to 2.8W* CPM, 100bT, USB, PCI, Encryption

PQII Pro Platform (13 Families)* e300 core (266 to 800MHz)* < 2W to 6W* QuiccEngine, GbE, USB, PCI * PCI-e, SATA, DDR2, IEEE 1588

PQIII (12Families)* e500 core (667 to 1500MHz)* < 4W to 17W* Single and Dual Core * GbE, USB, PCI, PCI-e, DDR2/3,

Encryption, RIO

e600 SOC (5 Families)* e600 core (800 to 1500 MHz)* Backside L2 256K to 1MB* Single and Dual Core * GbE, USB, PCI, PCI-e, DDR2, sRIO

Incr

easi

ng P

erfo

rman

ce

QorIQ P3 platform

QorIQ P1

QorIQ P2 (2 Families)* e500 core (800 to 1200 MHz)* Single and Dual Core* GbE, PCI-e, DDR2/3, IEEE 1588* Encryption, SPI, SD/MMC

QorIQ P1 (2 Families)* e500 core (533 to 800 MHz)* Single and Dual Core* GbE, PCI-e, DDR2/3, IEEE 1588* Encryption, TDM. USB

QorIQ P4 (1 Family]* e500 core (1000 to 1500MHz)* 8 Cores, Tri-level Cache* GbE, PCI-e, DDR2/3, IEEE 1588* Encryption, Hypervisor

QorIQ P5 platform

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QorIQ™ P1 Platform

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QorIQ™ P2 Platform

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QorIQ™ P4080 Block Diagram

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Agenda

Trends

Software Components



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Multicore Operating System

Hypervisor

Optimized High-Speed Drivers

Applications

Freescale QorIQ SiliconPerformance Model

QorIQ™ Platforms Ecosystem

Simulation to Hardware: Same Software

Freescale-supplied SDK items

Functional Model APIID

E (compiler / debugger / build tools)

Simics® Virtualized Development Environment

Multicore Operating System

Hypervisor

Optimized High-Speed Drivers

Applications

Multicore enablement

Presenter

Presentation Notes

Freescale’s assumed requirement is that the cores will be able to run mixed sets of operating systems per core, both AMP and SMP with no restrictions on which cores run which OS for which purpose. Pre-silicon software development: Customer integration of code before we have silicon. Hybrid simulation environment offers fast-functional or slower simulation environment. In “real world” – hybrid model can capture race conditions, counting cycles from customers. Partners like MontaVista, Wind River and Green Hills offer tools that customers use to work on top of Freescale simulation model. We are currently working with partners, teaching them advantages of Freescale silicon. Overall: Enabling customers pre-silicon software development using partner relationships. Question: How would the example change in a high-end Switch (e.g., Cat6K). We suspect data plane cores would be more focused on exception processing and upper layer services. Is this correct? Question: We anticipate supporting only a single OS per core. Does this match your anticipated usage model? Do you expect to want to run more than one OS per core later on, perhaps on lower-end derivative products?

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Single Board Computer Partners Subset of a comprehensive partner ecosystem

COM-express ATCA Blades AMC Compact PCI PMC’s

ATCA AMC COM- express

Compact- PCI VME PMC’s ATX,uATX

Freescale

Actis

KONTRON

Emerson

EuroTech

GE Fanuc

Interphase

Mercury

Radisys

TQ Embedded

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In The News: Curtiss Wright Adopts QorIQTM Processor

• Announces plan to develop a family of rugged, single board computers (SBCs) based on Freescale’s QorIQ P4080 eight-core communications processor

– SBCs are engineered to leverage the flexibility – Security enhancements– Providing a trusted computing environment even in harsh military and aerospace

applications. • “The performance, low-power operation and robust functionality of

Freescale’s QorIQ P4080 device takes embedded multicore processing to entirely new levels,” said Lynn Patterson, vice president and general manager of Modular Solutions, Curtiss-Wright Controls Embedded Computing.

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In The News: GE FANUC Adopts QorIQTM Processor

GE Fanuc Intelligent Platforms Announces Plans for new Products Based on Freescale™ QorIQ™ Processors

Will feature in VME-based, 3U VPX-based, 6U VPX-based, 3U CPCI-based single-board computers Support for eight core P4080 and dual core P2020 processors

“ . . . a growing family of Power Architecture platforms that have enabled our customers to take advantage of the latest processing technologies, keeping their systems at the leading edge of performance with minimum integration effort, and minimizing long term cost of ownership,” said Peter Cavill, General Manager, Military & Aerospace Products, GE Fanuc Intelligent Platforms.

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Agenda

Trends

Software Components



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Kernels

Operating Systems

Operating System Platforms

Industry-Specific Platforms

Device-Specific Platforms

VxWorks, Wind River Linux

VxWorks, Wind River Linux

Cert, ARINC 653

Platform for Network Equipment,Platform for Industrial Devices,Platform for Consumer Devices

Mobile, Infotainment

Dev

elop

men

t ...

......

...

Life

Cyc

le M

anag

emen

tHow Wind River Can Address Challenges and Trends

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QorIQ QorIQ

Enabling Software

QorIQ

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Safety Solution – Automation, Medical, Transport (IEC61508 / CENELEC 50128, FDA, IEC62304)

VxWorks

Automation Platform (SIL2)

Transport (SIL2)Driver Desk

VxWorks PIDSOAP, XML, OPC, CAN

Automation or Transport IEC 61131-3 + Customer

Control/Safety Applications

External Communication, Lightweight SCADAIntegrated Graphics, Consumer Connectivity

KW-SW, Acontis,Rockwell, TilconWind River Partner ECO System

VxWorks 6.6 CERTIEC 61508

Safety & Control

Medical Safety Applications

Freescale QorIQ

Core 0 or Core 0 . . n

Linux (PCD, GPP) or VxWorks

Esterel

Medical Therapy (Class 2-3)-NA Driven – FDA 510(k)

-EMEA Driven – IEC 62304

Safe and Secure Applications

VxWorks

VxWorks 6.6 CERTDO-178B

Safety & Control

SIL 1/SIL 2 -Time Separation

LinuxBT, WiFi, Consumer

Connectivity

OR

Tilcon

Non-Safe Applications

WRS Hypervisor

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20 Years of Communications Processing Evolution

GPON processorIntegratedDSP + Power core

PowerQUICC II603e Power core

Security integration with PowerQUICC line

QUICC Engine™Next-gen CPM / dual RISC engines

First PowerQUICC®

communications processorsIncludes Communications Processor Module (CPM)

QUICC® MC6836068K core

MC68302 68K core

Dual-core with integrated content processingMPC8572E with e500 Power core

Dual-core processorMPC8641D with e600 Power cores

PowerQUICC IIIe500 Power core

PowerQUICC II Proe300 Power core

AIM AllianceStarted 1991 First silicon 1992

PowerPC®

603e

Power Architecture™ Host ProcessorsMPC7xxxe600 core

1989 1994 20072006200520042003 200820021998199719961995

PowerPC®

75X

In Production

Presenter

Presentation Notes

Freescale pioneered the communications processor market in 1989 by delivering the industry's first multi-protocol microprocessor. Since then, Freescale has shipped more than 200 million communications processor units. The versatile devices are used in DSLAMs, telecom switches, wireless infrastructure, voice over IP (VoIP) equipment, customer premises equipment, SOHO and enterprise routers, as well as printer, high-end imaging and storage applications.

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In the News: Freescale Introduces Product Longevity Program

• The embedded market needs long-term product support, which allows OEMs to provide assurance to their customers.

• Freescale has a longstanding track record of providing long-term production support for our products.

• We are now pleased to announce that we are introducing a formal product longevity program for the market segments we serve.

– In the automotive and medical segments, Freescale will manufacture select devices for a minimum period of 15 years.

– For all other market segments in which Freescale participates, Freescale will manufacture select devices for a minimum period of 10 years.

• A list of applicable Freescale products is available for quick access at www.freescale.com.

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Summary

• Multicore along with Virtualization technologies / Hypervisor has a immediate return on ROI, through– Reduce size and weight- Reduce hardware costs- Reduce energy consumption- Reduce hardware and software development costs- Reduce software complexity on multicore

- Freescale and Partner’s multicore technologies address the Business and Market drivers for safe and secure applications in the Industrial Market.

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Documents

FTF-IND-F0414 - Multi-core processing for Safe and Secure ... · SMP, AMP, and Virtualization ... Network node consolidation • Routers adding appliance services • ... Firewall