Getting Started with Cadence at RMC - usherbrooke.ca · 2006. 8. 28. · RMC Microelectronics Lab Cadence Series Authors (including revisions) Approval Authority Getting Started with

Royal Military College of CanadaCollège Militaire Royal du Canada

(Cadence University Alliance Program Member)

Department of Electrical and Computer EngineeringDépartment de Génie Electrique et Informatique

Copyright © 2002, Royal Military College of Canada, Kingston, Ontario.

Permission to duplicate and distribute this document is herewith granted for sole educational purpose without any commercialadvantage, provided this copyright message is accompanied in all the duplicates distributed, and with prior permission from the RoyalMilitary College of Canada, Department of Electrical and Computer Engineering. All rights reserved.

Important: Please read the following disclaimer

Information is provided “as is” without warranty or guarantee of any kind. No attempt has been made to examine this information withrespect to operability, origin, authorship, or otherwise. Please use this information at your own risk. We recommend using it on a copyof your data until you’re confident you can implement any of it’s procedures in your environment.

RMC Microelectronics Lab Cadence Series

Authors (including revisions) Approval Authority

Getting Started with Cadence

Tutorial One (Composer, Affirma, Virtuoso)

[Version 4.1 for Cadence.2001a - Dated 19 September 2002]

1. Gord Allan, Version 3.02. Gord Allan, Version 3.13. Jean-Luc Derome, Version 4.04. Jean-Luc Derome, Version 4.1

1. Dr. Dhamin Al-Khalili, Professor

Cadence is a trademark of Cadence Design Systems, Inc., 555 River Oaks Parkway, San Jose, CA, 95134

Royal Military College of Canada Department of Electrical and Computer Engineering

(ii)

Table of Contents

Table of Contents ................................................................................................................ iiList of Figures .................................................................................................................... iii

1.0 Introduction..........................................................................................................................11.1 About this Manual..............................................................................................................................1

1.2 The Big Picture...................................................................................................................................1

2.0 RMC Environment Setup and Start up .................................................................................22.1 Environment Setup .............................................................................................................................2

2.1.1 Environment.........................................................................................................................2

2.2 Starting up Cadence............................................................................................................................22.2.1 The First Run .......................................................................................................................2

2.3 Cadence Tools ....................................................................................................................................3

2.4 Libraries, Cells and Views .................................................................................................................4

3.0 Generating the Schematics (RLC filter and Inverter)..........................................................53.1 Create a new library ...........................................................................................................................5

3.2 Create a new cellview (Schematic) ....................................................................................................6

3.3 Adding Components and wiring ........................................................................................................63.3.1 Instantiating a component ....................................................................................................73.3.2 Adding the I/O Pins .............................................................................................................83.3.3 Connecting Wires.................................................................................................................8

3.4 Modifying Instance Properties ...........................................................................................................93.4.1 Variable Parameters .............................................................................................................9

3.5 Checking and Saving........................................................................................................................10

3.6 Create the Inverter Schematic ..........................................................................................................10

4.0 Analog Circuit Simulation - RLC filter ..............................................................................124.1 Choosing the Analyses .....................................................................................................................13

4.1.1 Transient Analysis .............................................................................................................144.1.2 AC Analysis .......................................................................................................................144.1.3 DC Sweep and DC Operating Point ..................................................................................14

4.2 Saving and Plotting Simulation Data ...............................................................................................15

4.3 Running the Simulation - The Waveform Window..........................................................................15

4.4 Printing the Waveforms....................................................................................................................16

4.5 Saving the Simulation Session and Exiting......................................................................................17

5.0 Analog Characterization of an inverter.............................................................................17

6.0 The Waveform Calculator ..................................................................................................21


(iii)

List of Figures

Figure 1: “gocadence” Message Output ..................................................................................2Figure 2: icfb window .............................................................................................................3Figure 3: Library Manager ......................................................................................................4Figure 4: RLC Circuit..............................................................................................................6Figure 5: Add Instance Window..............................................................................................7Figure 6: Add Instance Window - Resistor Cell......................................................................8Figure 7: Add Pin ....................................................................................................................8Figure 8: Edit Object Properties Window .............................................................................10Figure 9: Check and Saved CIW Message............................................................................10Figure 10: Inverter Schematic .................................................................................................11Figure 11: Analogue Circuit Design Environment..................................................................12Figure 12: RLC Circuit with Load ..........................................................................................13Figure 13: Choosing Analysis Window...................................................................................13Figure 14: Axis Mode Icon .....................................................................................................15Figure 15: Marker A & B Icons ..............................................................................................15Figure 16: Waveform window.................................................................................................16Figure 17: Transient Analysis Results.....................................................................................17Figure 18: Environment Option Window................................................................................18Figure 19: Simulatable Inverter Schematic .............................................................................19Figure 20: Analog Configuration Screen ................................................................................19Figure 21: Simulation Results - Split Graphs..........................................................................20Figure 22: Parametric Analysis Window.................................................................................20Figure 23: Parametric Analysis Results ..................................................................................21Figure 24: Calculator Window ................................................................................................22Figure 25: Resulting Current Waveform (Calculator).............................................................22Figure 26: “it” expression - Calculator....................................................................................23Figure 27: Resulting Power Dissipation Plot ..........................................................................23


1.0 Introduction

1.1 About this Manual

The Getting Started with Cadence manual provides the necessary information for the RMC usersto get acquainted with the basic tools of Cadence. This guide is organized in six Sections: anIntroduction, the Cadence Environment, Schematic Creation, Analogue Circuit Simulation,Analogue Characterization and a discussion on the Waveform Calculator. This guide is onlymeant as a starter document to get familiar with the basic Cadence tools.

1.2 The Big Picture

There is an overwhelming supply of CAD tools on the market for IC design and verification.Where then, does the Cadence suite fit in? As you are likely aware, semi-custom and custom ICdesign can be likened to puzzle building. For the most part a designer will use available logicalblocks (standard cells) and wire them together onto a single piece of silicon to solve a particularproblem. Hence the term, application specific integrated circuits or ASICs.

Often a designer can not be content with only the standard blocks provided in a library. Even ifthe logic is available it may need re-design to meet the specific timing, power, or area constraintsof a project. In academic institutions, these cells are made available through the CanadianMicroelectronics Corporation (CMC), but in industry it may be cheaper to develop cells in-house,without licensing a technology library. Additionally, specialized components (Mixed-signal,optical, etc.) would not be included in any such standard library and will require their owndevelopment.

This is the area where the Cadence suite of tools is most appropriate. While tools exist toreasonably assemble thousands of cells together (Synopsys design planner for example), thestrength of Cadence is in creating, testing, and characterizing a custom function or standard cell.

To tackle such a project, the following design flow can be used:

a. Generate a schematic:

i. using transistors and other ‘basic’ elements of a technology,ii. connect elements together and tune their parameters (W/L etc.) to suit the design,

andiii. create a ‘Symbol’ of the cell (black-box abstraction);

b. Simulate and troubleshoot:

i. using simulation and waveform viewers determine if the circuit meets design goals,and

ii. troubleshoot parameters to get the circuit to perform properly;

c. Layout:

i. given a circuit that does what you want in simulation you map that onto silicon, andii. must follow design rules for minimum spacing etc.;

d. Extraction - LVS (Layout vs. Schematic):

Introduction (1)


i. from the layout, determine what the schematic is, andii. ideally what you started with, but you have to consider physical issues (e.g. parasitic

capacitances); and

e. Post-Layout simulation and characterization

i. simulate the resulting schematic after layout, andii. has it met the design goals (power, speed, area, etc.)?

2.0 RMC Environment Setup and Start up

Before using the Cadence tools, you need to setup the Unix environment to run the application atRMC. This section will help the users execute the required commands before attempting to runthe tools.

2.1 Environment Setup

2.1.1 Environment

In order to run the Cadence tools, the system must be configured to run Cadence. The CadenceSystem Administrator can be contacted to have your machine setup in this environment ifnecessary (E-mail request to [email protected]).

You will be required to modify your shellenvironment by running a script design to point tothe appropriate directories in order to run theCadence tools (RMC maintained script). At RMC,the command “gocadence” has been written to perform this task. The user must type thecommand below at the Unix prompt and you should see the output message shown in Figure 1.

a. “hostname$ . gocadence” (note that there is a space between the “dot” and the“gocadence” command).

Note: Please note that hostname$ is the Unix prompt and you do not need to type it at yourcommand line prompt. The command line prompt is usually the hostname of the SUNworkstation you are working on.

2.2 Starting up Cadence

2.2.1 The First Run

The first time you start the Cadence tools, it is recommended that you create a directory related tothe technology you will be using. This tutorial is based on the CMOSP35 technology fromTSMC. Therefore, we recommend that the directory be called cadencep35. All files createdduring the utilization of the Cadence tools will be saved into this directory. Further breakdown ofthis directory is sometimes useful but it is left to the user for experimentation. The followingcommands is a possible list of commands to execute the first time you start up the tools:

Figure 1: “gocadence” Message Output

Setting Up for Cadence.2001a . . .

Done.

RMC Environment Setup and Start up (2)


a. Create a clean directory (Please note that although it is possible to have more than onetechnology in the same directory, you can only access one at the time. Therefore, it maybe wise to use the different technologies in separate directories). For example, Thefollowing Unix command will create a directory for CMOSP35:

i. “hostname$ mkdir cadencep35”;b. Start Cadence in CMOSP35: After initializing your UNIX environment, start Cadence

by typing the command below and the Integrated Circuit Front and Back (icfb) windowwill be displayed to you (see Figure 2). Starting up the icfb window takes a fewmoments and several things will be displayed to you during this process. Be patient andwait for the whole process to complete.

i. “hostname$ cd cadencep35, andii. “hostname$ startCds -t cmosp35;Note: You will be shown a window titled “What’s New in 4.4.6”. You can take the timeto read the content but it may be ignored at this time. Just close the window andcontinue with the instructions in the tutorial;

c. Library List: You may notice a file called ‘cds.lib’ in your cadencep35 directory. Thisfile is added the first time Cadence starts. It contains a list of the libraries Cadencerecognizes, and points to where they are located in the directory structure. When youadd your own library soon, this list will be updated;

d. Model Files: Cadence uses the industry standard SPICE language for simulation anddevice specification. There are different levels of accuracy available depending on howwell the devices are described. For your purposes, you will use the default models whichreflect standard 0.35µm characteristics. In the future it may be of use to develop one’sown models and use them for simulation; and

e. Note: If at any time cadence hangs, the best way to recover is to remotely login to theworkstation, list the running processes using the ‘ps -a’ command from a unix prompt,and then use the ‘kill’ command on the offending process ID. e.g. ‘kill 1243’ if 1243 isthe PID.

2.3 Cadence Tools

To create, simulate, and layout a cell you use a few different tools. As indicated at Section 2.2,when cadence opens, it brings up the icfb window (Figure 2). This is the menu into the cadencetools and also allows us to perform other specific functions, such as library management. Browsethrough the menu and do not be intimidated by all the options and acronyms. Experiment with the

Figure 2: icfb window



tools to become more familiar with all the different options. Cadence is very robust, it will not letyou do any damage to the OS or the workstation. The links to the CMOSP35 documentation andCMC design-flow are useful. The tools you will use include:

a. Virtuoso Schematic Editor (aka. Composer) - to create schematics and symbols;

b. Affirma Analog Design Environment - for circuit simulation; and

c. Virtuoso Layout Editor - for layout.

For the time being, a good place to begin to understand the cadence environment is with theLibrary Manager, which can be opened selecting ‘Tools | Library Manager’ (shown in Figure3).

2.4 Libraries, Cells and Views

Throughout Cadence there is a hierarchy of Library | Cell | View. In Figure 3, the ‘wcells’ libraryis selected, which contains the logic gates (cells) for the 0.35µm process. The ‘wor4-1’ cell isselected which is a 4 input OR gate. As you go through this tutorial, you will create different‘views’ or representations of a standard cell. In this example, you see that for the wor4 cell, thelibrary has already provided some of these different views.

To appreciate what you will be creating, open and glance at the symbol, layout and extractedviews of this (or any other) cell, look around the different libraries and open various views to get

Figure 3: Library Manager



a feel for the different types. You will be advised that the views are read-only, which is fine sinceyou will really want to re-design the OR gate. In the tutorial you are going to create a RLC filterand a CMOS inverter.

In the next step of this tutorial you are going to create your own library to contain your userdefined cells and their corresponding views. Some of the other libraries you may find:

a. basic: Contains various input sources and other basic components;b. cdsDefTechLib: A default technology library that your design gets attached to if you

didn’t specify one when starting Cadence;

c. cmosp35: components for 0.35µm- FETs, BJTs, cap, resistors, etc.;d. package: outline of packages (ceramic cases) to fit chips into;e. padsp35: IO pads and drivers developed by CMC;f. pfet: similar to cmosp35, only a more concise list of devices;g. tcb773p: TSMC blackbox standard logic cells;h. tpd773pn: TSMC blackbox I/O and power pads and drivers (3.3V);i. tpz773pn: TSMC blackbox I/O and power pads and drivers (5V);j. wcells: standard logic cells by CMC (internal details are visible);k. wsramsp: a set of CMC designed RAM cores;l. US_8ths: various boarders to pick from to add to your design;m. ripper: bus rippers (bits from a bus), used in digital design; andn. _any-lib-name: These are Shadow libraries. They are used when describing your design

through Hardware Description Language formats. Do not use them for designs enteredusing the schematic capture tool, Composer.

3.0 Generating the Schematics (RLC filter and Inverter)

3.1 Create a new library

To illustrate the process of both analog and pseudo-digital design, you will create and simulatetwo circuits, an RLC filter and a CMOS inverter. Before you begin though, you will create a newlibrary to store these two cells and their views. The instructions to create a library are as follows:

a. From the icfb menu, select ‘File | New | Library’;b. Navigate to the cadencep35 directory (if not already there);

c. Type in a name for your new library (rmc_tutorial); andd. Select ‘attach to an existing techfile’, click Ok, then select the cmosp35 library when

prompted. The techfile contains the design rules that apply when generating an actuallayout. It is not necessary here, but is done to demonstrate the procedure.

Generating the Schematics (RLC filter and Inverter) (5)


3.2 Create a new cellview (Schematic)

Now it is time to create one of the schematics. From the icfb menu, select ‘File | New | Cellview.’You are prompted for the library to place the new cell in, and what type of view you are creating.Select ‘rmc_tutorial’ and ensure ‘Composer-Schematic’ is selected as the tool for your newcell. Note that ‘schematic’ is/becomes the default name of the view. Enter ‘rlc’ as the cellnameand select ‘OK‘ to open the new cell in composer.

The rest of this section describes the required steps to create the ‘rlc’ circuit shown at Figure 4.You will then move on to create the inverter before starting the simulation.

3.3 Adding Components and wiring

Whether creating an analog, digital or mixed-signal schematic the fundamentals are the same.You place ‘instances’ of devices which are already defined in one of the referenced libraries, wirethem together, and edit their properties (e.g. Resistance, capacitance, width, etc.) In the case of theRLC circuit, you will place a resistor, capacitor, inductor and ground. You wire the devicestogether using the wire tool, and wire snapping, and then edit the properties of the devices to setR=75k, R=75, C=47n, and L=500m. Of course you then need to add pins for the filter’s input andoutput signals.

You should note at this point that there are other methods of design entry other than actuallydrawing it via ‘schematic capture.’ Typically, HDL (hardware description languages) are used for

Figure 4: RLC Circuit



large designs. Using an HDL language, you would obtain after compilation the specificcomponents and connections between all the components. The low level list of components andconnections is commonly referred to in industry as the net-list.

The details of putting the schematic together follow, but you are encouraged to try to figure itout yourself through exploration. (One hint: The instantiate icon.)

General Tip: You will find that Cadence likes to ‘do what it did last’. For example, if the lastaction you selected from the menu was ‘delete’, the left mouse button will now be assigned the‘delete’ command. This can lead to some unexpected (and scary) actions. Hit the ‘ESC’ key toget Cadence out of this mode after selecting a command. Undo can come in handy here.

3.3.1 Instantiating a component

To place a resistor follow these steps from the main composer screen:

a. Click on the Instance Icon. The AddInstance window will appear as shownin Figure 5 with all fields empty. Clickon the Browse button;

b. In the browse library window, select thecmosp35 library, the resistor cell, andsymbol view. The Add Instancewindow should now display exactly asshown Figure 6 (the resistance fieldsmaybe different on your window);

c. Move the cursor to the Composerschematic window, the resistor symbolfollows. Also, note that the AddInstance window has expanded to display other parameters. Before you click on theschematic window to place the resistor symbol, edit the form, modifying theResistance value to 75k Ohms, as shown Figure 6. IMPORTANT: Don’t getconcerned with all of the seemingly irrelevant parameters. They’re used for moredetailed simulations and other applications;

d. Now click in the composer window to place the resistor;

e. Another resistor symbol follows the cursor. Place it in the window then click on Cancelon the Add Instance window. The form disappears;

f. In the same way you added the resistor, add the other instances from the library, cell,view as indicated below. You Will change their values shortly to correspond to theschematic.

i. C (cmosp35, capacitor, symbol),ii. L (analoglib, ind, auLvs), andiii. Ground/tiedown (cmosp35, tiedown, symbol).

When you add the capacitor there are fields where you can fill in the model name andarea. When manufactured, these determine the actual capacitance. For your purposes,

Figure 5: Add Instance Window



you simply ‘hard-code’ the required capacitance as you will intend to fabricate thecircuit; and

g. To rotate the input resistor, click once on it to select (left-click with the mouse), thenmiddle-click to open the auxiliary menu. Select Rotate.

3.3.2 Adding the I/O Pinsa. To add the input and output pins, click

on the Pin icon in the lower left side ofthe Composer window. The Add Pinform appears as shown in Figure 7;

b. Under Pin Names, type Vin Vout.Note that Direction in the form readsinput, also shown in Figure 7;

c. Click once on the schematic window.The first pin is placed. Note the otherpin’s symbol follows the cursor as you move across the window. The Add Pin form isstill active, but with only Vout displaying in the Pin Name field; and

d. On the Add Pin form, change Direction to read Output. Place the Vout pin in theschematic window. You can close the Add Pin form when done.

3.3.3 Connecting Wiresa. Before wiring, you may wish to move some of the components around on the screen to

look more like the schematic shown in Figure 4. Use the ‘ESC’ key to ensure you arenot stuck in a weird mode, and then you can drag the components around on the screen.To begin connecting the wires as per the schematic in Figure 4, click on the

Figure 6: Add Instance Window - Resistor Cell

Figure 7: Add Pin



Wire(narrow) icon; andb. While the Add Wire window is still displaying (but not selected), click on the s key on

your keyboard. This snaps the wires to connect between the little diamond-shapesdisplaying by the nodes.

3.4 Modifying Instance Properties

A potential source of confusion are the properties associated with each device. Do not let themyriad of device options confuse you! In most cases you will use the default values.

To modify the device’s properties, click once to select the instance, then click on the propertiesicon, or otherwise select it from the menu system (e.g. using the ‘q’ bindkey).

Modify the Inductance (500m H), Capacitance (47n F) and 2nd resistance (75 ohm) values toreflect the schematic. By default, Cadence automatically writes the Instance Name.

Note: When you are entering values for various parameters, you will enter the units as they arepre-defined. You do, however, have to indicate the size via the standard SI prefixes as follows. Forexample, for 20 femptoFarads, under Capacitance you would just enter 20f. (No space betweenthe number and prefix). Here are Scale Factors (case-sensitive):

a. M= Mega (10^6);

b. k= kilo (10^3);

c. m= milli (10^-3);

d. u= micro (10^-6);

e. n= nano (10^-9);

f. p= pico (10^-12);

g. f= femto (10^-15); and

h. a= atto (10^-18).

Note (1): No space between the number and the scale factor (i.e. 1p, for 1 pico Farad)

Note (2): Do not include the units, as they are predefined in the instance properties file.

3.4.1 Variable Parameters



In most applications you will want to simulatethe behavior of a circuit with different loads/capacitances/transistor widths etc. This is easilyaccomplished through the use of variables.Instead of assigning a constant (e.g. 75k Ω) to anoption, you can give it a variable (or name).When it comes time for simulation you simplyassign a value to that variable, or instruct thesimulator to run through with different values(called ‘parametric analysis’).

As an example, for this rlc circuit replace the‘R=75k’ for the series input resistor with‘R=res0’ as shown in Figure 8. (To do this clickon the resistance and use the properties icon). Inthe simulation you can assign 75k to ‘res0’ andeverything else will look exactly the same. Thepower comes from the re-usability of the sameschematic.

3.5 Checking and Saving

Of course now that you have the schematicdrawn, you want to certify its correctness andsave. Click on the Check and Save icon. TheCadence’s dfII CIW displays will show thatyour schematic has been checked and saved asshown in Figure 9.

If you get Warnings/Errors, follow theinstructions below to try to correct theproblem:

a. Go back to your schematic and look for the “flashing” tiny squares;

b. Browse back in the CIW and read the warning/error messages;

c. Fix the warnings/errors as necessary. Warnings are not as crucial as Errors;

d. For example “Dangling Wires” warnings should be checked; and

e. Click on the Check & Save icon, and repeat these steps until the design has no errors.

3.6 Create the Inverter Schematic

Using the exact same methods that went into creating the RLC circuit you will create an invertercircuit. Close the rlc circuit and create a new cell for the inverter (call it inv). Using theschematic shown in Figure 10 as a guide, you will need to instantiate the followingcomponents:

Figure 8: Edit Object Properties Window

Figure 9: Check and Saved CIW Message



a. PMOS transistor (cmosp35, pfet, symbol);

b. NMOS transistor (cmosp35, nfet, symbol);

c. Ground connection (cmosp35, tiedown, symbol);

d. Capacitor for your output load (cmosp35, capacitor, symbol);

e. Input and Output pins;

f. Input Source (cmosp35, vpulse, symbol), you will edit the timing properties atsimulation; and

g. Power Source (cmosp35, vdc, symbol), edit properties to output DC@ 3.3 V.

When instantiating the transistors you can accept the default widths and lengths for the time-being. Wire the devices together as per the schematic shown in Figure 10 using the wiring tool.You may want to make use of the ‘flip’ and ‘rotate’ commands from the edit menu. For theNMOS and PMOS transistors, at the properties pages, remove the area and periphery values andchange the model names to CMOSN and CMOSP respectively. For the output capacitance setC=C_load (a parameter). In simulation, you will vary the load to see the effect on the output.Check and save the schematic before you move on.

Figure 10: Inverter Schematic



Note that you are using devices from the cmosp35 library. Some of the same devices areduplicated in other libraries. For the most part it is irrelevant which one you choose.

An Aside about internal parameters: Often you may want to refer to the value of a parameterinternal to a device. The most common example is to make the width of a transistor 2x the length.The iPar(“[variable]”) function is used to reference these internal values. The syntax under thisexample would be w=iPar(“l”)*2. You will set up the parameters later, prior to simulation.

4.0 Analog Circuit Simulation - RLC filter

Normally before starting simulation youwould make symbol views of your 2circuits. Then you would place thosesymbols into a new ‘test-bench’ schematicwhere the supply voltages and stimulus areadded around the symbol. In this tutorial,you just want a simple non-hierarchicalproject, so you are not going to this level ofabstraction.

Open the RLC filter schematic (e.g. fromthe icfb, File | Open). From the schematicwindow, select Tools | AnalogEnvironment. Figure 11 shows what thewindow looks like when fully configured. You will have to set up the Analysis type, and outputsin a moment. First, select Setup | Simulator/Directory/Host and ensure that spectreS is selectedunder Simulator. Now, let’s examine the Analogue Environment window in more details:

a. The icons on the right provide quick access to frequent commands/menus;

b. The Design Area: Lists the Library, Cell, and CellView of the design being simulated;

c. The Analyses Area: Lists the types of analyses, any arguments (i.e. time interval), andwhether it’s enabled to perform the simulation in the current run;

d. The Design Variables Area: Will list components set-up as variables. Select Variables |Copy from Cellview and the res0 variable will appear in this list. Edit the value of theresistance variable to equal 75k here using Variables | Edit..., Select res0, Value: 75k,click Change, click Ok;

e. The Outputs Area: Lists names of nets/signals/expressions/ports to be plotted on theoutput waveform window; and

f. The Sub Menus: Essentially, following the menus from the top-left selection to thebottom-right one guides you through the steps required to perform a completesimulation cycle. The following sections will provide more detailed descriptions.

In order to perform a simulation on your RLC circuit you need to provide some stimulus (an inputvoltage) and you should attach an output load. To set up the circuit for testing instantiate avoltage source (cmosp35, vsin) and a load capacitor (cmosp35, capacitor). Wire them across

Figure 11: Analogue Circuit Design Environment

Analog Circuit Simulation - RLC filter (12)


the input and output pin as shown in Figure 12 to get a fully testable circuit. Set up the voltagesource’s parameters such that AC Magnitude=3.3 (the peak-peak used in AC sweep analysis),AC Offset=1.65V, Amplitude=1.65, and Frequency=6k. This will give a 6 kHz sin wave from0V -> 3.3V. Set the capacitive load for C=1p. Again, note that the units are implied and shouldnot be user-specified. The final RLC circuit with your supply is shown in Figure 12. Do not worryif the net names are not the same (except for Vin and Vout of course). The net names are randomlyassigned if not specified by the user. Check and Save once done.

4.1 Choosing the Analyses

In the Analog Artist Simulation window, click theChoose Analysis icon. Instead, you could select itfrom Analysis | Choose pull down menu. The formappears as shown in Figure 13.

You will simultaneously setup several analysesmodes:

a. Transient analysis: This provides thetransient output response of the circuitwith respect to time. The user specifiesthe time period and the time variant inputwaveform while the simulator calculates

Figure 12: RLC Circuit with Load

Figure 13: Choosing Analysis Window



the output response;

b. AC analysis: This simulates the AC performance of the circuit as a function offrequency, and is based upon the small-signal frequency response model;

c. DC Operating Point: This analysis simply determines the D.C. operating point of thecircuit based on the parameters present on the schematic assuming all capacitors openedand all inductors shorted. It is the default mode and is automatically performed beforeany other analysis in order to determine the initial state of the circuit; and

d. DC sweep mode: This generates DC transfer characteristics for the circuit by varying auser specified independent source over a range of values.

4.1.1 Transient Analysis

You will perform a transient analysis. Follow the steps below to complete the analysis:

a. In the Analysis Section, select tran;b. Set the Stop Time field to 2m;c. Turn on the Enabled field; andd. Click APPLY. (do not click OK)

Notice that in the Analog Artist Simulation Window, under the Analysis Section, a line is listed todescribe this analysis.

4.1.2 AC Analysis

You will perform an AC analysis. Follow the steps below to complete the analysis:

a. In the Analysis Section, select ac;b. Set the Sweep Variable to Frequency (note the other sweep variables);c. Set the Sweep Range to Start-Stop. (Start: 0.01k, Stop: 10k);d. Set the Sweep Type to Logarithmic with 20 Points Per Decade;e. Turn on the Enabled field; andf. Click on Apply.

4.1.3 DC Sweep and DC Operating Point

You will now perform a DC sweep and a DC operating point analysis. Follow the steps below tocomplete the analysis:

a. In the Analysis Section, select dc;b. In the Sweep Variable section, select Component Parameter;c. Click on Select Component. This allows for selecting the instance on the schematic;d. Click on the input source from the Schematic window;

e. A form appears listing all the instances parameters. Select the dc parameter. Click OK;f. In the Sweep Range section, select Start-Stop. (Start: 0, Stop:100);



g. Turn on the Enabled field; andh. Click OK this time.

4.2 Saving and Plotting Simulation Data

The simulation environment is configured to save all node voltages in the design by default. Youcan modify the default to save all terminal currents also, or you can select specific set of nodes tosave. You Will select these nodes from the schematic window.

a. Select Output => To be Plotted => Select on Schematic.

Node voltages can be selected by clicking on the wire on the schematic window, and currents byclicking on the terminals. Unselecting can be performed either by clicking on the terminal/nodeagain, or by selecting the corresponding line in the Outputs section of the Simulation window andclicking on the Delete icon.

a. Select the input and output wires to the rlc circuit. Observe the simulation window asthe wires get added.

4.3 Running the Simulation - The Waveform Window

Click on the Run Simulation icon (green light). When it completes, the plots are shownautomatically in the waveform window (shown in Figure 16). The three analysis responses areshown in separate plots. The DC response is not clear due to the voltage divider effect. The inputand output waveforms are shown on the same scale. To separate them and otherwise change theappearance of the graphs, follow these steps:

a. Click anywhere in the DC Response area to work in this section. Notice the highlightedbox reading “3” at the top-right corner of the section;

b. Select Axes => To Strip, or click on the SwitchAxis Mode icon (shown in Figure 14) on the left.Observe the 2 separate plots displayed. Repeat forthe plot 1. This puts the input and output voltageson separate scales. You can repeat this step for allanalysis;

c. Use the Markers (A, B) (shown in Figure 15) tomeasure the output peak-to-peak amplitude of theTransient Response signal. Click on the CrosshairMarker A icon on the left. Click on a negative peakof the output waveform. Repeat for Marker B, at apositive peak;

d. Read the markers data at the bottom of the screen. Look at the delta field (time, volts);

e. Select the AC Response section. This is the plot that really gives us the most informationabout the circuit. Note that at a frequency of 6 kHz, as you have simulated for the Vin/Vout transient response (graph 1), the output is only 30mV peak-peak. The reason whycan be seen from the frequency response. If instead you changed the stimulus frequencyto ~ 1 kHz, you would see much less attenuation. This is a spiked notch filter centered at

Figure 14: Axis Mode Icon

Figure 15: Marker A & B Icons



1kHz with a 3 db bandwidth (half power point) at +- ~250 Hz. Use the cursors to verifythis. You are encouraged to re-adjust the frequency of the input source from 6k to 1k andre-run the simulation. Note that you’ll need to increase the transient time to include afew full periods of the reduced frequency sin wave (6 ms would be good); and

f. To delete the bottom Vin-Vin plot in the DC Response section, click on the bottomwaveform, and press the Del key on your keyboard. The DC sweep curve essentiallygives the DC resistance of the equivalent Norton circuit and is not terribly important forthis circuit. Nevertheless, the idea is presented.

The result of the transient analysis with a 1 kHz source is shown in Figure 17. Notice the largergain and the initial damping response before settling into the steady-state. At 1 kHz the peak-peakvoltage is now ~ 1.4V which corresponds to the peak in the frequency spectrum.

4.4 Printing the Waveforms

Depending on the tool, you’ll access the print menu in different ways. From the schematic editor,use Design | Plot | Submit. From the waveform viewer, select Window | Hardcopy. Other toolsyou come across will have similar interfaces for printing. Most often, you will print to an EPS

Figure 16: Waveform window



(Encapsulated Postscript) file (.ps) and then print that file using an independent postscript viewer(e.g. Ghostscript). Or, using the unix command ‘ps2pdf sourcefile.ps’ you can convert a postscriptfile to a pdf and read it with acrobat reader (acroread from the unix prompt). You are left on yourown accord to go through the different print menus. Most of the defaults will work for you, butyou will need to drill down in some cases to specify an output filename.

4.5 Saving the Simulation Session and Exiting

You have the options to save your simulation setup and/or the output waveforms. Note that thesimulation results are saved deep in the directory structure for you, but you are not going to try tofind them. To save the simulation configuration, from the Analog Artist window select Session |Save State and choose a name to save the configuration under. This saves all your settings forOutputs, Analysis types, Variables, etc. To save a waveform, select Window | Save from theWaveform viewer. You will not need to save anything for the purpose of this tutorial.

5.0 Analog Characterization of an inverter

Before you can simulate your inverter there are a couple steps you need to take care of.Specifically, you have to specify the simulation engine and model files to use for your transistors.As in the RLC case, you need to set up a useful input source. As you can imagine for a logicfunction, the input source is the pulse generator you instantiated earlier.

Figure 17: Transient Analysis Results

Analog Characterization of an inverter (17)


Open up the inverter schematic youcreated earlier. All other open windowsexcept the icfb can be closed at this time.Select Tools | Analog Environment tobring up Analog Artist with the inverterdesign pre-loaded. From Analog Artistselect Setup | Model Path... Add aboveany others, “/CMC/training/models/models35” if it is not already there. Thereare also typical spice models for the1.2µm process (/CMC/training/models/models12) and a very basic nearly idealmodel (/CMC/training/models/models_simple). To switch the spicemodel for your simulations, simply re-arrange the paths in your list to put thedesired model first. The 0.35µm modelfiles are in a different format than the0.5µm and 1.2µm models. Toaccommodate this, you have tospecifically ‘include’ the model file. Under Setup | Environment... set the include file to read‘models35_spectre’ as shown in Figure 18. This file resides in the ‘/CMC/training/models/models35’ directory.

There are many parameters for the pulse input source. In the schematic editor, set the source’sdelay (td), rise-time (tr), and fall-time (tf) to 500 picoseconds. Set pulse-width (pw) = 3n, andperiod (per) = 8n. Note that this gives us a clock frequency of 1/8ns = 125 Mhz.

Verify the transistor widths and lengths by selecting each one and checking its properties. Youwill use a minimum size transistor for both so verify width=0.80µm=800nm andlength=0.35µm=350nm.

Also check that the capacitive load (C’s value) is a variable, called C_load. The fully‘simulatable’ inverter is shown in Figure 19. Do not worry if you have different net names onyours. Once Analog Artist is initiated the net names appear automatically.

In Analog Artist, choose a transient analysis. With a period of 8ns, set the stop time to 8 ns (longenough to see a full cycle of operation.) Your goal is to plot and understand the I/O characteristic.Hence you should plot Vin and Vout, and the currents through each transistor. Select Outputs | ToBe Plotted | Select on Schematic and click on the Vin and Vout signal lines, and the drainterminals of the nmos and pmos transistor. They will be added to the output list. Accept thechanges. Select Outputs | Save All... and choose to save currents (might as well select AC andDC) as well as voltages. Click OK.

Figure 18: Environment Option Window



Finally, you will select a value for theload capacitor. Select Variables |Edit... The Name of the variable is, ofcourse, C_load and you will assign ita fixed value of 100f for now. Lateryou will step through a coupledifferent values using ‘parametricanalysis.’ The setup is now done andthe configuration screen should looklike as shown in Figure 20.

Run the simulation (the green light is ashortcut). Simulation progress will beshown in the icfb window. There may be a message to indicate that Cadence is unable to open thefiles CMOSP.M and CMOSN.M. These warnings can be ignored since the models are in theinclude file. Split the four results onto separate axis (Switch-Axis Mode shortcut button) and re-size. Your results should look like the graphs shown in Figure 21. As a trivial exercise, put theresults back onto the same axis, and use the waveform cursors to measure the tphl and tplh.Remember that it is most commonly measured from the 50% mark of the input to the 50% markof the output. You should measure approximately tphl=448ps and tplh=1154ps. Save thewaveform in the window using ‘Window | Save’ and call it ‘inv’.

Figure 19: Simulatable Inverter Schematic

Figure 20: Analog Configuration Screen



One of your final task will involvevarying the capacitive load andmonitoring the effect on the delay.First, in Analog Artist, remove theM0/D and M1/D current plots byselecting them and hitting theeraser icon. Select Tools |Parametric Analysis... Figure 22shows the Parametric Analysiswindow already filled with thecorrect analysis information. Thevariable name is C_load, and youwant to vary it from 100f to 1p in 5 steps. The other options do not need to be touched. From thesame menu, select Analysis | Start. The status window should come alive and run the simulation5 different times with different loads. Eventually the plots will all come up on the same graph (seeplot in Figure 23). Of course this parametric analysis can be used to vary any parameter. You cansee in Figure 23 that as C increases, so do rise and fall times.

Figure 21: Simulation Results - Split Graphs

Figure 22: Parametric Analysis Window



6.0 The Waveform Calculator

To analyze resulting waveforms you have an immensely powerful tool in the WaveformCalculator. From a waveform window, select Tools | Calculator (see Figure 24). As you mightimagine, the most straightforward use of the waveform calculator is to add/subtract/multiply/divide one waveform by another and plot the result. It will perform functions in either the time orfrequency domain, operating in either Algebraic mode (Normal), or RPN (Reverse PolishNotation - a la HP calculators). To keep things simple you will use the Algebraic mode (Options |Set Algebraic), and only perform calculations based on transient (time-domain) simulations.

From the schematic of the inverter and the resulting drain currents (shown in Figure 21), note thatthe sum of the two currents goes to charge and discharge the load. Lets plot the sum of M0/D andM1/D. You have three ways to enter results: from the schematic, from the waveform plots, orfrom the stored result files deep in the unix hierarchy (we are going to avoid this). Open thewaveform you first simulated that includes the transistor currents by selecting Window | Loadand type inv and select Ok. You may have to redraw the display. On the calculator, click ‘wave’,select the M0/D waveform from the plot window, click ‘+’ on the calculator, click ‘wave’ on thecalculator, select the M1/D waveform. You now have the whole expression to plot the addition ofthe two waveforms. Selecting erplot from the calculator will reset the screen and plot theresulting expression (Figure 25). Alternatively, instead of selecting the waveforms, you couldhave selected it (current-transient) button from the calculator, and selected the M0 and M1 drainterminals from the schematic. If you wanted Voltage expressions the nets would be selected afterclicking vt button on the calculator. Like any other calculator, you can store this result in memory.Select store (sto or Memory | Store), and save the expression as i_load. Clear the calculator.

Figure 23: Parametric Analysis Results

The Waveform Calculator (21)


Finally, you want to determine the power consumption of the inverter.. There are a few places in the circuit where you can measure

the dissipation. For example, you could measure the power dissipation across each transistor andadd them, or more easily, you can simply measure the current out of the source, and multiply thatby the source voltage. You can build this power expression in the calculator or plot the sourcecurrent and then use the calculator to plot the power dissipation (using the wave button on thecalculator). You will be using the second option to find the power dissipation plot.

Figure 24: Calculator Window

Command tostart the Results Browser

Command forselecting curves in in the waveformWindow

Command forselecting a family of curves

Commands forplotting and printing

Commands for enteringexpressions from the schematic

Functions

Programmable functions keys

Figure 25: Resulting Current Waveform (Calculator)

PowerDissipat ion1T--- IDD t( ) VDD• IDD avg( ) VD D•=∫=



Building the expression is exactly likeusing a standard calculator. Rememberthat we saved all outputs back in Section5.0. Well, you will be using the saveddata to plot the source current. Select iton the calculator. In the schematicwindow, select the ‘+ node’ of the vdcsource. The resulting expression is showin Figure 26. Note that you may need touse the “abs” function if the currentfrom the source is not a positive value.Finally press the erplot button to plotthe IDD for one cycle.

We are now ready to calculate the power dissipation that we discussed earlier. This can beaccomplished by simply multiplying the plot obtained from the source current by the outputvoltage of the source (~3.3V). Again, the calculator can be used to build the appropriateexpression but this time, we will use the wave button to select the absolute value of the sourcecurrent. The resulting power dissipation plot should look like the one in Figure 27.

Similar to any digital scope on a lab bench, the calculator can also do such things as calculatedelay between two waveforms, find min, max, integrate a waveform, differentiate, calculateovershoot etc. More details about these ‘Special Functions’ are available in the on-line help. Youwill use it to determine the average power. Clear any current expression in the calculator, select‘Special Functions | average’ or type ‘average(‘. Click wave, and select the instantaneouspower waveform just created (shown in Figure 27). Close the bracket and click ‘=’ to get thefinal average power result. Your result should be around 137.2 uW.

Figure 26: “it” expression - Calculator

Figure 27: Resulting Power Dissipation Plot


Heading_NoNum - Table of ContentsHeading_NoNum - List of FiguresHeading1 - 1.0 IntroductionHeading2 - 1.1 About this ManualHeading2 - 1.2 The Big Picture

Heading1 - 2.0 RMC Environment Setup and Start upHeading2 - 2.1 Environment SetupHeading3 - 2.1.1 Environment

Heading2 - 2.2 Starting up CadenceHeading3 - 2.2.1 The First Run

Heading2 - 2.3 Cadence ToolsHeading2 - 2.4 Libraries, Cells and Views

Heading1 - 3.0 Generating the Schematics (RLC filter and Inverter)Heading2 - 3.1 Create a new libraryHeading2 - 3.2 Create a new cellview (Schematic)Heading2 - 3.3 Adding Components and wiringHeading3 - 3.3.1 Instantiating a componentHeading3 - 3.3.2 Adding the I/O PinsHeading3 - 3.3.3 Connecting Wires

Heading2 - 3.4 Modifying Instance PropertiesHeading3 - 3.4.1 Variable Parameters

Heading2 - 3.5 Checking and SavingHeading2 - 3.6 Create the Inverter Schematic

Heading1 - 4.0 Analog Circuit Simulation - RLC filterHeading2 - 4.1 Choosing the AnalysesHeading3 - 4.1.1 Transient AnalysisHeading3 - 4.1.2 AC AnalysisHeading3 - 4.1.3 DC Sweep and DC Operating Point

Heading2 - 4.2 Saving and Plotting Simulation DataHeading2 - 4.3 Running the Simulation - The Waveform WindowHeading2 - 4.4 Printing the WaveformsHeading2 - 4.5 Saving the Simulation Session and Exiting

Heading1 - 5.0 Analog Characterization of an inverterHeading1 - 6.0 The Waveform Calculator

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Getting Started with Cadence at RMC - usherbrooke.ca · 2006. 8. 28. · RMC Microelectronics Lab Cadence Series Authors (including revisions) Approval Authority Getting Started with