47
Global Modeling of Global Modeling of High Frequency High Frequency Circuits and Devices Circuits and Devices PhD defense by Julien Branlard c C om p utational Electronic G roup Illin ois In stitu te ofTech n ology Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members: Dr. T.Y. Wong, (ECE, IIT) Dr. A.Z. Wang, (ECE, IIT) Dr. C.U. Segre, (BCPS, IIT) Dr. D.K. Ferry, (EE, ASU) Chicago, November 19 th 2004

Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

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Page 1: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

Global Modeling of High Global Modeling of High Frequency Circuits and Frequency Circuits and

DevicesDevices PhD defense

by

Julien Branlard

cComputational Electronic Group

Illinois Institute of Technology

Committee chairman: Dr. M. Saraniti, (ECE, IIT)

Committee members: Dr. T.Y. Wong, (ECE, IIT) Dr. A.Z. Wang, (ECE,

IIT) Dr. C.U. Segre, (BCPS, IIT)

Dr. D.K. Ferry, (EE, ASU)

Chicago, November 19th 2004

Page 2: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

11

Chicago, November 19th, 2004

The simulation tool

GaAs devices

Small-signal analysis

Noise analysis

Memory management

Conclusions

INTRODUCTIONINTRODUCTION1- Presentation outline

Page 3: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

11

Chicago, November 19th, 2004

Full-band modelCellular Monte Carlo (CMC)

INTRODUCTIONINTRODUCTION2- Full-band particle-based simulations

GaAs

Page 4: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

11

Chicago, November 19th, 2004

Full-band modelCellular Monte Carlo (CMC)

Scatteringphonon,

impurity,

impact ionization

INTRODUCTIONINTRODUCTION2- Full-band particle-based simulations

Page 5: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

11

Chicago, November 19th, 2004

Full-band modelCellular Monte Carlo (CMC)

Scatteringphonon,

impurity,

impact ionization

Bulk simulationsvery good agreement

with published data

INTRODUCTIONINTRODUCTION2- Full-band particle-based simulations

Page 6: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

11

Chicago, November 19th, 2004

INTRODUCTIONINTRODUCTION3- Ensemble* and Cellular◊ Monte Carlo

carrier (k) (’k’)scattering

EMCEMC CMCCMC

Pre-compute all possible final energies and momenta

Associate a probability

Store these rates in look up tables* M.V. Fischetti and S.E. Laux, “MC analysis of electron transport in small semiconductor

devices”

◊ M. Saraniti and S.M. Goodnick, “Hybrid Fullband Cellular Automaton/ Monte Carlo Approach for Fast Simulation of Charge Transport in Semiconductor”

Compute the new energy and momentum during run-time

Page 7: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

22

Chicago, November 19th, 2004

GaAs DEVICESGaAs DEVICES1- GaAs MESFETs: geometry

Structural simplicity

“High speed”, low noise applications

S

G

D

S G D

ND+

N

Page 8: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

22

Chicago, November 19th, 2004

GaAs DEVICESGaAs DEVICES2- GaAs MESFETs: DC characteristics

Gate length and width: LG , WG

Doping profile: ND+ , N

Operating point: VDS , VGS

Page 9: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

22

Chicago, November 19th, 2004

GaAs DEVICESGaAs DEVICES3- GaAs MESFETs: 3D devices

Various geometry: LG , WG

2D / 3D characterization

S D

n+

n

W G

LG

n+

n

LG

S D

W GW GW GG

G

VD [V]

J D[m

Ap

er

mic

ron

]

0 0.5 1 1.5 2 2.50

0.05

0.1

0.15

0.2

0.25

0.3

VG = 0.00 V

VG = -0.50 V

3D2D

VG = -1.00 V

Page 10: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

22

Chicago, November 19th, 2004

GaAs DEVICESGaAs DEVICES4- GaAs MESFETs: Gunn oscillations

Gunn domain12 210 [ ]Dd N cm

d =1300 nm

ND=1017 cm-3

fosc = 50 GHz

d =650 nm

ND=2x1017 cm-3

fosc = 100 GHz

substrate

G

ND

d

S D

Page 11: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

D epth [nm]

Co

nd

uct

ion

ba

nd

ed

ge

[me

V]

20 30 40 50 60 70 80

-100

0

100

200

300

400

500

AlG aAs G aAs

D epth [nm]

Co

nd

uct

ion

ba

nd

ed

ge

[me

V]

20 30 40 50 60 70 80

-100

0

100

200

300

400

500

AlG aAs G aAs

D epth [nm]

Co

nd

uct

ion

ba

nd

ed

ge

[me

V]

20 30 40 50 60 70 80

-100

0

100

200

300

400

500

AlG aAs G aAs

22

Chicago, November 19th, 2004

GaAs DEVICESGaAs DEVICES5- AlGaAs/GaAs HEMTs: geometry

SOURCE GATE DRAIN

AlGaAs n+

GaAs n

spacer

VGS < 0 VDS > 0

2DEG

2

eff00

1( )exp

22V V x d

aa

Page 12: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

22

Chicago, November 19th, 2004

GaAs DEVICESGaAs DEVICES6- AlGaAs/GaAs HEMTs: DC characteristics

Page 13: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

33

Chicago, November 19th, 2004

Frequency AnalysisFrequency Analysis1- Problem definition:

0 T

i (t)

0 T

ΔV

v (t)

v(t)

i(t)

VG S

G D

STEP 1: Apply a voltage perturbation on one electrode

STEP 2: Compute the Fourier transform ˆ( ) ( ) ( ) j t

SS SSi t I i i t I e dt

ωω

0 0( ) ( ) ( ) j tv t u v v t u e dt

ωω

STEP 3: Compute the complex impedance and gains

Page 14: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

33

Chicago, November 19th, 2004

Frequency AnalysisFrequency Analysis1- Problem definition: figures-of-merit

drain bias VDS [V]

dra

incu

rre

nt

J D[A

/mm

]

0 0.2 0.4 0.6 0.8 10

0.2

0.4

0.6

0.8

1

1.2

VDS

VGS

DSout

D

VR

I

Dm

GS

Ig

V

Dv m out

G

VG g R

V

for constant VGS

for constant VDS

Page 15: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

33

Chicago, November 19th, 2004

Frequency AnalysisFrequency Analysis1- Problem definition: Y-parameters

11 12

21 22

( ) ( ) ( )( )

( ) ( ) ( )( )GG

DD

Y Y vi

Y Y vi

11

0

( )D

G

G v

iY

v

21

0

( )D

D

G v

iY

v

12

0

( )G

G

D v

iY

v

22

0

( )G

D

D v

iY

v

Page 16: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

33

Chicago, November 19th, 2004

Frequency AnalysisFrequency Analysis2- Sinusoidal excitation:

Apply a sinusoidal voltage on one electrode

0

2

T

Simulation time: T

Frequency of interest

time [ps]

dra

incu

rre

nt

I D[m

A]

5 6 7 8 9 10 11 12 13 14 150

1

2

3

4

time [ps]

dra

invo

ltag

eV

D[V

]

5 6 7 8 9 10 11 12 13 14 150.8

0.9

1

1.1

1.2

1.3

vD(t)=u0+v0sin( t)

u0v0

T

ISS

Page 17: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

33

Chicago, November 19th, 2004

Frequency AnalysisFrequency Analysis2- Sinusoidal excitation:

Compute the complex output impedance

00 0 0

0

( )( ) ( ) ( )

( )out

vZ R j X

i

frequency [GHz]imp

ed

an

ce[x

10

3O

hm

s]

0 100 200 300 400 5000

1

2

3

4

5

Re [ZOUT] = R

-Im [ZOUT] = -X

fXm 50 GHz

LG = 100 nm

Page 18: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

33 Frequency AnalysisFrequency Analysis2- Sinusoidal excitation

How many periods to apply ?

Chicago, November 19th, 2004

Time [ps]

VD

S[V

]

I D[m

A]

0 5 10 15 20 25 300.4

0.5

0.6

0.7

0.8

2

2.2

2.4

2.6

2.8

VDS [V]

I DS

[mA

]

0.4 0.5 0.6 0.7 0.81.8

2

2.2

2.4

2.6

2.8

Page 19: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

33

Chicago, November 19th, 2004

Frequency AnalysisFrequency Analysis3- Fourier decomposition*

Sampling time step: DT Maximum reachable frequency: up

1

2DTf

1

Tf Simulation time: T Frequency resolution:

0 T

ΔV

Time [ps]

I D[m

A]

-10 0 10 200.4

0.6

0.8

1

V1 V2

ISS1

ISS2

VD

* R.W. Hockney, and J.W. Eastwood: Computer Simulation Using Particles, 1988

Page 20: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

33

Chicago, November 19th, 2004

Frequency AnalysisFrequency Analysis3- Fourier decomposition

Frequency [GHz]

Zo

ut

[x1

03

Oh

ms]

0 100 200 300

0

20

40

60

80

100

Re [ ZOUT ] = R

- Im [ ZOUT ] = -X

fT 60 GHz

LG = 98 nm

( )( ) ( ) ( )

( )out

vZ R j X

i

Compute the complex output impedance

fXm 60 GHz~~

Page 21: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

33

Chicago, November 19th, 2004

Frequency AnalysisFrequency Analysis4- Polychromatic sinusoids

Apply a sum of sinusoids voltage on one electrode

0 01

( ) sin( )SN

DSk

v t V k t

0

2

T

Simulation time: T Frequency of interest

0k k Harmonics:

1.. sk Nfor

Page 22: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

33 Frequency AnalysisFrequency Analysis4- Polychromatic sinusoids

Importance of the operating point VGS , VDS

drain bias [V]

dra

incu

rre

nt

[A/m

m]

0 1 2 30

0.5

1

1.5

2

2.5

drain bias [V]

dra

incu

rre

nt

[A/m

m]

time

[ps]

0 1 2 30

0.5

1

1.5

2

2.5

0

10

20

30

40

50

0 01

( ) sin( )SN

DSk

v t V k t

Chicago, November 19th, 2004

Page 23: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

33 Frequency AnalysisFrequency Analysis4- Polychromatic sinusoids

Compute the complex output impedance

00 0 0

0

( )( ) ( ) ( )

( )out

v kZ k R k j X k

i k

1.. sk Nfor

Frequency [GHz]

Ou

tpu

tim

pe

da

nce

[x1

03

Oh

ms]

0 20 40 60 80 1000

10

20

30

40

50

Re [ ZOUT ] = R

- Im [ ZOUT ] = -X

LG = 100 nm

Chicago, November 19th, 2004

Page 24: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

33 Frequency AnalysisFrequency Analysis5- Approach comparison

Fourier Decomposition

frequency spectrum

long simulation time

Frequency [GHz]imp

ed

an

ce[x

10

3O

hm

s]

0 50 100 150-20

0

20

40

60

80

100

Re [ ZOUT] = R

- Im [ ZOUT] = -X

fop = 50 GHz

Fourier Decomposition

Sinosoidal Excitation

Sinusoidal Excitation

more flexible

more precise

Chicago, November 19th, 2004

fXm = 50 GHz

Page 25: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

33 Frequency AnalysisFrequency Analysis6- Perturbation on the gate: derive gains

Chicago, November 19th, 2004

Output voltage gain:

Frequency [GHz]

Vo

ltag

eG

ain

[dB

]

50 100 15020010-2

10-1

100

101

fcutoff = 120 GHz

Dv m out

G

VG g R

V

LG = 100 nm

MESFET

Frequency [GHz]

Vo

ltag

eG

ain

[dB

]

101 102 103

-5

0

5

10

15

20

fcutoff = 120 GHz

-20 dB / dec

Page 26: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

Frequency [GHz]

curr

en

tg

ain

[dB

]

101 102-30

-20

-10

0

10

20

30

-20 dB / dec

Frequency [GHz]

curr

en

tg

ain

[db

]

101 102-30

-20

-10

0

10

20

30

-20 dB / dec

33 Frequency AnalysisFrequency Analysis6- Perturbation on the gate: derive gains

Chicago, November 19th, 2004

Short circuit current gain:

LG = 100 nm LG = 100 nm

MESFET HEMT

21

0

1D

D

G v

ih

i

2121

11

( )( ) 0 dB

( )

YH

Y

fT = 70 GHz fT = 125 GHz

Page 27: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

33 Frequency AnalysisFrequency Analysis6- Perturbation on the gate: derive gains

Chicago, November 19th, 2004

Comparison with published data

Gate length [ m]

Cu

toff

fre

qu

en

cy[G

Hz]

0.2 0.4 0.6 0.8 1

40

60

80

100

120

140160

0.1

LG = 100 nm

fT = 120 GHz AlGaAs/GaAs HEMTs

* F. Schwierz, J.J. Liou, “ Modern Microwave transistors”, 2003

*

Page 28: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

33 Frequency AnalysisFrequency Analysis6- Perturbation on the gate: derive gains

Chicago, November 19th, 2004

Unilateral Power Gain (UPG)

21 12

11 22 12 21

( ) ( )UPG

4 Re ( ) Re ( ) Re ( ) Re ( )

Y Y

Y Y Y Y

Frequency [GHz]

UP

G[d

B]

101 102 103-50

-40

-30

-20

-10

0

10

20

30

40

50

fmax = 165 GHz

LG=100 nm

MESFET

Page 29: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

44

Chicago, November 19th, 2004

Noise AnalysisNoise Analysis1- Two modes of analysis

Device maintained in steady state: Iss Vss

Current noise mode current fluctuations

Autocorrelation function

Power spectral density

Voltage noise mode voltage fluctuations

Autocorrelation function

Power spectral density

| |

1

1( ) DT ( )DT

N m

In

C m i n i n mN

( ) F.T.[ ( )]I k IS f C m

| |

1

1( ) DT ( )DT

N m

Vn

C m v n v n mN

( ) F.T.[ ( )]V k VS f C m

Page 30: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

44

Chicago, November 19th, 2004

Noise AnalysisNoise Analysis2- Spectrum analysis Biased autocorrelation

| |

1

1ˆ ( ) DT ( )DT| |

N m

xn

C m x n x n mN m

Time [ps]

no

rma

lize

da

uto

corr

ela

tion

0 10 20 30 40

-0.3

-0.2

-0.1

0

0.1

0.2

0.3

biased autocorrelation

unbiased autocorrelation

-1- 2 DT

1

ˆ( ) DT ( ) ( ) k

Ni f m

C k xm

S f W m C m e

Correlogram

Frequency [GHz]

PS

Dx1

01

2[A

2s/

m2]

0 1000 2000 3000 4000 50000

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

Fourier transform

Correlogram

Page 31: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

44

Chicago, November 19th, 2004

Noise AnalysisNoise Analysis3- Current Noise

Autocorrelation function

Time [ps]

CID

(t)

/CID

(0)

0 0.1 0.2 0.3 0.4 0.5-0.2

0

0.2

0.4

0.6

0.8

1

1.2

VGS = -0.5 VVDS = 0.1 V

AlGaAs/GaAs HEMT

Time [ps]

CID

(t)

/CID

(0)

0 0.1 0.2 0.3 0.4 0.5-0.2

0

0.2

0.4

0.6

0.8

1

1.2

VGS = -0.5 VVDS = 0.1 V

VDS = 0.5 V

Time [ps]

CID

(t)

/CID

(0)

0 0.1 0.2 0.3 0.4 0.5-0.2

0

0.2

0.4

0.6

0.8

1

1.2

VDS = 1.0 V

VGS = -0.5 VVDS = 0.1 V

VDS = 0.5 V

exponential decay

plasma relaxation time

dielectric relaxation time

2p

m

q n

d

m

qn

Page 32: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

Frequency [GHz]

SIG

(f)

x10

10

[A2s/

m2]

0 5000 10000 150000

2

4

6

8

10

VDS = 0.5 V

VDS = 0.1 V

VGS = -0.5 V

44

Chicago, November 19th, 2004

Noise AnalysisNoise Analysis3- Current Noise

Density spectrum

AlGaAs/GaAs HEMT

plasma oscillation

fp (n)

fp (n+)21

2p

nqf

m

Page 33: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

44

Chicago, November 19th, 2004

Noise AnalysisNoise Analysis3- Current Noise

Spectral Densities: low frequency

GaAs n+n diode

shot noise linear behavior

carriers in the depletion region

thermal noisespatially distributedindependent of applied

voltage

excess noisehot carriersclose to the drain

electrode

current density [x105 A2/m2]

SI(0

)x1

0-9

[A2s/

m2]

4 6 8 10 12 1410-2

10-1

100

101

4060

80

100

200300

400

500

0

shot noise thermal noise excess noise

applied bias [V]

shot thermal excess

applied bias [mV]

Page 34: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

Time [ps]

CU

(f)

/CU

(0)

[a.u

.]

0 0.2 0.4 0.6 0.8 1-0.2

0

0.2

0.4

0.6

0.8

1

1.2

0.4 V

44

Chicago, November 19th, 2004

Noise AnalysisNoise Analysis4- Voltage Noise

Autocorrelation function

GaAs n+n diodeTime [ps]

CU

(f)

/CU

(0)

[a.u

.]

0 0.2 0.4 0.6 0.8 1-0.2

0

0.2

0.4

0.6

0.8

1

1.2

0.64 V

0.4 V

Time [ps]

CU

(f)

/CU

(0)

[a.u

.]

0 0.2 0.4 0.6 0.8 1-0.2

0

0.2

0.4

0.6

0.8

1

1.2

0.64 V

1.14 V

0.4 V oscillations

plasma relaxation

timedielectric relaxation

time

higher voltages d p

pd

Page 35: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

44

Chicago, November 19th, 2004

Noise AnalysisNoise Analysis4- Voltage Noise

Spectral Density

GaAs n+n diode

0

1

SU

x10

-19

[V2sm

2]

01000

20003000

4000Frequency [GHz]

0

350

700

x directio

n[nm]

Vapp = 0.2 V

n+

n

Page 36: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

44

Chicago, November 19th, 2004

Noise AnalysisNoise Analysis4- Voltage Noise

Spectral Density

GaAs n+n diode

Page 37: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

44

Chicago, November 19th, 2004

Noise AnalysisNoise Analysis4- Voltage Noise

Spectral Density: HEMT

0

2

4

6

SU

D[x

10

19

V2sm

2]

0

100

200

300

400

X direction [indexes]

020

4060

80100

120140 Y direction [indexes]

VDS = 0.5 VVGS = -0.5 V

SOURCEGATE

AlGaAs n+2DEG

Page 38: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

44

Chicago, November 19th, 2004

Noise AnalysisNoise Analysis4- Voltage Noise

Spectral Density Derivative

GaAs n+n diode

0

2

4

00.5

11.5

voltage [V] 0

35

x-position [nm]d

SV(0

)/d

xx1

06

[V2sm

]

VS (0, )x

x

shot

thermalexcess

shot noise dominant for low voltages

thermal noisespatially distributed

excess noisehot carriersnear end of the device

Page 39: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

55

Chicago, November 19th, 2004

CMC Memory UsageCMC Memory Usage1- CMC Scattering: problem definition

Scattering Tables

address

rate

4 Bytes

Total size: 8 Bytes

Significant digits: 7

ra tea d d re ss

ra tea d d re ss

ra te :a d d re ss

ra te :a d d re ss

k 0

k

k’

de

stin

atio

n “w

ind

ow

P ( , )k k ’1

P ( , )+k k ’1 P ( , )k k ’2

a d d re ssP ( , )k k ’i

i

lo we re ne rg ie s

hig he re ne rg ie s

Page 40: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

55

Chicago, November 19th, 2004

CMC Memory UsageCMC Memory Usage2- First approach: 25% savings

Principle

address

rate

4 Bytes

Total size: 6 Bytes

Lesser precisionexcellent agreement on all materials

Memory misalignmentcompiler dependentslower execution overcome by faster

arithmetic

rate

Significant digits: 4

Page 41: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

55

Chicago, November 19th, 2004

CMC Memory UsageCMC Memory Usage2- First approach: 25% savings

Bulk simulations

Tested on GaAs, Si, Ge, GaN (wurtzite and zincblende)

Excellent agreement

25% reduction achieved

drif

t ve

loc

ity [

cm

/s]

Ele c tric fie ld < 100> [V/c m ]

G a As

Ele c tric fie ld < 100> [V/c m ]

Ele c tric fie ld < 100> [V/c m ]Ele c tric fie ld < 100> [V/c m ]

ene

rgy

[eV]

ene

rgy

[eV]

G a As

G a As G a As

no c o m p .25% c o m p .

no c o m p .25% c o m p .

no c o m p .25% c o m p .

no c o m p .25% c o m p .

10 1 10 2 10 3 10 4 10 5 10 6 10 7

10 6

10 7

10 1 10 2 10 3 10 4 10 5 10 6 10 710 4

10 5

10 6

10 7

10 1 10 2 10 3 10 4 10 5 10 6 10 710 1 10 2 10 3 10 4 10 5 10 6 10 710 -2

10 -1

10 0

10 -2

10 -1

10 0

e le c tro ns

e le c tro ns

ho le s

ho le s

Page 42: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

address

55

Chicago, November 19th, 2004

CMC Memory UsageCMC Memory Usage3- Second approach: 50% savings

Principle

address

rate

4 Bytes

Total size: 4 Bytes

Addressingabsolute relative

Use of offsetsphonon scattering < impact ionization

Normalizing the rates rmax

Joining the rate and the address

rate

max 2 11 2 2rd r M d f f Significant digits: dynamic

distance

Page 43: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

55

Chicago, November 19th, 2004

CMC Memory UsageCMC Memory Usage3- Second approach: 50% savings

Bulk simulations

Tested on GaAs, Si, Ge, GaN (wurtzite and zincblende)

Excellent agreement

50% reduction achieved

10 1 10 2 10 3 10 4 10 5 10 6 10 710 4

10 5

10 6

10 7

no c o m p .25% c o m p .50% c o m p .

Sie le c tro ns

Sie le c tro ns

Siho le s

Siho le s

no c o m p .25% c o m p .50% c o m p .

no c o m p .25% c o m p .50% c o m p .

no c o m p .25% c o m p .50% c o m p .

e le c tric fie ld < 100> [V/c m ]

10 4

10 5

10 6

10 7

10 1 10 2 10 3 10 4 10 5 10 6 10 7

e le c tric fie ld < 100> [V/c m ]d

rift v

elo

city

[c

m/s

]

10 1 10 2 10 3 10 4 10 5 10 6 10 7

e le c tric fie ld < 100> [V/c m ]10 1 10 2 10 3 10 4 10 5 10 6 10 7

e le c tric fie ld < 100> [V/c m ]

drif

t ve

loc

ity

[cm

/s]

10 -2

10 -1

10 0

ene

rgy

[e

V]

10 -2

10 -1

10 0

ene

rgy

[e

V]

Page 44: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

55

Chicago, November 19th, 2004

CMC Memory UsageCMC Memory Usage3- Second approach: 50% savings

Error estimation

energy [eV]

rela

tive

ma

xim

um

err

or

[a.u

.]

-5 -4 -3 -2 -1 0 1 2 3 4 510-7

10-6

10-5

10-4

10-3

band

gap

255

1023

65535

Page 45: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

55

Chicago, November 19th, 2004

CMC Memory UsageCMC Memory Usage3- Second approach: 50% savings

Performance

e le c tro ns e le c tro ns

ho le sho le s

no c o m p . 25% c o m p . 50% c o m p .0

500

1000

1500

2000

2500

Tab

le s

ize

[M

B]

CPU

tim

e

[min

.]

no c o m p . 25% c o m p . 50% c o m p .0

250

500

750

1000

1250

1500

(a ) (b )

Page 46: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

66

Chicago, November 19th, 2004

SummarySummary 2D and 3D simulations of GaAs devices

diodes, MESFETs, HEMTs

Small-signal analysisInvestigated several methodsImplemented a hybrid approachDerived full small-signal parameters

Noise analysisInvestigated current and voltage noise approachStudied GaAs devicesIdentified frequency behaviorVoltage dependence Spatial distribution

Memory managementImplemented two algorithmic optimizationsAchieved the requested compressionGain in computational efficiency New horizons for the CMC

Page 47: Global Modeling of High Frequency Circuits and Devices PhD defense by Julien Branlard Committee chairman: Dr. M. Saraniti, (ECE, IIT) Committee members:Dr

Chicago, November 19th, 2004

Thank You !