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A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
BOM P/N :
PCB NO :
COMPAL CONFIDENTIAL
MODEL NAME :
Goliad 12"
REV : 1.0 (A00)
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
@ : Nopop Component
VAZ50
2013-05-17
CONN@ : Connector Component
Haswell ULT
LA-9431P (DAA00005Z10)
4319LL31LXX
GPIO MAP: 3.0C
1@ : M/B 8M SPI ROM Component 2@ : TAA/B 8M SPI ROM
EMC@ : EMI & ESD & RF ComponentXDP@ : XDP Component
3@ : Delete componet for cost down BOMEMC_3@ : Delete EMC component for cost down BOM
4@ : M/B 4M SPI ROM Component
Vpro
non-Vpro
(cost down)
SPI on MB TAA
1@/4@/EMC@/
3@/EMC_3@2@/5@/EMC@
3@/EMC_3@
5@ : TAA/B 4M SPI ROM 1@/EMC@ 2@/5@/EMC@/
non-Vpro 1@/EMC@/
3@/EMC_3@2@/5@/EMC@
3@/EMC_3@
7@ : M/B for 8M SPI(Reverse)
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
Cover Sheet
1 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
Cover Sheet
1 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
Cover Sheet
1 59Friday, May 17, 2013
Compal Electronics, Inc.
Part Number Description
DAA00005Z10 PCB 0VM LA-9431P REV1 M/B 4
MB PCB
Part Number Description
DAA00005Z10 PCB 0VM LA-9431P REV1 M/B 4
MB PCB
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PCI Express BUS
PCIE5_L0
HD Audio I/F
WWAN+mSATA
Combo Jack
Transformer
SATA0
WiFi ON/OFF
Automatic Power
Switch (APS)
CPU XDP Port
Power On/Off
SW & LED
DC/DC Interface
Memory BUS (DDR3L)
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 DDRIII-DIMM X2
Goliad12 Block Diagram
KB and TP CONN
BCM5882
USHSmart Card
RFIDDig.
MIC
INT.Speaker
ALC3226HDA Codec
DELL CONFIDENTIAL/PROPRIETARY
LAN SWITCH
PI3L720
Intel Clarkville
I218LM
TDA8034HN
eDP CONN
Reduce Level
ShifterUSB3.0/2.0
DOCKING
PORT
SP
I
To Docking side
BGA CPU
INTELHASWELL
ULT
SATA1
DAI
BC BUS
Fingerprint
CONNFP_USB
SMSC KBC
MEC5075
Full Mini CardWLAN+BT/
IO/BRJ45
1333/1600MHz
W25Q32FVSSIQ
64M 4K sector
32M 4K sector
W25Q64FVSSIQ
SD4.0O2 Micro OZ777FJ2LN
Card reader
Discrete TPM
ECE5048
SMSC SIO
USH board
AT97SC3204
PAGE 34
PAGE 30 PAGE 30
PAGE 37 PAGE 37
PAGE 36
PAGE 38
PAGE 29
PAGE 7
PAGE 26
PAGE 26
PAGE 33
Full Mini Card
mSATA60GHz
Mini-DP
DOCK _USB2.0[5]
PI3USB3102
PAGE 32
USB3&2 Switch
PAGE 22
PAGE 27
PAGE 23
PAGE 28
PAGE 28
SW_USB2.0[0]
USB
SW_USB2.0[5]
PCIE3 PCIE4
SATA2
USB2.0[6]USB2.0[2]
eDP
DDI1
DP
DP
FAN CONN
DOCK_USB3.0[3]
DOCK_USB2.0[0]
DOCK_USB2.0[5]
USB2.0[4]
DAI
PAGE 25
PAGE 35
USB2.0[7]
PAGE 9
PAGE 9
PAGE 40
PAGE 40
Vol bottom SW
PAGE 39
PAGE 31 PAGE 31
PAGE 35
PAGE 6~17
PAGE 18 19
PAGE 22
Trough eDP Cable
CameraUSB2.0[3]
PAGE 22
REV. type
PAGE 35
PAGE 29
PAGE 20Near Field
Communications con
NX3DV221
PAGE 33
USB20 Switch
DOCK _USB2.0[0]
Trough eDP Cable
LPC Touch Screen
Conn
PCIE6_L0
PAGE 27
Pericom
PI3VDP12412
PAGE 21
For MB/DockVideo SwitchIDT VMM2320
DDI2
DP
DP
VGA
SW_USB3.0[3]
DOCK_USB3.0[3]
PAGE 33USB3.0/2.0+PS
USB2.0[0]
PAGE 35
IO/B
USB3.0/2.0
USB2.0[1]
SLGC55594A
USB POWER SHAREPAGE 33
PAGE 23
HDMI CONNHDMI
PAGE 22
Trough eDP Cable
USB3.0[2]
USB3.0[1]
DOCKED_LIO_EN
USB3.0[3]
DOCKED
USB2.0[5]
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
Block Diagram
2 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
Block Diagram
2 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
Block Diagram
2 59Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PM TABLE
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
PCIE
PCIE 1
PCIE 2
PCIE 3
POWER STATES
PCIE 4
PCIE 5
LOM
+3.3V_M +3.3V_M
(M-OFF)
ON
ON
ON
ON
OFF
OFF
OFFOFF
+3.3V_SUS+5V_ALW +5V_RUN
+3.3V_ALW_PCH
+1.35V_MEM
S0
S3
S5 S4/AC don't exist
ON
powerplane
S5 S4/AC
State
OFFON
ON
ON
ON ON
OFF
OFF
OFF
OFFOFF
+3.3V_RTC_LDO
+1.05V_M
WLAN + BT
WWAN
CAMERA
USH->SMART CARD
2
3
1
4
USB PORT#
0
DESTINATION
6
5
7
HSWULT
+1.05V_M+3.3V_RUN
+0.675V_DDR_VTT
+VCC_CORE
+1.05V_RUN
WLAN (WiGi)
DOCK
NA
SATA
SATA 0
DESTINATION
mSATASATA 1
SATA 2
SATA 3
0
1
BIO
NAUSH
need to update Power Status and
PM Table
JUSB2 // E-Dock 2
TOUCH
JUSB3
OFF
OFF
OFF
LOW
LOW
OFF
OFF
S0 (Full ON) / M0
SLP S3#
SLPS5#
HIGH
Signal
State
SLPS4#
HIGH HIGH
ALWAYSPLANE
ON
MPLANE
ON
SUSPLANE
RUNPLANE
CLOCKS
ON ON ON
S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON ON ON OFF
S4 (Suspend to DISK) / M3 ON ON OFF
SLPA#
HIGH
HIGH
LOW HIGH HIGH
S5 (SOFT OFF) / M3 ON ON OFFLOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S5 (SOFT OFF) / M-OFF
LOW HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
S4 (Suspend to DISK) / M-OFF HIGH
JUSB1-->Rear left
JUSB3-->Right
JUSB2-->Rear Right//DOCK
USB3.0
USB3.0 1
USB3.0 2
USB3.0 3
+3.3V_ALW
MMI (CARD READER)
PCIE 6 WWAN(PP/mSATA)
JUSB1 // E-Dock 1
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
Index and Config.
3 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
Index and Config.
3 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
Index and Config.
3 59Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
BATTERY +PWR_SRC
ADAPTER
FDC654P+BL_PWR_SRC
EN_INVPWR
CHARGER
+3.3V_ALW
TPS51285BRUKR+5V_ALW
ALWON
RU
N_O
N
+3.3V_RUN
(Q2)
(PU100)
+VCC_CORE
TPS51622
(PU500)
+1.35V_MEM
SU
S_O
N
0.6
75V
_D
DR
_V
TT
_O
N
RT8207
(PU11)
+0.675V_DDR_VTT
+3.3V_M
TPS22966
A_O
N
+5V_RUN
RU
N_O
N
H_V
R_E
N
SI3456DDV
(Q125)
+1.05V_MODPHY
+1.05V_M
A_O
N
(PU300)
TPS51212
+3.3V_SUS
SU
S_O
N
(U45)
AU
X_E
N_W
OW
L
MC
AR
D_W
WA
N_P
WR
EN
+3.3V_mSATA_WWAN
TPS22966
(U46)
TPS22966
(U18)
RU
N_O
N
+5V_RUN
_AUDIO
+3.3V_RUN
_AUDIO
RU
N_O
N
(Q1)
LP2301ALT1G
(Q3)
LP2301ALT1G
3.3
V_C
AM
_E
N
3.3
V_T
S_E
N
+3.3V_CAM
+3.3V_TSP
+3.3V_WLAN
MPHYP_PWR_EN
PWRSHARE_EN#
(U35)
G547I2P81U
ESATA_USB_PWR_EN#USB_SIDE_EN#
+5V_USB_
CHG_PWR
(U32)
G547I2P81U
+USB_PWR
(U52)
G547I2P81U
+USB_SIDE_PWR
+3.3V_ALW_PCH
PC
H_A
LW
_O
N
TPS22966
(U43)
RU
N_O
N
+1.05V_RUN
TPS22966
+3.3V_LAN
TPS22966
(U3)
3.3
V_H
DD
_E
N
+3.3V_HDD
(U22)
SIO
_S
LP
_LA
N#
APL3512A
(U9)
EN
VD
D_P
CH
+LCDVDD
TPS22966
(U22)
TPS22966
(U31)
+3.3V_RUN_VMM
+1.05V_RUN
+1.05V_RUN_VMM
DO
CK
ED
+3.3V_RUN
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
Power Rail
4 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
Power Rail
4 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
Power Rail
4 59Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MEC 5075
MEM_SMBDATA
MEM_SMBCLK
KBC
AH1
AP2
+3.3V_ALW_PCH
2.2K
2.2K
200 DIMMA
202
DIMMB200
202
AN1
AK1
LAN_SMBCLK
LAN_SMBDATA
+3.3V_ALW
129
127
2.2K
DOCK_SMB_CLK
DOCK_SMB_DAT DOCKING
2.2K
B4
A3
1A
1A
A4
B5
2.2K
2.2K
1B
1B
1C
1C
B59
A56
+3.3V_ALW2.2K
2.2K
100 ohm
100 ohmBATTERYCONN
7
6PBAT_SMBCLK
PBAT_SMBDAT
3A
1E
1E
2B
2B
B501G
1GA47
B7
A7
+3.3V_ALW2.2K
2.2K
2D
2D
BAY_SMBDAT
BAY_SMBCLK
A49
B52
CARD_SMBCLK
CARD_SMBDAT
+3.3V_ALW2.2K
2.2K
LOM
CHARGER_SMBCLK
CHARGER_SMBDAT Charger
SML1_SMBDATA
PCH
SML1_SMBCLK
AU3AH3
A50
B53
3A
B6A5
+3.3V_ALW_PCH2.2K
2.2K
USH
+3.3V_SUS
USH_SMBCLK
USH_SMBDAT
+3.3V_ALW10K
10K
53
51XDP
M9
L9
9
8
31
28
2N7002
2N7002
2.2K
2.2K
SMBUS Address [0x9a]
+3.3V_ALW
WWAN32
30
B7
A7
+3.3V_ALW2.2K
2.2K
GPU_SMBDAT
GPU_SMBCLK
2A
2A
NFC
1K
NFC_SMBCLK
NFC_SMBDATA0ohm depop
0ohm depop
0ohm
0ohm
SML0CLK
SML0DATA
+3.3V_ALW_PCH1K
LCD_SMBDAT
LCD_SMBCLK
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
SMBUS TOPOLOGY
5 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
SMBUS TOPOLOGY
5 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
SMBUS TOPOLOGY
5 59Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE:
THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
High - Enable Internal VRs
Low - Enable External VRs
INTVRMEN - INTEGRATED SUS 1.05V VRM
ENABLE
CMOS setting
Shunt Clear CMOS
Keep CMOS
TPM setting
Shunt Clear ME RTC Registers
Keep ME RTC Registers
ME_CLR1
Open
CMOS_CLR1
Open
CMOS place near DIMM
HDA for Codec
CAD note:
Place the resistor within 500 mils of the PCH. Avoid
routing next to clock pins.
SATA Impedance Compensation
LOW = ENABLE (DEFAULT)
HIGH = DISABLE
FLASH DESCRIPTOR SECURITY OVERRIDE
reference FFRD sch 0.5
reference 479493 figure 7-1
mSATA HDD(for WWAN card)
PCH Rx side need use strap pin to update PCIE +/-
EMI depop location
SATA HDD (for Goliad 12 to MSATA)
DOCK
PCH_RTCX2
PCH_RTCX1PCH_RTCX1_R
PCH_INTVRMEN
PCH_INTVRMENSRTCRST#PCH_RTCRST#
PCH_AZ_BITCLKPCH_AZ_SYNCPCH_AZ_RST#PCH_AZ_CODEC_SDIN0
PCH_AZ_SDOUT
PCH_AZ_BITCLK
PCH_AZ_SYNC
PCH_AZ_SDOUT
PCH_AZ_RST#
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDIPCH_JTAG_TDO
PCH_JTAG_JTAGX
mCARD_PCIE_SATA#
SATA_IREF
SATA_COMP
SATA_COMP
SATA_ACT#
INTRUDER#
PCH_AZ_SDOUT
HDD_DET#
+1.05V_M_JTAG PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_JTAG_TRST#
PCH_JTAG_TCK
PCH_JTAG_JTAGX
PCH_GPIO36mCARD_PCIE_SATA#
MPCIE_RST#HDD_DET#
+RTC_CELL
+RTC_CELL
+PCH_ASATA3PLL
+PCH_ASATA3PLL
+3.3V_ALW_PCH
+3.3V_RUN+1.05V_M
PCH_AZ_CODEC_SDIN0<26>
ME_FWP<36>
PCH_AZ_CODEC_SYNC<26>
PCH_AZ_CODEC_BITCLK<26>
PCH_AZ_CODEC_RST#<26>
PCH_AZ_CODEC_SDOUT<26>
SATA_ACT# <40>
PCH_JTAG_TDI<9>PCH_JTAG_TDO<9>PCH_JTAG_TMS<9>
PCH_RTCRST#<9>
PCH_JTAG_TCK<9>PCH_JTAG_TRST#<9>
PCH_JTAG_JTAGX<9>
SATA_PTX_mSATARX_P3 <31>SATA_PTX_mSATARX_N3 <31>
SATA_PRX_mSATATX_P3 <31>SATA_PRX_mSATATX_N3 <31>
mCARD_PCIE_SATA# <36>PCH_GPIO36 <10>
SATA_PTX_DRX_P1_C <25>SATA_PTX_DRX_N1_C <25>
SATA_PRX_DTX_P1_C <25>SATA_PRX_DTX_N1_C <25>
SATA_PRX_DKTX_P0_C <34>
SATA_PTX_DKRX_N0_C <34>SATA_PTX_DKRX_P0_C <34>
SATA_PRX_DKTX_N0_C <34>
MPCIE_RST# <31,7>HDD_DET# <25>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(1/12)
6 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(1/12)
6 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(1/12)
6 59Friday, May 17, 2013
Compal Electronics, Inc.
RC
16
0_0603_5%
@RC
16
0_0603_5%
@
12
T1PAD~D @T1PAD~D @
T4 PAD~D@ T4 PAD~D@
RC
1330K
_0402_1%
RC
1330K
_0402_1%
12
T5 PAD~D@ T5 PAD~D@
RC25 33_0402_5%RC25 33_0402_5%1 2
YC1
32.768KHZ_12.5PF_Q13FC135000040
YC1
32.768KHZ_12.5PF_Q13FC135000040
12
RC20 51_0402_1%RC20 51_0402_1%12
RC19 3.01K_0402_1%RC19 3.01K_0402_1%1 2
RC1210K_0402_5% RC1210K_0402_5%1 2
CMOS1 SHORT PADS~D@CMOS1 SHORT PADS~D@
11
22
T2PAD~D @T2PAD~D @
RC10 1K_0402_1%@ RC10 1K_0402_1%@12
ME1 SHORT PADS~D@ME1 SHORT PADS~D@
11
22
RC26 33_0402_5%EMC@
RC26 33_0402_5%EMC@
1 2
RC8 20K_0402_5%RC8 20K_0402_5%1 2
SATAAUDIO
RTC
JTAG
HASWELL_MCP_E
Rev1p25 OF 19
UC1E
SATAAUDIO
RTC
JTAG
HASWELL_MCP_E
Rev1p25 OF 19
UC1E
INTVRMENAV7
SRTCRSTAV6
RTCRSTAU7
RTCX1AW5
SATA_RN0/PERN6_L3J5
SATA_RP0/PERP6_L3H5
SATA_TN0/PETN6_L3B15
SATA_TP0/PETP6_L3A15
SATA_RP1/PERP6_L2H8SATA_RN1/PERN6_L2J8
SATA_TN1/PETN6_L2A17
SATA_TP1/PETP6_L2B17
SATA_RP2/PERP6_L1H6SATA_RN2/PERN6_L1J6
SATA_TN2/PETN6_L1B14
SATA_TP2/PETP6_L1C15
SATA_RN3/PERN6_L0F5
SATA_RP3/PERP6_L0E5
SATA_TN3/PETN6_L0C17
SATA_TP3/PETP6_L0D17
SATA0GP/GPIO34V1
SATA1GP/GPIO35U1
SATA2GP/GPIO36V6
SATA3GP/GPIO37AC1
SATA_IREFA12
SATA_RCOMPC12
INTRUDERAU6 RTCX2AY5
JTAGXAE63
SATALEDU3
I2S1_SCLKAY8
RSVDAV2
RSVDAL11
RSVDAC4
HDA_BCLK/I2S0_SCLKAW8
HDA_SYNC/I2S0_SFRMAV11
HDA_RST/I2S_MCLKAU8
HDA_SDI0/I2S0_RXDAY10
HDA_SDO/I2S0_TXDAU11 HDA_SDI1/I2S1_RXDAU12
HDA_DOCK_EN/I2S1_TXDAW10
HDA_DOCK_RST/I2S1_SFRMAV10
PCH_TRSTAU62
PCH_TCKAE62
PCH_TDIAD61
PCH_TDOAE61
PCH_TMSAD62 RSVD
K10RSVDL11
RC6 20K_0402_5%RC6 20K_0402_5%1 2
CC2 15P_0402_50V8JCC2 15P_0402_50V8J1 2
CC1
15P_0402_50V8J
CC1
15P_0402_50V8J
1 2
CC3 1U_0402_6.3V6KCC3 1U_0402_6.3V6K1 2
RC
2330K
_0402_1%
@R
C2
330K
_0402_1%
@
12
RC14 0_0402_5%@ RC14 0_0402_5%@12
RC11100K_0402_5% RC11100K_0402_5%1 2
RC23 33_0402_5%RC23 33_0402_5%1 2
CC
527P
_0402_50V
8J
@C
C5
27P
_0402_50V
8J
@
1
2
CC4 1U_0402_6.3V6KCC4 1U_0402_6.3V6K1 2
RC17 51_0402_1%RC17 51_0402_1%12
RC24 33_0402_5%RC24 33_0402_5%1 2
RC4 0_0402_5%@ RC4 0_0402_5%@1 2
RC
510M
_0402_5%
RC
510M
_0402_5%
12
RC3 1K_0402_5%@ RC3 1K_0402_5%@1 2
RC9 1K_0402_5%RC9 1K_0402_5%1 2
RC22 51_0402_1%@ RC22 51_0402_1%@12
RC7 1M_0402_5%RC7 1M_0402_5%1 2
T3 PAD~D@ T3 PAD~D@
RC18 51_0402_1%RC18 51_0402_1%12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE:
THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
200 MIL SO864Mb Flash ROM
32Mb Flash ROM200 MIL SO8
TAA Config
10/100/1G LAN --->
MMI--->
reference PDG0.7
reference PDG0.7
Intel PDG 0.9
ADD EMI solution(EMC)
For RF request(EMC)
reference PDG0.7
Every pin need one gnd by itself
WLAN (Mini Card 2)--->
WWAN (Mini Card 1)--->
XB use 50185-02041-001
XTAL24_OUT
XTAL24_IN_R
XTAL24_IN
CLK_BIASREF
CLK_BIASREF
MCP_TESTLOW1MCP_TESTLOW2
MCP_TESTLOW4MCP_TESTLOW3
MCP_TESTLOW1
MCP_TESTLOW2
MCP_TESTLOW3
MCP_TESTLOW4
LPC_LAD3
LPC_LAD1
LPC_LFRAME#
LPC_LAD2
LPC_LAD0
PCH_SPI_DO2
PCH_SPI_DO3
SPI_WP#_SEL
PCH_SPI_DO
PCH_SPI_CS1#
PCH_SPI_DO2PCH_SPI_DIN
PCH_SPI_DO3
PCH_SPI_CS0#PCH_SPI_CLK
PCH_SPI_DO2SPI_DIN32PCH_SPI_DIN
PCH_SPI_CS1# SPI_PCH_CS1#_R
SPI_PCH_DO2_32
MEM_SMBDATA
MEM_SMBCLKSML0CLKSML0DATA
SML1_SMBCLKSML1_SMBDATA
PCH_CL_RST1#
PCH_CL_CLK1PCH_CL_DATA1
SML0CLK
SML0DATA
MEM_SMBCLK
MEM_SMBDATA
SML1_SMBCLK
SML1_SMBDATA
MEM_SMBCLKMEM_SMBDATA
PCH_SMB_ALERT#
PCI_CLK_LPC_0
PCH_GPIO73
PCH_GPIO73
SML0CLK
SML0DATA
PCI_CLK_LPC
SPI_CLK64SPI_CLK32
PCI_CLK_LPC_1
PCI_CLK_LPC_0
TAA_DO3_64TAA_DO3_32TAA_DO2_64TAA_DO2_32
TAA_CLK64TAA_CLK32TAA_CS0#_RTAA_CS1#_R
TAA_DO64TAA_DO32
TAA_DIN64TAA_DIN32
PCI_CLK_LPC_1
PCH_SPI_CS1#PCH_SPI_CS0#
PCH_SPI_DOPCH_SPI_DO
PCH_SPI_CLKPCH_SPI_CLK
PCH_SPI_DINPCH_SPI_DIN
PCH_SPI_DO3PCH_SPI_DO3PCH_SPI_DO2PCH_SPI_DO2
PCH_SPI_CS0# SPI_PCH_CS0#_RPCH_SPI_DIN SPI_DIN64
SPI_PCH_DO2_64PCH_SPI_DO2
SPI_WP#_SEL
PCH_SPI_DO3SPI_PCH_DO3_64SPI_CLK64SPI_DO64 PCH_SPI_DO
PCH_SPI_CLK
PCH_SPI_DO3
PCH_SPI_DOPCH_SPI_CLKSPI_CLK32
SPI_DO32
SPI_PCH_DO3_32
DDR_XDP_WAN_SMBDAT
DDR_XDP_WAN_SMBCLK
DGPU_PWROKMINI2CLK_REQ#MINI1CLK_REQ#MPCIE_RST#
PCI_CLK_LPC
MINI2CLK_REQ#
MINI1CLK_REQ#
MMICLK_REQ#
LANCLK_REQ#
CLK_PCIE_MMI#CLK_PCIE_MMI
CLK_PCIE_MINI2CLK_PCIE_MINI2#
CLK_PCIE_LAN#CLK_PCIE_LAN
CLK_PCIE_MINI1#CLK_PCIE_MINI1
PCIECLK_REQ0#
+PCH_VCCACLKPLL
+3.3V_M
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_M
+3.3V_M
+3.3V_M
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
LPC_LAD0<25,29,36,37>LPC_LAD1<25,29,36,37>LPC_LAD2<25,29,36,37>LPC_LAD3<25,29,36,37>
LPC_LFRAME#<25,29,36,37>
DDR_XDP_WAN_SMBDAT <18,19,31,9>
DDR_XDP_WAN_SMBCLK <18,19,31,9>
PCH_CL_DATA1 <31>PCH_CL_CLK1 <31>
PCH_CL_RST1# <31>
SML1_SMBDATA <37>
CLK_PCI_5048 <36>
LAN_SMBDATA <28>
NFC_SMBDATA <20>
CLK_PCI_DOCK <34>
SML1_SMBCLK <37>
LAN_SMBCLK <28>
NFC_SMBCLK <20>
CLK_PCI_TPM_TCM <29>
CLK_PCI_LPDEBUG <25>
SPI_WP#_SEL<36>
PCH_SMB_ALERT# <11>
DGPU_PWROK <10>
MPCIE_RST# <31,6>
CLK_PCI_MEC <37>
MINI2CLK_REQ#<31>
MINI1CLK_REQ#<31>
PCH_TPM_LPC_EN<29>
MMICLK_REQ#<30>
LANCLK_REQ#<10,28>
CLK_PCIE_MMI#<30>CLK_PCIE_MMI<30>
CLK_PCIE_MINI2#<31>CLK_PCIE_MINI2<31>
CLK_PCIE_LAN#<28>CLK_PCIE_LAN<28>
CLK_PCIE_MINI1#<31>CLK_PCIE_MINI1<31>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(2/12)
7 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(2/12)
7 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(2/12)
7 59Friday, May 17, 2013
Compal Electronics, Inc.
C7
60
.1U
_0
40
2_
25
V6
@C
76
0.1
U_
04
02
_2
5V
6@
1
2
R41 33_0402_5%5@ R41 33_0402_5%5@ 1 2
RC56 10K_0402_5%RC56 10K_0402_5%1 2
R9 33_0402_5%1@ R9 33_0402_5%1@ 1 2
R23 0_0402_5%@R23 0_0402_5%@12
G
SD
QC1BDMN66D0LDW-7_SOT363-6
G
SD
QC1BDMN66D0LDW-7_SOT363-6
6 1
2
R8 0_0402_5%@R8 0_0402_5%@12
RC302.2K_0402_5% RC302.2K_0402_5%12
R16 33_0402_5%4@ R16 33_0402_5%4@ 1 2
RC57 10K_0402_5%RC57 10K_0402_5%1 2
RC35 0_0402_5%@RC35 0_0402_5%@12
RC362.2K_0402_5% RC362.2K_0402_5%1 2
R17 0_0402_5%5@ R17 0_0402_5%5@ 1 2
R7 33_0402_5%1@ R7 33_0402_5%1@ 1 2
JTAA1
ACES_50185-02041-001
CONN@JTAA1
ACES_50185-02041-001
CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1616
1818
2020
1515
1717
1919
G22
G21
G23
G24
R6 33_0402_5%1@ R6 33_0402_5%1@ 1 2
YC224MHZ_12PF_X3G024000DC1H
YC224MHZ_12PF_X3G024000DC1H
1 23 4
RC372.2K_0402_5% RC372.2K_0402_5%1 2
R58 33_0402_5%2@ R58 33_0402_5%2@ 1 2
RC4610K_0402_5% RC4610K_0402_5%1 2
C8
50
.1U
_0
40
2_
25
V6
@C
85
0.1
U_
04
02
_2
5V
6@
1
2
S
GD
QC1ADMN66D0LDW-7_SOT363-6
S
GD
QC1ADMN66D0LDW-7_SOT363-6
5
3 4
SPI C-LINK
SMBUS
LPC
HASWELL_MCP_E
Rev1p27 OF 19
UC1G
SPI C-LINK
SMBUS
LPC
HASWELL_MCP_E
Rev1p27 OF 19
UC1G
LAD0AU14
LAD1AW12
LAD2AY12
LAD3AW11
LFRAMEAV12
SPI_CS0Y7 SPI_CLK
AA3
SPI_CS1Y4
SPI_CS2AC2
SPI_MOSIAA2
SPI_MISOAA4
SPI_IO2Y6
SPI_IO3AF1
SMBALERT/GPIO11AN2
SMBCLKAP2
SML0ALERT/GPIO60AL2SMBDATAAH1
SML0CLKAN1
SML0DATAAK1
SML1ALERT/PCHHOT/GPIO73AU4
SML1DATA/GPIO74AH3SML1CLK/GPIO75AU3
CL_CLKAF2
CL_DATAAD2
CL_RSTAF4
HASWELL_MCP_E
CLOCK
SIGNALS
Rev1p26 OF 19
UC1F HASWELL_MCP_E
CLOCK
SIGNALS
Rev1p26 OF 19
UC1F
PCIECLKRQ0/GPIO18U2
CLKOUT_PCIE_N1B41
CLKOUT_PCIE_P1A41
PCIECLKRQ1/GPIO19Y5
CLKOUT_ITPXDP_PA35CLKOUT_ITPXDP_NB35
CLKOUT_LPC_1AP15CLKOUT_LPC_0AN15
XTAL24_OUTB25XTAL24_INA25
PCIECLKRQ5/GPIO23T2 CLKOUT_PCIE_P5
A37 CLKOUT_PCIE_N5B37
PCIECLKRQ4/GPIO22U5
CLKOUT_PCIE_N4A39
CLKOUT_PCIE_P4B39
PCIECLKRQ3/GPIO21N1 CLKOUT_PCIE_P3
C37 CLKOUT_PCIE_N3B38
PCIECLKRQ2/GPIO20AD1
CLKOUT_PCIE_N2C41
CLKOUT_PCIE_P2B42
CLKOUT_PCIE_P0C42 CLKOUT_PCIE_N0C43
DIFFCLK_BIASREFC26
RSVDK21
RSVDM21
TESTLOW_C35C35
TESTLOW_C34C34
TESTLOW_AK8AK8
TESTLOW_AL8AL8
C5
0.1U_0402_25V6
1@ C5
0.1U_0402_25V6
1@1 2
RC453.01K_0402_1% RC453.01K_0402_1%1 2
R5 33_0402_5%1@ R5 33_0402_5%1@ 1 2
R19 33_0402_5%4@ R19 33_0402_5%4@ 1 2
CC1412P_0402_50V8J @CC1412P_0402_50V8J @12
RC55 10K_0402_5%RC55 10K_0402_5%1 2
R15 33_0402_5%4@ R15 33_0402_5%4@ 1 2
R13 33_0402_5%2@ R13 33_0402_5%2@ 1 2
R59 33_0402_5%5@ R59 33_0402_5%5@ 1 2
RC29 0_0402_5%@RC29 0_0402_5%@12
R10 0_0402_5%2@ R10 0_0402_5%2@ 1 2
R4 33_0402_5%1@ R4 33_0402_5%1@ 1 2
RP4
10K_8P4R_5%
RP4
10K_8P4R_5%
1 82 73 64 5
RC381K_0402_5% RC381K_0402_5%12
CC6
18P_0402_50V8J
CC6
18P_0402_50V8J
12
R5
73
3_
04
02
_5
%@
R5
73
3_
04
02
_5
%@
12
R18 33_0402_5%5@ R18 33_0402_5%5@ 1 2
RC6422_0402_5% EMC_3@RC6422_0402_5% EMC_3@1 2RC6622_0402_5% EMC@RC6622_0402_5% EMC@1 2
R1 1K_0402_5%R1 1K_0402_5%1 2
RC4710K_0402_5% RC4710K_0402_5%1 2
R122 10K_0402_5%R122 10K_0402_5%1 2
RC391K_0402_5% RC391K_0402_5%12
R4
53
3_
04
02
_5
%@
R4
53
3_
04
02
_5
%@
12
RC58 22_0402_5%EMC@ RC58 22_0402_5%EMC@ 1 2
R123 10K_0402_5%R123 10K_0402_5%1 2
RC3410K_0402_5% RC3410K_0402_5%12
RC5210K_0402_5% RC5210K_0402_5%1 2
RC282.2K_0402_5% RC282.2K_0402_5%12
R11 33_0402_5%2@ R11 33_0402_5%2@ 1 2
RC40 0_0402_5%@RC40 0_0402_5%@1 2
U1
W25Q64FVSSIQ_SO8
1@U1
W25Q64FVSSIQ_SO8
1@
CLK6
GND4
DI(IO0)5
DO(IO1)2
/WP(IO2)3
VCC8
/HOLD(IO3)7/CS
1
R43 33_0402_5%2@ R43 33_0402_5%2@ 1 2
T6PAD~D @T6PAD~D @
RC5010K_0402_5% RC5010K_0402_5%1 2
R12 33_0402_5%5@ R12 33_0402_5%5@ 1 2
R14 0_0402_5%4@ R14 0_0402_5%4@ 1 2
C6
0.1U_0402_25V6
4@ C6
0.1U_0402_25V6
4@1 2
RC61 22_0402_5%EMC@ RC61 22_0402_5%EMC@ 1 2
U2
W25Q32FVSSIQ_SO8
4@U2
W25Q32FVSSIQ_SO8
4@
CLK6
GND4
DI/IO05
DO/IO12
/WP/IO23
VCC8
/HOLD/IO37/CS
1
R48 33_0402_5%5@ R48 33_0402_5%5@ 1 2
RC
44
1M
_0
40
2_
5%
RC
44
1M
_0
40
2_
5%
12
R20 33_0402_5%4@ R20 33_0402_5%4@ 1 2
CC7
18P_0402_50V8J
CC7
18P_0402_50V8J
12
RC33 0_0402_5%@RC33 0_0402_5%@12
R2 1K_0402_5%R2 1K_0402_5%1 2
RC63 22_0402_5%EMC@ RC63 22_0402_5%EMC@ 1 2
R21 33_0402_5%4@ R21 33_0402_5%4@ 1 2
CC1512P_0402_50V8J @CC1512P_0402_50V8J @12
T7PAD~D @T7PAD~D @
RC31 0_0402_5%@RC31 0_0402_5%@12
RC650_0402_5% @RC650_0402_5% @1 2
R22 33_0402_5%2@ R22 33_0402_5%2@ 1 2
R3 0_0402_5%1@ R3 0_0402_5%1@ 1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE:
THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
DDR_A_D27
DDR_A_D35
DDR_A_D56
DDR_A_D23
DDR_A_D53
DDR_A_D47
DDR_A_D49
DDR_A_D29
DDR_A_D42
DDR_A_D61
DDR_A_D30
DDR_A_D36
DDR_A_D57
DDR_A_D59
DDR_A_D24
DDR_A_D48
DDR_A_D50
DDR_A_D28
DDR_A_D43
DDR_A_D62
DDR_A_D31
DDR_A_D37
DDR_A_D39
DDR_A_D58
DDR_A_D25
DDR_A_D33
DDR_A_D54
DDR_A_D51
DDR_A_D44
DDR_A_D46
DDR_A_D32
DDR_A_D38
DDR_A_D40
DDR_A_D26
DDR_A_D34
DDR_A_D55
DDR_A_D52
DDR_A_D45
DDR_A_D63
DDR_A_D41
DDR_A_D60
DDR_A_D0DDR_A_D1DDR_A_D2DDR_A_D3DDR_A_D4DDR_A_D5DDR_A_D6
DDR_A_D9
DDR_A_D18
DDR_A_D14
DDR_A_D8
DDR_A_D17
DDR_A_D13
DDR_A_D22DDR_A_D21
DDR_A_D7
DDR_A_D16
DDR_A_D12
DDR_A_D20
DDR_A_D10
DDR_A_D15
DDR_A_D11
DDR_A_D19
DDR_A_DQS7
DDR_A_DQS1DDR_A_DQS2
DDR_A_DQS5
DDR_A_DQS3DDR_A_DQS4
DDR_A_DQS0
DDR_A_DQS6
DDR_A_DQS#5
DDR_A_DQS#7
DDR_A_DQS#2DDR_A_DQS#1DDR_A_DQS#0
DDR_A_DQS#3DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_MA0DDR_A_MA1
DDR_A_MA3
DDR_A_MA7DDR_A_MA8
DDR_A_MA13
DDR_A_MA2
DDR_A_MA14
DDR_A_MA5
DDR_A_MA10
DDR_A_MA4
DDR_A_MA11
DDR_A_MA9
DDR_A_MA6
DDR_A_MA12
DDR_A_MA15
M_CLK_DDR0M_CLK_DDR#0
M_CLK_DDR1M_CLK_DDR#1
DDR_CKE0_DIMMADDR_CKE1_DIMMA
DDR_CS1_DIMMA#DDR_CS0_DIMMA#
DDR_A_BS0DDR_A_BS1DDR_A_BS2
DDR_A_RAS#DDR_A_WE#DDR_A_CAS#
DDR_B_D29
DDR_B_D59
DDR_B_D50DDR_B_D49
DDR_B_D13
DDR_B_D19
DDR_B_D14
DDR_B_D3
DDR_B_D55
DDR_B_D47
DDR_B_D52
DDR_B_D44
DDR_B_D41
DDR_B_D8
DDR_B_D5
DDR_B_D56
DDR_B_D48
DDR_B_D38
DDR_B_D35
DDR_B_D26DDR_B_D25
DDR_B_D4
DDR_B_D63
DDR_B_D34
DDR_B_D32
DDR_B_D10
DDR_B_D17
DDR_B_D51
DDR_B_D40
DDR_B_D36
DDR_B_D31
DDR_B_D21DDR_B_D20
DDR_B_D15
DDR_B_D7
DDR_B_D62
DDR_B_D46
DDR_B_D42
DDR_B_D18
DDR_B_D12
DDR_B_D1
DDR_B_D53
DDR_B_D37
DDR_B_D22
DDR_B_D57
DDR_B_D27
DDR_B_D54
DDR_B_D45
DDR_B_D39
DDR_B_D30
DDR_B_D9
DDR_B_D60
DDR_B_D58
DDR_B_D33
DDR_B_D0
DDR_B_D61
DDR_B_D43
DDR_B_D28
DDR_B_D23DDR_B_D24
DDR_B_D16
DDR_B_D6
DDR_B_D2M_CLK_DDR3M_CLK_DDR#3
M_CLK_DDR#2M_CLK_DDR2
DDR_CKE2_DIMMBDDR_CKE3_DIMMB
DDR_CS2_DIMMB#DDR_CS3_DIMMB#
DDR_B_BS2
DDR_B_BS0DDR_B_BS1
DDR_B_CAS#
DDR_B_RAS#DDR_B_WE#
DDR_B_MA10DDR_B_MA9
DDR_B_MA14
DDR_B_MA5
DDR_B_MA13
DDR_B_MA11
DDR_B_MA7
DDR_B_MA2
DDR_B_MA0
DDR_B_MA6
DDR_B_MA1
DDR_B_MA12
DDR_B_MA4
DDR_B_MA8
DDR_B_MA3
DDR_B_MA15
DDR_B_DQS#3
DDR_B_DQS#6
DDR_B_DQS#1DDR_B_DQS#2
DDR_B_DQS#0
DDR_B_DQS#5
DDR_B_DQS#7
DDR_B_DQS#4
DDR_B_DQS3DDR_B_DQS2
DDR_B_DQS7
DDR_B_DQS4
DDR_B_DQS1
DDR_B_DQS5DDR_B_DQS6
DDR_B_DQS0
DDR_B_D11
+SM_VREF_CA+SM_VREF_DQ0+SM_VREF_DQ1
DDR_A_D[0..63]<18>
DDR_A_DQS#[0..7] <18>
DDR_A_DQS[0..7] <18>
DDR_A_MA[0..15] <18>
M_CLK_DDR0 <18>M_CLK_DDR#0 <18>
M_CLK_DDR1 <18>M_CLK_DDR#1 <18>
DDR_CKE0_DIMMA <18>DDR_CKE1_DIMMA <18>
DDR_CS0_DIMMA# <18>DDR_CS1_DIMMA# <18>
DDR_A_BS0 <18>DDR_A_BS1 <18>DDR_A_BS2 <18>
DDR_A_RAS# <18>DDR_A_WE# <18>
DDR_A_CAS# <18>
DDR_B_D[0..63]<19>
M_CLK_DDR#2 <19>M_CLK_DDR2 <19>M_CLK_DDR#3 <19>M_CLK_DDR3 <19>
DDR_CKE2_DIMMB <19>DDR_CKE3_DIMMB <19>
DDR_CS3_DIMMB# <19>DDR_CS2_DIMMB# <19>
DDR_B_BS2 <19>DDR_B_BS1 <19>DDR_B_BS0 <19>
DDR_B_CAS# <19>DDR_B_WE# <19>
DDR_B_RAS# <19>
DDR_B_MA[0..15] <19>
DDR_B_DQS#[0..7] <19>
DDR_B_DQS[0..7] <19>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(3/12)
8 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(3/12)
8 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(3/12)
8 59Friday, May 17, 2013
Compal Electronics, Inc.
DDR CHANNEL A
HASWELL_MCP_E
Rev1p23 OF 19
UC1C
DDR CHANNEL A
HASWELL_MCP_E
Rev1p23 OF 19
UC1C
SA_DQ25AR55
SA_DQ28AL55
SA_CLK1AY36SA_CLK#1AW36SA_CLK0AV37SA_CLK#0AU37
SA_DQ0AH63
SA_DQ1AH62
SA_DQ2AK63
SA_DQ3AK62
SA_DQ4AH61
SA_DQ5AH60
SA_DQ6AK61
SA_DQ7AK60
SA_DQ8AM63
SA_DQ9AM62
SA_DQ10AP63
SA_DQ11AP62
SA_DQ12AM61
SA_DQ13AM60
SA_DQ14AP61
SA_DQ16AP58
SA_DQ17AR58
SA_DQ18AM57
SA_DQ19AK57
SA_DQ20AL58
SA_DQ21AK58
SA_DQ22AR57
SA_DQ23AN57
SA_DQ24AP55
SA_DQ27AK54 SA_DQ26AM54
SA_DQ29AK55
SA_DQ30AR54
SA_DQ31AN54
SA_DQ32AY58
SA_DQ33AW58
SA_DQ34AY56
SA_DQ35AW56
SA_DQ36AV58
SA_DQ37AU58
SA_DQ38AV56
SA_DQ39AU56
SA_DQ40AY54
SA_DQ41AW54
SA_DQ42AY52
SA_DQ43AW52
SA_DQ44AV54
SA_DQ45AU54
SA_DQ46AV52
SA_DQ47AU52
SA_DQ48AK40
SA_DQ49AK42
SA_DQ50AM43
SA_DQ51AM45
SA_DQ52AK45
SA_DQ53AK43
SA_DQ54AM40
SA_DQ55AM42
SA_DQ56AM46
SA_DQ57AK46
SA_DQ58AM49
SA_DQ59AK49
SA_DQ60AM48
SA_DQ61AK48
SA_DQ62AM51
SA_DQ63AK51
SA_DQ15AP60
SA_CKE2AY42SA_CKE1AW43SA_CKE0AU43
SA_CKE3AY43
SA_CS#1AR32SA_CS#0AP33
SA_ODT0AP32
SA_RASAY34
SA_CASAU34SA_WEAW34
SA_BA0AU35
SA_BA1AV35
SA_BA2AY41
SA_MA1AY37SA_MA0AU36
SA_MA2AR38
SA_MA3AP36
SA_MA4AU39
SA_MA5AR36
SA_MA7AW39SA_MA6AV40
SA_MA9AU40SA_MA8AY39
SA_MA11AW41
SA_MA12AU41
SA_MA10AP35
SA_MA14AV42SA_MA13AR35
SA_MA15AU42
SA_DQSN0AJ61
SA_DQSN2AM58SA_DQSN1AN62
SA_DQSN3AM55
SA_DQSN5AV53SA_DQSN4AV57
SA_DQSN7AL48SA_DQSN6AL43
SA_DQSP1AN61SA_DQSP0AJ62
SA_DQSP4AW57SA_DQSP3AN55SA_DQSP2AN58
SA_DQSP6AL42SA_DQSP5AW53
SA_DQSP7AL49
SM_VREF_CAAP49
SM_VREF_DQ1AP51SM_VREF_DQ0AR51
DDR CHANNEL B
HASWELL_MCP_E
Rev1p24 OF 19
UC1D
DDR CHANNEL B
HASWELL_MCP_E
Rev1p24 OF 19
UC1D
SB_DQSP4AV22
SB_DQSP5AW18
SB_DQSP6AM21
SB_DQSP3AM25
SB_DQSP7AM18
SB_DQSP2AM28
SB_DQSN7AN18
SB_DQSP0AV30
SB_DQSP1AW26
SB_DQSN6AN21
SB_DQSN2AN28
SB_DQSN3AN25
SB_DQSN4AW22
SB_DQSN5AV18
SB_DQSN1AV26SB_DQSN0AW30
SB_MA14AR46
SB_MA15AP46
SB_MA13AK33
SB_MA9AU46
SB_MA10AK36
SB_MA11AV47
SB_MA8AY47
SB_MA12AU47
SB_MA4AR45
SB_MA5AP45
SB_MA6AW46
SB_MA3AR42
SB_MA7AY46
SB_MA2AP42
SB_MA0AP40
SB_MA1AR40
SB_BA2AU49
SB_WEAK35
SB_CASAM33
SB_BA0AL35
SB_BA1AM36
SB_RASAM35
SB_CS#1AK32
SB_ODT0AL32
SB_CS#0AM32
SB_CKE1AU50
SB_CKE2AW49
SB_CKE3AV50
SB_CKE0AY49
SB_CK#1AK38
SB_CK1AL38
SB_CK0AN38SB_CK#0AM38
SB_DQ61AM20
SB_DQ63AP18 SB_DQ62AR18
SB_DQ57AR20 SB_DQ56AN20
SB_DQ58AK18
SB_DQ59AL18
SB_DQ60AK20
SB_DQ51AM22
SB_DQ52AN22
SB_DQ53AP21
SB_DQ54AK21
SB_DQ55AK22
SB_DQ46AV17
SB_DQ47AU17
SB_DQ48AR21
SB_DQ49AR22
SB_DQ50AL21
SB_DQ45AU19
SB_DQ41AW19
SB_DQ42AY17
SB_DQ43AW17
SB_DQ44AV19
SB_DQ40AY19
SB_DQ36AV23
SB_DQ37AU23
SB_DQ38AV21
SB_DQ39AU21
SB_DQ35AW21
SB_DQ31AL25
SB_DQ32AY23
SB_DQ33AW23
SB_DQ30AK25
SB_DQ34AY21
SB_DQ26AR25 SB_DQ25AR26
SB_DQ27AP25
SB_DQ28AK26
SB_DQ29AM26
SB_DQ20AR29
SB_DQ21AN29
SB_DQ22AR28
SB_DQ23AP28
SB_DQ24AN26
SB_DQ15AU25
SB_DQ16AM29
SB_DQ17AK29
SB_DQ18AL28
SB_DQ19AK28
SB_DQ10AY25
SB_DQ11AW25
SB_DQ13AU27
SB_DQ5AU31
SB_DQ6AV29
SB_DQ7AU29
SB_DQ8AY27
SB_DQ9AW27
SB_DQ0AY31
SB_DQ1AW31
SB_DQ2AY29
SB_DQ3AW29
SB_DQ4AV31
SB_DQ14AV25
SB_DQ12AV27
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE:
THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
HIGH = ENABLED (DEFAULT)
LOW = DISABLED
DSWODVREN - ON DIE DSW VR ENABLE
CAD Note:
Avoid stub in the PWRGD path
while placing resistors RC115
CAD Note:
Trace width=12~15 mil, Spcing=20 mils
Max trace length= 500 mil
DDR3 COMPENSATION SIGNALS
PU/PD for JTAG signals
RC5 need to close to JCPU1
Place near JXDP1
reference CRB
Place near JXDP1.47
Place near JXDP1.48
reference Shark Bay ULT Validation Customer Debug Port
Implementation Requirement Rev 1.0
ESD request, place near CPU side
ESD request
ME_SUS_PWR_ACK_R SUSACK#_R
SYS_RESET#XDP_DBRESET#
ME_RESET#
SYS_RESET#SYS_PWROK_R
RESET_OUT# SYS_PWROK_R
PCH_PWROKPM_APWROK_R
PCH_PLTRST#PCH_PLTRST#_EC
PCH_PLTRST#
PCH_DPWROK PCH_RSMRST#_R
PCH_RSMRST#_RME_SUS_PWR_ACK_R
SIO_PWRBTN#AC_PRESENTPCH_BATLOW#SIO_SLP_S0#
DSWODVREN
DSWODVRENPCH_DPWROKPCH_PCIE_WAKE#
ME_RESET#
CLKRUN#SUS_STAT#/LPCPD#
SUS_STAT#/LPCPD#
SUSCLKSIO_SLP_S5#
SIO_SLP_S4#SIO_SLP_S3#SIO_SLP_A#SIO_SLP_SUS#SIO_SLP_LAN#
CPU_DETECT#
H_CATERR#
H_CATERR#PECI_EC
H_PROCHOT#
H_PROCHOT#_R
H_CPUPWRGD
SM_RCOMP1SM_RCOMP2
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
SM_RCOMP0
XDP_DBRESET#
CPU_XDP_TCLK
CPU_XDP_TMS
CPU_XDP_TRST#
CPU_XDP_TDO
CPU_XDP_TDI
CPU_XDP_PREQ#
CPU_XDP_PRDY#CPU_XDP_PREQ#CPU_XDP_TCLKCPU_XDP_TMSCPU_XDP_TRST#CPU_XDP_TDICPU_XDP_TDO
CFG8CFG9
CFG15CFG14
CFG18
CFG17CFG16
CFG2 CFG10CFG11CFG3
XDP_OBS1_RXDP_OBS0_R
CFG13CFG12
CFG19
CFD_PWRBTN#_XDP
CPU_XDP_PRDY#CPU_XDP_PREQ#
XDP_DBRESET#XDP_RST#_R
H_VCCST_PWRGD_XDP
DDR_XDP_SMBCLK_R1DDR_XDP_SMBDAT_R1
CPU_PWR_DEBUG#_R PCH_PLTRST#_ECPCH_PLTRST#_EC
CFG0CFG1
CFG4
CFG7CFG6
CFG5
SYS_PWROK_XDP
CFG3_R
H_CPUPWRGD
XDP_OBS0_RXDP_OBS1_RXDP_OBS2_RXDP_OBS3_RXDP_OBS4_RXDP_OBS5_RXDP_OBS6_RXDP_OBS7_R
SIO_SLP_S3#
SIO_SLP_S5#SIO_SLP_S4#SIO_SLP_A#
SIO_SLP_S0#
SYS_RESET#
PCH_RTCRST#
POWER_SW#_MB
TRST#_XDPTDO_XDP
TDI_XDPTMS_XDP
TDO_XDP
PCH_JTAG_TCK_R
CFG3
XDP_DBRESET#
CPU_XDP_TCLK
CPU_XDP_TCLK
TDO_XDP
CPU_XDP_TRST#
RUNPWROK
RUNPWROK
RUNPWROK
RUNPWROK
TRST#_XDP CPU_XDP_TRST#
CPU_XDP_TMSTMS_XDP
CPU_XDP_TDITDI_XDP TDI_XDP_R
CPU_XDP_TDOTDO_XDPPCH_JTAG_TDO
PCH_JTAG_TCK
PCH_JTAG_TDO TDI_XDP_R
CPU_XDP_TCLK
SYS_PWROK_XDP
PCH_PCIE_WAKE#
SIO_SLP_A#PM_APWROK_R
PM_APWROK
ME_SUS_PWR_ACKUSB_OC3#SIO_EXT_WAKE#
KB_DET#
PCH_RSMRST#_R
SUSACK#_R
H_PROCHOT#
H_CPUPWRGD
+3.3V_RUN
+3.3V_RUN+3.3V_ALW_PCH +RTC_CELL
+3.3V_RUN
+1.05V_VCCST
+1.05V_RUN
+3.3V_RUN
+1.05V_RUN
+1.05V_RUN
+1.05V_RUN
+3.3V_ALW_PCH
+PCH_VCCDSW3_3
+PCH_VCCDSW3_3
+1.05V_RUN
+3.3V_RUN
+3.3V_ALW_PCH
+PCH_VCCDSW3_3
+3.3V_ALW2
+3.3V_ALW_PCH
SUSACK#<12,36>
SYS_PWROK<36,9>RESET_OUT#<15,37>
PLTRST_LAN#<28>
PLTRST_USH#<29>PLTRST_MMI#<30>
PCH_PLTRST#_EC <25,29,31,36,37>
PCH_RSMRST#_Q<38>ME_SUS_PWR_ACK<37>
SIO_PWRBTN#<37,9>AC_PRESENT<12,37>
SIO_SLP_WLAN#<36>
PCH_DPWROK <36>PCH_PCIE_WAKE# <37>
CLKRUN# <10,29,36,37>
SIO_SLP_S5# <37>
SIO_SLP_S4# <36,39,43>SIO_SLP_S3# <36,39,43>SIO_SLP_A# <36,39,44>SIO_SLP_SUS# <36>SIO_SLP_LAN# <28,36>
CPU_DETECT#<36>
PECI_EC<37>
H_PROCHOT#<37,46,47,48>
DDR_PG_CTRL<18>
CFG18 <13>
CFG17 <13>CFG16 <13>
CFG3<13>
SIO_PWRBTN#<37,9>
SYS_PWROK<36,9>
DDR_XDP_WAN_SMBDAT<18,19,31,7>DDR_XDP_WAN_SMBCLK<18,19,31,7>
CFG1<13>CFG0<13>
CFG4<13>
CFG2<13>
CPU_PWR_DEBUG#<15>
CFG7<13>CFG6<13>
CFG5<13>
CFG9 <13>
CFG10 <13>CFG11 <13>
CFG8 <13>
CFG13 <13>
CFG14 <13>CFG15 <13>
CFG12 <13>
CFG19 <13>
H_VCCST_PWRGD<15>
DDR3_DRAMRST#_CPU<18>
PLTRST_VMM2320#<21>
PCH_RTCRST#<6>
PCH_JTAG_TCK<6>
PCH_JTAG_JTAGX<6>
PCH_JTAG_TRST#<6>
RUNPWROK<36,37>
PCH_JTAG_TMS<6>
PCH_JTAG_TDI<6>
PCH_JTAG_TDO<6>
SIO_SLP_S0#<37>
PM_APWROK<37>
PLTRST_NFC#<20>
POWER_SW#_MB<37,40>
PCH_BATLOW#<12>USB_OC3# <11>SIO_EXT_WAKE# <12,36>KB_DET# <12,38>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(4/12)
9 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(4/12)
9 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(4/12)
9 59Friday, May 17, 2013
Compal Electronics, Inc.
RC142 0_0402_5%@RC142 0_0402_5%@ 1 2
CC
90
10
0P
_0
40
2_
50
V8
J
@
CC
90
10
0P
_0
40
2_
50
V8
J
@1
2
RC280 51_0402_1%@ RC280 51_0402_1%@ 12RC114 62_0402_5%RC114 62_0402_5%
1 2
CC
10
0.1
U_
04
02
_2
5V
6
@CC
10
0.1
U_
04
02
_2
5V
6
@1
2
RC72 0_0402_5%@RC72 0_0402_5%@
1 2
RC113 49.9_0402_1%@ RC113 49.9_0402_1%@
1 2
RC81 8.2K_0402_5%@RC81 8.2K_0402_5%@
1 2
RC970_0402_5% @RC970_0402_5% @
12
RC
78
33
0K
_0
40
2_
1%
@R
C7
83
30
K_
04
02
_1
%@
12
UC6
74CBTLV3126BQ_DHVQFN14_2P5X3
XDP@UC6
74CBTLV3126BQ_DHVQFN14_2P5X3
XDP@
1OE1
1A2
1B3
2OE4
2A5
2B6
GND7
3B8
3A9
3OE10
4B11
4A12
4OE13
VCC14
GND PAD15
RC92 0_0402_5%@ RC92 0_0402_5%@ 1 2
CC
11
0.1
U_
04
02
_2
5V
6
@CC
11
0.1
U_
04
02
_2
5V
6
@1
2
UC7TC7SH08FU_SSOP5~D
UC7TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
T122PAD~D @T122PAD~D @
RC79 0_0402_5%@ RC79 0_0402_5%@
1 2
RC118 51_0402_1%@ RC118 51_0402_1%@ 12
CC680.1U_0402_25V6XDP@ CC680.1U_0402_25V6XDP@
1
2
RC71 10K_0402_5%RC71 10K_0402_5%
1 2
RC127 51_0402_1%RC127 51_0402_1%12
RC99 1K_0402_5%XDP@RC99 1K_0402_5%XDP@
1 2
RC122 51_0402_1%RC122 51_0402_1%12
UC274AHC1G09GW_TSSOP5~D
@ UC274AHC1G09GW_TSSOP5~D
@
B1
A2
G3
O4
P5
RC105 1K_0402_5%XDP@RC105 1K_0402_5%XDP@
1 2
RC108 0_0402_5%@RC108 0_0402_5%@ 1 2
CC82
0.1U_0402_25V6
@CC82
0.1U_0402_25V6
@1 2
RC102
1K_0402_5%
XDP@RC102
1K_0402_5%
XDP@
12
RP10
10K_8P4R_5%
RP10
10K_8P4R_5%
1 82 73 64 5
T126PAD~D @T126PAD~D @
RC120 51_0402_1%@ RC120 51_0402_1%@ 12
CC14922P_0402_50V8J
@CC14922P_0402_50V8J
@1
2
RC110 0_0402_5%@RC110 0_0402_5%@ 1 2
UC3TC7SH08FU_SSOP5~D
UC3TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
RC129121_0402_1% RC129121_0402_1% 12
T10 PAD~D@T10 PAD~D@
RC
11
51
0K
_0
40
2_
5%
RC
11
51
0K
_0
40
2_
5%
12
MISC
JTAG
DDR3
PWR
THERMAL
HASWELL_MCP_E
Rev1p22 OF 19
UC1B
MISC
JTAG
DDR3
PWR
THERMAL
HASWELL_MCP_E
Rev1p22 OF 19
UC1B
PREQK62PRDYJ62
PROC_TCKE60
PROC_TRSTE59
PROCHOTK63
PROCPWRGDC61
CATERRK61
PECIN62
PROC_DETECTD61
PROC_TMSE61
PROC_TDIF63
PROC_TDOF62
BPM#0J60
BPM#2H61BPM#1H60
BPM#3H62
BPM#7J61
SM_RCOMP0AU60
SM_RCOMP1AV60
SM_RCOMP2AU61
SM_PG_CNTL1AV61
BPM#6K60BPM#5H63BPM#4K59
SM_DRAMRSTAV15
RC133100_0402_1% RC133100_0402_1% 12
RC144 0_0402_5%@RC144 0_0402_5%@
1 2
RC111 0_0402_5%@RC111 0_0402_5%@ 1 2
RC74 10K_0402_5%@RC74 10K_0402_5%@
1 2
RC107 0_0402_5%@RC107 0_0402_5%@ 1 2
T130PAD~D @T130PAD~D @
RC1350_0402_5% @RC1350_0402_5% @
12
RC1230_0402_5% @RC1230_0402_5% @
12
CC8
0.1U_0402_25V6
@ CC8
0.1U_0402_25V6
@1 2
CC41
0.1U_0402_25V6
XDP@ CC41
0.1U_0402_25V6
XDP@12
RC117 56_0402_5%RC117 56_0402_5%
1 2
T131PAD~D @T131PAD~D @
RC136 10K_0402_5%RC136 10K_0402_5%
1 2
CC9
0.1U_0402_25V6
@CC9
0.1U_0402_25V6
@1 2
RC90 0_0402_5%@ RC90 0_0402_5%@ 1 2
RC112 0_0402_5%@RC112 0_0402_5%@ 1 2
RC89 0_0402_5%@ RC89 0_0402_5%@ 1 2
T132PAD~D @T132PAD~D @
RC88 0_0402_5%@ RC88 0_0402_5%@ 1 2
JXDP1
SAMTE_BSH-030-01-L-D-A CONN@
JXDP1
SAMTE_BSH-030-01-L-D-A CONN@
GND01
OBSFN_A03
OBSFN_A15
GND27
OBSDATA_A09
OBSDATA_A111
GND413
OBSDATA_A215
OBSDATA_A317
GND619
OBSFN_B021
OBSFN_B123
GND825
OBSDATA_B027
OBSDATA_B129
GND1031
OBSDATA_B233
OBSDATA_B335
GND1237
PWRGOOD/HOOK039
HOOK141
VCC_OBS_AB43
HOOK245
HOOK347
GND1449
SDA51
SCL53
TCK155
TCK057
GND1659
GND12
OBSFN_C04
OBSFN_C16
GND38
OBSDATA_C010
OBSDATA_C112
GND514
OBSDATA_C216
OBSDATA_C318
GND720
OBSFN_D022
OBSFN_D124
GND926
OBSDATA_D028
OBSDATA_D130
GND1132
OBSDATA_D234
OBSDATA_D336
GND1338
ITPCLK/HOOK440
ITPCLK#/HOOK542
VCC_OBS_CD44
RESET#/HOOK646
DBR#/HOOK748
GND1550
TD052
TRST#54
TDI56
TMS58
GND1760
RC300 0_0402_5%@ RC300 0_0402_5%@ 1 2
T129PAD~D @T129PAD~D @
RC101 0_0402_5%XDP@RC101 0_0402_5%XDP@
1 2
T12 PAD~D @T12 PAD~D @
RC131 51_0402_1%@ RC131 51_0402_1%@ 12
SYSTEM POWER MANAGEMENT
HASWELL_MCP_E
Rev1p28 OF 19
UC1H
SYSTEM POWER MANAGEMENT
HASWELL_MCP_E
Rev1p28 OF 19
UC1H
SUSACKAK2
PLTRSTAG7
PCH_PWROKAY7 SYS_PWROKAG2 SYS_RESETAC3
APWROKAB5
RSMRSTAW6
ACPRESENT/GPIO31AJ8
BATLOW/GPIO72AN4
PWRBTNAL7 SUSWARN/SUSPWRDNACK/GPIO30AV4
SLP_S0AF3
SLP_WLAN/GPIO29AM5
DPWROKAV5DSWVRMENAW7
WAKEAJ5
SUS_STAT/GPIO61AG4CLKRUN/GPIO32V5
SUSCLK/GPIO62AE6
SLP_S4AJ6
SLP_S5/GPIO63AP5
SLP_S3AT4
SLP_LANAJ7SLP_SUSAP4SLP_AAL5
RC1240_0402_5% @RC1240_0402_5% @
12
RC
73
33
0K
_0
40
2_
1%
RC
73
33
0K
_0
40
2_
1%
12
RC106 1K_0402_5%@RC106 1K_0402_5%@ 1 2
RC1040_0402_5% @RC1040_0402_5% @
12
RC103 0_0402_5%XDP@RC103 0_0402_5%XDP@
1 2
RC93 0_0402_5%@ RC93 0_0402_5%@ 1 2
RC76 8.2K_0402_5%@RC76 8.2K_0402_5%@
12
T11 PAD~D@T11 PAD~D@
JAPS1
ACES_50506-01841-P01
CONN@JAPS1
ACES_50506-01841-P01
CONN@
88
99
1010
1111
1212
1313
1414
1515
1616
11
22
33
44
55
66
77
1717
1818
GND19
GND20
RC91 0_0402_5%@ RC91 0_0402_5%@ 1 2
RC95 0_0402_5%XDP@ RC95 0_0402_5%XDP@
1 2
RC109 1K_0402_5%XDP@RC109 1K_0402_5%XDP@
12
RC94 0_0402_5%@ RC94 0_0402_5%@ 1 2
RC125200_0402_1% RC125200_0402_1% 12
RC86 0_0402_5%@ RC86 0_0402_5%@ 1 2
RC82 0_0402_5%@ RC82 0_0402_5%@
1 2
CC480.1U_0402_25V6@ CC480.1U_0402_25V6@
1
2
RC119 51_0402_1%@ RC119 51_0402_1%@ 12
RC96 0_0402_5%XDP@RC96 0_0402_5%XDP@
1 2
RC84 0_0402_5%@ RC84 0_0402_5%@
1 2
RC87 0_0402_5%@ RC87 0_0402_5%@ 1 2
RC116 1K_0402_5%RC116 1K_0402_5%12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE:
THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
CAD Note:Trace width=20 mils ,Spacing=25mil,
Max length=100 mils.
COMPENSATION PU FOR eDP
Intel WW18 Strapping option
Intel WW18 Strapping option
reference PDG 0.9
follow intel feedback
ESD solution for black screen issue
DDI1_LANE_N3
DDI1_LANE_N1
DDI1_LANE_N2
DDI1_LANE_N0DDI1_LANE_P0
DDI1_LANE_P1
DDI1_LANE_P2
DDI1_LANE_P3
DDI2_LANE_N0
DDI2_LANE_N1
DDI2_LANE_N2
DDI2_LANE_N3
DDI2_LANE_P0
DDI2_LANE_P1
DDI2_LANE_P2
DDI2_LANE_P3
EDP_COMP
ENVDD_PCH
DGPU_PWROK
CONTACTLESS_DET#
TOUCHPAD_INTR#TOUCH_RST_N_GYRO_INT1
CPU_DPC_CTRLCLKCPU_DPC_CTRLDAT
CPU_DPB_AUX#CPU_DPC_AUX#
DPB_HPD
CPU_DPB_AUXCPU_DPC_AUX
DPC_HPD
PANEL_BKLENENVDD_PCH
CODEC_IRQ
CODEC_IRQ
EDP_CPU_LANE_N1EDP_CPU_LANE_P1
EDP_CPU_AUXEDP_CPU_AUX#
EDP_COMP
EDP_CPU_LANE_N0EDP_CPU_LANE_P0
CPU_DPB_CTRLCLKCPU_DPB_CTRLDAT
CPU_DPC_CTRLCLK
CPU_DPC_CTRLDAT
CPU_DPB_CTRLCLK
CPU_DPB_CTRLDAT
TOUCHPAD_INTR#
DPC_HPD
CPU_DPB_AUX#
CPU_DPC_AUX#
CPU_DPB_AUX
CPU_DPC_AUX
TOUCH_RST_N_GYRO_INT1
EDP_BIA_PWM
PIRQ#_TPMHDD_FALL_INT
HDD_FALL_INT
CLKRUN#LANCLK_REQ#
PCH_GPIO36
+VCCIOA_OUT
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
DDI1_LANE_N3<23>
DDI1_LANE_N2<23>
DDI1_LANE_N1<23>
DDI1_LANE_N0<23>
DDI1_LANE_P1<23>
DDI1_LANE_P0<23>
DDI1_LANE_P3<23>
DDI1_LANE_P2<23>
DDI2_LANE_N0<27>
DDI2_LANE_N1<27>
DDI2_LANE_N2<27>
DDI2_LANE_N3<27>
DDI2_LANE_P0<27>
DDI2_LANE_P1<27>
DDI2_LANE_P2<27>
DDI2_LANE_P3<27>
CPU_DPC_AUX# <27>
CPU_DPC_AUX <27>
DPB_HPD <23>DPC_HPD <27>
PANEL_BKLEN<22>ENVDD_PCH<22,36>
CONTACTLESS_DET#<29>
EDP_CPU_LANE_P0 <22>EDP_CPU_LANE_N0 <22>
EDP_CPU_LANE_P1 <22>EDP_CPU_LANE_N1 <22>
EDP_CPU_AUX <22>EDP_CPU_AUX# <22>
EDP_CPU_HPD <22>
CPU_DPB_CTRLDAT <23>CPU_DPB_CTRLCLK <23>
CPU_DPC_CTRLCLK <27>CPU_DPC_CTRLDAT <27>
EDP_BIA_PWM<22>
DGPU_PWROK<7>
PIRQ#_TPM<12>
PCH_GPIO36 <6>
CLKRUN# <29,36,37,9>LANCLK_REQ# <28,7>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(5/12)
10 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(5/12)
10 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(5/12)
10 59Friday, May 17, 2013
Compal Electronics, Inc.
RC1432.2K_0402_5% RC1432.2K_0402_5%
12
RC147100K_0402_5% RC147100K_0402_5%
12
RP6
10K_8P4R_5%
RP6
10K_8P4R_5%
1 82 73 64 5
RC153100K_0402_5% RC153100K_0402_5%
12
RC154 1K_0402_5%@RC154 1K_0402_5%@
12
T13 PAD~D@T13 PAD~D@
RC202 10K_0402_5%RC202 10K_0402_5%
1 2
RC1392.2K_0402_5% RC1392.2K_0402_5%
12
RC149100K_0402_5% RC149100K_0402_5%
12
CC
45
00
.1U
_0
40
2_
25
V6
@CC
45
00
.1U
_0
40
2_
25
V6
@1
2
DISPLAY
GPIO
eDP SIDEBAND
HASWELL_MCP_E
Rev1p29 OF 19
UC1I
DISPLAY
GPIO
eDP SIDEBAND
HASWELL_MCP_E
Rev1p29 OF 19
UC1I
EDP_BKLCTLB8
DDPB_AUXNC5
DDPC_HPDA8
EDP_HPDD6
DDPB_HPDC8
DDPC_CTRLDATAD11DDPC_CTRLCLKD9DDPB_CTRLDATAC9DDPB_CTRLCLKB9
PIRQA/GPIO77U6
PIRQB/GPIO78P4
PIRQC/GPIO79N4
PIRQD/GPIO80N2
PMEAD4
GPIO55U7
GPIO52L1
GPIO54L3
GPIO51R5
GPIO53L4
EDP_BKLENA9
DDPB_AUXPB5
DDPC_AUXPA6
DDPC_AUXNB6
EDP_VDDENC6
RC1452.2K_0402_5% RC1452.2K_0402_5%
12
RC13424.9_0402_1% RC13424.9_0402_1%
12
RC155100K_0402_5% RC155100K_0402_5%
12
HASWELL_MCP_E
DDI EDP
Rev1p21 OF 19
UC1AHASWELL_MCP_E
DDI EDP
Rev1p21 OF 19
UC1A
EDP_DISP_UTILA43EDP_RCOMPD20
DDI2_TXP3B53 DDI2_TXN3A53 DDI2_TXP2B50 DDI2_TXN2C49
DDI2_TXN1C53
DDI2_TXN0C51
DDI2_TXP0C50
DDI2_TXP1B54
DDI1_TXP3B57
EDP_AUXNA45
EDP_AUXPB45
EDP_TXP3B49EDP_TXN3A49EDP_TXP2C46EDP_TXN2C47
EDP_TXP1B47EDP_TXN1A47
EDP_TXN0C45
EDP_TXP0B46
DDI1_TXN3A57 DDI1_TXP2A55 DDI1_TXN2B55 DDI1_TXP1C58 DDI1_TXN1B58 DDI1_TXP0C55 DDI1_TXN0C54
RC151100K_0402_5% RC151100K_0402_5%
12
RC
15
81
00
K_
04
02
_5
%R
C1
58
10
0K
_0
40
2_
5%
12
RC152 100K_0402_5%@RC152 100K_0402_5%@
1 2
RC1412.2K_0402_5% RC1412.2K_0402_5%
12
RC140 10K_0402_5%RC140 10K_0402_5%
1 2
RC137 10K_0402_5%RC137 10K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE:
THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
CAD NOTE:
Route single-end 50-ohms and max 500-mils length.
Avoid routing next to clock pins or under stitching capacitors.
Recommended minimum spacing to other signal traces is 15 mils.
Ext USB Port 2 <----
10/100/1G LAN --->----->Ext USB3 Port 1
----->Ext USB3 Port 3 IO/B
----->Ext Port 1 and DOCK2 (USB SW)
reference CRB 3.01K 1%
WLAN (Mini Card 2)--->
----->WLAN/BT
----->WWAN
----->USH
----->Camera
----->Touch
----->Ext Port 3 and DOCK1(USB SW)
----->Ext Port 2 IO/B
MMI -->
PCH_PCIE_RCOMPPCH_PCIE_IREF
USBP0-USBP0+
USBRBIAS
USBRBIAS
USB_OC0#
USB_OC2#USB_OC3#
PCIE_PTX_GLANRX_N3PCIE_PTX_GLANRX_P3
PCIE_PRX_GLANTX_P3PCIE_PRX_GLANTX_N3
PCIE_PTX_WLANRX_N4
PCIE_PRX_WLANTX_P4PCIE_PRX_WLANTX_N4
PCIE_PTX_WLANRX_P4
USBP2-USBP2+
USBP3+USBP3-
USBP4+USBP4-
USBP5+USBP5-
USBP7+USBP7-
USBP6-USBP6+
USBP1+USBP1-
USB_OC0#USB_OC2#
USB_OC1#
PCIE_PRX_MMITX_P5PCIE_PRX_MMITX_N5
PCIE_PTX_MMIRX_N5PCIE_PTX_MMIRX_P5
PCH_SMB_ALERT#MEDIACARD_PWREN
USB_OC1#
+PCH_AUSB3PLL
+3.3V_ALW_PCH
+3.3V_ALW_PCH
USBP0- <33>USBP0+ <33>
USB3RN1 <35>
USB3RN2 <33>USB3RP2 <33>
USB3TN2 <33>USB3TP2 <33>
USB3RP1 <35>
USB3TN1 <35>USB3TP1 <35>
PCIE_PTX_GLANRX_N3<28>PCIE_PTX_GLANRX_P3<28>
PCIE_PRX_GLANTX_P3<28>PCIE_PRX_GLANTX_N3<28>
USB3RN3<32>USB3RP3<32>
USB3TN3<32>USB3TP3<32>
PCIE_PRX_WLANTX_P4<31>PCIE_PRX_WLANTX_N4<31>
PCIE_PTX_WLANRX_N4<31>PCIE_PTX_WLANRX_P4<31>
USBP2+ <31>USBP2- <31>
USBP3- <22>USBP3+ <22>
USBP4+ <29>USBP4- <29>
USBP5- <32>USBP5+ <32>
USBP7+ <22>USBP7- <22>
USBP6+ <31>USBP6- <31>
USBP1+ <35>USBP1- <35>
USB_OC0# <33>
PCIE_PRX_MMITX_N5<30>
PCIE_PTX_MMIRX_N5<30>
PCIE_PRX_MMITX_P5<30>
PCIE_PTX_MMIRX_P5<30>
USB_OC2# <33>
PCH_SMB_ALERT#<7>MEDIACARD_PWREN<12,30>
USB_OC3# <9>
USB_OC1# <35>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(6/12)
11 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(6/12)
11 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(6/12)
11 59Friday, May 17, 2013
Compal Electronics, Inc.
RC16610K_0402_5% RC16610K_0402_5%
1 2
PCIe USB
HASWELL_MCP_E
Rev1p211 OF 19
UC1K
PCIe USB
HASWELL_MCP_E
Rev1p211 OF 19
UC1K
PETP5_L2C21
PERP5_L0E10
PERN5_L1F8
PETN5_L3B22
PETP5_L3A21
PERP3F11
PETN3C29
PETN1/USB3TN3C30
OC3/GPIO43AV3OC2/GPIO42AH2OC1/GPIO41AT1OC0/GPIO40AL3
PCIE_RCOMPA27
PCIE_IREFB27
PERN5_L0F10
PERN5_L2H10
PERP5_L2G10
PETN5_L2B21
PERP5_L3F6 PERN5_L3E6
PETP3B30
PERN4F13
PERP4G13
PETP4A29 PETN4B29
PERP1/USB3RP3F17
PETP1/USB3TP3C31
PERN2/USB3RN4F15
PETN2/USB3TN4B31
PERP2/USB3RP4G15
USB2N0AN8
USB2N1AR7
USB2N2AR8
USB2P2AP8
USB2N3AR10
USB2P3AT10
USB2N4AM15
USB2P4AL15
USB2P6AN11
USB2N5AM13
USB2P5AN13
USB2N6AP11
USB2P7AP13USB2N7AR13
USB3TN2B33
USB3TP2A33
USB3RP2F18USB3RN2E18
USB3TN1C33
USB3TP1B34
USB3RP1H20USB3RN1G20
PETP5_L1A23 PETN5_L1B23
PERP5_L1E8
USBRBIASAJ11USBRBIASAJ10
PETP5_L0C22 PETN5_L0C23
PERN3G11
USB2P0AM8
USB2P1AT7
PERN1/USB3RN3G17
PETP2/USB3TP4A31
RSVDE15
RSVDE13
RSVDAN10
RSVDAM10
RC163 0_0402_5%@RC163 0_0402_5%@ 1 2
RP5
10K_8P4R_5%
RP5
10K_8P4R_5%
18273645
T16 PAD~D@T16 PAD~D@
RC
15
92
2.6
_0
40
2_
1%
RC
15
92
2.6
_0
40
2_
1%
12
T15PAD~D @T15PAD~D @T14PAD~D @T14PAD~D @
T17 PAD~D@T17 PAD~D@RC161 3.01K_0402_1%RC161 3.01K_0402_1%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE:
THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
NO REBOOT STRAP
Low depop RC288 (DEFAULT) :Enable
High pop RC288:Diable
HIGH
LOW(DEFAULT)
BOOT BIOS STRAP BIT BBS
reference PDG0.9
GPIO66 GPIO86
HIGH
LOW(DEFAULT)
TLS CONFIDENTIALITY
GPIO15 GPIO81
TOP-BLOCK SWAP OVERRIDE
HIGH
LOW(DEFAULT)
non use GPIO:
GPIO0 GPIO3 GPIO10 GPIO14
GPIO17 GPIO21 GPIO22 GPIO24
GPIO36 GPIO38 GPIO48 GPIO49
GPIO51 GPIO54 GPIO59 GPIO60
GPIO66 GPIO70 GPIO73 GPIO79
GPIO87 GPIO93 GPIO94
LPC
SPI
suppoer DSW mode
503118_503118_LPT_LP_PCH_EDS_Rev1_0
ESD request
PCH_AUDIO_ENSIO_EXT_WAKE#PM_LANPHY_ENABLEPCH_GPIO15
EC_WAKE#
NFC_IRQ
H_THERMTRIP#
H_THERMTRIP#_RSIO_RCIN#
IRQ_SERIRQ
IRQ_SERIRQPCH_OPI_COMP
PCH_OPI_COMP
PCH_GPIO44
MPHYP_PWR_ENKB_DET#PCH_GPIO143.3V_CAM_EN#
PCH_GPIO46
PCH_GPIO9
SIO_EXT_SCI#SPKR
LCD_CBL_DET#
LCD_CBL_DET#
CAM_MIC_CBL_DET#
PCH_GPIO44
SPKR
MEDIACARD_IRQ#
I2C1_SDA_TCH_PAD
I2C1_SCL_TCH_PAD
PCH_GPIO66
NFC_IRQ
PCH_GPIO17
BBS_BIT
USH_DET#
USH_DET#
CAM_MIC_CBL_DET#
TPM_ID0TPM_ID1
TPM_ID0
TPM_ID1
SLP_ME_CSW_DEV#
PCH_GPIO15
SLP_ME_CSW_DEV#
3.3V_HDD_EN
CPPE#CPUSB#
CPPE#
CPUSB#
BBS_BIT
PCH_GPIO84PCH_GPIO83
3.3V_TP_EN
PCH_GPIO85
SIO_EXT_SCI#
MPHYP_PWR_EN
MPHYP_PWR_EN
PCH_GPIO10 I2C1_SDA_TCH_PADI2C1_SCL_TCH_PAD
I2C1_SDA_TCH_PAD
I2C1_SCL_TCH_PAD
MEDIACARD_RST#
SIO_EXT_SMI#
PCH_GPIO48PCH_GPIO49
NFC_DET#
PCH_GPIO66
MEDIACARD_PWRENSLATE_MODE_R
MEDIACARD_RST#
PM_LANPHY_ENABLE
EC_WAKE#
PCH_GPIO87
PCH_AUDIO_EN
PCH_GPIO87
I2C0_SDA
I2C0_SCL
I2C0_SDAI2C0_SCL
PCH_GPIO83SIO_RCIN#
PIRQ#_TPM
3.3V_CAM_EN#
EC_WAKE#
PCH_GPIO46SUSACK#SIO_EXT_SMI#
3.3V_TS_ENPCH_GPIO84PCH_GPIO853.3V_TP_EN
PCH_GPIO9
AC_PRESENTPCH_BATLOW#SLATE_MODE_R
TOUCH_PANEL_INTR#
TOUCH_PANEL_INTR#
H_THERMTRIP#
PCH_GPIO83
+1.05V_VCCST
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_RUN +3.3V_RUN
+3.3V_ALW_PCH
+PCH_VCCDSW3_3
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+PCH_VCCDSW3_3
+3.3V_RUN
SIO_EXT_WAKE#<36,9>PM_LANPHY_ENABLE<28>
LAN_RST#<28>
SIO_RCIN# <37>IRQ_SERIRQ <29,36,37>
LCD_CBL_DET# <22>
SPKR<26>
KB_DET#<38,9>
3.3V_CAM_EN#<22>
MPHYP_PWR_EN<39>
MEDIACARD_IRQ#<30>
NFC_IRQ<20>PCH_NFC_RST<20>
USH_DET# <29>CAM_MIC_CBL_DET# <22>
CPPE# <31>CPUSB# <31>
H_THERMTRIP# <37>
mSATA_DEVSLP<31>
I2C1_SDA_VMM <21>
I2C1_SCL_VMM <21>
I2C1_SDA_TCH_PAD <38>
I2C1_SCL_TCH_PAD <38>
MEDIACARD_RST#<30>
SIO_EXT_SCI#<37>
MEDIACARD_PWREN<11,30>
3.3V_TS_EN <22>3.3V_HDD_EN <31>
SLP_ME_CSW_DEV# <36>
EC_WAKE#<37>
LAN_WAKE#<28,37>
TOUCH_PANEL_INTR#<22>
PIRQ#_TPM<10>
SUSACK# <36,9>
AC_PRESENT<37,9>PCH_BATLOW#<9>
NFC_DET#<20>
HDD_DEVSLP<25>
SIO_EXT_SMI#<37>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(7/12)
12 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(7/12)
12 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(7/12)
12 59Friday, May 17, 2013
Compal Electronics, Inc.
RC206 10K_0402_5%RC206 10K_0402_5%
12
R241K_0402_5% R241K_0402_5%
12
RC17810K_0402_5% RC17810K_0402_5%
12
RC169 10K_0402_5%@ RC169 10K_0402_5%@
12
RC2012.2K_0402_5% RC2012.2K_0402_5%
12
RC
28
71
K_
04
02
_5
%@
RC
28
71
K_
04
02
_5
%@
12
RC211 100K_0402_5%RC211 100K_0402_5%
12
T141 PAD~D@ T141 PAD~D@
RC28410K_0402_5% RC28410K_0402_5%
12
RC180
10K_0402_5%
@RC180
10K_0402_5%
@
12
RC29510K_0402_5% RC29510K_0402_5%
12
RC210 100K_0402_5%RC210 100K_0402_5%
12
RC181
10K_0402_5%
RC181
10K_0402_5%
12
RP7
10K_8P4R_5%
RP7
10K_8P4R_5%
1 82 73 64 5
RC2042.2K_0402_5% RC2042.2K_0402_5%
12
RC174 0_0402_5%@RC174 0_0402_5%@ 12
RC176 0_0402_5%@RC176 0_0402_5%@ 12
T140 PAD~D@ T140 PAD~D@
RC301 0_0402_5%@RC301 0_0402_5%@
1 2
RP9
10K_8P4R_5%
RP9
10K_8P4R_5%
18273645
RC
28
31
K_
04
02
_5
%@
RC
28
31
K_
04
02
_5
%@
12
RC
21
81
0K
_0
40
2_
5%
@RC
21
81
0K
_0
40
2_
5%
@
12
RC
28
81
K_
04
02
_5
%@
RC
28
81
K_
04
02
_5
%@
12
T138 PAD~D@ T138 PAD~D@
RC21610K_0402_5% RC21610K_0402_5%
1 2RC2082.2K_0402_5% RC2082.2K_0402_5%
12
RC200 10K_0402_5%RC200 10K_0402_5%
12
RP2
10K_8P4R_5%
RP2
10K_8P4R_5%
18273645
RP8
10K_8P4R_5%
RP8
10K_8P4R_5%
18273645
RC191100K_0402_5% RC191100K_0402_5%
12
T137 PAD~D@ T137 PAD~D@
RC16849.9_0402_1% RC16849.9_0402_1%
1 2
RC172 0_0402_5%@RC172 0_0402_5%@ 12
T18 PAD~D@T18 PAD~D@
RC215 10K_0402_5%RC215 10K_0402_5%
12
RC170 100K_0402_5%RC170 100K_0402_5%
12
CC
91
10
0P
_0
40
2_
50
V8
J
@
CC
91
10
0P
_0
40
2_
50
V8
J
@1
2
RC18910K_0402_5% RC18910K_0402_5%
12
RC197 10K_0402_5%RC197 10K_0402_5%
12
LPIO
GPIO
CPU/
HASWELL_MCP_E
MISC
Rev1p210 OF 19
UC1J
LPIO
GPIO
CPU/
HASWELL_MCP_E
MISC
Rev1p210 OF 19
UC1J
GPIO56AG6
GPIO57AP1
GPIO27AN5
GPIO28AD7
GPIO26AN3
SDIO_D1/GPIO67E4
SDIO_D2/GPIO68C3
SDIO_D3/GPIO69E2
SDIO_D0/GPIO66D3
SDIO_CLK/GPIO64E3
SDIO_CMD/GPIO65F4
I2C1_SCL/GPIO7F1I2C1_SDA/GPIO6G4I2C0_SCL/GPIO5F3I2C0_SDA/GPIO4F2
UART1_RST/GPIO2J3
UART1_CTS/GPIO3J4
UART1_RXD/GPIO0K4
UART1_TXD/GPIO1G2
UART0_CTS/GPIO94G1
UART0_TXD/GPIO92K3
UART0_RTS/GPIO93J2
UART0_RXD/GPIO91J1
GSPI1_MISO/GPIO89N7
GSPI_MOSI/GPIO90K2
GSPI1_CLK/GPIO88L5GSPI1_CS/GPIO87R7GSPI0_MOSI/GPIO86L8
GSPI0_CLK/GPIO84L6
GSPI0_MISO/GPIO85N6
GSPI0_CS/GPIO83R6
RCIN/GPIO82V4THERMTRIPD60
DEVSLP2/GPIO39N5
SPKR/GPIO81V2
DEVSLP1/GPIO38L2 SDIO_POWER_EN/GPIO70C4 DEVSLP0/GPIO33P2
GPIO9AM3
GPIO10AM2
GPIO45AG5
GPIO46AG3
GPIO14AH4
GPIO25AM4
GPIO13AT3 HSIOPC/GPIO71
Y2 GPIO50P3 GPIO49Y3
GPIO47AB6
GPIO48U4
GPIO59AT5
GPIO16Y1
GPIO17T3
GPIO15AD6
GPIO8AU2
GPIO24AD5
BMBUSY/GPIO76P1
GPIO44AK4
GPIO58AL4
LAN_PHY_PWR_CTRL/GPIO12AM7
SERIRQT4
PCH_OPI_RCOMPAW15
RSVDAF20
RSVDAB21
RC28910K_0402_5% RC28910K_0402_5%
12
RC199 100K_0402_5%RC199 100K_0402_5%
12
RC2032.2K_0402_5% RC2032.2K_0402_5%
12
RC28210K_0402_5% RC28210K_0402_5%
12
RC205 10K_0402_5%RC205 10K_0402_5%
12
RC292100_0402_5% 7@RC292100_0402_5% 7@
1 2
RC
19
01
K_
04
02
_5
%R
C1
90
1K
_0
40
2_
5%
12
RC19310K_0402_5% RC19310K_0402_5%
12RC185100K_0402_5% RC185100K_0402_5%
12
RC28520K_0402_5% RC28520K_0402_5%
12
RC
22
21
K_
04
02
_5
%@
RC
22
21
K_
04
02
_5
%@
12
T19 PAD~D@T19 PAD~D@T139 PAD~D@ T139 PAD~D@
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE:
THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
CFG4
1 : Disabled; No Physical Display Port
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
Display Port Presence Strap
1: Enable(Default): Noa will be disable in
locked units and enable in un-locked unitsCFG8
ALLOW THE USE OF NOA ON LOCKED UNITS
0: Enable Noa will be available pegardless of
the locking of the unit
CFG STRAPS for CPU
EAR-STALL/NOT STALL RESET SEQUENCE AFTER PCU PLL IS LOCKE
CFG01:(Default) Normal Operation; No stall
0:Lane Reversed
PCH/PCH LESS MODE SELECTION
CFG11:(Default) Normal Operation
0:Lane Reversed
1: VRS support SVID protocol are present
CFG9
NO SVID PROTOCOL CAPABLE VR CONNECTED
0:No VR support SVID is present
The chip will not generate(OR Respond to)
SVID activity
1: POWER FEATURES ACTIVATED DURING
RESETCFG10
SAFE MODE BOOT
0: POWER FEATURES (ESPECIALLY CLOCK
GATINE ARE NOT ACTIVATED
CFG8
CFG4
PROC_OPI_RCOMP
PROC_OPI_RCOMP
CFG0
CFG4
TDI_IREF
TDI_IREF
CFG_RCOMP
CFG_RCOMP
CFG1
CFG3
CFG8CFG9CFG10
CFG0
CFG1
CFG9CFG10
CFG0<9>
CFG2<9>
CFG4<9>CFG5<9>CFG6<9>CFG7<9>
CFG1<9>
CFG3<9>
CFG8<9>CFG9<9>CFG10<9>CFG11<9>CFG12<9>CFG13<9>CFG14<9>CFG15<9>
CFG16<9>
CFG19<9>
CFG18<9>CFG17<9>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(8/12)
13 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(8/12)
13 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(8/12)
13 59Friday, May 17, 2013
Compal Electronics, Inc.
RC
23
21
K_
04
02
_1
%@
RC
23
21
K_
04
02
_1
%@
12
RC
23
91
K_
04
02
_1
%@
RC
23
91
K_
04
02
_1
%@
12
T37 PAD~D@T37 PAD~D@
T34PAD~D @T34PAD~D @
T28PAD~D @T28PAD~D @
T23PAD~D @T23PAD~D @
T35 PAD~D@T35 PAD~D@
T20PAD~D @T20PAD~D @
T32PAD~D @T32PAD~D @
T30PAD~D @T30PAD~D @
RC23749.9_0402_1% RC23749.9_0402_1%
1 2
T27PAD~D @T27PAD~D @
T24PAD~D @T24PAD~D @
T31PAD~D @T31PAD~D @
T39 PAD~D@T39 PAD~D@
T26PAD~D @T26PAD~D @
RC
24
01
K_
04
02
_1
%@
RC
24
01
K_
04
02
_1
%@
12
RESERVED
HASWELL_MCP_E
Rev1p219 OF 19
UC1S
RESERVED
HASWELL_MCP_E
Rev1p219 OF 19
UC1S
CFG17AA61 CFG18
U63
CFG7Y60
CFG11U60
CFG12T63
RSVD_TPAU63
RSVD_TPC63
RSVD_TPC62
RSVD_TPL60
RSVD_TPB51RSVD_TPA51
CFG10V60 CFG9V61 CFG8V62
CFG6Y61
RSVDA5
RSVDB43
RSVDN60
RSVDY22RSVDW23
RSVDD58RSVDAV62
RSVD_TPAV63
VSSN21VSSP22
CFG_RCOMPV63
CFG19U62
CFG13T62
RSVDR20RSVDP20
PROC_OPI_RCOMPAY15
TD_IREFB12
RSVDE1
RSVDD1
RSVDJ20
RSVDH18
CFG5Y62 CFG4
AA60 CFG3AA63 CFG2AC63 CFG1AC62 CFG0AC60
CFG16AA62
CFG15T60 CFG14T61
T25PAD~D @T25PAD~D @
T22PAD~D @T22PAD~D @
T33 PAD~D@T33 PAD~D@
T21PAD~D @T21PAD~D @
RC
23
31
K_
04
02
_1
%@
RC
23
31
K_
04
02
_1
%@
12
T36PAD~D @T36PAD~D @
RC236 8.2K_0402_1%RC236 8.2K_0402_1%
1 2
T38 PAD~D@T38 PAD~D@
RC
24
11
K_
04
02
_1
%@
RC
24
11
K_
04
02
_1
%@
12
RC235 49.9_0402_1%RC235 49.9_0402_1%
12
RC
23
81
K_
04
02
_1
%R
C2
38
1K
_0
40
2_
1%
12
T29PAD~D @T29PAD~D @
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE:
THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Package Daisy Chain:
1.B2-PKG-C1-PCB-C2-PKG-B3-PCB-A3-PKG-A42.A62-PKG-A61-PCB-B61-PKG-B62-PCB-B63-PKG-A603.AY60-PKG-AW61-PCB-AY61-PKG-AW62-PCB-AY62-PKG-AW634.AW1-PKG-AW3-PCB-AY3-PKG-AW2-PCB-AY2-PKG-AV1
1
3
2
4
DC_TEST_AY2_AW2
DC_TEST_AY2_AW2
DC_TEST_AY3_AW3
DC_TEST_AY3_AW3
DC_TEST_AY60DC_TEST_AY61_AW61
DC_TEST_AY61_AW61
DC_TEST_AY62_AW62
DC_TEST_AY62_AW62
DC_TEST_A3_B3
DC_TEST_A3_B3
DC_TEST_A61_B61
DC_TEST_A61_B61
DC_TEST_B62_B63
DC_TEST_C1_C2
DC_TEST_A4
DC_TEST_AW63
RSVD_R23
RSVD_U10RSVD_T23
RSVD_N23
RSVD_AY14
RSVD_AL1RSVD_AM11RSVD_AP7RSVD_AU10RSVD_AU15RSVD_AW14
RSVD_AV44RSVD_D15
RSVD_F22
RSVD_J21RSVD_H22
RSVD_AT2RSVD_AU44
TP_DC_TEST_B2
DC_TEST_A60
DC_TEST_A62DC_TEST_AV1DC_TEST_AW1
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(9/12)
14 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(9/12)
14 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(9/12)
14 59Friday, May 17, 2013
Compal Electronics, Inc.
T50 PAD~D@T50 PAD~D@
RC2540_0402_5% @RC2540_0402_5% @
12
T57PAD~D@
T57PAD~D@
T49PAD~D@
T49PAD~D@
T53PAD~D@
T53PAD~D@
T48PAD~D@
T48PAD~D@
T61PAD~D@
T61PAD~D@
T59PAD~D@
T59PAD~D@
T51PAD~D@
T51PAD~D@
T62 PAD~D@T62 PAD~D@T64PAD~D
@T64PAD~D
@T60 PAD~D@T60 PAD~D@
T54 PAD~D@T54 PAD~D@T52 PAD~D@T52 PAD~D@
T56PAD~D@
T56PAD~D@T55 PAD~D@T55 PAD~D@
T58 PAD~D@T58 PAD~D@
RC2680_0402_5% @RC2680_0402_5% @
12RC2660_0402_5% @RC2660_0402_5% @
12
T65PAD~D@
T65PAD~D@
RC2690_0402_5% @RC2690_0402_5% @
12
HASWELL_MCP_E
Rev1p218 OF 19
UC1R HASWELL_MCP_E
Rev1p218 OF 19
UC1R
RSVDAP7
RSVDU10
RSVDAL1
RSVDAM11
RSVDAU10
RSVDAU15
RSVDR23RSVDN23
RSVDT23
RSVDJ21 RSVDH22 RSVDF22
RSVDD15 RSVD
AV44 RSVDAU44 RSVD
AT2
RSVDAW14
RSVDAY14
T63PAD~D@
T63PAD~D@
HASWELL_MCP_E
Rev1p217 OF 19
UC1QHASWELL_MCP_E
Rev1p217 OF 19
UC1Q
DAISY_CHAIN_NCTF_AW62AW62
DAISY_CHAIN_NCTF_AW63AW63
DAISY_CHAIN_NCTF_AW61AW61DAISY_CHAIN_NCTF_AW3AW3DAISY_CHAIN_NCTF_AW2AW2
DAISY_CHAIN_NCTF_A62A62
DAISY_CHAIN_NCTF_AV1AV1
DAISY_CHAIN_NCTF_AW1AW1
DAISY_CHAIN_NCTF_A60A60
DAISY_CHAIN_NCTF_A61A61
DAISY_CHAIN_NCTF_A4A4DAISY_CHAIN_NCTF_A3A3
DAISY_CHAIN_NCTF_C2C2 DAISY_CHAIN_NCTF_C1C1 DAISY_CHAIN_NCTF_B63
B63 DAISY_CHAIN_NCTF_B62B62
DAISY_CHAIN_NCTF_B2B2
DAISY_CHAIN_NCTF_B3B3
DAISY_CHAIN_NCTF_B61B61
DAISY_CHAIN_NCTF_AY61AY61
DAISY_CHAIN_NCTF_AY62AY62
DAISY_CHAIN_NCTF_AY3AY3
DAISY_CHAIN_NCTF_AY60AY60
DAISY_CHAIN_NCTF_AY2AY2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE:
THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
VCC_SENSE
RESISTOR STUFFING OPTIONS ARE
PROVIDED FOR TESTING PURPOSES
CAD Note: Place the PU resistors close to CPU
RC249close to CPU 300 - 1500mils
SVID ALERT
SVID DATA
CAD Note: Place the PU resistors close to CPU
RC224 close to CPU 300 - 1500mils
VDDQ DECOUPLING
reference ULT CRB
CAD Note: RC250 SHOULD BE PLACED CLOSE TO CPU
Reference ULT DDRDG_080912 change to10uX6 2.2uX4
ESD Request
VCCSENSE
VCCSENSE
VIDSOUTVIDSCLKH_CPU_SVIDALRT#
VIDSOUT
H_CPU_SVIDALRT#
H_VCCST_PWRGD VCCST_PWRGDH_VR_EN VR_ENH_VR_READY VR_READY
CPU_PWR_DEBUG#
CPU_PWR_DEBUG#
H_VR_EN H_VR_READY
H_VCCST_PWRGD
H_VCCST_PWRGD
+1.35V_MEM
+VCC_CORE
+1.05V_RUN +VCCIO_OUT
+VCCIO_OUT+VCCIOA_OUT
+1.05V_VCCST
+1.05V_VCCST
+VCC_CORE
+1.05V_RUN
+1.05V_RUN +1.05V_VCCST
+1.05V_VCCST
+VCC_CORE
+1.35V_MEM
+VCC_CORE
+1.05V_VCCST +3.3V_RUN
+1.05V_VCCST+3.3V_ALW
+1.35V_MEM +3.3V_ALW
+3.3V_RUN +5V_ALW
+1.05V_RUN+1.35V_MEM
+VCC_CORE +1.35V_MEM
+VCC_CORE
+VCC_CORE
+1.05V_RUN
+3.3V_RUN
+VCC_CORE +1.35V_MEM
VCCSENSE<46>
VIDSCLK<46>
VIDALERT_N<46>
VIDSOUT<46>
CPU_PWR_DEBUG#<9>
H_VR_EN<46>H_VCCST_PWRGD<9>
H_VR_READY<46>
RESET_OUT#<37,9>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(10/12)
15 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(10/12)
15 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(10/12)
15 59Friday, May 17, 2013
Compal Electronics, Inc.
T73 PAD~D@T73 PAD~D@
T68 PAD~D@T68 PAD~D@
CC
17
10
U_
06
03
_6
.3V
6M
@CC
17
10
U_
06
03
_6
.3V
6M
@1
2
RC263 0_0402_5%@RC263 0_0402_5%@ 12
PJP11
PAD-OPEN1x1m
PJP11
PAD-OPEN1x1m
1 2
T81 PAD~D@T81 PAD~D@
RC247 0_0402_5%@RC247 0_0402_5%@ 1 2
T80 PAD~D@T80 PAD~D@T79 PAD~D@T79 PAD~D@
CC
12
2.2
U_
04
02
_6
.3V
6M
CC
12
2.2
U_
04
02
_6
.3V
6M
1
2
RC24843_0402_5% RC24843_0402_5%
12
T76 PAD~D@T76 PAD~D@
CC
21
10
U_
06
03
_6
.3V
6M
CC
21
10
U_
06
03
_6
.3V
6M
1
2
T66 PAD~D@T66 PAD~D@
T83 PAD~D@T83 PAD~D@
C454 22U_0603_6.3V6M@ C454 22U_0603_6.3V6M@
1 2
T69 PAD~D@T69 PAD~D@
CC
52
2.2
U_
04
02
_6
.3V
6M
@CC
52
2.2
U_
04
02
_6
.3V
6M
@
1
2
CC
20
10
U_
06
03
_6
.3V
6M
@CC
20
10
U_
06
03
_6
.3V
6M
@1
2
RC25610K_0402_5% RC25610K_0402_5%
12
CC
18
10
U_
06
03
_6
.3V
6M
CC
18
10
U_
06
03
_6
.3V
6M
1
2
CC
81
2.2
U_
04
02
_6
.3V
6M
@CC
81
2.2
U_
04
02
_6
.3V
6M
@
1
2
RC259
10K_0402_5%
@
RC259
10K_0402_5%
@12
T75 PAD~D@T75 PAD~D@
CC
26
1U
_0
40
2_
6.3
V6
K
@CC
26
1U
_0
40
2_
6.3
V6
K
@1
2
RC
24
47
5_
04
02
_1
%R
C2
44
75
_0
40
2_
1%
12
CC
50
22
U_
06
03
_6
.3V
6M
CC
50
22
U_
06
03
_6
.3V
6M
1
2
HSW ULT POWER
HASWELL_MCP_E
Rev1p212 OF 19
UC1L
HSW ULT POWER
HASWELL_MCP_E
Rev1p212 OF 19
UC1L
VCCSTAE22
VCCSTAE23
VCCAB57
VCCAD57
VCCK23
VCCC44VCCC40VCCC36
VCCC52VCCC48
VCCE25VCCE23VCCC56
VCCE29VCCE27
VCCE35VCCE33VCCE31
VCCE39VCCE37
VCCE45VCCE43VCCE41
VCCE49VCCE47
VCCE55VCCE53VCCE51
VCCE57
VCCF24
VCCF36VCCF32VCCF28
VCCF40
VCCF44
VCCF48
VCCF56VCCF52
VCCG23
VCCG25
VCCG27
VCCG31VCCG29
VCCG33
VCCG35
VCCG37
VCCG41VCCG39
VCCG43
VCCG47VCCG45
VCCG53VCCG51VCCG49
VCCG57VCCG55
VCCJ23VCCH23
VCCK57
VCCL22
VCCP57VCCM57VCCM23
VCCU57
VCCW57
VCCAG57
VCCC32 VCCC28 VCCC24
RSVDL59
RSVDJ58
VDDQAH26
VDDQAJ31
VDDQAJ33
VDDQAJ37
VDDQAN33
VDDQAP43
VDDQAR48
VIDSCLKN63
VIDSOUTL63
VR_ENF60
RSVD_TPP60 VSSP62 PWR_DEBUGH59 VSSD63
VR_READYC59
VCCST_PWRGDB59
VIDALERTL62
RSVDAE59 RSVDAA23
VCC_SENSEE63
RSVDN58
VDDQAY50
RSVD_TPP61
VCCSTAC22
RSVD_TPN59
RSVDT59
RSVDAD60
RSVDAD59
RSVDAE60
RSVDAC59
RSVDAG58
RSVDV59 RSVDU59
RSVDAA59
RSVD_TPN61
VDDQAY35
VDDQAY40
VDDQAY44
VCCF59
RSVDAC58
RSVDAB23
RSVDAD23 VCCIOA_OUT
E20 VCCIO_OUTA59
T74 PAD~D@T74 PAD~D@
RC245 0_0402_5%@RC245 0_0402_5%@ 1 2
C458 22U_0603_6.3V6M@ C458 22U_0603_6.3V6M@
1 2
RC
25
31
50
_0
40
2_
1%
RC
25
31
50
_0
40
2_
1%
12
T84 PAD~D@T84 PAD~D@
CC
19
10
U_
06
03
_6
.3V
6M
CC
19
10
U_
06
03
_6
.3V
6M
1
2
T70 PAD~D@T70 PAD~D@
RC
25
81
0K
_0
40
2_
5%
@RC
25
81
0K
_0
40
2_
5%
@
12
C459 22U_0603_6.3V6M@ C459 22U_0603_6.3V6M@
1 2
RC
25
01
00
_0
40
2_
1%
RC
25
01
00
_0
40
2_
1%
12
T71 PAD~D@T71 PAD~D@
T67 PAD~D@T67 PAD~D@
CC
13
2.2
U_
04
02
_6
.3V
6M
CC
13
2.2
U_
04
02
_6
.3V
6M
1
2
UC4
74AUP1G07GW_TSSOP5
UC4
74AUP1G07GW_TSSOP5
GND3
A2
NC1
VCC5
Y4
C461 22U_0603_6.3V6M@ C461 22U_0603_6.3V6M@
1 2
RC246 0_0402_5%@RC246 0_0402_5%@ 1 2
RC
24
91
10
_0
40
2_
1%
RC
24
91
10
_0
40
2_
1%
12
RC255
10K_0402_5%
@
RC255
10K_0402_5%
@
12
CC
22
10
0P
_0
40
2_
50
V8
J
@
CC
22
10
0P
_0
40
2_
50
V8
J
@1
2
T86 PAD~D@T86 PAD~D@
CC
16
10
U_
06
03
_6
.3V
6M
CC
16
10
U_
06
03
_6
.3V
6M
1
2
T77 PAD~D@T77 PAD~D@
RC242 0_0603_5%@RC242 0_0603_5%@
12
C452 22U_0603_6.3V6MEMC@ C452 22U_0603_6.3V6MEMC@
1 2
CC24 0.1U_0402_25V6@CC24 0.1U_0402_25V6@
1 2
T82 PAD~D@T82 PAD~D@
RC2431K_0402_5%RC2431K_0402_5%
12
C453 22U_0603_6.3V6MEMC@ C453 22U_0603_6.3V6MEMC@
1 2
T72 PAD~D@T72 PAD~D@
T78 PAD~D@T78 PAD~D@
T85 PAD~D@T85 PAD~D@
C460 22U_0603_6.3V6M@ C460 22U_0603_6.3V6M@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE:
THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
CC63 close to Pin J17
CC64 close to Pin R21
CC34 and CC33 place near
J11; CC37 place near AE8
CC56 place near AA21
CC29 place near K9;
CC27 place near L10
CC74 place near M9
CC42 place near B18
CC49 place near B11
CC60 place near AG16
CC51 place near J18
CC61 CC62 place near J13
CC66 place near AH13
CC54 place near AD10
CC53 place near AB8
CC30 place near AH11
CC44 place near AH14
CC45 place near U8
CC59 place near K14
CC35,CC38, CC39 place near AG10
CC40 place near Y8
CC46 CC47 place near AE9
CC65 place near AG19
CC43 place near V8
CC28 place near AC9
CC58 place near A20
CC32 place near AH10
VCCHSIO
S0 Iccmax = 1.838A
VCCUSB3PLL
S0 Iccmax = 41mA
VCCSATA3PLL
S0 Iccmax = 42mA
VCCAPLL
S0 Iccmax = 57mA
DcpSus2
S0 Iccmax = 25mA
DcpSus3
S0 Iccmax = 10mA
VCCDSW3_3
S0 Iccmax = 114mA
VCCCLK
S0 Iccmax = 200mA
VCCACLKPLL
S0 Iccmax = 31mA
VCCSUS3_3
S0 Iccmax = 63mA
DCPSUS1
S0 Iccmax = 109mA
DCPSUS4
S0 Iccmax = 1mA
+DCPRRTC
+PCH_VCCDSW
+P
CH
_V
CC
DS
W_R
+PCH_VCCDSW
+1.05V_MODPHY +1.05V_MODPHY_PCH
+1.05V_MODPHY_PCH
+PCH_AUSB3PLL+1.05V_MODPHY
+PCH_AUSB3PLL+PCH_ASATA3PLL+1.05V_MODPHY
+PCH_ASATA3PLL
+V1.05S_APLLOPI+1.05V_RUN
+V1.05S_APLLOPI
+1.05V_M
+3.3V_ALW_PCH
+PCH_VCCDSW3_3
+PCH_VCC1P05+1.05V_RUN
+PCH_VCC1P05
+PCH_VCCACLKPLL
+1.05V_RUN
+PCH_RTC_VCCSUS3_3 +3.3V_ALW_PCH
+3.3V_ALW
+PCH_RTC_VCCSUS3_3
+RTC_CELL
+3.3V_M
+1.05V_M
+1.05V_M
+1.05V_M+PCH_DCPSUS1
+PCH_DCPSUS1
+1.5V_THERMAL+3.3V_RUN
+3.3V_RUN
+PCH_DCPSUS4 +1.05V_M
+PCH_DCPSUS4
+1.05V_RUN
+1.05V_RUN+1.05V_M
+3.3V_RUN
+3.3V_ALW_PCH
+1.05V_RUN
+PCH_VCCACLKPLL+1.05V_RUN
+PCH_VCCDSW3_3+3.3V_ALW_PCH
+3.3V_ALW
+3.3V_ALW_PCH
+PCH_DCPSUS
+PCH_DCPSUS
+1.05V_RUN
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(11/12)
16 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(11/12)
16 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(11/12)
16 59Friday, May 17, 2013
Compal Electronics, Inc.
CC
75
100U
_1206_6.3
V6M
@CC
75
100U
_1206_6.3
V6M
@
1
2
RC2755.11_0402_1% RC2755.11_0402_1%12
CC
46
1U
_0402_6.3
V6K
CC
46
1U
_0402_6.3
V6K
1
2
CC
65
1U
_0402_6.3
V6K
CC
65
1U
_0402_6.3
V6K
1
2
CC
47
22U
_0805_6.3
V6M
@CC
47
22U
_0805_6.3
V6M
@
1
2
CC
49
22U
_0603_6.3
V6M
CC
49
22U
_0603_6.3
V6M
1
2
CC
63
1U
_0402_6.3
V6K
CC
63
1U
_0402_6.3
V6K
1
2
CC
56
1U
_0402_6.3
V6K
CC
56
1U
_0402_6.3
V6K
1
2
RC276
0_0603_5%
@
RC276
0_0603_5%
@
1 2
CC
43
22U
_0603_6.3
V6M
CC
43
22U
_0603_6.3
V6M
1
2
LC3
2.2UH_LQM2MPN2R2NG0L_30%
LC3
2.2UH_LQM2MPN2R2NG0L_30%1 2
CC
77
22U
_0603_6.3
V6M
CC
77
22U
_0603_6.3
V6M
1
2
CC
27
1U
_0402_6.3
V6K
CC
27
1U
_0402_6.3
V6K
1
2
CC
39
0.1
U_0402_10V
7K
CC
39
0.1
U_0402_10V
7K
1
2
CC
60
1U
_0402_6.3
V6K
CC
60
1U
_0402_6.3
V6K
1
2
RC262 0_0805_5%@ RC262 0_0805_5%@1 2
LC1
2.2UH_LQM2MPN2R2NG0L_30%
LC1
2.2UH_LQM2MPN2R2NG0L_30%1 2
CC
58
1U
_0402_6.3
V6K
CC
58
1U
_0402_6.3
V6K
1
2
CC
45
1U
_0402_6.3
V6K
CC
45
1U
_0402_6.3
V6K
1
2
CC360.1U_0402_10V7K
CC360.1U_0402_10V7K
1 2
CC
35
1U
_0402_6.3
V6K
CC
35
1U
_0402_6.3
V6K
1
2
CC
32
1U
_0402_6.3
V6K
@CC
32
1U
_0402_6.3
V6K
@
1
2
CC
59
0.1
U_0402_10V
7K
CC
59
0.1
U_0402_10V
7K
1
2
CC
33
1U
_0402_6.3
V6K
CC
33
1U
_0402_6.3
V6K
1
2
CC
28
22U
_0603_6.3
V6M
CC
28
22U
_0603_6.3
V6M
1
2
RC267 0_0402_5%@ RC267 0_0402_5%@1 2
CC
66
1U
_0402_6.3
V6K
@C
C66
1U
_0402_6.3
V6K
@1
2
CC
31
1U
_0402_6.3
V6K
@CC
31
1U
_0402_6.3
V6K
@
1
2
+
CC
73
330U
_D
3_2.5
VY
_R
6M
@
+
CC
73
330U
_D
3_2.5
VY
_R
6M
@1
2
CC
55
100U
_1206_6.3
V6M
CC
55
100U
_1206_6.3
V6M
1
2
CC
42
22U
_0603_6.3
V6M
CC
42
22U
_0603_6.3
V6M
1
2
CC
37
1U
_0402_6.3
V6K
CC
37
1U
_0402_6.3
V6K
1
2
RC2640_0402_5% @ RC2640_0402_5% @12
LC6
2.2UH_LQM2MPN2R2NG0L_30%
LC6
2.2UH_LQM2MPN2R2NG0L_30%1 2
CC
54
1U
_0402_6.3
V6K
@C
C54
1U
_0402_6.3
V6K
@ 1
2
CC
40
0.1
U_0402_10V
7K
@CC
40
0.1
U_0402_10V
7K
@
1
2
RC2610_0402_5% @ RC2610_0402_5% @12
RC265 0_0402_5%@ RC265 0_0402_5%@1 2
AXALIA/HDA
VRM/USB2/AZALIA
GPIO/LCC
THERMAL SENSOR
HASWELL_MCP_E
mPHY
OPI
CORE
USB2
LPT LP POWER
USB3
SDIO/PLSS
SUS OSCILLATOR
RTC
SPI
Rev1p213 OF 19
UC1M
AXALIA/HDA
VRM/USB2/AZALIA
GPIO/LCC
THERMAL SENSOR
HASWELL_MCP_E
mPHY
OPI
CORE
USB2
LPT LP POWER
USB3
SDIO/PLSS
SUS OSCILLATOR
RTC
SPI
Rev1p213 OF 19
UC1M
VCCHSIOK9
VCCHSIOM9
VCC1_05N8
VCC1_05P9
RSVDY20
DCPSUS2AH13
VCCAPLLW21
DCPSUS3J13
VCCSUS3_3AC9
VCCSUS3_3AA9
VCCUSB3PLLB18
VCCSATA3PLLB11
VCCDSW3_3AH10
VCCSDIOU8
VCCSDIOT9
VCC3_3K14
VCC3_3K16
VCCASWAG13VCCASWAG14
VCCSPIY8
DCPRTCAE7VCCRTCAG10VCCSUS3_3AH11
VCCCLKJ18
VCCACLKPLLA20 VCCCLKK19
VCCCLKJ17
RSVDM20
VCCCLKT21 VCCCLKR21
VCCSUS3_3AE20
VCCSUS3_3AE21
VCCAPLLAA21
VCCASWAG8VCCASWAF9VCCASWAE9
VCC1_05AE8VCC1_05H15VCC1_05H11VCC1_05J11
VCC3_3W9 VCC3_3V8
DCPSUS4AB8
RSVDAC20
VCC1_05AG16
VCC1_05AG17
RSVDV21
RSVDK18
VCCHSIOL10
VCC1_05AF22
DCPSUSBYPAG19
DCPSUSBYPAG20
DCPSUS1AD10
DCPSUS1AD8
VCCTS1_5J15
VCCHDAAH14
CC
44
0.1
U_0402_10V
7K
CC
44
0.1
U_0402_10V
7K
1
2
CC
53
1U
_0402_6.3
V6K
@CC
53
1U
_0402_6.3
V6K
@
1
2
LC4
2.2UH_LQM2MPN2R2NG0L_30%
@LC4
2.2UH_LQM2MPN2R2NG0L_30%
@
12
CC
79
100U
_1206_6.3
V6M
CC
79
100U
_1206_6.3
V6M
1
2
CC
76
22U
_0603_6.3
V6M
CC
76
22U
_0603_6.3
V6M
1
2
CC
38
0.1
U_0402_10V
7K
@CC
38
0.1
U_0402_10V
7K
@1
2
CC
62
10U
_0603_6.3
V6M
@C
C62
10U
_0603_6.3
V6M
@1
2
RC2720_0402_5% @ RC2720_0402_5% @12
LC5
2.2UH_LQM2MPN2R2NG0L_30%
LC5
2.2UH_LQM2MPN2R2NG0L_30%1 2
+
CC
72
330U
_D
3_2.5
VY
_R
6M
@
+
CC
72
330U
_D
3_2.5
VY
_R
6M
@1
2
CC
61
1U
_0402_6.3
V6K
@C
C61
1U
_0402_6.3
V6K
@1
2
CC
30
1U
_0402_6.3
V6K
CC
30
1U
_0402_6.3
V6K
1
2
LC2
2.2UH_LQM2MPN2R2NG0L_30%
LC2
2.2UH_LQM2MPN2R2NG0L_30%1 2
CC
29
1U
_0402_6.3
V6K
CC
29
1U
_0402_6.3
V6K
1
2
+
CC
71
330U
_D
3_2.5
VY
_R
6M
@
+
CC
71
330U
_D
3_2.5
VY
_R
6M
@1
2
CC
64
1U
_0402_6.3
V6K
CC
64
1U
_0402_6.3
V6K
1
2
CC
78
100U
_1206_6.3
V6M
CC
78
100U
_1206_6.3
V6M
1
2
CC
74
1U
_0402_6.3
V6K
@CC
74
1U
_0402_6.3
V6K
@
1
2
CC
34
10U
_0603_6.3
V6M
CC
34
10U
_0603_6.3
V6M
1
2
CC
51
1U
_0402_6.3
V6K
CC
51
1U
_0402_6.3
V6K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE:
THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
CAD Note: RC260 SHOULD BE PLACED CLOSE TO CPU
VSSSENSE <46>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(12/12)
17 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(12/12)
17 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
MCP(12/12)
17 59Friday, May 17, 2013
Compal Electronics, Inc.
HASWELL_MCP_E
Rev1p216 OF 19
UC1P HASWELL_MCP_E
Rev1p216 OF 19
UC1P
VSSD49
VSSV3
VSSV7
VSSW20
VSSW22
VSS_SENSEE62VSSV23VSSAH46VSSV58
VSSJ10VSS
D33
VSSL7
VSSH57
VSSD41
VSSD42
VSSH13 VSSG8
VSSG5 VSSG3
VSSG18 VSSF61 VSSF58 VSSF54
VSSF46
VSSF26 VSSF20
VSSE11 VSSD8 VSS
D62
VSSD57 VSSD55 VSSD54 VSSD53 VSSD51 VSSD50 VSS
D5
VSSD47 VSSD46 VSSD45 VSSD43
VSSD34
VSSD35
VSSD37
VSSD38
VSSD39
VSSG6
VSSG22
VSSF30
VSSE17
VSSF34
VSSF42
VSSAH16
VSSF50
VSSF38
VSSH17
VSSJ22
VSSJ59
VSSJ63
VSSK1
VSSK12
VSSL13
VSSL15
VSSL17
VSSL18
VSSL20
VSSL58
VSSL61
VSSM22
VSSN10
VSSN3
VSSP59
VSSP63
VSSR10
VSSR8VSSR22
VSST1
VSST58
VSSU20
VSSU61VSSU22
VSSU9
VSSV10
VSSY10
VSSY59
VSSY63
VSSD59
RC
26
01
00
_0
40
2_
1%
RC
26
01
00
_0
40
2_
1%
12
HASWELL_MCP_E
Rev1p214 OF 19
UC1NHASWELL_MCP_E
Rev1p214 OF 19
UC1N
VSSAH34
VSSAH36
VSSAJ39
VSSAJ41
VSSAJ35
VSSAJ47
VSSAJ54
VSSAF15
VSSAF18
VSSAP20VSSAP17
VSSAN7VSSAN63VSSAN60VSSAN52VSSAN51
VSSAN48VSSAN46VSSAN45VSSAN43VSSAN42
VSSAN39VSSAN36VSSAN35VSSAN32VSSAN31
VSSAN17VSSAM52VSSAM31VSSAM23VSSAM17
VSSAL61VSSAL60VSSAL57VSSAL54VSSAL52
VSSAL46VSSAL45VSSAL40VSSAL39VSSAL36VSSAL33VSSAL31VSSAL29VSSAL26VSSAL23VSSAL22VSSAL20VSSAL17VSSAL13VSSAL10VSSAK52VSSAK3VSSAK23VSSAJ63VSSAJ60VSSAJ58VSSAJ56
VSSAJ52VSSAJ50
VSSAJ45VSSAJ43
VSSAJ29 VSSAJ27 VSSAJ25 VSSAJ23 VSSAJ14 VSSAJ13 VSSAH57 VSSAH55 VSSAH53
VSSAH42 VSSAH40
VSSAH32 VSSAH30 VSSAH28 VSSAH24 VSSAH22 VSSAH20 VSSAH19 VSSAH17 VSSAG63 VSSAG62 VSSAG61 VSSAG60 VSSAG23 VSSAG21 VSSAG11 VSS
AG1
VSSAF17
VSSAF14 VSSAF12 VSSAF11 VSSAE58 VSS
AE5 VSSAE10 VSSAD63 VSS
AD3 VSSAD21 VSSAC61 VSS
AB7 VSSAB22 VSSAB20 VSSAB10 VSSAA58 VSS
AA1 VSSA56 VSSA52 VSSA48 VSSA44 VSSA40 VSSA36 VSSA32
VSSA24 VSSA18 VSSA14 VSSA11
VSSA28
VSSAL51
VSSAM1
VSSAN23
VSSAN40
VSSAN49
VSSAP10
VSSAH38
VSSAH51 VSSAH49 VSSAH44
HASWELL_MCP_E
Rev1p215 OF 19
UC1OHASWELL_MCP_E
Rev1p215 OF 19
UC1O
VSSAU28
VSSC14VSSC11
VSSAW60
VSSAW40
VSSAW16VSSAV8VSSAV59
VSSAP22
VSSAV34
VSSD31VSSD30VSSD29
VSSD21VSSD2VSSD18VSSD14VSSD12VSSC57VSSC39VSSC38VSSC27VSSC25VSSC20VSSC18
VSSB60VSSB56VSSB52VSSB48VSSB44VSSB40VSSB4VSSB36VSSB32VSSB28VSSB26VSSB24VSSB20VSSAY6VSSAY59VSSAY57VSSAY53VSSAY51VSSAY4VSSAY33VSSAY30VSSAY26VSSAY24VSSAY22VSSAY18VSSAY16VSSAY11
VSSAW59VSSAW51VSSAW50VSSAW47VSSAW44VSSAW42
VSSAW4VSSAW37VSSAW35VSSAW33VSSAW24
VSSAV51 VSSAV49 VSSAV46 VSSAV43 VSSAV41 VSSAV39 VSSAV36
VSSAV14 VSSAU59 VSSAU57
VSSAU53 VSSAU51
VSSAU30
VSSAU26 VSSAU24 VSSAU22 VSSAU20 VSSAU18 VSSAU16 VSS
AU1 VSSAT63 VSSAT62 VSSAT61 VSSAT49 VSSAT46 VSSAT43 VSSAT42 VSSAT40 VSSAT37 VSSAT35 VSSAT13 VSSAR52 VSS
AR5 VSSAR49 VSSAR43 VSSAR39 VSSAR33 VSSAR31 VSSAR23 VSSAR17 VSSAR15
VSSAP57 VSSAP54 VSSAP52 VSSAP48 VSSAP39
VSSAP31
VSSAP29 VSSAP26 VSSAP23
VSSAP38
VSSAP3
VSSAV55
VSSD23
VSSD25
VSSD27VSSD26
VSSAU55
VSSAU33
VSSAR11
VSSAV20
VSSAV28
VSSAV33
VSSAV24
VSSAV16
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Note:Place near JDIMM1
Layout Note:Place near JDIMM1.203,204
Populate RD1, De-Populate RD7 for Intel DDR3VREFDQ multiple methods M1Populate RD7, De-Populate RD1 for Intel DDR3VREFDQ multiple methods M3
Note:Check voltage tolerance of VREF_DQ at the DIMM socket
All VREF traces should
have 10 mil trace width
2-3A to 1 DIMMs/channel
H=4mm
DDR3L SODIMM ODT GENERATION
CAD NOTEPLACE THE CAP NEAR TODIMM RESET PIN
Reverse Type
DDR_A_D13DDR_A_D8
DDR_A_D14DDR_A_D10
DDR_A_D9DDR_A_D12
DDR_A_D15DDR_A_D11
DDR_A_D29
DDR_A_D30DDR_A_D31
DDR_A_D43DDR_A_D47
DDR_A_D40
DDR_A_D49DDR_A_D48
DDR_A_D52DDR_A_D53
DDR_A_D0
DDR_A_D2DDR_A_D6
DDR_A_D5DDR_A_D4
DDR_A_D21DDR_A_D20
DDR_A_D17DDR_A_D16
DDR_A_D19
DDR_A_D22
DDR_A_D33
DDR_A_D34DDR_A_D38
DDR_A_D37DDR_A_D32
DDR_A_D39
DDR_A_D62DDR_A_D58
DDR_A_D60DDR_A_D61
DDR_A_D63DDR_A_D59
DDR_A_D56
DDR_A_MA2DDR_A_MA0DDR_A_MA1
DDR_A_MA3
DDR_A_MA4DDR_A_MA5DDR_A_MA6DDR_A_MA8
DDR_A_MA7DDR_A_MA9
DDR_A_MA10
DDR_A_MA11DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_DQS1
DDR_A_DQS3
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS0
DDR_A_DQS2
DDR_A_DQS4
DDR_A_DQS7
DDR_A_DQS#1
DDR_A_DQS#3
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#0
DDR_A_DQS#2
DDR_A_DQS#4
DDR_A_DQS#7
DDR_A_BS0DDR_A_BS1
DDR_A_BS2
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#
M_CLK_DDR0M_CLK_DDR#0
M_CLK_DDR1M_CLK_DDR#1
DDR_CKE0_DIMMA DDR_CKE1_DIMMA
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#M_ODT0
M_ODT1
DDR_A_D57
DDR_A_MA15
DDR_A_D46
DDR_A_D55
DDR_A_D41
DDR_A_D28 DDR_A_D24
DDR_A_D45DDR_A_D44
DDR_A_D50
DDR_A_D54
DDR_A_D51
DDR_A_D27DDR_A_D26
DDR_A_D25
DDR_A_D42
DDR_A_D7
DDR_A_D35
DDR_A_D1
DDR_A_D3
DDR_A_D23
DDR_A_D18
DDR_A_D36
M_ODT0
M_ODT10.675V_DDR_VTT_ON
DDR3_DRAMRST#
+SM_VREF_CA_DIMM1
0.675V_DDR_VTT_ON
+0.675V_DDR_VTT
+1.35V_MEM
+1.35V_MEM
+1.35V_MEM
+1.35V_MEM+1.35V_MEM
+3.3V_RUN
+0.675V_DDR_VTT
+DIMM1_VREF_DQ+SM_VREF_DQ0_DIMM1
+5V_ALW +1.35V_MEM
+0.675V_DDR_VTT
+SM_VREF_CA_DIMM
+1.35V_MEM
+SM_VREF_DQ0
+1.35V_MEM
+SM_VREF_DQ0_DIMM1
DDR_A_D[0..63]<8>
DDR_A_DQS[0..7]<8>
DDR_A_MA[0..15]<8>
DDR_A_DQS#[0..7]<8>
DDR3_DRAMRST#_CPU <9>DDR3_DRAMRST#<19>
DDR_CKE0_DIMMA<8>
DDR_A_BS2<8>
DDR_CS1_DIMMA#<8>
DDR_A_WE#<8>DDR_A_CAS#<8>
DDR_A_BS0<8>
DDR_A_BS1 <8>
DDR_A_RAS# <8>
M_CLK_DDR1 <8>M_CLK_DDR#1 <8>M_CLK_DDR#0<8>
M_CLK_DDR0<8>
DDR_CKE1_DIMMA <8>
DDR_CS0_DIMMA# <8>
DDR_PG_CTRL<9>
M_ODT2 <19>
M_ODT3 <19>
DDR_XDP_WAN_SMBCLK <19,31,7,9>DDR_XDP_WAN_SMBDAT <19,31,7,9>
0.675V_DDR_VTT_ON <43>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
DDRIII-SODIMM SLOT1
18 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
DDRIII-SODIMM SLOT1
18 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
DDRIII-SODIMM SLOT1
18 59Friday, May 17, 2013
Compal Electronics, Inc.
CD
15
10
U_
06
03
_6
.3V
6M
@CD
15
10
U_
06
03
_6
.3V
6M
@1
2
RD12 0_0402_5%@RD12 0_0402_5%@
1 2
RC
21
71
.8K
_0
40
2_
1%
RC
21
71
.8K
_0
40
2_
1%
12
CD
30
10
U_
06
03
_6
.3V
6M
CD
30
10
U_
06
03
_6
.3V
6M
1
2
G
D S
QD1BSS138-G_SOT23-3
G
D S
QD1BSS138-G_SOT23-3
2
1 3
CD
21
10
U_
06
03
_6
.3V
6M
CD
21
10
U_
06
03
_6
.3V
6M
1
2
CD
20
.1U
_0
40
2_
25
V6
CD
20
.1U
_0
40
2_
25
V6
1
2
CD
27
0.1
U_
04
02
_2
5V
6C
D2
70
.1U
_0
40
2_
25
V6
1
2
CD
17
10
U_
06
03
_6
.3V
6M
CD
17
10
U_
06
03
_6
.3V
6M
1
2
CD
11
1U
_0
40
2_
6.3
V6
KC
D1
11
U_
04
02
_6
.3V
6K
1
2
R33 66.5_0402_1%R33 66.5_0402_1%
1 2
RD6 0_0402_5%@RD6 0_0402_5%@
1 2
RC195
24.9_0402_1%
RC195
24.9_0402_1%
12
CD
18
10
U_
06
03
_6
.3V
6M
@CD
18
10
U_
06
03
_6
.3V
6M
@1
2
CD
91
U_
04
02
_6
.3V
6K
CD
91
U_
04
02
_6
.3V
6K
1
2
CD
14
10
U_
06
03
_6
.3V
6M
CD
14
10
U_
06
03
_6
.3V
6M
1
2
CD
13
0.1
U_
04
02
_2
5V
6C
D1
30
.1U
_0
40
2_
25
V6
1
2
CD
28
0.1
U_
04
02
_2
5V
6C
D2
80
.1U
_0
40
2_
25
V6
1
2
R29 66.5_0402_1%R29 66.5_0402_1%
1 2
CD
61
U_
04
02
_6
.3V
6K
CD
61
U_
04
02
_6
.3V
6K
1
2
RC
22
11
.8K
_0
40
2_
1%
RC
22
11
.8K
_0
40
2_
1%
12
+
CD
22
33
0U
_D
3_
2.5
VY
_R
6M
+
CD
22
33
0U
_D
3_
2.5
VY
_R
6M
1
2
RD5 0_0402_5%@RD5 0_0402_5%@ 1 2
CD
12
2.2
U_
04
02
_6
.3V
6M
CD
12
2.2
U_
04
02
_6
.3V
6M
1
2
RD1 0_0402_5%@RD1 0_0402_5%@
1 2
CD
10
1U
_0
40
2_
6.3
V6
KC
D1
01
U_
04
02
_6
.3V
6K
1
2
R30 66.5_0402_1%R30 66.5_0402_1%
1 2
CD
29
0.1
U_
04
02
_2
5V
6C
D2
90
.1U
_0
40
2_
25
V6
1
2
R32
2M_0402_5%
@R32
2M_0402_5%
@
12
CD
71
U_
04
02
_6
.3V
6K
CD
71
U_
04
02
_6
.3V
6K
1
2
U5
74AUP1G07GW_TSSOP5
U5
74AUP1G07GW_TSSOP5
GND3
A2
NC1
VCC5
Y4
CD230.1U_0402_25V6
@CD230.1U_0402_25V6
@
1 2
CD
30
.1U
_0
40
2_
25
V6
@CD
30
.1U
_0
40
2_
25
V6
@1
2
CD
41
U_
04
02
_6
.3V
6K
CD
41
U_
04
02
_6
.3V
6K
1
2
RD3470_0402_5%RD3470_0402_5%
12
JDIMM1
FOX_AS0A621-U4R6-7H
CONN@JDIMM1
FOX_AS0A621-U4R6-7H
CONN@
VREF_DQ1
VSS12
VSS23
DQ44
DQ05
DQ56
DQ17
VSS38
VSS49
DQS#010
DM011
DQS012
VSS513
VSS614
DQ215
DQ616
DQ317
DQ718
VSS719
VSS820
DQ821
DQ1222
DQ923
DQ1324
VSS925
VSS1026
DQS#127
DM128
DQS129
RESET#30
VSS1131
VSS1232
DQ1033
DQ1434
DQ1135
DQ1536
VSS1337
VSS1438
DQ1639
DQ2040
DQ1741
DQ2142
VSS1543
VSS1644
DQS#245
DM246
DQS247
VSS1748
VSS1849
DQ2250
DQ1851
DQ2352
DQ1953
VSS1954
VSS2055
DQ2856
DQ2457
DQ2958
DQ2559
VSS2160
VSS2261
DQS#362
DM363
DQS364
VSS2365
VSS2466
DQ2667
DQ3068
DQ2769
DQ3170
VSS2571
VSS2672
A12/BC#83
A1184
A985
A786
VDD587
VDD688
A889
A690
CKE073
CKE174
VDD175
VDD276
NC177
A1578
BA279
A1480
VDD381
VDD482
A591
A492
VDD793
VDD894
A395
A296
A197
A098
VDD999
VDD10100
CK0101
CK1102
CK0#103
CK1#104
VDD11105
VDD12106
A10/AP107
BA1108
BA0109
RAS#110
VDD13111
VDD14112
WE#113
S0#114
CAS#115
ODT0116
VDD15117
VDD16118
A13119
ODT1120
S1#121
NC2122
VDD17123
VDD18124
NCTEST125
VREF_CA126
VSS27127
VSS28128
DQ32129
DQ36130
DQ33131
DQ37132
VSS29133
VSS30134
DQS#4135
DM4136
DQS4137
VSS31138
VSS32139
DQ38140
DQ34141
DQ39142
DQ35143
VSS33144
VSS34145
DQ44146
DQ40147
DQ45148
DQ41149
VSS35150
VSS36151
DQS#5152
DM5153
DQS5154
VSS37155
VSS38156
DQ42157
DQ46158
DQ43159
DQ47160
VSS39161
VSS40162
DQ48163
DQ52164
DQ49165
DQ53166
VSS41167
VSS42168
DQS#6169
DM6170
DQS6171
VSS43172
VSS44173
DQ54174
DQ50175
DQ55176
DQ51177
VSS45178
VSS46179
DQ60180
DQ56181
DQ61182
DQ57183
VSS47184
VSS48185
DQS#7186
DM7187
DQS7188
VSS49189
VSS50190
DQ58191
DQ62192
DQ59193
DQ63194
VSS51195
VSS52196
SA0197
EVENT#198
VDDSPD199
SDA200
SA1201
SCL202
VTT1203
VTT2204
G1205
G2206
RC173
2_0402_1%
RC173
2_0402_1%
1 2
CD
25
2.2
U_
04
02
_6
.3V
6M
@CD
25
2.2
U_
04
02
_6
.3V
6M
@
1
2
CD
16
10
U_
06
03
_6
.3V
6M
CD
16
10
U_
06
03
_6
.3V
6M
1
2
R2
8
22
0K
_0
40
2_
5%
~D
R2
8
22
0K
_0
40
2_
5%
~D
12
CD
24
0.1
U_
04
02
_2
5V
6C
D2
40
.1U
_0
40
2_
25
V6
1
2
CD
81
U_
04
02
_6
.3V
6K
CD
81
U_
04
02
_6
.3V
6K
1
2
RC279 0_0402_5%@RC279 0_0402_5%@
1 2
CD
20
10
U_
06
03
_6
.3V
6M
CD
20
10
U_
06
03
_6
.3V
6M
1
2
R31 66.5_0402_1%R31 66.5_0402_1%
1 2
CD
51
U_
04
02
_6
.3V
6K
CD
51
U_
04
02
_6
.3V
6K
1
2
CD
31
10
U_
06
03
_6
.3V
6M
CD
31
10
U_
06
03
_6
.3V
6M
1
2
CD
19
10
U_
06
03
_6
.3V
6M
CD
19
10
U_
06
03
_6
.3V
6M
1
2
CD
12
.2U
_0
40
2_
6.3
V6
MC
D1
2.2
U_
04
02
_6
.3V
6M
1
2
CC70
0.022U_0402_16V7K
CC70
0.022U_0402_16V7K
1
2
CD
26
0.1
U_
04
02
_2
5V
6C
D2
60
.1U
_0
40
2_
25
V6
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Note:Place near JDIMM2
Layout Note:Place near JDIMM2.203,204
Note:Check voltage tolerance of VREF_DQ at the DIMM socket
All VREF traces should
have 10 mil trace width
2-3A to 1 DIMMs/channel
Populate RD4, De-Populate RD8 for Intel DDR3VREFDQ multiple methods M1Populate RD8, De-Populate RD4 for Intel DDR3VREFDQ multiple methods M3
H=4mm
CAD NOTEPLACE THE CAP NEAR TODIMM RESET PIN
Reverse Type
DDR_B_D47
DDR_B_D42
DDR_B_D45
DDR_B_D58
DDR_B_D28
DDR_B_DQS#5
DDR_B_D43
DDR_B_D44
DDR_B_D56
DDR_B_DQS#7
DDR_B_D9
DDR_B_DQS3
DDR_B_D29
DDR_B_D30
DDR_B_DQS7
DDR_B_D15DDR_B_D13
DDR_B_D26
DDR_B_DQS#3
DDR_B_D31
DDR_B_D10
DDR_B_D8
DDR_B_D61
DDR_B_DQS5
DDR_B_D12
DDR_B_D27
DDR_B_D57
DDR_B_D14
DDR_B_D60
DDR_B_D63
DDR_B_D25
DDR_B_DQS#1
DDR_B_D40
DDR_B_D46
DDR_B_D59
DDR_B_D11
DDR_B_D62
DDR_B_D41
DDR_B_D24
DDR_B_DQS1
DDR_CKE2_DIMMB
DDR_B_D48DDR_B_D53
DDR_B_BS2
DDR_B_MA12DDR_B_MA9
DDR_B_MA8DDR_B_MA5
DDR_B_MA3DDR_B_MA1
M_CLK_DDR2M_CLK_DDR#2
DDR_B_MA10DDR_B_BS0
DDR_B_WE#DDR_B_CAS#
DDR_B_MA13DDR_CS3_DIMMB#
DDR_B_D4DDR_B_D1
DDR_B_DQS#0DDR_B_DQS0
DDR_B_D3DDR_B_D7
DDR_B_D21DDR_B_D20
DDR_B_D22DDR_B_D23
DDR_B_D36DDR_B_D33
DDR_B_DQS#4DDR_B_DQS4
DDR_B_D35DDR_B_D39
DDR_B_D52DDR_B_D49
DDR_B_MA7
DDR_B_D37
M_ODT2
DDR_B_MA14
DDR_B_D0DDR_B_D5
DDR_B_MA6
DDR_B_D16
DDR_B_D34
DDR_B_D32
DDR_B_D19
DDR_CKE3_DIMMB
DDR_B_MA4
DDR_B_D17
DDR_B_D2
DDR_B_BS1
DDR_B_D38
DDR_B_D18
M_ODT3
M_CLK_DDR3
DDR_B_RAS#
M_CLK_DDR#3
DDR_B_MA2
DDR_B_DQS#2
DDR_B_MA11
DDR_B_D51
DDR_B_D6
DDR_B_MA0
DDR_B_DQS2
DDR_CS2_DIMMB#
DDR_B_MA15
DDR_B_D55
DDR_B_DQS#6DDR_B_DQS6
DDR_B_D54DDR_B_D50
+SM_VREF_CA_DIMM2
DDR3_DRAMRST#
+1.35V_MEM
+1.35V_MEM +1.35V_MEM
+1.35V_MEM
+0.675V_DDR_VTT
+DIMM2_VREF_DQ
+SM_VREF_DQ1_DIMM2
+3.3V_RUN
+0.675V_DDR_VTT +0.675V_DDR_VTT
+SM_VREF_CA_DIMM
+1.35V_MEM
+SM_VREF_CA+SM_VREF_CA_DIMM
+SM_VREF_DQ1
+1.35V_MEM
+SM_VREF_DQ1_DIMM2
+3.3V_RUN
DDR_B_D[0..63]<8>
DDR_B_DQS[0..7]<8>
DDR_B_MA[0..15]<8>
DDR_B_DQS#[0..7]<8>DDR3_DRAMRST# <18>
DDR_B_CAS#<8>DDR_B_WE#<8>
DDR_CKE2_DIMMB<8>
DDR_B_BS0<8>
DDR_B_BS2<8>
DDR_CS3_DIMMB#<8>
M_CLK_DDR2<8>M_CLK_DDR#2<8>
DDR_CKE3_DIMMB <8>
DDR_B_RAS# <8>
DDR_B_BS1 <8>
M_ODT2 <18>DDR_CS2_DIMMB# <8>
M_CLK_DDR3 <8>M_CLK_DDR#3 <8>
M_ODT3 <18>
DDR_XDP_WAN_SMBCLK <18,31,7,9>DDR_XDP_WAN_SMBDAT <18,31,7,9>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
DDRIII-SODIMM SLOT2
19 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
DDRIII-SODIMM SLOT2
19 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
DDRIII-SODIMM SLOT2
19 59Friday, May 17, 2013
Compal Electronics, Inc.
RC
13
01
.8K
_0
40
2_
1%
RC
13
01
.8K
_0
40
2_
1%
12
RC
67
1.8
K_
04
02
_1
%R
C6
71
.8K
_0
40
2_
1%
12
JDIMM2
FOX_AS0A621-U4R6-7H
CONN@JDIMM2
FOX_AS0A621-U4R6-7H
CONN@
VREF_DQ1
VSS12
VSS23
DQ44
DQ05
DQ56
DQ17
VSS38
VSS49
DQS#010
DM011
DQS012
VSS513
VSS614
DQ215
DQ616
DQ317
DQ718
VSS719
VSS820
DQ821
DQ1222
DQ923
DQ1324
VSS925
VSS1026
DQS#127
DM128
DQS129
RESET#30
VSS1131
VSS1232
DQ1033
DQ1434
DQ1135
DQ1536
VSS1337
VSS1438
DQ1639
DQ2040
DQ1741
DQ2142
VSS1543
VSS1644
DQS#245
DM246
DQS247
VSS1748
VSS1849
DQ2250
DQ1851
DQ2352
DQ1953
VSS1954
VSS2055
DQ2856
DQ2457
DQ2958
DQ2559
VSS2160
VSS2261
DQS#362
DM363
DQS364
VSS2365
VSS2466
DQ2667
DQ3068
DQ2769
DQ3170
VSS2571
VSS2672
A12/BC#83
A1184
A985
A786
VDD587
VDD688
A889
A690
CKE073
CKE174
VDD175
VDD276
NC177
A1578
BA279
A1480
VDD381
VDD482
A591
A492
VDD793
VDD894
A395
A296
A197
A098
VDD999
VDD10100
CK0101
CK1102
CK0#103
CK1#104
VDD11105
VDD12106
A10/AP107
BA1108
BA0109
RAS#110
VDD13111
VDD14112
WE#113
S0#114
CAS#115
ODT0116
VDD15117
VDD16118
A13119
ODT1120
S1#121
NC2122
VDD17123
VDD18124
NCTEST125
VREF_CA126
VSS27127
VSS28128
DQ32129
DQ36130
DQ33131
DQ37132
VSS29133
VSS30134
DQS#4135
DM4136
DQS4137
VSS31138
VSS32139
DQ38140
DQ34141
DQ39142
DQ35143
VSS33144
VSS34145
DQ44146
DQ40147
DQ45148
DQ41149
VSS35150
VSS36151
DQS#5152
DM5153
DQS5154
VSS37155
VSS38156
DQ42157
DQ46158
DQ43159
DQ47160
VSS39161
VSS40162
DQ48163
DQ52164
DQ49165
DQ53166
VSS41167
VSS42168
DQS#6169
DM6170
DQS6171
VSS43172
VSS44173
DQ54174
DQ50175
DQ55176
DQ51177
VSS45178
VSS46179
DQ60180
DQ56181
DQ61182
DQ57183
VSS47184
VSS48185
DQS#7186
DM7187
DQS7188
VSS49189
VSS50190
DQ58191
DQ62192
DQ59193
DQ63194
VSS51195
VSS52196
SA0197
EVENT#198
VDDSPD199
SDA200
SA1201
SCL202
VTT1203
VTT2204
G1205
G2206
CD
35
1U
_0
40
2_
6.3
V6
KC
D3
51
U_
04
02
_6
.3V
6K
1
2
CD
39
1U
_0
40
2_
6.3
V6
KC
D3
91
U_
04
02
_6
.3V
6K
1
2
CD
55
0.1
U_
04
02
_2
5V
6C
D5
50
.1U
_0
40
2_
25
V6
1
2
RC
13
21
.8K
_0
40
2_
1%
RC
13
21
.8K
_0
40
2_
1%
12
RC
69
1.8
K_
04
02
_1
%R
C6
91
.8K
_0
40
2_
1%
12
CD
48
10
U_
06
03
_6
.3V
6M
@CD
48
10
U_
06
03
_6
.3V
6M
@1
2
CD
33
0.1
U_
04
02
_2
5V
6C
D3
30
.1U
_0
40
2_
25
V6
1
2
CD
56
0.1
U_
04
02
_2
5V
6C
D5
60
.1U
_0
40
2_
25
V6
1
2
CC69
0.022U_0402_16V7K
CC69
0.022U_0402_16V7K
1
2
CD
40
1U
_0
40
2_
6.3
V6
KC
D4
01
U_
04
02
_6
.3V
6K
1
2
CD
37
1U
_0
40
2_
6.3
V6
KC
D3
71
U_
04
02
_6
.3V
6K
1
2
RD10 0_0402_5%@RD10 0_0402_5%@
12
+
CD
53
33
0U
_D
3_
2.5
VY
_R
6M
+
CD
53
33
0U
_D
3_
2.5
VY
_R
6M
1
2
CD
57
0.1
U_
04
02
_2
5V
6C
D5
70
.1U
_0
40
2_
25
V6
1
2
CD
38
1U
_0
40
2_
6.3
V6
KC
D3
81
U_
04
02
_6
.3V
6K
1
2
RD11 0_0402_5%@RD11 0_0402_5%@ 12
CD
34
0.1
U_
04
02
_2
5V
6
@CD
34
0.1
U_
04
02
_2
5V
6
@1
2
CD
52
10
U_
06
03
_6
.3V
6M
CD
52
10
U_
06
03
_6
.3V
6M
1
2
CD
47
10
U_
06
03
_6
.3V
6M
CD
47
10
U_
06
03
_6
.3V
6M
1
2
CD
49
10
U_
06
03
_6
.3V
6M
CD
49
10
U_
06
03
_6
.3V
6M
1
2
CD
46
10
U_
06
03
_6
.3V
6M
@CD
46
10
U_
06
03
_6
.3V
6M
@1
2
RC68
2_0402_1%
RC68
2_0402_1%
1 2
CD
43
2.2
U_
04
02
_6
.3V
6M
CD
43
2.2
U_
04
02
_6
.3V
6M
1
2
CD
45
10
U_
06
03
_6
.3V
6M
CD
45
10
U_
06
03
_6
.3V
6M
1
2
CD
36
1U
_0
40
2_
6.3
V6
KC
D3
61
U_
04
02
_6
.3V
6K
1
2
CD
61
2.2
U_
04
02
_6
.3V
6M
@CD
61
2.2
U_
04
02
_6
.3V
6M
@1
2
CD
59
10
U_
06
03
_6
.3V
6M
CD
59
10
U_
06
03
_6
.3V
6M
1
2
RC126
2_0402_1%
RC126
2_0402_1%
1 2
CD
42
1U
_0
40
2_
6.3
V6
KC
D4
21
U_
04
02
_6
.3V
6K
1
2
CD
51
10
U_
06
03
_6
.3V
6M
CD
51
10
U_
06
03
_6
.3V
6M
1
2
CD
44
0.1
U_
04
02
_2
5V
6C
D4
40
.1U
_0
40
2_
25
V6
1
2
RD7 0_0402_5%@RD7 0_0402_5%@
1 2
CD
60
0.1
U_
04
02
_2
5V
6C
D6
00
.1U
_0
40
2_
25
V6
1
2
RD13 0_0402_5%@RD13 0_0402_5%@
1 2
CD
32
2.2
U_
04
02
_6
.3V
6M
CD
32
2.2
U_
04
02
_6
.3V
6M
1
2
RC83
24.9_0402_1%
RC83
24.9_0402_1%
12
RC128
24.9_0402_1%
RC128
24.9_0402_1%
12
CD
50
10
U_
06
03
_6
.3V
6M
CD
50
10
U_
06
03
_6
.3V
6M
1
2
CC67
0.022U_0402_16V7K
CC67
0.022U_0402_16V7K
1
2
CD
54
0.1
U_
04
02
_2
5V
6C
D5
40
.1U
_0
40
2_
25
V6
1
2
CD
41
1U
_0
40
2_
6.3
V6
KC
D4
11
U_
04
02
_6
.3V
6K
1
2
CD
58
10
U_
06
03
_6
.3V
6M
CD
58
10
U_
06
03
_6
.3V
6M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE:
THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C1 close to JNFC1
ST change to 6718K-Y15N-01L
NFC_DET#
TP_NFC_SWP_PWR_RSVDTP_NFC_RSVD4
NFC_SMBCLKNFC_SMBDATATP_NFC_RSVD3
TP_NFC_RSVD1
TP_NFC_RSVD3
NFC_RST
NFC_RST
NFC_DET#
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_ALW_PCH
NFC_IRQ<12>
NFC_SMBCLK<7>NFC_SMBDATA<7>
PLTRST_NFC#<9>
PCH_NFC_RST<12>
NFC_DET#<12>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
NFC/Sensor Hub Conn
20 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
NFC/Sensor Hub Conn
20 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
NFC/Sensor Hub Conn
20 59Friday, May 17, 2013
Compal Electronics, Inc.
T88 PAD~D@T88 PAD~D@
JNFC1
E-T_6718K-Y15N-01L
CONN@JNFC1
E-T_6718K-Y15N-01L
CONN@
11
22
33
44
55
66
77
88
GND16
GND17
99
1010
1111
1212
1313
1414
1515
U29
TC7SH08FU_SSOP5~D
U29
TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
R37 0_0402_5%@R37 0_0402_5%@
1 2
C3880.1U_0402_25V6 @C3880.1U_0402_25V6 @1 2
T87 PAD~D@T87 PAD~D@ C1
0.1
U_0402_16V
4Z
@C1
0.1
U_0402_16V
4Z
@1
2
T89 PAD~D@T89 PAD~D@
R38 100K_0402_5%R38 100K_0402_5%
1 2
2
2
1
1
B B
A A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
I2C debug port to VMM2320
EEPROM
XB: non Vpro use A2 part
Vpro use A3 part
VMM_SPI_CLKVMM_SPI_DIN
VMM_SPI_DO
VMM_SPI_CS#
VMM_SPI_WP#
+1.05V_VMM_VDD
DP12412_HPD
+3.3V_RUN_VDDA
CLK_27M_IN
SRCDET
VMM2310_AUXPVMM2310_AUXNVMM2310_HDP
VMM2310_TX2P0VMM2310_TX2N0
VMM2310_SCLVMM2310_SDA
HSYNC_DOCK
VSYNC_DOCK
VMM2310_AUXNVMM2310_SCL
VMM2310_SDA
VMM2310_TX2N0
VMM2310_TX2P0
VMM_GPIO9
VMM_GPIO6VMM_GPIO7VMM_GPIO8
VMM_GPIO6
VMM_GPIO7
VMM_GPIO8
LP_CTL
VMM_MESCLVMM_MESDA
+1.05V_VMM_VDDTX
DP12412_AUX_CDP12412_AUX#_C
SW_DPB_AUX
+3.3V_RUN_VDDIO
SW_DPB_AUX#
DP12412_P0_CDP12412_N0_CDP12412_P1_CDP12412_N1_CDP12412_P2_CDP12412_N2_CDP12412_P3_CDP12412_N3_C
CLK_27M_IN_R
VMM_SPI_CLKVMM_SPI_HOLD
VMM_SPI_DO
VMM_SPI_CS#
VMM_SPI_WP#VMM_SPI_DIN
SRCDET
VMM_DPB_CTRLCLK
VMM_DPB_CTRLDAT
VMM_DPC_CTRLCLK
VMM_DPC_CTRLDAT
VMM_MESDA
VMM_MESCL
VMM2310_HDP
CLK_27M_OUT
CLK_DDC2_DOCK
DAT_DDC2_DOCK
VMM2310_TX2N1
VMM2310_TX2N2
VMM2310_TX2N3
VMM2310_TX2N3
VMM2310_TX2N2
VMM2310_TX2N1
SW_DPC_AUX#
SW_DPC_AUX
VMM_DPC_CTRLCLKVMM_DPC_CTRLDAT
VMM_DPB_CTRLDATVMM_DPB_CTRLCLK
+1.05V_RUN_VMM_U31
+3.3V_RUN_VMM_U31
DOCKED
DOCKED
+3.3V_RUN_VDDA
GREEN_DOCK
BLUE_DOCK
RED_DOCK
RED_DOCK
GREEN_DOCK
BLUE_DOCK
LP_CTL
+3.3V_RUN_VMM
+3.3V_RUN_VMM
+3.3V_RUN_VMM
+1.05V_RUN_VMM
+1.05V_RUN_VMM
+3.3V_RUN_VMM
+3.3V_RUN_VMM
+3.3V_RUN_VMM
+3.3V_RUN_VMM
+1.05V_RUN
+1.05V_RUN_VMM
+3.3V_RUN_VMM+3.3V_RUN
+5V_ALW
PLTRST_VMM2320#<9>
HSYNC_DOCK <34>
VSYNC_DOCK <34>
CLK_DDC2_DOCK <34>
DAT_DDC2_DOCK <34>
I2C1_SDA_VMM <12>I2C1_SCL_VMM <12>
DP12412_HPD<27>
DP12412_AUX#<27>DP12412_AUX<27>
DP12412_P3<27>
DP12412_N0<27>DP12412_P0<27>
DP12412_N1<27>DP12412_P1<27>
DP12412_N2<27>DP12412_P2<27>
DP12412_N3<27>
VMM_DPC_CTRLDAT <24>
SW_DPC_AUX# <24>SW_DPC_AUX <24>
VMM_DPC_CTRLCLK <24>
DPC_DOCK_HPD <34>
DPC_LANE_P0 <34>
DPC_LANE_P1 <34>DPC_LANE_N1 <34>DPC_LANE_P2 <34>DPC_LANE_N2 <34>DPC_LANE_P3 <34>DPC_LANE_N3 <34>
DPC_LANE_N0 <34>
DPC_CA_DET <24,34>
VMM_DPB_CTRLDAT <24>
DPB_LANE_N3 <34>DPB_LANE_P3 <34>DPB_LANE_N2 <34>DPB_LANE_P2 <34>
DPB_LANE_N0 <34>DPB_LANE_P1 <34>
DPB_LANE_P0 <34>
SW_DPB_AUX <24>SW_DPB_AUX# <24>
DPB_LANE_N1 <34>
DPB_CA_DET <24,34>
VMM_DPB_CTRLCLK <24>
DPB_DOCK_HPD <34>
DOCKED<27,28,32,36>
RED_DOCK <34>
GREEN_DOCK <34>
BLUE_DOCK <34>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
IDT VMM2320 DP and VGA SW
21 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
IDT VMM2320 DP and VGA SW
21 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
IDT VMM2320 DP and VGA SW
21 59Friday, May 17, 2013
Compal Electronics, Inc.
C190.1U_0402_10V7K C190.1U_0402_10V7K 1 2
C10
.01U
_0402_16V
7K
C10
.01U
_0402_16V
7K
1
2
C22
0.1
U_0402_25V
6C
22
0.1
U_0402_25V
6
1
2
R88 0_0402_5%@ R88 0_0402_5%@1 2
C27
0.1
U_0402_25V
6C
27
0.1
U_0402_25V
6
1
2
C14
.01U
_0402_16V
7K
C14
.01U
_0402_16V
7K
1
2
R92 1M_0402_5%R92 1M_0402_5%1 2
C1580.1U_0402_10V7K C1580.1U_0402_10V7K 1 2C1590.1U_0402_10V7K C1590.1U_0402_10V7K 1 2
1V
Dig
ita
l 1
V A
na
log
3
.3V
IO
3.3V Analog U6B
IDTVMM2320BKG8_BGA1681
V D
igit
al
1 V
An
alo
g
3.3
V I
O
3.3V Analog U6B
IDTVMM2320BKG8_BGA168
VDDE6
VDDE7
VDDE8
VDDE9
VDDH7 VDDH6
VDDH8
VDDH9
VDDRXE3
VDDRXG3
VDDTX0C8
VDDTX0C9
VDDLPE5
VDDTX0A0E10
VDDRXA1F3
VDDTX0A1C7
VDDTX1G12
VDDTX1A0H11
VDDRXA0H3
VDDRXA2D3
VDDTX1A2D12
VGA_AVDDJ10
VDDTX1A1E12
VDDTX0A2C6
VDDTX1F12
VDDXT1VJ3
VDDRX_33H5
VDDXT3VJ4 VDDIO
K12 VDDIOK11 VDDIOK4 VDDIOK3 VDDIO
C12 VDDIOC11 VDDIOC4 VDDIOC3
VDDSAJ2
VGA_AVDDK10 VGA_AVDDK9 VGA_AVDDK8
VSSD5
VSSD7
VSSD9
VSSD11
VSSE4
VSSE11
VSSF4
VSSF5
VSSF6
VSSF7
VSSD10
VSSD8
VSSD6
VSSF9
VSSF10
VSSF11
VSSG5
VSSG6
VSSG8
VSSG10
VSSH4
VSSJ11
VSSK5
VGA_AVSSJ6
VGA_AVSSJ7
VGA_AVSSJ8
VGA_AVSSJ9
VGA_AVDD33K6
VDDTX0_33C10
VDDTX1_33H12
VGA_AVDD33K7
VSSC5
VSSF8
VSSG7
VSSG4
VSSG9
VSSG11
VSSJ5
VSSJ12
VGA_AVSSH10
VSSD4
R73 0_0402_5%@ R73 0_0402_5%@1 2
C11
0.1
U_0402_25V
6C
11
0.1
U_0402_25V
6
1
2
C1570.1U_0402_10V7K C1570.1U_0402_10V7K 1 2
C15
0.1
U_0402_25V
6C
15
0.1
U_0402_25V
6
1
2
R81 0_0402_5%@ R81 0_0402_5%@1 2
C24
.01U
_0402_16V
7K
C24
.01U
_0402_16V
7K
1
2
C42
22P
_0402_50V
8J
C42
22P
_0402_50V
8J
1
2
C26
1U
_0603_10V
6K
C26
1U
_0603_10V
6K
1
2
C1560.1U_0402_10V7K C1560.1U_0402_10V7K 1 2
C34
0.1U_0402_25V6
C34
0.1U_0402_25V6
1 2
C132
10U
_0603_6.3
V6M
C132
10U
_0603_6.3
V6M
1
2
R63 1M_0402_5%R63 1M_0402_5%12
C1610.1U_0402_10V7K C1610.1U_0402_10V7K 1 2
L4
BLM18AG102SN1D_2P
L4
BLM18AG102SN1D_2P
1 2
R70 2.2K_0402_5%R70 2.2K_0402_5%1 2
R40 2.2K_0402_5%R40 2.2K_0402_5%1 2
PJP12
PAD-OPEN1x1m
PJP12
PAD-OPEN1x1m
12
R72 2.2K_0402_5%R72 2.2K_0402_5%1 2
C394470P_0402_50V7K
C394470P_0402_50V7K
1 2
C29
.01U
_0402_16V
7K
C29
.01U
_0402_16V
7K
1
2
C8
1U
_0603_10V
6K
C8
1U
_0603_10V
6K
1
2
R74 10K_0402_5%R74 10K_0402_5%12
R661M_0402_5%R661M_0402_5%
12
R47 1M_0402_5%R47 1M_0402_5%1 2
PJP13 PAD-OPEN1x1mPJP13 PAD-OPEN1x1m
12
C432 0.1U_0402_10V7KC432 0.1U_0402_10V7K1 2
R46 2.2K_0402_5%R46 2.2K_0402_5%1 2
R42 2.2K_0402_5%R42 2.2K_0402_5%1 2
U31
TPS22966DPUR_SON14_2X3~D
U31
TPS22966DPUR_SON14_2X3~D
GND11
VIN26
VBIAS4
ON25
VOUT29
VIN27
CT112
VOUT114
VOUT28
VOUT113
VIN12
ON13
VIN11
CT210
GPAD15
L2
BLM18AG102SN1D_2P
L2
BLM18AG102SN1D_2P
1 2
C1620.1U_0402_10V7K C1620.1U_0402_10V7K 1 2
R77 0_0402_5%@ R77 0_0402_5%@1 2
C13
.01U
_0402_16V
7K
C13
.01U
_0402_16V
7K
1
2
L1
BLM18AG102SN1D_2P
L1
BLM18AG102SN1D_2P
1 2
R49 2.2K_0402_5%R49 2.2K_0402_5%1 2
C1600.1U_0402_10V7K C1600.1U_0402_10V7K 1 2
C9
0.1
U_0402_25V
6C
90.1
U_0402_25V
6
1
2
C21
1U
_0603_10V
6K
C21
1U
_0603_10V
6K
1
2
L5
BLM18AG102SN1D_2P
L5
BLM18AG102SN1D_2P
1 2
T40PAD~D @T40PAD~D @
C392
0.1U_0402_10V7K
C392
0.1U_0402_10V7K1
2
R76 0_0402_5%@ R76 0_0402_5%@1 2
R91 1M_0402_5%R91 1M_0402_5%1 2
C16
1U
_0603_10V
6K
C16
1U
_0603_10V
6K
1
2
R84 0_0402_5%@ R84 0_0402_5%@1 2
R54 2.2K_0402_5%R54 2.2K_0402_5%1 2
C1550.1U_0402_10V7K C1550.1U_0402_10V7K 1 2
R69 1M_0402_5%R69 1M_0402_5%1 2
C25
1U
_0603_10V
6K
C25
1U
_0603_10V
6K
1
2
C23
.01U
_0402_16V
7K
C23
.01U
_0402_16V
7K
1
2
Y1
27MHZ_12PF_X1E000021042600
Y1
27MHZ_12PF_X1E000021042600
IN1
GND2
OUT3
GND4
C12
.01U
_0402_16V
7K
C12
.01U
_0402_16V
7K
1
2
R311 150_0402_1%R311 150_0402_1%1 2
R107 0_0402_5%@ R107 0_0402_5%@1 2
C200.1U_0402_10V7K C200.1U_0402_10V7K 1 2
U7
W25X10CLSNIG _SO8
U7
W25X10CLSNIG _SO8
CS#1
DO(IO1)2
WP#(IO2)3
GND4
VCC8
HOLD#(IO3)7
CLK6
DI(IO0)5
R75 0_0402_5%@ R75 0_0402_5%@1 2
U6A
IDTVMM2320BKG8_BGA168
U6A
IDTVMM2320BKG8_BGA168
RxN3D2 RxP3D1 RxN2E2 RxP2E1
RxP1F1
RxN1F2
RxN0G2 RxP0G1
RxAUXPH1
RXAUXNH2
RxSRCDETC2
RxHPDJ1
Tx0N1A8
Tx0N3A10
Tx0N2A9
CAD0A14
Tx0N0A7
Tx0AUXNA11
Tx0P2B9
Tx0P3B10
Tx0DDCSDAA12
Tx0HPDA6
Tx0DDCSCLB12
Tx0AUXPB11
Tx0P0B7
Tx0P1B8
Tx1HPDK14Tx1DDCSDAL14Tx1DDCSCLK13Tx1AUXNJ14Tx1AUXPJ13CAD1M14Tx1N3H14Tx1P3H13Tx1N2G14Tx1P2G13Tx1N1F14Tx1P1F13Tx1N0E14Tx1P0E13
VGA_GPM7
VGA_RPM6
VGA_IREFM5
VGA_SDAM4
VGA_DETM3
RSTN_INA13
XINK1
XOUTL1
SSCLA2SSDAA1
VGA_SCLL4
VGA_NCL5
VGA_RNL6
TCKM10
TMSL12
TMS2L13
TDOL10
MESCLB5
ROMWPB1
SPICLKB3
SPIDOA3
GPIO1D13
GPIO3C13
GPIO5B13
GPIO6/INTC1
GPIO7/MSCLM12
GPIO8/MSDAM13
VGA_BNL8
VGA_VSYNCL9
VGA_HSYNCM9
VGA_BPM8VGA_GNL7
TRSTNM11
MESDAB6
TDIL11
SPICSA4
SPIDIB4
GPIO0D14
GPIO2C14
GPIO4B14
LP_CTLB2 GPIO9L3
RX_STSK2
TX0_STSL2
TX1_STSM1
TX2_STSM2
LP_ENA5
R312 150_0402_1%R312 150_0402_1%1 2
C43
22P
_0402_50V
8J
C43
22P
_0402_50V
8J
1
2
R53 2.2K_0402_5%R53 2.2K_0402_5%1 2
R85 3.74K_0402_1%R85 3.74K_0402_1%1 2
R652.2K_0402_5%
R652.2K_0402_5%
12
C17
0.1
U_0402_25V
6C
17
0.1
U_0402_25V
6
1
2
C28
.01U
_0402_16V
7K
C28
.01U
_0402_16V
7K
1
2
C18
.01U
_0402_16V
7K
C18
.01U
_0402_16V
7K
1
2
C433470P_0402_50V7K
C433470P_0402_50V7K
1 2
R351 150_0402_1%R351 150_0402_1%1 2
R52 2.2K_0402_5%R52 2.2K_0402_5%1 2
R6410K_0402_5%R6410K_0402_5%
12
R44 1M_0402_5%R44 1M_0402_5%1 2
R207 100K_0402_5%@ R207 100K_0402_5%@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Panel backlight power control by ECDELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
FDC654P: P CHANNAL
40mil40mil
For Webcam
Close toJEDP1.11,12 check
Touch Screen Connector
check Resistor
Close toJEDP1.33
Close toJLED1.1
change back to CCD_OFF at Goliad project
Pin 29 for cable detact GND
Pin 17 ~20 for BL_GND
Pin 3, 10 for eDP High speed GND
Pin 14,15 for LCD_GND
ESD depop location(EMC)
Close toJEDP1.40
Close toJEDP1.2
For LCDVDD
PWR_SRC_ON
EN_INVPWR
EDP_BIA_PWM
USBP3_D-
USBP3_D+
+3.3V_CAM_Q +3.3V_TSP_Q
DISP_ONBIA_PWM
USBP3_D-USBP3_D+
EN_LCDPWR
DISP_ONBIA_PWM_EC
BIA_PWM
IO_LOOP
EDP_CPU_LANE_P1_C
EDP_CPU_LANE_P0_C
EDP_CPU_AUX#_C
EDP_CPU_LANE_N1_C
EDP_CPU_LANE_N0_C
EDP_CPU_AUX_C
+PWR_SRC
+BL_PWR_SRC
+LCDVDD +3.3V_TSP
+3.3V_TSP
+3.3V_RUN
+3.3V_RUN
+3.3V_CAM
+3.3V_RUN
+3.3V_CAM +5V_ALW
+LCDVDD
+BL_PWR_SRC
+5V_ALW
+3.3V_CAM
+3.3V_TSP
+3.3V_RUN
+3.3V_ALW+LCDVDD
+3.3V_RUN
EN_INVPWR<37>
PANEL_BKLEN <10>EDP_BIA_PWM <10>
USBP3-<11>
USBP3+<11>
3.3V_TS_EN<12>
CCD_OFF<36>
3.3V_CAM_EN#<12>
LCD_TST <36>
EDP_CPU_HPD <10>
BREATH_WHITE_LED#<40>
CAM_MIC_CBL_DET# <12>
DMIC_CLK <26>
DMIC0 <26>
PANEL_HDD_LED#<40>BATT_YELLOW_LED#<40>
BATT_WHITE_LED#<40>
USBP7+ <11>USBP7- <11>
TOUCH_PANEL_INTR#<12>
LCD_VCC_TEST_EN<36>
ENVDD_PCH<10,36>
PANEL_BKEN_EC <36>BIA_PWM_EC <37>
EDP_CPU_LANE_P0 <10>
EDP_CPU_LANE_P1 <10>
EDP_CPU_AUX# <10>
EDP_CPU_LANE_N1 <10>
EDP_CPU_LANE_N0 <10>
EDP_CPU_AUX <10>
LCD_CBL_DET# <12>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
eDP & CAM &TS Conn
22 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
eDP & CAM &TS Conn
22 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
eDP & CAM &TS Conn
22 59Friday, May 17, 2013
Compal Electronics, Inc.
C3
0.1
U_
04
02
_1
6V
4Z
@C3
0.1
U_
04
02
_1
6V
4Z
@1
2
G
D S
Q3LP2301ALT1G_SOT23-3
G
D S
Q3LP2301ALT1G_SOT23-3
2
1 3
D8
L3
0E
SD
L5
V0
C3
-2_
SO
T2
3-3
@D8
L3
0E
SD
L5
V0
C3
-2_
SO
T2
3-3
@
123
C60 0.1U_0402_10V7KC60 0.1U_0402_10V7K12
R99 47K_0402_5%R99 47K_0402_5%
1 2
C52 0.1U_0603_50V7KC52 0.1U_0603_50V7K
1 2
C6
20
.1U
_0
40
2_
25
V6
@C6
20
.1U
_0
40
2_
25
V6
@1
2
C59 0.1U_0402_10V7KC59 0.1U_0402_10V7K12
R101 0_0402_5%@R101 0_0402_5%@
1 2C
64
0.1
U_
04
02
_2
5V
6
@
C6
40
.1U
_0
40
2_
25
V6
@1
2
D10
BAT54CW_SOT323-3
D10
BAT54CW_SOT323-3
1
3
2
PJP9PAD-OPEN1x1m
PJP9PAD-OPEN1x1m
12
R104
100K_0402_5%
R104
100K_0402_5%
12
CE
1
10
0P
_0
40
2_
50
V8
J
@
CE
1
10
0P
_0
40
2_
50
V8
J
@1
2
C6
30
.1U
_0
40
2_
25
V6
@C6
30
.1U
_0
40
2_
25
V6
@1
2
R97100K_0402_5%R97100K_0402_5%
12
C6
70
.1U
_0
40
2_
25
V6
C6
70
.1U
_0
40
2_
25
V6
1
2
R9
41
0K
_0
40
2_
5%
R9
41
0K
_0
40
2_
5%
12
D21
BAT54CW_SOT323-3
D21
BAT54CW_SOT323-3
1
3
2
C54 0.1U_0402_10V7KC54 0.1U_0402_10V7K12
CE
2
10
0P
_0
40
2_
50
V8
J
@
CE
2
10
0P
_0
40
2_
50
V8
J
@1
2
R96100K_0402_5%R96100K_0402_5%
12
R108 1K_0402_5%R108 1K_0402_5%
1 2
C4
30
0.0
1U
_0
40
2_
16
V7
K@
C4
30
0.0
1U
_0
40
2_
16
V7
K@
1
2
G
D S
Q1LP2301ALT1G_SOT23-3
G
D S
Q1LP2301ALT1G_SOT23-3
2
1 3
S
G
D
Q2
FDC654P-G_SSOT-6
S
G
D
Q2
FDC654P-G_SSOT-6
3
6
24 5
1
D2
BAT54CW_SOT323-3
D2
BAT54CW_SOT323-3
1
3
2
PJP10PAD-OPEN1x1m
PJP10PAD-OPEN1x1m
12
S
GD
Q17ADMN66D0LDW-7_SOT363-6S
GD
Q17ADMN66D0LDW-7_SOT363-6
5
34
C431
10U_0603_6.3V6M
@C431
10U_0603_6.3V6M
@
12
R106 0_0402_5%@R106 0_0402_5%@
1 2
L8EMC@
DLW21HN900SQ2L_4P
L8EMC@
DLW21HN900SQ2L_4P
11
44
33
22
C6
10
.1U
_0
40
2_
25
V6
C6
10
.1U
_0
40
2_
25
V6
1
2
JLED1
ACES_50450-0067N-P01
CONN@
JLED1
ACES_50450-0067N-P01
CONN@
11
22
33
44
55
66
GND7
GND8
R102 0_0402_5%@R102 0_0402_5%@
1 2
JEDP1
ACES_50398-04071-001
CONN@JEDP1
ACES_50398-04071-001
CONN@
1122334455667788991010111112121313141415151616171718181919202021212222232324242525262627272828292930303131323233333434353536363737383839394040
G141 G242 G343 G444 G545
C57 0.1U_0402_10V7KC57 0.1U_0402_10V7K12
U9
APL3512ABI-TRG_SOT23-5
U9
APL3512ABI-TRG_SOT23-5
VIN5
SS4
VOUT1
EN3
GND2
G
S
D
Q17BDMN66D0LDW-7_SOT363-6
G
S
D
Q17BDMN66D0LDW-7_SOT363-6
61
2
LE1BLM15BB221SN1D_2P~D
EMC@LE1BLM15BB221SN1D_2P~D
EMC@ 1 2
C55 0.1U_0402_10V7KC55 0.1U_0402_10V7K12
R9510K_0402_5%
R9510K_0402_5%
12
R100 0_0402_5%@R100 0_0402_5%@
1 2
G
D S
Q4
L2N7002WT1G_SC-70-3
G
D S
Q4
L2N7002WT1G_SC-70-3
2
1 3
C6
61
00
0P
_0
40
2_
50
V7
KC
66
10
00
P_
04
02
_5
0V
7K
1
2
C65
0.1U_0603_50V7K
C65
0.1U_0603_50V7K
1
2
C6
80
.1U
_0
40
2_
25
V6
@C6
80
.1U
_0
40
2_
25
V6
@1
2
C56 0.1U_0402_10V7KC56 0.1U_0402_10V7K12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
EMI depop location(EMC)
EMI depop location(EMC)
EMI depop location(EMC)
EMI depop location(EMC)
HDMI_CEC
CPU_DPB_CTRLCLK_RCPU_DPB_CTRLDAT_R
TMDSB_CON_P0
TMDSB_CON_CLK#
TMDSB_CON_N0
TMDSB_CON_P1TMDSB_CON_N2
TMDSB_CON_CLK
TMDSB_CON_N1
TMDSB_CON_P2
HDMI_HPD_SINK
TMDS_P2_C
TMDS_N2_C
TMDSB_CON_P2
TMDSB_CON_N2
TMDSB_CON_P1
TMDSB_CON_N1
TMDSB_CON_P0
TMDSB_CON_N0
TMDSB_CON_CLK
TMDSB_CON_CLK#TMDS_CLK#_C
TMDS_P0_C
TMDS_N2_CTMDS_P2_C HDMI_OB
TMDS_N1_CTMDS_P1_C
TMDS_N0_CTMDS_P0_C
TMDS_CLK#_CTMDS_CLK_C
HDMI_CEC
CPU_DPB_CTRLDAT_R
CPU_DPB_CTRLCLK_R +5V_HDMI_DDC
TMDS_CLK_C
TMDS_P1_C
TMDS_N1_C
TMDS_N0_C
HDMI_HPD_SINK
+5V_RUN
+VHDMI_VCC
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_RUN
DDI1_LANE_P3<10>
DDI1_LANE_N3<10>
DDI1_LANE_P1<10>
DDI1_LANE_N1<10>
CPU_DPB_CTRLCLK<10>
CPU_DPB_CTRLDAT<10>
DPB_HPD<10>
DDI1_LANE_P2<10>
DDI1_LANE_N2<10>
DDI1_LANE_P0<10>
DDI1_LANE_N0<10>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
HDMI Conn
23 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
HDMI Conn
23 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
HDMI Conn
23 59Friday, May 17, 2013
Compal Electronics, Inc.
R469 470_0402_1%R469 470_0402_1%1 2
C3
33
0.1
U_
04
02
_1
6V
4Z
@C3
33
0.1
U_
04
02
_1
6V
4Z
@ 1
2
L13
DLW21SN900HQ2L-0805_4P
@L13
DLW21SN900HQ2L-0805_4P
@
11
22
33
44
D6
5R
B7
51
VM
-40
TE
-17
_S
OD
32
3-2
@D6
5R
B7
51
VM
-40
TE
-17
_S
OD
32
3-2
@
21
C271 0.1U_0402_10V7KC271 0.1U_0402_10V7K
12
R474 20K_0402_5%R474 20K_0402_5%
1 2
L19
DLW21SN900HQ2L-0805_4P
@L19
DLW21SN900HQ2L-0805_4P
@
11
22
33
44
R460 10K_0402_5%R460 10K_0402_5%1 2
C2
73
1.8
P_
04
02
_5
0V
8@
C2
73
1.8
P_
04
02
_5
0V
8@1
2
L17
9NH_0402HS-9N0EJTS_5%
EMC@L17
9NH_0402HS-9N0EJTS_5%
EMC@1 2
C272 0.1U_0402_10V7KC272 0.1U_0402_10V7K
12
C2
79
1.8
P_
04
02
_5
0V
8@
C2
79
1.8
P_
04
02
_5
0V
8@1
2
C2
74
1.8
P_
04
02
_5
0V
8@
C2
74
1.8
P_
04
02
_5
0V
8@1
2
L18
9NH_0402HS-9N0EJTS_5%
EMC@L18
9NH_0402HS-9N0EJTS_5%
EMC@1 2
R473 10K_0402_5%@R473 10K_0402_5%@
12
C103 0.1U_0402_10V7KC103 0.1U_0402_10V7K
12
C3
82
1.8
P_
04
02
_5
0V
8@
C3
82
1.8
P_
04
02
_5
0V
8@1
2
L10
DLW21SN900HQ2L-0805_4P
@L10
DLW21SN900HQ2L-0805_4P
@
11
22
33
44
G
D
S
Q29L2N7002WT1G_SC-70-3G
D
S
Q29L2N7002WT1G_SC-70-3
2
13
G
DS
Q121
L2N7002WT1G_SC-70-3
G
DS
Q121
L2N7002WT1G_SC-70-3
2
13
C2
75
1.8
P_
04
02
_5
0V
8@
C2
75
1.8
P_
04
02
_5
0V
8@1
2
R470 2.2K_0402_5%R470 2.2K_0402_5%
1 2
R463 470_0402_1%R463 470_0402_1%1 2
C191 0.1U_0402_10V7KC191 0.1U_0402_10V7K
12
L16
DLW21SN900HQ2L-0805_4P
@L16
DLW21SN900HQ2L-0805_4P
@
11
22
33
44
R471 2.2K_0402_5%R471 2.2K_0402_5%
1 2
S
GD
Q120ADMN66D0LDW-7_SOT363-6
S
GD
Q120ADMN66D0LDW-7_SOT363-6
5
34
R462 470_0402_1%R462 470_0402_1%1 2
C199 0.1U_0402_10V7KC199 0.1U_0402_10V7K
12
C2
76
1.8
P_
04
02
_5
0V
8@
C2
76
1.8
P_
04
02
_5
0V
8@1
2
L14
9NH_0402HS-9N0EJTS_5%
EMC@L14
9NH_0402HS-9N0EJTS_5%
EMC@1 2
JHDMI1
LCN_AUF05-1922S10-0019
CONN@JHDMI1
LCN_AUF05-1922S10-0019
CONN@
D2+1 D2_shield2 D2-3 D1+4 D1_shield5 D1-6 D0+7 D0_shield8 D0-9 CK+
10 CK_shield11 CK-12 CEC13 Reserved14 SCL15 SDA16 DDC/CEC_GND17 +5V18 HP_DET19
GND20
GND21
GND22
GND23
R464 470_0402_1%R464 470_0402_1%1 2
L20
9NH_0402HS-9N0EJTS_5%
EMC@L20
9NH_0402HS-9N0EJTS_5%
EMC@1 2
C209 0.1U_0402_10V7KC209 0.1U_0402_10V7K
12
R465 470_0402_1%R465 470_0402_1%1 2
U48
AP2330W-7_SC59-3
U48
AP2330W-7_SC59-3
GN
D2
OU
T3
IN1
L11
9NH_0402HS-9N0EJTS_5%
EMC@L11
9NH_0402HS-9N0EJTS_5%
EMC@1 2
C8
70
.1U
_0
40
2_
10
V7
K@C
87
0.1
U_
04
02
_1
0V
7K
@1
2
C8
81
0U
_0
60
3_
6.3
V6
MC
88
10
U_
06
03
_6
.3V
6M
1
2
R466 470_0402_1%R466 470_0402_1%1 2
C2
77
1.8
P_
04
02
_5
0V
8@
C2
77
1.8
P_
04
02
_5
0V
8@1
2
C269 0.1U_0402_10V7KC269 0.1U_0402_10V7K
12
L12
9NH_0402HS-9N0EJTS_5%
EMC@L12
9NH_0402HS-9N0EJTS_5%
EMC@1 2
G
S D
Q120BDMN66D0LDW-7_SOT363-6
G
S D
Q120BDMN66D0LDW-7_SOT363-6
61
2
R467 470_0402_1%R467 470_0402_1%1 2
R4
75
1M
_0
40
2_
5%
R4
75
1M
_0
40
2_
5%
12
C2
78
1.8
P_
04
02
_5
0V
8@
C2
78
1.8
P_
04
02
_5
0V
8@1
2
L9
9NH_0402HS-9N0EJTS_5%
EMC@L9
9NH_0402HS-9N0EJTS_5%
EMC@1 2
R468 470_0402_1%R468 470_0402_1%1 2
L15
9NH_0402HS-9N0EJTS_5%
EMC@L15
9NH_0402HS-9N0EJTS_5%
EMC@1 2
C270 0.1U_0402_10V7KC270 0.1U_0402_10V7K
12
R4
72
0_
04
02
_5
%
@R4
72
0_
04
02
_5
%
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
AUX/DDC SW for DPB to E-DOCK
AUX/DDC SW for DPC to E-DOCK
SW_DPB_AUX_C
SW_DPB_AUX#_C
DPB_DOCK_AUX
DPB_CA_DET#
DPB_CA_DET
DPB_DOCK_AUX#
SW_DPC_AUX_C
SW_DPC_AUX#_C
DPC_DOCK_AUX
DPC_CA_DET#
DPC_CA_DET
DPC_DOCK_AUX#
DPB_CA_DET
DPC_CA_DET
+3.3V_RUN_VMM
+3.3V_RUN_VMM
+3.3V_RUN_VMM
+3.3V_RUN_VMM
DPB_CA_DET<21,34>
SW_DPB_AUX#<21>
SW_DPB_AUX<21>
VMM_DPB_CTRLDAT <21>
VMM_DPB_CTRLCLK <21>
DPB_DOCK_AUX#<34>
DPB_DOCK_AUX<34>
DPC_CA_DET<21,34>
SW_DPC_AUX#<21>
SW_DPC_AUX<21>
VMM_DPC_CTRLDAT <21>
VMM_DPC_CTRLCLK <21>
DPC_DOCK_AUX#<34>
DPC_DOCK_AUX<34>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
DP SW_DP125
24 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
DP SW_DP125
24 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
DP SW_DP125
24 59Friday, May 17, 2013
Compal Electronics, Inc.
C970.1U_0402_25V6C970.1U_0402_25V6
1 2
R6
01
00
K_
04
02
_5
%R
60
10
0K
_0
40
2_
5%
12
C930.1U_0402_25V6C930.1U_0402_25V6
1 2
R121 1M_0402_5%R121 1M_0402_5%
1 2
C98 0.1U_0402_10V7KC98 0.1U_0402_10V7K
12
R5
61
00
K_
04
02
_5
%R
56
10
0K
_0
40
2_
5%
12
C94 0.1U_0402_10V7KC94 0.1U_0402_10V7K
12
R120 1M_0402_5%R120 1M_0402_5%
1 2
G
D
S
Q6BSS138W-7-F_SOT323-3G
D
S
Q6BSS138W-7-F_SOT323-3
2
13
C95 0.1U_0402_10V7KC95 0.1U_0402_10V7K
12
U11
PI3C3125LEX_TSSOP14~D
U11
PI3C3125LEX_TSSOP14~D
B311
B16
BE14
A15
A29
GND7
A312
VCC14
B28
BE313
A02
B03
BE01
BE210
G
D
S
Q10BSS138W-7-F_SOT323-3G
D
S
Q10BSS138W-7-F_SOT323-3
2
13
U13
PI3C3125LEX_TSSOP14~D
U13
PI3C3125LEX_TSSOP14~D
B311
B16
BE14
A15
A29
GND7
A312
VCC14
B28
BE313
A02
B03
BE01
BE210
C99 0.1U_0402_10V7KC99 0.1U_0402_10V7K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Place near JMINI3
Mini mSATA H=4
Normal
Open
Combo Jack
RING2 ,RING2_L
AUD_HP_OUT_L ,AUD_HP_OUT_L1
AUD_HP_OUT_R ,AUD_HP_OUT_R1
SLEEVE ,EXT_MICTrace width to 15mils.
EMI depop location(EMC)
HDD_DEVSLP
SATA_PRX_DTX_N1SATA_PRX_DTX_P1
SATA_PTX_DRX_P1SATA_PTX_DRX_N1
HDD_DET#
HDD_DEVSLP
LPC_LFRAME#LPC_LAD3LPC_LAD2LPC_LAD1LPC_LAD0
PCH_PLTRST#_EC
SLEEVE_L
AUD_HP_OUT_L1RING2_L
AUD_HP_NB_SENSE
AUD_HP_OUT_R1
RING2AUD_HP_OUT_L
AUD_HP_OUT_RSLEEVE
AUD_HP_NB_SENSE
+3.3V_HDD
+3.3V_HDD
+3.3V_HDD+3.3V_HDD
+3.3V_RUN
SATA_PTX_DRX_P1_C<6>SATA_PTX_DRX_N1_C<6>
SATA_PRX_DTX_P1_C<6>SATA_PRX_DTX_N1_C<6>
HDD_DET#<6>
HDD_DEVSLP <12>
LPC_LFRAME# <29,36,37,7>LPC_LAD3 <29,36,37,7>LPC_LAD2 <29,36,37,7>
LPC_LAD1 <29,36,37,7>
LPC_LAD0 <29,36,37,7>PCH_PLTRST#_EC<29,31,36,37,9>
CLK_PCI_LPDEBUG<7>
RING2<26>AUD_HP_OUT_L<26>
AUD_HP_OUT_R<26>SLEEVE<26>
AUD_HP_NB_SENSE <26,36>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
Min Card/mSATA/Combo Jack
25 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
Min Card/mSATA/Combo Jack
25 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
Min Card/mSATA/Combo Jack
25 59Friday, May 17, 2013
Compal Electronics, Inc.
D32
L0
3E
SD
L5
V0
CC
3-2
_S
OT
23
-3
EMC@D32
L0
3E
SD
L5
V0
CC
3-2
_S
OT
23
-3
EMC@
231
C4
41
22
0P
_0
40
2_
50
V7
K
@C4
41
22
0P
_0
40
2_
50
V7
K
@1
2
C105 .01U_0402_16V7KC105 .01U_0402_16V7K12
C4
40
22
0P
_0
40
2_
50
V7
K
@C4
40
22
0P
_0
40
2_
50
V7
K
@1
2
D30
L0
3E
SD
L5
V0
CC
3-2
_S
OT
23
-3
EMC@D30
L0
3E
SD
L5
V0
CC
3-2
_S
OT
23
-3
EMC@
231
C1
13
0.1
U_
04
02
_2
5V
6C
11
30
.1U
_0
40
2_
25
V6
1
2
R491 0_0402_5%@R491 0_0402_5%@ 12
BLM18AG221SN1D_2PEMC@L51 BLM18AG221SN1D_2PEMC@L51 12
R481100K_0402_5%R481100K_0402_5%
12
R48010K_0402_5%R48010K_0402_5%
12
C1
14
0.1
U_
04
02
_2
5V
6
@C1
14
0.1
U_
04
02
_2
5V
6
@1
2
D31
L0
3E
SD
L5
V0
CC
3-2
_S
OT
23
-3
EMC@D31
L0
3E
SD
L5
V0
CC
3-2
_S
OT
23
-3
EMC@
231
R155 10K_0402_5%@R155 10K_0402_5%@
1 2
C109 .01U_0402_16V7KC109 .01U_0402_16V7K
12
R492 0_0402_5%@R492 0_0402_5%@
12
C106 .01U_0402_16V7KC106 .01U_0402_16V7K12
JMINI3
LCN_DAN08-52406-0500
CONN@JMINI3
LCN_DAN08-52406-0500
CONN@
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
4545
4747
4949
5151
GND153
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
3030
3232
3434
3636
3838
4040
4242
4444
4646
4848
5050
5252
GND254
C4
43
22
0P
_0
40
2_
50
V7
K
@C4
43
22
0P
_0
40
2_
50
V7
K
@1
2
BLM18AG221SN1D_2PEMC@L52 BLM18AG221SN1D_2PEMC@L52 12
C108 .01U_0402_16V7KC108 .01U_0402_16V7K
12
JHP1
SINGA_2SJ3080-003111F
CONN@JHP1
SINGA_2SJ3080-003111F
CONN@
1
3
42
5
6
7
C4
42
22
0P
_0
40
2_
50
V7
K
@C4
42
22
0P
_0
40
2_
50
V7
K
@1
2
2
2
1
1
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
Notes:
Keep PVDD supply and speaker traces routed on the DGND plane.
Keep away from AGND and other analog signals
Place R136 close to codec
Place R142 close to codec
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place closely to Pin 14
Close to U17 pin5 Close to U17 pin6
BCLK: Audio serial data bus bit clock input/output
LRCK: Audio serial data bus word clock input/output
Place closely to Pin 13.
place at Codec bottom side
place at AGND and DGND plane
Internal Speakers Header
Add for solve pop noise and detect issue
DVDD_IO should match
with HDA Bus level
40 mils trace keep 10 mil spacing
Place close to Codec
place close to pin27
Place C134 close to Codec
place close to pin39 place close to pin45
place close to pin2
place close to pin38
SLEEVE/RING2/AUD_HP_OUT_R/AUD_HP_OUT_L
please keep 15mils trace
Realtek feedback
Prevent the Noise from Combo Jack
while system entry into S3 / S4 /S
EMI depop location(EMC)
EMI depop location(EMC)
EMI Request(EMC)
EMI depop location(EMC)
Close to U17
+DVDD_CORE
I2S_DI#
I2S_LRCLK
I2S_DO
AUD_NB_MUTE#
PCH_AZ_CODEC_BITCLK
PCH_AZ_CODEC_RST#
PCH_AZ_CODEC_SDOUT
PCH_AZ_SDIN0_R
AUD_SENSE_B
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK
I2S_MCLK
I2S_BCLK
AUD_SENSE_A
INT_SPKR_R-
INT_SPK_L-INT_SPK_R+INT_SPK_R-
INT_SPK_L+INT_SPKR_L-INT_SPKR_R+
+5V_RUN_AUDIO_U18
+VREFOUT
INT_SPK_R+
+VDDA_PVDD
+ALC290_LDO_CAP
+VDDA_AVDD1
INT_SPK_L-
AUD_SENSE_AAUD_SENSE_B
DMIC_CLK_L DMIC_CLK
DMIC_CLK
INT_SPK_L+
RING2
INT_SPK_R-
AUD_PC_BEEP
+ALC3226_VREF+ALC3226_CPVEE
+VDDA_AVDD2
SLEEVE
RING2
SLEEVE
AUD_OUT_LAUD_OUT_R
AUD_HP_OUT_LAUD_HP_OUT_R
SLEEVE
PCH_AZ_CODEC_RST#
AUD_NB_MUTE#
INT_SPKR_L+
+3.3V_RUN_AUDIO_U18
+3.3V_RUN_AUDIO
+3.3V_RUN_AUDIO+3.3V_RUN_AUDIO
+3.3V_RUN_AUDIO
+3.3V_ALW
+5V_ALW
+5V_RUN_AUDIO
+3.3V_RUN_AUDIO
+3.3V_RUN_AUDIO
+5V_RUN_AUDIO
+VREFOUT
+5V_RUN_AUDIO +3.3V_RUN_AUDIO
+VREFOUT
+RTC_CELL
PCH_AZ_CODEC_SDIN0<6>
AUD_NB_MUTE#<36>
PCH_AZ_CODEC_BITCLK<6>
PCH_AZ_CODEC_RST#<6>
PCH_AZ_CODEC_SYNC<6>
PCH_AZ_CODEC_SDOUT<6>
DOCK_MIC_DET <36>DOCK_HP_DET<36>
AUD_HP_NB_SENSE <25,36>
DAI_BCLK#<34>
DAI_LRCK#<34>
DAI_DO#<34>
DAI_12MHZ#<34>
DAI_DI<34>
RUN_ON<36,37,39>
DMIC_CLK <22>DMIC0 <22>
EN_I2S_NB_CODEC# <36>
RING2 <25>SLEEVE <25>
AUD_HP_OUT_L <25>AUD_HP_OUT_R <25>
BEEP <37>
SPKR <12>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
Azalia (HD) Codec-ALC3226
26 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
Azalia (HD) Codec-ALC3226
26 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
Azalia (HD) Codec-ALC3226
26 59Friday, May 17, 2013
Compal Electronics, Inc.
R166 18_0402_5%R166 18_0402_5%1 2
C1
26
10
00
P_
04
02
_5
0V
7K
@C1
26
10
00
P_
04
02
_5
0V
7K
@
1
2
S
GD
Q1
23
AD
MN
66
D0
LD
W-7
_S
OT
36
3-6
S
GD
Q1
23
AD
MN
66
D0
LD
W-7
_S
OT
36
3-6
5
34
PJP24
PAD-OPEN1x1m
PJP24
PAD-OPEN1x1m
12
R186 0_0402_5%@ R186 0_0402_5%@1 2
S
GD
Q21ADMN66D0LDW-7_SOT363-6
S
GD
Q21ADMN66D0LDW-7_SOT363-6
5
34
C4
10
1U
_0
60
3_
10
V6
KC
41
01
U_
06
03
_1
0V
6K
1
2
C4
08
10
U_
06
03
_6
.3V
6M
@C4
08
10
U_
06
03
_6
.3V
6M
@1
2
R15720K_0402_1%R15720K_0402_1%
12
R151 1K_0402_5%R151 1K_0402_5%1 2
C1
30
22
P_
04
02
_5
0V
8J
@C1
30
22
P_
04
02
_5
0V
8J
@1
2
C1
19
0.1
U_
04
02
_2
5V
6C
11
90
.1U
_0
40
2_
25
V6
1
2
C1
31
1U
_0
60
3_
10
V4
Z
@C1
31
1U
_0
60
3_
10
V4
Z
@
1
2
R136 33_0402_5%R136 33_0402_5%1 2
R197 2.2K_0402_5%R197 2.2K_0402_5%1 2
JSPK1
ACES_50209-0040N-001
CONN@JSPK1
ACES_50209-0040N-001
CONN@
11
22
33
GND5
GND6
44
R144 0_0402_5%@R144 0_0402_5%@1 2
PJP25 PAD-OPEN1x1mPJP25 PAD-OPEN1x1m
12
S
GDQ
20
AD
MN
66
D0
LD
W-7
_S
OT
36
3-6
S
GDQ
20
AD
MN
66
D0
LD
W-7
_S
OT
36
3-6
5
34
PJP4
PAD-OPEN1x1m
@ PJP4
PAD-OPEN1x1m
@1 2
U17
ALC3226-CG_QFN48_7X7
U17
ALC3226-CG_QFN48_7X7
DREG_OUT1
GPIO0/DMIC-CLK2
DVDD-IO3
GPIO1/DMIC-DATA4
SDATA-OUT5
BIT-CLK6
DVSS7
SDATA-IN8
DVDD9
SYNC10
RESET#11
PCBEEP12
Sense A13
Sense B14
I2S_MCLK15
I2S_SCLK16
I2S_DOUT17
I2S_LRCK18
MIC1-L19
MIC1-R20
LDO-CAP21
JDREF22
LINE1-VREFO23
I2S_DIN24
VREF25
AVSS126
AVDD127
LINE1-L/RING228
LINE1-R/SLEEVE29
MIC1-VREFO30
HPOUT-L/MIC-CAP31
HP-OUT-R32AVSS2/HPOUT-L33
CPVEE34
CBN35
CBP/AVSS236
MONO-OUT/CBP37
AVDD2/HVDD(3.3)38
PVDD139
SPK-L+40
SPK-L-41
PVSS42
SPK-R-43SPK-R+44
PVDD245
DMIC1/GPIO246
EAPD/PD47
GPIO348
GND49
C147470P_0402_50V7K
C147470P_0402_50V7K
1 2
C1481000P_0402_50V7K
C1481000P_0402_50V7K
1 2
C1
27
10
00
P_
04
02
_5
0V
7K
@C1
27
10
00
P_
04
02
_5
0V
7K
@
1
2
L22 BLM18PG330SN1_2PEMC@ L22 BLM18PG330SN1_2PEMC@ 1 2
R153 10K_0402_5%@R153 10K_0402_5%@1 2
R150 10K_0402_5%R150 10K_0402_5%1 2
C1
50
0.1
U_
04
02
_2
5V
6C
15
00
.1U
_0
40
2_
25
V6
1
2
C1
28
10
U_
06
03
_6
.3V
6M
C1
28
10
U_
06
03
_6
.3V
6M
1
2
C4
05
1U
_0
60
3_
10
V6
K
@C4
05
1U
_0
60
3_
10
V6
K
@1
2
C1
22
10
U_
06
03
_6
.3V
6M
C1
22
10
U_
06
03
_6
.3V
6M
1
2
R194 10K_0402_5%@R194 10K_0402_5%@1 2
R154 0_0402_5%@ R154 0_0402_5%@1 2
L23 BLM18PG330SN1_2PEMC@ L23 BLM18PG330SN1_2PEMC@ 1 2
R170 33_0402_5%EMC@ R170 33_0402_5%EMC@1 2
C1
21
10
U_
06
03
_6
.3V
6M
C1
21
10
U_
06
03
_6
.3V
6M
1
2
L25 BLM18PG330SN1_2PEMC@ L25 BLM18PG330SN1_2PEMC@ 1 2
C1
18
1U
_0
60
3_
10
V6
KC
11
81
U_
06
03
_1
0V
6K
1
2
R158100K_0402_5%R158100K_0402_5%
12
R14933_0402_5%@R14933_0402_5%@
12
C1
29
0.1
U_
04
02
_2
5V
6C
12
90
.1U
_0
40
2_
25
V6
1
2
R139 22_0402_5%R139 22_0402_5%1 2
R15639.2K_0402_1%
R15639.2K_0402_1%
12
C1
23
0.1
U_
04
02
_2
5V
6C
12
30
.1U
_0
40
2_
25
V6
1
2
R14847_0402_5%
@ R14847_0402_5%
@
12
U18
TPS22966DPUR_SON14_2X3~D
U18
TPS22966DPUR_SON14_2X3~D
GND11
VIN26
VBIAS4
ON25
VOUT29
VIN27
CT112
VOUT114
VOUT28
VOUT113
VIN12
ON13
VIN11
CT210
GPAD15
C1
24
10
00
P_
04
02
_5
0V
7K
@C1
24
10
00
P_
04
02
_5
0V
7K
@
1
2
C145 0.1U_0402_25V6C145 0.1U_0402_25V612
R2
02
10
0K
_0
40
2_
5%
R2
02
10
0K
_0
40
2_
5%
12
C1440.1U_0402_25V6
C1440.1U_0402_25V6
1 2
C1410.1U_0402_25V6
C1410.1U_0402_25V6
1 2
C1
17
10
U_
06
03
_6
.3V
6M
C1
17
10
U_
06
03
_6
.3V
6M
1
2
C385 10U_0603_6.3V6MC385 10U_0603_6.3V6M1 2
C139
0.1U_0402_10V7K
@C139
0.1U_0402_10V7K
@
1
2
C1
37
0.1
U_
04
02
_2
5V
6C
13
70
.1U
_0
40
2_
25
V6
1
2
C1
40
10
U_
06
03
_6
.3V
6M
C1
40
10
U_
06
03
_6
.3V
6M
1
2
R159100K_0402_5%R159100K_0402_5%
12
C1342.2U_0603_6.3V6KC1342.2U_0603_6.3V6K
1
2
C1
20
0.1
U_
04
02
_2
5V
6C
12
00
.1U
_0
40
2_
25
V6
1
2
G
S
D Q2
0B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6
G
S
D Q2
0B
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6
61
2
C1420.1U_0402_25V6
C1420.1U_0402_25V6
1 2
C146 0.1U_0402_25V6C146 0.1U_0402_25V612
[email protected]_0402_10V7K@
1
2
C1
38
2.2
U_
06
03
_6
.3V
6K
C1
38
2.2
U_
06
03
_6
.3V
6K
1
2
C1
16
10
U_
06
03
_6
.3V
6M
C1
16
10
U_
06
03
_6
.3V
6M
1
2
C1
69
2.2
U_
06
03
_6
.3V
6K
C1
69
2.2
U_
06
03
_6
.3V
6K
1
2
R1300_0805_5%@R1300_0805_5%@
12
C1
25
10
00
P_
04
02
_5
0V
7K
@C1
25
10
00
P_
04
02
_5
0V
7K
@
1
2
C1
15
0.1
U_
04
02
_2
5V
6C
11
50
.1U
_0
40
2_
25
V6
1
2
R143 0_0402_5%@R143 0_0402_5%@1 2
R213 0_0402_5%@ R213 0_0402_5%@1 2
R142 33_0402_5%R142 33_0402_5%1 2
C188 0.1U_0402_10V7K@ C188 0.1U_0402_10V7K@1 2
C13610P_0402_50V8J@C13610P_0402_50V8J@
1
2
R220@ 0_0402_5%R220@ 0_0402_5%1 2
L21
PBY160808T-600Y-N_2P
L21
PBY160808T-600Y-N_2P1 2
R147 1K_0402_5%R147 1K_0402_5%1 2
G
S
D
Q1
23
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
G
S
D
Q1
23
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6 6
1
2
R15239.2K_0402_1%R15239.2K_0402_1%
12
G
S
D
Q21BDMN66D0LDW-7_SOT363-6
G
S
D
Q21BDMN66D0LDW-7_SOT363-6
61
2
L24 BLM18PG330SN1_2PEMC@ L24 BLM18PG330SN1_2PEMC@ 1 2
R162 18_0402_5%R162 18_0402_5%1 2
C1
67
0.1
U_
04
02
_2
5V
6C
16
70
.1U
_0
40
2_
25
V6
1
2
R3
92
0K
_0
40
2_
1%
R3
92
0K
_0
40
2_
1%
12
R1400_0603_5%@R1400_0603_5%@
12
R137 22_0402_5%R137 22_0402_5%1 2
R187 2.2K_0402_5%R187 2.2K_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DOCKED
1
0
function
Dock
mini DP
AUX/DDC SW for DPC to Mini DP
XB use SA00006ZP00 (S IC AP2337SA-7 SOT-23 3P LOAD SWITCH)
ESD solution for black screen issue
mDP_HPD
mDP_AUX#_C
mDP_AUX_C
mDP_LANE_N3_C
mDP_LANE_P3_C
mDP_LANE_N2_C
mDP_LANE_P2_C
mDP_LANE_N1_C
mDP_LANE_P1_C
mDP_LANE_N0_C
mDP_LANE_P0_C
DPB_MB_P14
mDP_CA_DET
mDP_AUX#_C
mDP_HPD
mDP_AUX_C
mDP_CA_DET
DPB_MB_P14
mDP_LANE_N0_C
mDP_LANE_N1_CmDP_LANE_P1_C
mDP_LANE_P2_CmDP_LANE_N2_C
mDP_LANE_P3_CmDP_LANE_N3_C
mDP_LANE_P0_C
mDP_AUX#mDP_AUXmDP_HPD
mDP_LANE_N0
mDP_LANE_N1mDP_LANE_P1
mDP_LANE_P2mDP_LANE_N2
mDP_LANE_P3mDP_LANE_N3
mDP_LANE_P0
SW_mDP_AUX_CmDP_AUX
SW_mDP_AUX#_CmDP_AUX#
mDP_CA_DET#
mDP_CA_DET
mDP_AUX_C
mDP_AUX#_C
DOCKED
DOCKED
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+VDISPLAY_VCC
CPU_DPC_CTRLDAT <10>
CPU_DPC_CTRLCLK <10>
DOCKED<21,28,32,36>
DPC_HPD<10>
DDI2_LANE_P3<10>
DDI2_LANE_N0<10>DDI2_LANE_P0<10>DDI2_LANE_N1<10>DDI2_LANE_P1<10>DDI2_LANE_N2<10>DDI2_LANE_P2<10>DDI2_LANE_N3<10>
CPU_DPC_AUX#<10>CPU_DPC_AUX<10>
DP12412_P0 <21>
DP12412_P1 <21>DP12412_N1 <21>
DP12412_P2 <21>DP12412_N2 <21>
DP12412_P3 <21>DP12412_N3 <21>
DP12412_N0 <21>
DP12412_AUX# <21>DP12412_AUX <21>
DP12412_HPD <21>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
mDP/DP12412
27 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
mDP/DP12412
27 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
mDP/DP12412
27 59Friday, May 17, 2013
Compal Electronics, Inc.
C1
52
0.1
U_
04
02
_2
5V
6C
15
20
.1U
_0
40
2_
25
V6
1
2
C173 0.1U_0402_10V7KC173 0.1U_0402_10V7K1 2
C163 0.1U_0402_10V7KC163 0.1U_0402_10V7K1 2
C1
53
0.1
U_
04
02
_2
5V
6
@C1
53
0.1
U_
04
02
_2
5V
6
@1
2
R167 1M_0402_5%R167 1M_0402_5%
12
C4110.1U_0402_25V6C4110.1U_0402_25V6
1 2
C4
51
0.1
U_
04
02
_2
5V
6
@C4
51
0.1
U_
04
02
_2
5V
6
@1
2
C1
51
4.7
U_
06
03
_6
.3V
6K
C1
51
4.7
U_
06
03
_6
.3V
6K
1
2
C3
83
0.1
U_
04
02
_1
6V
4Z
@C3
83
0.1
U_
04
02
_1
6V
4Z
@ 1
2
C165 0.1U_0402_10V7KC165 0.1U_0402_10V7K1 2
C172 0.1U_0402_10V7KC172 0.1U_0402_10V7K1 2
U19
PI3VDP12412ZHEX_TQFN42_9X3P5~D
U19
PI3VDP12412ZHEX_TQFN42_9X3P5~D
AUX_HPD_SEL5
D0-A42
D0+A41
D1-A40
D1+A39
D2-A38
D2+A37
D3+A35D3-A36
D0+B32D0-B33
D1+B30D1-B31
D2+B28D2-B29
D3+B26D3-B27
D0-3
D0+4
D1-6
D1+7
D2-8
D2+9
D3-10
D3+11
VDD12
VDD21
GND1
GND17
VDD34
GND22
GPU_SEL2
OE25
AUX-13
AUX+14
AUX+B20AUX-B19
AUX-A24
AUX+A23
HPD18
HPD_A16
HPD_B15
HGND43
JmDP1
ACON_MAR2C-20K1800
CONN@JmDP1
ACON_MAR2C-20K1800
CONN@
GND19
AUX_CH_N18
LANE2_N17
AUX_CH_P16
LANE2_P15
GND14
GND13
LANE3_N12
LANE1_N11
LANE3_P10
LANE1_P9
GND8
GND7
CONFIG26
LANE0_N5
CONFIG14
LANE0_P3
HOT-PLUG2
GND1
DP_PWR20
GND424
GND323
GND222
GND121
R165 100K_0402_5%R165 100K_0402_5%
1 2
R168 5.1M_0402_5%R168 5.1M_0402_5%
1 2
U50
AP2337SA-7 SOT-23
U50
AP2337SA-7 SOT-23
GN
D2
OU
T3
IN1
C1740.1U_0402_10V7K
C1740.1U_0402_10V7K
12
U49
PI3C3125LEX_TSSOP14~D
U49
PI3C3125LEX_TSSOP14~D
B311
B16
BE14
A15
A29
GND7
A312
VCC14
B28
BE313
A02
B03
BE01
BE210
C168 0.1U_0402_10V7KC168 0.1U_0402_10V7K1 2
R161 4.7K_0402_5%R161 4.7K_0402_5%
12
C1
54
0.1
U_
04
02
_2
5V
6C
15
40
.1U
_0
40
2_
25
V6
1
2
R6
71
00
K_
04
02
_5
%R
67
10
0K
_0
40
2_
5%
12
R163 100K_0402_5%R163 100K_0402_5%
1 2C164 0.1U_0402_10V7KC164 0.1U_0402_10V7K1 2
C170 0.1U_0402_10V7KC170 0.1U_0402_10V7K1 2
C166 0.1U_0402_10V7KC166 0.1U_0402_10V7K1 2
R164 100K_0402_5%R164 100K_0402_5%
1 2
C175 0.1U_0402_10V7KC175 0.1U_0402_10V7K
12
G
D
S
Q31BSS138W-7-F_SOT323-3G
D
S
Q31BSS138W-7-F_SOT323-3
2
13
C1
71
.01
U_
04
02
_1
6V
7K
C1
71
.01
U_
04
02
_1
6V
7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Place C117, C180 and L26 close to U21
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE:
THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Note:
+1.0V_LAN will work at 0.95V to 1.15V
LAN ANALOG SWITCH
Layout Notice : Place bead as
close PI3L500 as possible
DOCKED1: TO DOCK
0: TO RJ45
SMBus Device Address 0xC8
Pin 6 is SVR_EN in Clarkville
Pin 2 is WAKE_EN in Clarkville
reference INTEL r217 circuit version1.7
XB use SA000066W3L(S IC WGI218LM SLK3A B1 QFN 48P PHY )
LAN_TX1-LAN_TX1+
LAN_TX3-
LAN_TX0-LAN_TX0+
REGCTL_PNP10
LANCLK_REQ#_R
LAN_TX2+
LAN_TX3+
LAN_TX2-
CLK_PCIE_LANCLK_PCIE_LAN#
PCIE_PRX_GLANTX_P3_C
PCIE_PRX_GLANTX_N3_C
LOM_ACTLED_YEL#
TP_LAN_JTAG_TDITP_LAN_JTAG_TDOTP_LAN_JTAG_TMSTP_LAN_JTAG_TCK
LAN_TEST_EN
RES_BIAS
LOM_SPD100LED_ORG#LOM_SPD10LED_GRN#
+RSVD_VCC3P3_1
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
LOM_ACTLED_YEL#
LOM_SPD10LED_GRN#LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#DOCK_LOM_SPD100LED_ORG#
LAN_TX1-R
LAN_TX1+R
LAN_TX1-
LAN_TX1+
LAN_TX2-R
LAN_TX2+RLAN_TX2+
LAN_TX2-
LAN_TX3-R
LAN_TX3+RLAN_TX3+
LAN_TX3-
SW_LAN_TX0-SW_LAN_TX0+
SW_LAN_TX1-SW_LAN_TX1+
SW_LAN_TX2+SW_LAN_TX2-
SW_LAN_TX3+
DOCK_LOM_TRD0-DOCK_LOM_TRD0+
DOCK_LOM_TRD1+DOCK_LOM_TRD1-
DOCK_LOM_TRD2-DOCK_LOM_TRD2+
DOCK_LOM_TRD3-DOCK_LOM_TRD3+
DOCK_LOM_ACTLED_YEL#
DOCKED
LAN_TX0-RLAN_TX0-
LAN_TX0+RLAN_TX0+
REGCTL_PNP10
LAN_SMBDATA_R
LAN_SMBCLK_R
PCIE_PTX_GLANRX_N3_C
PCIE_PTX_GLANRX_P3_C
LOM_SPD10LED_GRN#
LOM_SPD100LED_ORG#
XTALOXTALO_RXTALI
VCT_LAN_R1
LAN_DISABLE#_R+3.3V_LAN_OUT
LAN_WAKE#_R
SW_LAN_TX3-
PLT_LAN_RST#
SW_ACTLED_YEL#
SW_100_ORG#
SW_10_GRN#
MASK_BASE_LEDS#
MASK_BASE_LEDS#
MASK_BASE_LEDS#
LAN_WAKE#_R
+3.3V_LAN_U22
MCARD_WWAN_PWREN
LAN_ACTLED_YEL#
LED_100_ORG#
LED_10_GRN#
SW_ACTLED_YEL#SW_100_ORG#SW_10_GRN#
+3.3V_mSATA_WWAN_U22
MCARD_WWAN_PWREN
PLT_LAN_RST#
+3.3V_LAN
+0.9V_LAN
+0.9V_LAN
+0.9V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_RUN
+3.3V_ALW
+3.3V_LAN
+5V_ALW
+3.3V_mSATA_WWAN
LANCLK_REQ#<10,7>
CLK_PCIE_LAN#<7>CLK_PCIE_LAN<7>
PCIE_PRX_GLANTX_P3<11>
PCIE_PRX_GLANTX_N3<11>
SW_LAN_TX0- <35>SW_LAN_TX0+ <35>
SW_LAN_TX1- <35>SW_LAN_TX1+ <35>
SW_LAN_TX2+ <35>SW_LAN_TX2- <35>
SW_LAN_TX3- <35>SW_LAN_TX3+ <35>
DOCK_LOM_TRD0- <34>DOCK_LOM_TRD0+ <34>
DOCK_LOM_TRD1+ <34>DOCK_LOM_TRD1- <34>
DOCK_LOM_TRD2- <34>DOCK_LOM_TRD2+ <34>
DOCK_LOM_TRD3- <34>DOCK_LOM_TRD3+ <34>
DOCKED<21,27,32,36>
DOCK_LOM_ACTLED_YEL# <34>
DOCK_LOM_SPD10LED_GRN# <34>DOCK_LOM_SPD100LED_ORG# <34>
LAN_SMBDATA<7>
LAN_SMBCLK<7>
PCIE_PTX_GLANRX_N3<11>
PCIE_PTX_GLANRX_P3<11>
WLAN_LAN_DISB# <36>
PM_LANPHY_ENABLE<12>
LAN_DISABLE#_R<36>
LAN_WAKE#<12,37>
PLTRST_LAN#<9>
LAN_RST#<12>
MASK_BASE_LEDS# <40>
SIO_SLP_LAN#<36,9>
LAN_ACTLED_YEL# <35>
LED_100_ORG# <35>
LED_10_GRN# <35>
MCARD_WWAN_PWREN<36>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
LAN Lewisville / LAN SW
28 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
LAN Lewisville / LAN SW
28 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
LAN Lewisville / LAN SW
28 59Friday, May 17, 2013
Compal Electronics, Inc.
L33 12NH_0603CS-120EJTS_5%EMC@ L33 12NH_0603CS-120EJTS_5%EMC@1 2
C183
0.1
U_0402_10V
7K
C183
0.1
U_0402_10V
7K
1
2
L29 12NH_0603CS-120EJTS_5%EMC@ L29 12NH_0603CS-120EJTS_5%EMC@1 2
L30 12NH_0603CS-120EJTS_5%EMC@ L30 12NH_0603CS-120EJTS_5%EMC@1 2
R178 4.7K_0402_5%R178 4.7K_0402_5%12
S
GD
Q33ADMN66D0LDW-7_SOT363-6
S
GD
Q33ADMN66D0LDW-7_SOT363-6
5
34
C407 470P_0402_50V7KC407 470P_0402_50V7K1 2
PCIE
MDI
SMBUS
JTAG
LED
U21
WGI218LM-SLK3A-B1_QFN48_6X6~D
PCIE
MDI
SMBUS
JTAG
LED
U21
WGI218LM-SLK3A-B1_QFN48_6X6~D
RSVD_VCC3P3_11
LANWAKE_N2
LAN_DISABLE_N3
VDD3P3_44
VDD3P3_IN5
SVR_EN_N6
CTRL0P97
VDD0P9_88
XTAL_OUT9
XTAL_IN10
VDD0P9_1111
RBIAS12
MDI_PLUS013
MDI_MINUS014
VDD3P3_1515
VDD0P9_1616
MDI_PLUS117
MDI_MINUS118
VDD3P3_1919
MDI_PLUS220
MDI_MINUS221
VDD0P9_2222
MDI_PLUS323
MDI_MINUS324
LED225
LED026
LED127
SMB_CLK28
VDD3P3_2929
TEST_EN30
SMB_DATA31
JTAG_TDI32
JTAG_TMS33 JTAG_TDO34
JTAG_TCK35
PE_RST_N36
VDD0P9_3737
PETp38
PETn39
VDD0P9_4040
PERp41
PERn42
VDD0P9_4343
PE_CLKP44
PE_CLKN45
VDD0P9_4646VDD0P9_4747
CLK_REQ_N48
VSS_EPAD49
C193
0.1
U_0402_25V
6C
193
0.1
U_0402_25V
6
1
2
R169 0_0402_5%@ R169 0_0402_5%@1 2
R177 0_0402_5%@ R177 0_0402_5%@1 2
R173
10K
_0402_5%
@R
173
10K
_0402_5%
@12
Y3
25MHZ_18PF_7V25000034
Y3
25MHZ_18PF_7V25000034
IN1
GND2
OUT3
GND4
R196 0_0402_5%@ R196 0_0402_5%@12
C425
0.1U_0402_10V7K
@ C425
0.1U_0402_10V7K
@
1
2
C186
0.1
U_0402_10V
7K
C186
0.1
U_0402_10V
7K
1
2
PJP21 PAD-OPEN1x1mPJP21 PAD-OPEN1x1m
12
L34 12NH_0603CS-120EJTS_5%EMC@ L34 12NH_0603CS-120EJTS_5%EMC@1 2
R182
10K
_0402_5%
@R
182
10K
_0402_5%
@12
R331
10K
_0402_5%
R331
10K
_0402_5%
12
G
S D
Q32BDMN66D0LDW-7_SOT363-6
G
S D
Q32BDMN66D0LDW-7_SOT363-6
61
2
L264.7UH_CBC2012T4R7M_20% L264.7UH_CBC2012T4R7M_20%1 2
R145 0_0402_5%@ R145 0_0402_5%@1 2
U22
TPS22966DPUR_SON14_2X3~D
U22
TPS22966DPUR_SON14_2X3~D
GND11
VIN26
VBIAS4
ON25
VOUT29
VIN27
CT112
VOUT114
VOUT28
VOUT113
VIN12
ON13
VIN11
CT210
GPAD15
G
S D
Q33BDMN66D0LDW-7_SOT363-6
G
S D
Q33BDMN66D0LDW-7_SOT363-6
61
2
R181 0_0603_5%@ R181 0_0603_5%@12
C427 470P_0402_50V7KC427 470P_0402_50V7K1 2
C185
0.1
U_0402_10V
7K
C185
0.1
U_0402_10V
7K
1
2
C178 0.1U_0402_10V7KC178 0.1U_0402_10V7K1 2
R50 100K_0402_5%R50 100K_0402_5%1 2
C198
0.1U_0402_10V7K
@ C198
0.1U_0402_10V7K
@1 2
R172 10K_0402_5%@ R172 10K_0402_5%@1 2
R179 0_0402_5%@ R179 0_0402_5%@1 2
C426 0.1U_0402_10V7KC426 0.1U_0402_10V7K1 2
C179 0.1U_0402_10V7KC179 0.1U_0402_10V7K12
R171 10K_0402_5%@ R171 10K_0402_5%@1 2
C189
33P
_0402_50V
8J
C189
33P
_0402_50V
8J 1
2
R183 0_0402_5%@ R183 0_0402_5%@1 2
C4060.1U_0402_10V7K@ C4060.1U_0402_10V7K@
12
L32 12NH_0603CS-120EJTS_5%EMC@ L32 12NH_0603CS-120EJTS_5%EMC@1 2
R175 0_0402_5%@ R175 0_0402_5%@ 12
U23
PI3L720ZHEX_TQFN42_9X3P5~D
U23
PI3L720ZHEX_TQFN42_9X3P5~D
SEL13
A0+2
A0-3
A1+6
A1-7
A2+9
A2-10
A3+11
B0+38
C0+36
B0-37
C0-35
B1+34
C1+32
B1-33
C1-31
B2+29
C2+27
B2-28
C2-26
B3+25
C3+23
B3-24
C3-22
A3-12
LEDA015
LEDA116
LEDA242
LEDB017
LEDC019
LEDB118
LEDC120
LEDB241
LEDC240
PAD_GND43
VD
D1
VD
D4
VD
D8
VD
D1
4V
DD
21
VD
D3
0V
DD
39
PD5
L27 12NH_0603CS-120EJTS_5%EMC@ L27 12NH_0603CS-120EJTS_5%EMC@1 2
C182
1U
_0603_10V
6K
C182
1U
_0603_10V
6K
1
2
PJP20
PAD-OPEN1x1m
PJP20
PAD-OPEN1x1m
12
L31 12NH_0603CS-120EJTS_5%EMC@ L31 12NH_0603CS-120EJTS_5%EMC@1 2
R25
100K
_0402_5%
@R25
100K
_0402_5%
@
12
U20
TC7SH08FU_SSOP5~D
@U20
TC7SH08FU_SSOP5~D
@
B1
A2
G3
O4
P5
C192
0.1
U_0402_25V
6C
192
0.1
U_0402_25V
6
1
2
L28 12NH_0603CS-120EJTS_5%EMC@ L28 12NH_0603CS-120EJTS_5%EMC@1 2
T93 PAD~D@ T93 PAD~D@
C184
0.1
U_0402_10V
7K
C184
0.1
U_0402_10V
7K
1
2
R174 0_0402_5%@ R174 0_0402_5%@1 2
T92 PAD~D@ T92 PAD~D@
C176 0.1U_0402_10V7KC176 0.1U_0402_10V7K12
R176 4.7K_0402_5%@ R176 4.7K_0402_5%@12
C187
22U
_0805_6.3
V6M
C187
22U
_0805_6.3
V6M
1
2
R2061M_0402_5%R2061M_0402_5%
12
C181 0.1U_0402_10V7KC181 0.1U_0402_10V7K1 2
U24NL17SZ08DFT2G_SSOP5~D
U24NL17SZ08DFT2G_SSOP5~D
B1
A2
G3
O4
P5
R185
3.0
1K
_0402_1%
R185
3.0
1K
_0402_1%
12
R184
1K
_0402_5%
R184
1K
_0402_5%
12
C190
33P
_0402_50V
8J
C190
33P
_0402_50V
8J
1
2
R180 0_0402_5%@ R180 0_0402_5%@1 2
C177
0.1
U_0402_10V
7K
C177
0.1
U_0402_10V
7K
1
2
C194
0.1
U_0402_25V
6C
194
0.1
U_0402_25V
6
1
2
C180
10U
_0603_6.3
V6M
C180
10U
_0603_6.3
V6M
1
2
S
GD
Q32ADMN66D0LDW-7_SOT363-6
S
GD
Q32ADMN66D0LDW-7_SOT363-6
5
34
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
USH board connATMEL TPM for E4
ST change to 6718K-Y20N-00LXB use SA00004WQ50(S IC AT97SC3204-X4A12-ABF TSSOP 28P TPM)
USH_SMBDAT
USH_SMBCLK
USH_PWR_STATE#
USH_SMBDATUSH_SMBCLK
CLKRUN#IRQ_SERIRQ
LPC_LFRAME#
LPC_LAD3LPC_LAD2LPC_LAD1LPC_LAD0
USH_PWR_STATE#
SP_TPM_LPC_EN_R
PCH_TPM_LPC_EN
+3.3V_SUS+3.3V_RUN_TPM
+3.3V_RUN_TPM
+3.3V_RUN_TPM+3.3V_RUN
+3.3V_SUS
+3.3V_SUS
+3.3V_RUN
+3.3V_RUN
+5V_RUN
+5V_RUN
BCM5882_ALERT#<36>
USBP4-<11>USBP4+<11>
USH_SMBDAT<37>
PLTRST_USH#<9>USH_PWR_STATE#<36>CONTACTLESS_DET#<10>
USH_SMBCLK<37>
LPC_LAD0<25,36,37,7>
LPC_LAD2<25,36,37,7>LPC_LAD1<25,36,37,7>
LPC_LAD3<25,36,37,7>
LPC_LFRAME#<25,36,37,7>
IRQ_SERIRQ<12,36,37>CLKRUN#<10,36,37,9>
SP_TPM_LPC_EN<36>
PCH_PLTRST#_EC<25,31,36,37,9>
CLK_PCI_TPM_TCM<7>
USH_DET#<12>
PCH_TPM_LPC_EN<7>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
USH board conn / TPM
29 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
USH board conn / TPM
29 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
USH board conn / TPM
29 59Friday, May 17, 2013
Compal Electronics, Inc.
C2
03
22
00
P_
04
02
_5
0V
7K
@C2
03
22
00
P_
04
02
_5
0V
7K
@1
2
R193 0_0402_5%@R193 0_0402_5%@
1 2
R190 2.2K_0402_5%R190 2.2K_0402_5%
1 2
C3
84
22
00
P_
04
02
_5
0V
7K
C3
84
22
00
P_
04
02
_5
0V
7K
1
2R195 1M_0402_5%R195 1M_0402_5%
1 2
C2
00
0.1
U_
04
02
_2
5V
6
@C2
00
0.1
U_
04
02
_2
5V
6
@1
2
C2
08
0.1
U_
04
02
_2
5V
6
@C2
08
0.1
U_
04
02
_2
5V
6
@1
2
PJP5
PAD-OPEN1x1m
@PJP5
PAD-OPEN1x1m
@1 2
C2
02
22
00
P_
04
02
_5
0V
7K
C2
02
22
00
P_
04
02
_5
0V
7K
1
2
U25
AT97SC3204-X4A12-ABF _TSSOP28
U25
AT97SC3204-X4A12-ABF _TSSOP28
LAD317 LAD220 LAD123 LAD026
LCLK21
LFRAME#22
LRESET#16
SERIRQ27
CLKRUN#15
NC_77
ATEST_11
ATEST_22
GPIO66
TESTI8TESTBI9
VCC_010
VCC_119
VCC_224
GND_44
GND_1111
GND_1818
GND_2525ATEST_3
3
SB3V5
V_BAT12
NBO_1313
NBO_1414
LPCPD#28
R191 2.2K_0402_5%R191 2.2K_0402_5%
1 2
JUSH1
E-T_6718K-Y20N-00L
CONN@JUSH1
E-T_6718K-Y20N-00L
CONN@
11
33
44
55
66
88
99
22
77
GND21
GND22
1111
1212
1313
1414
1515
1616
1717
1818
1919
1010
2020
R198 10_0402_5%@R198 10_0402_5%@
1 2
C2
07
0.1
U_
04
02
_2
5V
6
@C2
07
0.1
U_
04
02
_2
5V
6
@1
2
C2
04
0.1
U_
04
02
_2
5V
6C
20
40
.1U
_0
40
2_
25
V6
1
2
C2
06
0.1
U_
04
02
_2
5V
6
@C2
06
0.1
U_
04
02
_2
5V
6
@1
2
C2
01
47
00
P_
04
02
_2
5V
7K
C2
01
47
00
P_
04
02
_2
5V
7K
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C227 near U27.22 C228 C229 near U27.24
Near to JSD1
MMC+ need confirm
use 3.3V
homestay ES1(no SD4.0)
SSI ES2(symbol should be update 26~36 pin swap) please routing daisy chain
1. from U27.38 (SD_D0) -> U27.32 (SD_RCLK_P) -> L46.4
2. From U27.37 (SD_D1) -> U27.33 (SD_RCLK_N) -> L46.1
C215 close to U27.9
C213 C214 close to U27.35
C210 close to U27.42
C211 C212 close to U27.23
EMI depop location(EMC)
O2 request
+1.2V_LDO_AIN
+3.3V_RUN_AIN
IO_LDOSEL
PE_REXT
PCIE_PRX_MMITX_N5_CPCIE_PRX_MMITX_P5_C
PCIE_PTX_MMIRX_N5_CPCIE_PTX_MMIRX_P5_C
+SD_IO_LDO
SD/MMCCD#
SD/MMCDAT0
SD/MMCDAT2SD/MMCDAT1
SD/MMCDAT3
SDWP
SD_UHS2_D1PSD_UHS2_D1N
+AUX_LDO
SD/MMCCMDSD/MMCCLK_R
IO_LDOSEL
SD/MMCCLK
PE_RST#
PE_RST#SD_UHS2_D0NSD_UHS2_D0P
SD/MMCDAT0_D
SD/MMCDAT1_D
SD/MMCDAT1
SD/MMCDAT0
SD_UHS2_D0P_D
SD_UHS2_D0N_DSD_UHS2_D0N
SD_UHS2_D0P
SD_UHS2_D1P_D
SD_UHS2_D1N_DSD_UHS2_D1N
SD/MMCDAT3_RSD/MMCDAT2_R
SD_UHS2_D1P
SD/MMCDAT2_RSD/MMCDAT3_R
SD/MMCCMDSD/MMCCLK
SD/MMCCD#
SD/MMCDAT0_DSD/MMCDAT1_D
SDWP
SD_UHS2_D0P_DSD_UHS2_D0N_D
SD_UHS2_D1N_DSD_UHS2_D1P_D
SD/MMCCD#
+3.3V_RUN
+1.2V_LDO
+3.3V_RUN +3.3V_RUN
+1.2V_LDO
+3.3V_RUN_CARD
+1.8V_RUN_CARD
+3.3V_RUN_CARD +1.8V_RUN_CARD
+3.3V_RUN
+3.3V_RUN_CARD
+1.8V_RUN_CARD
+3.3V_RUN
+3.3V_RUN_CARD+1.8V_RUN_CARD
PCIE_PTX_MMIRX_N5<11>PCIE_PTX_MMIRX_P5<11>
PCIE_PRX_MMITX_P5<11>PCIE_PRX_MMITX_N5<11>
CLK_PCIE_MMI<7>CLK_PCIE_MMI#<7>
MMICLK_REQ#<7>
MEDIACARD_IRQ#<12>
MEDIACARD_PWREN<11,12>
PLTRST_MMI#<9>
MEDIACARD_RST#<12>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
Card Reader OZ777FJ2
30 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
Card Reader OZ777FJ2
30 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
Card Reader OZ777FJ2
30 59Friday, May 17, 2013
Compal Electronics, Inc.
R2
71
00
K_
04
02
_5
%
@R2
71
00
K_
04
02
_5
%
@
12
C2
46
0.1
U_
04
02
_2
5V
6C
24
60
.1U
_0
40
2_
25
V6
1
2
R337 0_0402_5%@R337 0_0402_5%@
1 2
L36
BLM15AG601SN1D_2P
L36
BLM15AG601SN1D_2P
1 2
C2
21
4.7
U_
06
03
_6
.3V
6K
@C2
21
4.7
U_
06
03
_6
.3V
6K
@
12
C2
19
0.1
U_
04
02
_2
5V
6C
21
90
.1U
_0
40
2_
25
V6
12
C2
16
0.1
U_
04
02
_2
5V
6C
21
60
.1U
_0
40
2_
25
V6
12
L35
BLM15AG601SN1D_2P
L35
BLM15AG601SN1D_2P
1 2
R214@100K_0402_5%
R214@100K_0402_5%
12
C2
14
0.1
U_
04
02
_2
5V
6C
21
40
.1U
_0
40
2_
25
V6
12
C2
22
1U
_0
40
2_
6.3
V6
KC
22
21
U_
04
02
_6
.3V
6K
1
2
C2
15
0.1
U_
04
02
_2
5V
6C
21
50
.1U
_0
40
2_
25
V6
12
R410 0_0402_5%@R410 0_0402_5%@ 1 2
C2
24
4.7
U_
06
03
_6
.3V
6K
C2
24
4.7
U_
06
03
_6
.3V
6K
12
C2
11
4.7
U_
06
03
_6
.3V
6K
C2
11
4.7
U_
06
03
_6
.3V
6K
12
C235 0.1U_0402_10V7KC235 0.1U_0402_10V7K1 2
C2
33
0.1
U_
04
02
_2
5V
6C
23
30
.1U
_0
40
2_
25
V6
12
R4
93
1M
_0
40
2_
5%
R4
93
1M
_0
40
2_
5%
12
C2
18
0.1
U_
04
02
_2
5V
6C
21
80
.1U
_0
40
2_
25
V6
12
C2
26
0.1
U_
04
02
_2
5V
6C
22
60
.1U
_0
40
2_
25
V6
12
C2
56
0.1
U_
04
02
_2
5V
6C
25
60
.1U
_0
40
2_
25
V6
1
2
C2
28
4.7
U_
06
03
_6
.3V
6K
@C2
28
4.7
U_
06
03
_6
.3V
6K
@
12
R341 0_0402_5%@R341 0_0402_5%@ 1 2
C2
34
0.1
U_
04
02
_2
5V
6C
23
40
.1U
_0
40
2_
25
V6
12
C2
20
4.7
U_
06
03
_6
.3V
6K
C2
20
4.7
U_
06
03
_6
.3V
6K
12
C2
12
0.1
U_
04
02
_2
5V
6C
21
20
.1U
_0
40
2_
25
V6
12
C2
40
4.7
U_
06
03
_6
.3V
6K
@C2
40
4.7
U_
06
03
_6
.3V
6K
@1
2
C2
27
0.1
U_
04
02
_2
5V
6
@C2
27
0.1
U_
04
02
_2
5V
6
@
12
C2
23
4.7
U_
06
03
_6
.3V
6K
C2
23
4.7
U_
06
03
_6
.3V
6K
12
R205 191_0402_1%R205 191_0402_1%
1 2 R315 0_0402_5%@R315 0_0402_5%@
1 2
C2
39
0.1
U_
04
02
_2
5V
6C
23
90
.1U
_0
40
2_
25
V6
1
2
C3410.1U_0402_25V6 @C3410.1U_0402_25V6 @1 2
C2
10
0.1
U_
04
02
_2
5V
6C
21
00
.1U
_0
40
2_
25
V6
12
C2
32
0.1
U_
04
02
_2
5V
6
@C2
32
0.1
U_
04
02
_2
5V
6
@
12
L48
DLW21SN900SQ2L-0805_4P
@L48
DLW21SN900SQ2L-0805_4P
@
11
22
33
44
C2
31
0.1
U_
04
02
_2
5V
6C
23
10
.1U
_0
40
2_
25
V6
12
R231 0_0402_5%@R231 0_0402_5%@ 1 2
C238 0.1U_0402_10V7KC238 0.1U_0402_10V7K1 2
R212100K_0402_5%R212100K_0402_5%
12
C237 0.1U_0402_10V7KC237 0.1U_0402_10V7K1 2
C2
30
4.7
U_
06
03
_6
.3V
6K
C2
30
4.7
U_
06
03
_6
.3V
6K
12
C2
17
0.1
U_
04
02
_2
5V
6C
21
70
.1U
_0
40
2_
25
V6
12
C2
25
4.7
U_
06
03
_6
.3V
6K
C2
25
4.7
U_
06
03
_6
.3V
6K
12
C236 0.1U_0402_10V7KC236 0.1U_0402_10V7K1 2
C2
55
5P
_0
40
2_
50
V8
C
@C2
55
5P
_0
40
2_
50
V8
C
@
1
2
OZ777FJ2LN
U27
OZ777FJ2LN_QFN48_6X6
OZ777FJ2LN
U27
OZ777FJ2LN_QFN48_6X6
PE_12VCCAIN1
PE_REFCLKM2
PE_REFCLKP3
PE_REXT4
PE_RXM5 PE_RXP6
PE_TXP7
PE_TXM8
PE_33VCCAIN9
MAIN_LDO_12VOUT10
MAIN_LDO_VIN11
AUX_LDO_CAP12
AUX _33VIN13
MAIN_LDO_EN14
PE_RST#_GATE#15
DEV_WAKE#16
CLKREQ#17
IO0_LDOSEL18
LED#19
SD_WPI20
SD_CD#21
SD_SKT_33VOUT22
SD_SKT_33VIN23
SD_SKT_18VOUT24
SD_IO_LDO_CAP25
UHSII_12VCCAIN/NC36
SD_D0P/NC35SD_D0M/NC34SD_D1M/NC33SD_D1P/NC32
UHSII_12VCCAIN/NC31
SD_RCLK_P/NC30SD_RCLK_M/NC29
UHSII_12VCCAIN/NC28
UHSII_33VCCAIN/NC27
SD_REXT/NC26
SD_D137
SD_D038
MMC_D739
MMC_D640
CORE_12VCCD41
SD_33VCCD42
SD_CLK43
MMC_D544
SD_CMD45
MMC_D446
SD_D347
SD_D248
GND49
R443 0_0402_5%@R443 0_0402_5%@ 1 2
R211 4.7K_0402_1%R211 4.7K_0402_1%1 2
C2
47
4.7
U_
06
03
_6
.3V
6K
C2
47
4.7
U_
06
03
_6
.3V
6K
1
2
C2
13
4.7
U_
06
03
_6
.3V
6K
C2
13
4.7
U_
06
03
_6
.3V
6K
12
JSD1
ALPS_SCDADA0101_NR
CONN@JSD1
ALPS_SCDADA0101_NR
CONN@
D1+16
VDD214
DO-12
VSS310
DAT29 DAT1/RCLK-8
VSS26
VDD/VDD14
VSS13
D1-15
VSS413
D0+11
DAT0/RCLK+7
CLK5 CMD2
CD/DAT31
CARD DETECT18
WRITE PROTEC19
GND120
GND221
GND322
GND423
GND524
GND625
VSS517
GND726
R333 0_0402_5%@R333 0_0402_5%@ 1 2
L47
DLW21SN900SQ2L-0805_4P
@L47
DLW21SN900SQ2L-0805_4P
@
11
22
33
44
R230 10_0402_5%EMC@R230 10_0402_5%EMC@
1 2
L46
DLW21SN900SQ2L-0805_4P
@L46
DLW21SN900SQ2L-0805_4P
@
11
22
33
44
R297 0_0402_5%@R297 0_0402_5%@
1 2
U26
TC7SH08FU_SSOP5~D
@U26
TC7SH08FU_SSOP5~D
@
B1
A2
G3
O4
P5
R306 0_0402_5%@R306 0_0402_5%@ 1 2
C2
29
0.1
U_
04
02
_2
5V
6
@C2
29
0.1
U_
04
02
_2
5V
6
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+-9%
+3.3Vaux
+3.3V
VoltageTolerance
+-9%
PWRRail
Primary Power Aux Power
Peak Normal Normal
1000 750
330 250250 (Wake enable)
5 (Not wake enable)
Mini WLAN/WIiGi/BT H=3.6Mini WWAN/GPS/LTE/mSATA H=3.6
WIMAX_LED# STUDY FOR DEBUG
ST change to 6718K-Y12N-01L & swap pin
LED control circuit
3.3V_ALW for LID power
CLK_PCIE_MINI1#CLK_PCIE_MINI1
MINI1CLK_REQ#
WLAN_LED#
WLAN_RADIO_DIS#_R
PCIE_WAKE#
MINI_CARD_RST#MINI_CARD_RST#
UIM_DATAUIM_CLKUIM_RESETUIM_VPP
WIMAX_LED#LED_WWAN_OUT#
WWAN_SMBCLK
WWAN_SMBDAT
WWAN_SMBCLKWWAN_SMBDAT
MSDATA
WIMAX_LED#
SATA_PTX_mSATARX_N3_CSATA_PTX_mSATARX_P3_C
PCIE_WAKE#
WIGIG60GHZ_DIS#_R
BT_RADIO_DIS#_R
WIGIG60GHZ_DIS#_R
BT_LED#
BT_LED#
MINI_CARD_RST#
LED_WWAN_OUT#
WLAN_RADIO_DIS#_R
PCIE_PTX_WLANRX_P4_C
WLAN_LED#
BT_RADIO_DIS#_R
PCIE_PTX_WLANRX_N4_C
UIM_DATAUIM_VPPUIM_RESET
UIM_CLK
AUX_EN_WOWL
+3.3V_HDD_U3
+3.3V_WLAN_U3
AUX_EN_WOWL
mSATA_DEVSLP
mSATA_DEVSLP
MINI_CARD_RST#
+3.3V_mSATA_WWAN
+3.3V_mSATA_WWAN+3.3V_mSATA_WWAN +3.3V_WLAN +3.3V_WLAN
+3.3V_WLAN
+SIM_PWR
+3.3V_mSATA_WWAN
+3.3V_WLAN
+3.3V_RUN
+3.3V_mSATA_WWAN
+3.3V_ALW
+3.3V_ALW
+SIM_PWR
+5V_ALW
+3.3V_WLAN
+3.3V_HDD
+3.3V_ALW
+3.3V_mSATA_WWAN
CLK_PCIE_MINI1<7>CLK_PCIE_MINI1#<7>
MINI1CLK_REQ#<7>
WWAN_RADIO_DIS# <36>
PCIE_PRX_WLANTX_P4<11>PCIE_PRX_WLANTX_N4<11>
MINI2CLK_REQ#<7>
PCH_CL_RST1#<7>PCH_CL_DATA1<7>
HOST_DEBUG_TX <37>
EC5048_TX<36,37>MSCLK<37>
MSDATA <37>
USBP6- <11>USBP6+ <11>
CLK_PCIE_MINI2#<7>CLK_PCIE_MINI2<7>
PCH_CL_CLK1<7>
DDR_XDP_WAN_SMBDAT<18,19,7,9>
DDR_XDP_WAN_SMBCLK<18,19,7,9>
SATA_PTX_mSATARX_N3<6>SATA_PTX_mSATARX_P3<6>
PCIE_PTX_WLANRX_P4<11>PCIE_PTX_WLANRX_N4<11>
PCIE_WAKE#<37>
HW_GPS_DISABLE2#<36>
USBP2- <11>USBP2+ <11>
WIGIG60GHZ_DIS#<36>
BT_RADIO_DIS#<36>
PCH_PLTRST#_EC<25,29,36,37,9>
MPCIE_RST#<6,7>
CPPE#<12>CPUSB# <12>
WIRELESS_LED# <36,40>
WLAN_RADIO_DIS#<36>
SATA_PRX_mSATATX_P3<6>SATA_PRX_mSATATX_N3<6>
LID_CL#<36,40>
AUX_EN_WOWL<36>
3.3V_HDD_EN<12>
+COINCELL<40,41>
mSATA_DEVSLP <12>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
Mini Card/SIM Card
31 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
Mini Card/SIM Card
31 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
Mini Card/SIM Card
31 59Friday, May 17, 2013
Compal Electronics, Inc.
G
S D
Q30B
DMN66D0LDW-7_SOT363-6
G
S D
Q30B
DMN66D0LDW-7_SOT363-6
61
2
R2
27
10
0K
_0
40
2_
5%
R2
27
10
0K
_0
40
2_
5%
12
C5
00
.1U
_0
40
2_
16
V4
Z
@C5
00
.1U
_0
40
2_
16
V4
Z
@1
2
R51 100K_0402_5%R51 100K_0402_5%
1 2
D14
RB751S40T1G_SOD523-2
D14
RB751S40T1G_SOD523-2
21
R2
16
2.2
K_
04
02
_5
%@
R2
16
2.2
K_
04
02
_5
%@1
2
R131 0_0402_5%@R131 0_0402_5%@
1 2
D12
RB751S40T1G_SOD523-2
D12
RB751S40T1G_SOD523-2
21
C2
52
33
P_
04
02
_5
0V
8J
3@
C2
52
33
P_
04
02
_5
0V
8J
3@
1
2
C242 0.1U_0402_10V7KC242 0.1U_0402_10V7K1 2
C409 470P_0402_50V7KC409 470P_0402_50V7K
1 2
C241 4700P_0402_25V7KC241 4700P_0402_25V7K
1 2
JSH1
E-T_6718K-Y12N-01L
CONN@
JSH1
E-T_6718K-Y12N-01L
CONN@
44
33
22
11
66
55
GND113 GND214
77 88 99 10
10 1111 1212
C2
61
0.1
U_
04
02
_2
5V
6C
26
10
.1U
_0
40
2_
25
V61
2
C2
60
0.1
U_
04
02
_2
5V
6C
26
00
.1U
_0
40
2_
25
V61
2
R218 0_0402_5%@R218 0_0402_5%@
12
R223 0_0402_5%@R223 0_0402_5%@ 1 2
R219 0_0402_5%@R219 0_0402_5%@
12
U3
TPS22966DPUR_SON14_2X3~D
U3
TPS22966DPUR_SON14_2X3~D
GND11
VIN26
VBIAS4
ON25
VOUT29
VIN27
CT112
VOUT114
VOUT28
VOUT113
VIN12
ON13
VIN11
CT210
GPAD15
C2
57
0.1
U_
04
02
_2
5V
6@
C2
57
0.1
U_
04
02
_2
5V
6@
1
2
PJP22
PAD-OPEN1x1m
PJP22
PAD-OPEN1x1m
12
+ C2
54
15
0U
_B
2_
6.3
VM
_R
35
M
@+ C2
54
15
0U
_B
2_
6.3
VM
_R
35
M
@
1
2
R2
29
10
0K
_0
40
2_
5%
R2
29
10
0K
_0
40
2_
5%
12
S
GD
Q30A
DMN66D0LDW-7_SOT363-6
S
GD
Q30A
DMN66D0LDW-7_SOT363-6
5
34
R2
28
10
0K
_0
40
2_
5%
R2
28
10
0K
_0
40
2_
5%
12
C2
59
0.0
47
U_
04
02
_1
6V
4Z
C2
59
0.0
47
U_
04
02
_1
6V
4Z
1
2
R224 0_0402_5%@R224 0_0402_5%@
1 2
R2
26
10
0K
_0
40
2_
5%
R2
26
10
0K
_0
40
2_
5%
12
S
GD
Q22A
DMN66D0LDW-7_SOT363-6
S
GD
Q22A
DMN66D0LDW-7_SOT363-6
5
34
JMINI2
LCN_DAN08-52216-0100
CONN@JMINI2
LCN_DAN08-52216-0100
CONN@
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
4545
4747
4949
5151
GND153
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
3030
3232
3434
3636
3838
4040
4242
4444
4646
4848
5050
5252
GND254
PJP23 PAD-OPEN1x1mPJP23 PAD-OPEN1x1m
12
C243 0.1U_0402_10V7KC243 0.1U_0402_10V7K
1 2
C2
51
22
U_
08
05
_6
.3V
6M
3@
C2
51
22
U_
08
05
_6
.3V
6M
3@
1
2
R2
17
2.2
K_
04
02
_5
%@
R2
17
2.2
K_
04
02
_5
%@1
2
C245 0.1U_0402_10V7K3@C245 0.1U_0402_10V7K3@
1 2
JMINI1
LCN_DAN08-52216-0100
CONN@JMINI1
LCN_DAN08-52216-0100
CONN@
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
4545
4747
4949
5151
GND153
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
3030
3232
3434
3636
3838
4040
4242
4444
4646
4848
5050
5252
GND254
D13
RB751S40T1G_SOD523-2
D13
RB751S40T1G_SOD523-2
21
+ C2
53
15
0U
_B
2_
6.3
VM
_R
35
M3
@
+ C2
53
15
0U
_B
2_
6.3
VM
_R
35
M3
@1
2
C2
49
0.0
47
U_
04
02
_1
6V
4Z
3@
C2
49
0.0
47
U_
04
02
_1
6V
4Z
3@
1
2
R2
61
00
K_
04
02
_5
%
@R2
61
00
K_
04
02
_5
%
@
12
C422
0.1U_0402_10V7K
@ C422
0.1U_0402_10V7K
@1
2
C2
48
0.0
47
U_
04
02
_1
6V
4Z
3@
C2
48
0.0
47
U_
04
02
_1
6V
4Z
3@
1
2
C2
50
33
P_
04
02
_5
0V
8J
3@
C2
50
33
P_
04
02
_5
0V
8J
3@
1
2
R222 0_0402_5%@R222 0_0402_5%@
1 2
C3380.1U_0402_25V6 @C3380.1U_0402_25V6 @12
C2
62
4.7
U_
06
03
_6
.3V
6K
C2
62
4.7
U_
06
03
_6
.3V
6K
1
2
C428 0.1U_0402_10V7K@C428 0.1U_0402_10V7K@
1 2
R225 0_0402_5%@R225 0_0402_5%@
1 2
C244 0.1U_0402_10V7K3@ C244 0.1U_0402_10V7K3@1 2
U30
TC7SH08FU_SSOP5~D
@U30
TC7SH08FU_SSOP5~D
@
B1
A2
G3
O4
P5
R129 0_0402_5%@R129 0_0402_5%@
1 2
C429 470P_0402_50V7KC429 470P_0402_50V7K
1 2
C2
58
0.0
47
U_
04
02
_1
6V
4Z
C2
58
0.0
47
U_
04
02
_1
6V
4Z
1
2
R160 10K_0402_5%@R160 10K_0402_5%@
1 2
R215 0_0402_5%@R215 0_0402_5%@
1 2
G
S D
Q22B
DMN66D0LDW-7_SOT363-6
G
S D
Q22B
DMN66D0LDW-7_SOT363-6
61
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
function
Dock
M/B
1
0
DOCKED
check port mapping
SA000064200
+3.3V_SUS
USB3TP3<11>USB3TN3<11>USB3RP3<11>USB3RN3<11>
USBP5-<11>USBP5+<11>
DOCKED<21,27,28,36>
SW_USB3TP3 <33>SW_USB3TN3 <33>SW_USB3RP3 <33>SW_USB3RN3 <33>
SW_USBP5- <33>SW_USBP5+ <33>
DOCK_USB3TP3 <34>DOCK_USB3TN3 <34>DOCK_USB3RP3 <34>DOCK_USB3RN3 <34>
DOCK_USBP5- <34>DOCK_USBP5+ <34>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
Mini Card PWR
32 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
Mini Card PWR
32 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
Mini Card PWR
32 59Friday, May 17, 2013
Compal Electronics, Inc.
C4
17
0.1
U_
04
02
_2
5V
6C
41
70
.1U
_0
40
2_
25
V6
1
2
C4
19
0.1
U_
04
02
_2
5V
6C
41
90
.1U
_0
40
2_
25
V6
1
2
C4
15
0.1
U_
04
02
_2
5V
6
@C4
15
0.1
U_
04
02
_2
5V
6
@1
2
C4
18
0.1
U_
04
02
_2
5V
6
@C4
18
0.1
U_
04
02
_2
5V
6
@1
2
C4
20
4.7
U_
06
03
_6
.3V
6K
C4
20
4.7
U_
06
03
_6
.3V
6K
1
2
U33
PI3USB3102ZLEX_TQFN32_6X3
U33
PI3USB3102ZLEX_TQFN32_6X3
TX+A31
TX-A30
RX+A27
D+A19RX-A26
HS_SEL32
TX-B24TX+B25
RX+B23
VDD29
D+B15RX-B22
TX+1
TX-2
RX+4
RX-5
D+6
D-7
USB_ID8
VDD3
VDD9
GND28
VDD12
SS_SEL10
OE#11
VDD20
D-B14
D-A18
USB_IDA17
GND21
VDD16
USB_IDB13
HGND33
C4
14
0.1
U_
04
02
_2
5V
6
@C4
14
0.1
U_
04
02
_2
5V
6
@1
2
C4
16
0.1
U_
04
02
_2
5V
6C
41
60
.1U
_0
40
2_
25
V6
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
function
Dock
M/B
1
0
DOCKED_LIO_EN
check port mapping
PS_USBP0_D-
PS_USBP0_D+ USBP0_D+
USBP0_D-
USB3RP2_D+
USB3TP2_C USB3TP2_D+
USB3TN2_D-USB3TN2_C
USB3TP2_D+
USB3RP2_D+
USB3TP2_D+
USB3RN2_D-
USB3TN2_D-
USB3RP2_D+
USB3TN2_D-
USB3RN2_D-
USB3RN2_D-
USBP0_D+USBP0_D-
USB3RP2_D+USB3RN2_D-
SW_USBP5+
SW_USBP5-
USBP5_D+
USBP5_D-
USB3RP3_D+
USB3TN3_D-
USB3TP3_D+SW_USB3TP3_C
SW_USB3TN3_C
USB3TN3_D-
USB3RN3_D-
USB3TP3_D+
USB3RP3_D+
USB3TP3_D+
USB3RN3_D-
USB3RN3_D-
USB3TN3_D-
USB3RP3_D+USBP5_D+USBP5_D-
USB3RN3_D-USB3RP3_D+
USB3TN3_D-USB3TP3_D+
USB3TP2_D+USB3TN2_D-
PWRSHARE_EN#
SB#
SW_USBP0+ PS_USBP0_D+PS_USBP0_D-SW_USBP0-PWRSHARE_EN
SEL
PWRSHARE_EN#
SW_USBP0+SW_USBP0-
+5V_USB_CHG_PWR
+USB_PWR
+5V_ALW +USB_PWR
+5V_ALW +5V_USB_CHG_PWR
+5V_ALW+5V_ALW
+5V_ALW
+3.3V_ALW
USB3RN2<11>
USB3RP2<11>
USB3TP2<11>
USB3TN2<11>
SW_USB3RP3<32>
SW_USB3RN3<32>
SW_USB3TP3<32>
SW_USB3TN3<32>
ESATA_USB_PWR_EN#<36> USB_OC2# <11>
USB_OC0# <11>
USB_PWR_SHR_EN#<36>
USB_PWR_SHR_VBUS_EN<36>
DOCK_USBP0- <34>DOCK_USBP0+ <34>
USBP0-<11>USBP0+<11>
SW_USBP5-<32>
SW_USBP5+<32>
DOCKED_LIO_EN<36>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
USB x2
33 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
USB x2
33 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
USB x2
33 59Friday, May 17, 2013
Compal Electronics, Inc.
R243
100K_0402_5%
R243
100K_0402_5%
12
+ C2
80
15
0U
_B
2_
6.3
VM
_R
35
M
+ C2
80
15
0U
_B
2_
6.3
VM
_R
35
M
1
2
R249 0_0402_5%@R249 0_0402_5%@
1 2
C2
89
0.1
U_
04
02
_2
5V
6C
28
90
.1U
_0
40
2_
25
V6
1
2
U32
G547I2P81U_MSOP8
U32
G547I2P81U_MSOP8
FLG5VIN
3VOUT
6
GND1
EN4
VOUT7
VIN2 VOUT
8
C283 0.1U_0402_10V7KC283 0.1U_0402_10V7K
12
R241 0_0402_5%@R241 0_0402_5%@
1 2
C293 0.1U_0402_10V7KC293 0.1U_0402_10V7K
12
D15
TVWDF1004AD0_DFN9
EMC@D15
TVWDF1004AD0_DFN9
EMC@
4
5
1
6
2
7
9
8
3
R250 0_0402_5%@R250 0_0402_5%@
1 2
D17
TVWDF1004AD0_DFN9
EMC@D17
TVWDF1004AD0_DFN9
EMC@
4
5
1
6
2
7
9
8
3
R236 0_0402_5%@R236 0_0402_5%@
1 2
R239 0_0402_5%@R239 0_0402_5%@
1 2
R235 0_0402_5%@R235 0_0402_5%@
1 2
L42
CMM0805-120Y-N_4P
EMC@ L42
CMM0805-120Y-N_4P
EMC@
1 2
34
D1
8L
30
ES
DL
5V
0C
3-2
_S
OT
23
-3E
MC
@D
18
L3
0E
SD
L5
V0
C3
-2_
SO
T2
3-3
EM
C@
123
C2
85
0.1
U_
04
02
_2
5V
6C
28
50
.1U
_0
40
2_
25
V6
1
2
R240 0_0402_5%@R240 0_0402_5%@
1 2
R244 10K_0402_5%R244 10K_0402_5%
1 2
U36
NX3DV221GM_XQFN10U10_2X1P55
U36
NX3DV221GM_XQFN10U10_2X1P55
1D+1
1D-2
2D+3
2D-4
GND5
OE#6 D-7 D+8 S9 VCC
10
C2
87
0.1
U_
04
02
_2
5V
6C
28
70
.1U
_0
40
2_
25
V6
1
2
R238 0_0402_5%@R238 0_0402_5%@
1 2
C2
91
0.1
U_
04
02
_2
5V
6C
29
10
.1U
_0
40
2_
25
V6
1
2
C292 0.1U_0402_10V7KC292 0.1U_0402_10V7K
12
C3
22
0.1
U_
04
02
_2
5V
6C
32
20
.1U
_0
40
2_
25
V6
1
2
R237 0_0402_5%@R237 0_0402_5%@
1 2
D1
6L
30
ES
DL
5V
0C
3-2
_S
OT
23
-3E
MC
@D
16
L3
0E
SD
L5
V0
C3
-2_
SO
T2
3-3
EM
C@
12 3
L40
DLW21SN900HQ2L-0805_4P
EMC@L40
DLW21SN900HQ2L-0805_4P
EMC@
11
22
33
44
R246 0_0402_5%@R246 0_0402_5%@
1 2
JUSB1
SANTA_373070-1
CONN@JUSB1
SANTA_373070-1
CONN@
VBUS1
D-2
D+3
GND4
SSRX-5
SSRX+6
GND7
SSTX-8
SSTX+9
GND10
GND11
GND12
GND13
L41
DLW21SN900HQ2L-0805_4P
EMC@L41
DLW21SN900HQ2L-0805_4P
EMC@
11
22
33
44
JUSB2
SANTA_373070-1
CONN@JUSB2
SANTA_373070-1
CONN@
VBUS1
D-2
D+3
GND4
SSRX-5
SSRX+6
GND7
SSTX-8
SSTX+9
GND10
GND11
GND12
GND13
G
D
S
Q7
L2N7002WT1G_SC-70-3G
D
S
Q7
L2N7002WT1G_SC-70-3
2
13
U35
G547I2P81U_MSOP8
U35
G547I2P81U_MSOP8
FLG5VIN
3VOUT
6
GND1
EN4
VOUT7
VIN2 VOUT
8
R242 0_0402_5%@R242 0_0402_5%@
1 2
C2
81
0.1
U_
04
02
_2
5V
6C
28
10
.1U
_0
40
2_
25
V6
1
2
C2
84
10
U_
06
03
_6
.3V
6M
C2
84
10
U_
06
03
_6
.3V
6M
1
2
L39 EMC@
DLW21HN900SQ2L_4P
L39 EMC@
DLW21HN900SQ2L_4P
11
44
33
22
+ C2
90
15
0U
_B
2_
6.3
VM
_R
35
M
+ C2
90
15
0U
_B
2_
6.3
VM
_R
35
M
1
2
L37
DLW21SN670HQ2L_4P
EMC@L37
DLW21SN670HQ2L_4P
EMC@
1 2
34
R251 0_0402_5%@R251 0_0402_5%@
1 2
R247 0_0402_5%@R247 0_0402_5%@
1 2
C282 0.1U_0402_10V7KC282 0.1U_0402_10V7K
12
U39
SLG55594AVTR_TDFN8_2X2
U39
SLG55594AVTR_TDFN8_2X2
CEN1
DP3
SMART-CDP4
DM2
Vdd5 TDP6
CB8
TDM7
Thermal-Pad9
R248 0_0402_5%@R248 0_0402_5%@
1 2
L38
DLW21SN670HQ2L_4P
EMC@L38
DLW21SN670HQ2L_4P
EMC@
1 2
34
C2
88
10
U_
06
03
_6
.3V
6M
C2
88
10
U_
06
03
_6
.3V
6M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
DOCK_DET_1
Close to DOCKIts for Enhance ESD on dock issue.
Close to DOCKIts for Enhance ESD on dock issue.
EMI solution for E-Docking USB(EMC)
ESD depop location(EMC)ESD depop location(EMC)
EMI depop location(EMC)
ESD depop location(EMC)
SLICE_BAT_PRES#
DPB_DOCK_HPD
DPC_DOCK_HPD
CLK_PCI_DOCK
DOCK_DET_R#
DOCK_AC_OFF
DOCK_DET#
DPC_DOCK_HPD
DPB_DOCK_HPD
SATA_PRX_DKTX_P0SATA_PRX_DKTX_N0
DAI_12MHZ# DAI_BCLK#
DPB_CA_DET
DPB_DOCK_AUXDPB_DOCK_AUX#
SATA_PTX_DKRX_P0SATA_PTX_DKRX_N0
DPC_CA_DET
DPC_DOCK_AUXDPC_DOCK_AUX#
RED_DOCK
GREEN_DOCK
BLUE_DOCK
DPC_LANE_P0_C
DPC_LANE_P3_C
DPC_LANE_P2_C
DPC_LANE_P1_C
DPC_LANE_N3_C
DPC_LANE_N2_C
DPC_LANE_N1_C
DPC_LANE_N0_C
DPB_DOCK_LANE_P3DPB_DOCK_LANE_N3
DPB_DOCK_LANE_P2DPB_DOCK_LANE_N2
DPB_DOCK_LANE_P1DPB_DOCK_LANE_N1
DPB_DOCK_LANE_N0DPB_DOCK_LANE_P0
DOCK_USBP0_D+DOCK_USBP0_D-
DPC_DOCK_LANE_P0DPC_DOCK_LANE_N0
DPC_DOCK_LANE_P1DPC_DOCK_LANE_N1
DPC_DOCK_LANE_P2DPC_DOCK_LANE_N2
DPC_DOCK_LANE_P3DPC_DOCK_LANE_N3
DPB_LANE_P0_CDPB_LANE_N0_C
DPB_LANE_P1_CDPB_LANE_N1_C
DPB_LANE_P2_CDPB_LANE_N2_C
DPB_LANE_P3_CDPB_LANE_N3_C
+DOCK_PWR_BAR +DOCK_PWR_BAR
+LOM_VCT
+NBDOCK_DC_IN_SS
+3.3V_ALW
+LOM_VCT
DOCK_AC_OFF <48>
RED_DOCK<21>
BLUE_DOCK<21>
GREEN_DOCK<21>
VSYNC_DOCK<21>
DAT_MSE<37>CLK_MSE<37>
DAI_BCLK#<26>DAI_LRCK#<26>
DAI_DI<26>DAI_DO#<26>
DAI_12MHZ#<26>
D_LAD1<36>D_LAD0<36>
D_LAD2<36>D_LAD3<36>
D_LFRAME#<36>D_CLKRUN#<36>
D_SERIRQ<36>D_DLDRQ1#<36>
CLK_PCI_DOCK<7>
DOCK_SMB_CLK<37>DOCK_SMB_DAT<37>
DOCK_SMB_ALERT#<36,41,48>DOCK_PSID<41>
DOCK_PWR_BTN#<37>
DOCK_LOM_SPD10LED_GRN#<28>
HSYNC_DOCK<21>
DOCK_LOM_SPD100LED_ORG# <28>
DAT_KBD <37>CLK_KBD <37>
DOCK_LOM_TRD0+ <28>DOCK_LOM_TRD0- <28>
DOCK_LOM_TRD2- <28>DOCK_LOM_TRD2+ <28>
ACAV_DOCK_SRC# <48>
CLK_DDC2_DOCK <21>DAT_DDC2_DOCK <21>
SATA_PTX_DKRX_P0_C <6>SATA_PTX_DKRX_N0_C <6>
SATA_PRX_DKTX_P0_C <6>
BREATH_LED# <36,40>DOCK_LOM_ACTLED_YEL# <28>
DOCK_LOM_TRD1- <28>DOCK_LOM_TRD1+ <28>
DOCK_LOM_TRD3- <28>DOCK_LOM_TRD3+ <28>
DOCK_DCIN_IS+ <47>DOCK_DCIN_IS- <47>
DOCK_POR_RST# <37>
SATA_PRX_DKTX_N0_C <6>
DOCK_USBP5+ <32>DOCK_USBP5- <32>
SLICE_BAT_PRES#<36,41,48> DOCK_DET# <36,48>
DPB_DOCK_AUX <24>DPB_DOCK_AUX# <24>
DPB_CA_DET <21,24>DPC_CA_DET<21,24>
DPC_DOCK_AUX#<24>DPC_DOCK_AUX<24>
DPC_DOCK_HPD<21> DPB_DOCK_HPD <21>
DOCK_USB3RN3 <32>DOCK_USB3RP3 <32>
DOCK_USB3TN3 <32>DOCK_USB3TP3 <32>
DPC_LANE_P0<21>DPC_LANE_N0<21>
DPC_LANE_P1<21>DPC_LANE_N1<21>
DPC_LANE_P2<21>DPC_LANE_N2<21>
DPC_LANE_P3<21>DPC_LANE_N3<21>
DPB_LANE_P2 <21>DPB_LANE_N2 <21>
DPB_LANE_P0 <21>DPB_LANE_N0 <21>
DPB_LANE_P3 <21>DPB_LANE_N3 <21>
DPB_LANE_P1 <21>DPB_LANE_N1 <21>
DOCK_USBP0- <33>
DOCK_USBP0+ <33>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
E series Dock Connector
34 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
E series Dock Connector
34 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
E series Dock Connector
34 59Friday, May 17, 2013
Compal Electronics, Inc.
C312 .01U_0402_16V7KC312 .01U_0402_16V7K12
C315 .01U_0402_16V7KC315 .01U_0402_16V7K1 2
C294 0.1U_0402_10V7KC294 0.1U_0402_10V7K12
R270 0_0402_5%@R270 0_0402_5%@
12
C302 0.1U_0402_10V7KC302 0.1U_0402_10V7K12
RE510_0402_1%@RE510_0402_1%@
12
C3
10
0.0
33
U_
04
02
_1
6V
7K
@C3
10
0.0
33
U_
04
02
_1
6V
7K
@1
2
D2
0P
ES
D2
4V
S2
UT
_S
OT
23
-3
@
D2
0P
ES
D2
4V
S2
UT
_S
OT
23
-3
@
231
C306 0.1U_0402_10V7KC306 0.1U_0402_10V7K12 R264 33_0402_5%R264 33_0402_5%1 2
CE
74
.7U
_0
80
5_
25
V6
-K
@
CE
74
.7U
_0
80
5_
25
V6
-K
@1
2
R267 33_0402_5%R267 33_0402_5%1 2
C305 0.1U_0402_10V7KC305 0.1U_0402_10V7K12R262 33_0402_5%R262 33_0402_5%1 2
C3
18
0.1
U_
06
03
_5
0V
7K
C3
18
0.1
U_
06
03
_5
0V
7K
1
2
L43DLW21SN900SQ2L-0805_4P
@L43DLW21SN900SQ2L-0805_4P
@
11
22
33
44
R258 33_0402_5%R258 33_0402_5%1 2
C307 0.1U_0402_10V7KC307 0.1U_0402_10V7K12
R256 33_0402_5%R256 33_0402_5%1 2
C296 0.1U_0402_10V7KC296 0.1U_0402_10V7K12
C300 0.1U_0402_10V7KC300 0.1U_0402_10V7K12
WD2F144WB8
JDOCK1
JAE_WD2F144WB8-DT
CONN@
WD2F144WB8
JDOCK1
JAE_WD2F144WB8-DT
CONN@
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
4545
4747
4949
5151
5353
5555
5757
5959
6161
6363
6565
6767
6969
7171
7373
7575
7777
7979
8181
8383
8585
8787
8989
9191
9393
9595
9797
9999
101101
103103
105105
107107
109109
111111
113113
115115
117117
119119
121121
123123
125125
127127
129129
131131
133133
135135
137137
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
3030
3232
3434
3636
3838
4040
4242
4444
4646
4848
5050
5252
5454
5656
5858
6060
6262
6464
6666
6868
7070
7272
7474
7676
7878
8080
8282
8484
8686
8888
9090
9292
9494
9696
9898
100100
102102
104104
106106
108108
110110
112112
114114
116116
118118
120120
122122
124124
126126
128128
130130
132132
134134
136136
138138
GND1145
PWR1146
PWR2149
Shield_G152
Shield_G153
Shield_G154
Shield_G155
Shield_G156
Shield_G158
139139
140140
141141
142142
143143
144144
PWR1147
GND2148
PWR2150
Shield_G151
Shield_G159
Shield_G160
Shield_G161
Shield_G162
Shield_G157
R254 33_0402_5%R254 33_0402_5%1 2
C314 .01U_0402_16V7KC314 .01U_0402_16V7K1 2
R261 33_0402_5%R261 33_0402_5%1 2
R268100K_0402_5%R268100K_0402_5%
12
[email protected]_0402_50V8C@
1
2
R260 33_0402_5%R260 33_0402_5%1 2
C31912P_0402_50V8J@C31912P_0402_50V8J@
1
2
C309 0.1U_0402_10V7KC309 0.1U_0402_10V7K12
C3161U_0402_6.3V6K
@C3161U_0402_6.3V6K
@1
2
R266 33_0402_5%R266 33_0402_5%1 2
R259 33_0402_5%R259 33_0402_5%1 2
C298 0.1U_0402_10V7KC298 0.1U_0402_10V7K12
C3
11
0.0
33
U_
04
02
_1
6V
7K
@C3
11
0.0
33
U_
04
02
_1
6V
7K
@1
2
R265 33_0402_5%R265 33_0402_5%1 2
R263 33_0402_5%R263 33_0402_5%1 2
R27333_0402_5%@R27333_0402_5%@
12
R257 33_0402_5%R257 33_0402_5%1 2
C3
17
0.1
U_
06
03
_5
0V
7K
C3
17
0.1
U_
06
03
_5
0V
7K
1
2
C297 0.1U_0402_10V7KC297 0.1U_0402_10V7K12
R255 33_0402_5%R255 33_0402_5%1 2C299 0.1U_0402_10V7KC299 0.1U_0402_10V7K12R253 33_0402_5%R253 33_0402_5%1 2
C304 0.1U_0402_10V7KC304 0.1U_0402_10V7K12
C295 0.1U_0402_10V7KC295 0.1U_0402_10V7K12 R252 33_0402_5%R252 33_0402_5%1 2
D19
RB751S40T1G_SOD523-2
D19
RB751S40T1G_SOD523-2
21
R272 10K_0402_5%R272 10K_0402_5%
1 2
RE410_0402_1%@RE410_0402_1%@
12
R271100K_0402_5%R271100K_0402_5%
12
R269 0_0402_5%@R269 0_0402_5%@
12
C308 0.1U_0402_10V7KC308 0.1U_0402_10V7K12
[email protected]_0402_50V8C@
1
2
C313 .01U_0402_16V7KC313 .01U_0402_16V7K12
C301 0.1U_0402_10V7KC301 0.1U_0402_10V7K12
C303 0.1U_0402_10V7KC303 0.1U_0402_10V7K12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+3.3V_LAN:20mils
GNDCHASSISGNDCHASSIS
RJ45 LOM circuit
use 40mil trace if necessary
To Sniffer Board
Symbol update OK
ST change to PUBAUE-09FLBS1FF4H0
NB_LAN_TX1+
NB_LAN_TX2+
NB_LAN_TX2-
NB_LAN_TX1-
NB_LAN_TX3+
NB_LAN_TX3-
LED_100_ORG_R#
LED_10_GRN_R#
NB_LAN_TX0+
NB_LAN_TX0-
+GND_CHASSIS
Z2807
Z2805
Z2808
Z2806
LAN_ACTLED_YEL_R#
NB_LAN_TX2+
NB_LAN_TX2-
NB_LAN_TX3+
NB_LAN_TX3-SW_LAN_TX3-
SW_LAN_TX3+
SW_LAN_TX2+
SW_LAN_TX2-
NB_LAN_TX0-
NB_LAN_TX0+
NB_LAN_TX1+
NB_LAN_TX1-
SW_LAN_TX0-
SW_LAN_TX0+
SW_LAN_TX1-
SW_LAN_TX1+
USB3TP1_D+USB3TN1_D-
USB3RN1_D-USB3RP1_D+
USBP1_R_D-USBP1_R_D+
USB3TN1_RP_C
USB3TP1_RP_C
USB3RN1_D- USB3RN1_D-USB3RN1_D-
USB3RP1_D+ USB3RP1_D+ USB3RP1_D+
USB3TN1_D-
USB3TN1_D- USB3TN1_D-
USB3TP1_D+
USB3TP1_D+ USB3TP1_D+
USBP1_R_D+
USBP1_R_D-
+3.3V_LAN
+USB_SIDE_PWR
+5V_ALW
+USB_SIDE_PWR
LED_100_ORG#<28>
LED_10_GRN#<28>
LAN_ACTLED_YEL#<28>
SW_LAN_TX3-<28>
SW_LAN_TX3+<28>
SW_LAN_TX2+<28>
SW_LAN_TX2-<28>
SW_LAN_TX0-<28>
SW_LAN_TX0+<28>
SW_LAN_TX1-<28>
SW_LAN_TX1+<28>
WIRELESS_ON#/OFF<36>
USB_OC1# <11>USB_SIDE_EN#<36>
USBP1-<11>
USBP1+<11>
USB3RN1<11>
USB3RP1<11>
USB3TN1<11>
USB3TP1<11>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
RJ45 and USBx1
35 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
RJ45 and USBx1
35 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
RJ45 and USBx1
35 59Friday, May 17, 2013
Compal Electronics, Inc.
R483 0_0402_5%@R483 0_0402_5%@
1 2
R276 150_0402_5%R276 150_0402_5%
1 2
D34
TVWDF1004AD0_DFN9
EMC@D34
TVWDF1004AD0_DFN9
EMC@
4
5
1
6
2
7
9
8
3
C449 0.1U_0402_10V7KC449 0.1U_0402_10V7K
12
R2
79
75
_0
40
2_
1%
R2
79
75
_0
40
2_
1%
12
D3
3L
30
ES
DL
5V
0C
3-2
_S
OT
23
-3E
MC
@D
33
L3
0E
SD
L5
V0
C3
-2_
SO
T2
3-3
EM
C@
12 3
1:1
1:1
1:1
1:1
T94
TAIMA_IH-115-F
1:1
1:1
1:1
1:1
T94
TAIMA_IH-115-F
TD1-2
TDCT13
TDCT24
TD2+5
TD2-6
TD3+7
TD3-8
TDCT39
TDCT410
TD4+11
TD4-12
TX4-13
TXCT316
TX3+18
TX2-19
TX2+20TXCT221
TXCT122
TX1-23
TX4+14TXCT415
TX3-17
TD1+1
TX1+24
C448 0.1U_0402_10V7KC448 0.1U_0402_10V7K
12
C3
23
0.4
7U
_0
60
3_
10
V7
KC
32
30
.47
U_
06
03
_1
0V
7K
1
2
C3
21
0.1
U_
04
02
_1
0V
7K
C3
21
0.1
U_
04
02
_1
0V
7K
1
2
L56
DLW21SN900HQ2L-0805_4P
EMC@L56
DLW21SN900HQ2L-0805_4P
EMC@
11
22
33
44
R2
77
75
_0
40
2_
1%
R2
77
75
_0
40
2_
1%
12
C327 150P_1808_2.5KV8JEMC@C327 150P_1808_2.5KV8JEMC@
1 2
L55
DLW21SN900HQ2L-0805_4P
EMC@L55
DLW21SN900HQ2L-0805_4P
EMC@
11
22
33
44
rev1
JLOM1
SANTA_130456-341
CONN@
rev1
JLOM1
SANTA_130456-341
CONN@
PR1-2
PR1+1
PR2+3
PR3+4
PR3-5
PR2-6
PR4+7
PR4-8
Orange LED-13
Green LED-11
Yellow LED+9
Yellow LED-10
GND14
GND15
Green-Orange LED+12
C3
24
0.4
7U
_0
60
3_
10
V7
KC
32
40
.47
U_
06
03
_1
0V
7K
1
2
R484 0_0402_5%@R484 0_0402_5%@
1 2
+ C4
44
15
0U
_B
2_
6.3
VM
_R
35
M
+ C4
44
15
0U
_B
2_
6.3
VM
_R
35
M
1
2
L54 EMC@
DLW21HN900SQ2L_4P
L54 EMC@
DLW21HN900SQ2L_4P
11
44
33
22
C3
25
0.4
7U
_0
60
3_
10
V7
KC
32
50
.47
U_
06
03
_1
0V
7K
1
2
R485 0_0402_5%@R485 0_0402_5%@
1 2
U52
G547I2P81U_MSOP8
U52
G547I2P81U_MSOP8
FLG5VIN
3VOUT
6
GND1
EN4
VOUT7
VIN2 VOUT
8
R2
80
75
_0
40
2_
1%
R2
80
75
_0
40
2_
1%
12
C4
46
10
U_
06
03
_1
0V
6M
C4
46
10
U_
06
03
_1
0V
6M
1
2
C3
20
47
0P
_0
40
2_
50
V7
KC
32
04
70
P_
04
02
_5
0V
7K
1
2
R486 0_0402_5%@R486 0_0402_5%@
1 2
R2
78
75
_0
40
2_
1%
R2
78
75
_0
40
2_
1%
12
C4
45
0.1
U_
04
02
_2
5V
6
C4
45
0.1
U_
04
02
_2
5V
6
1
2
R487 0_0402_5%@R487 0_0402_5%@
1 2
R275 150_0402_5%R275 150_0402_5%
1 2
C4
47
0.1
U_
04
02
_2
5V
6C
44
70
.1U
_0
40
2_
25
V6
1
2
JUSB3 CONN@
TAITW_PUBAUE-09FLBS1FF4H0
JUSB3 CONN@
TAITW_PUBAUE-09FLBS1FF4H0
VBUS1
D-2
D+3
GND4
StdA-SSRX-5
StdA-SSRX+6
GND-DRAIN7
StdA-SSTX-8
StdA-SSTX+9
GND10
GND11
GND12
GND13
R274
150_0402_5%
R274
150_0402_5%
1 2
R482 0_0402_5%@R482 0_0402_5%@
1 2
C3
26
0.4
7U
_0
60
3_
10
V7
KC
32
60
.47
U_
06
03
_1
0V
7K
1
2
JSF1
ACES_50277-0040N-001
CONN@JSF1
ACES_50277-0040N-001
CONN@
44
11
22
33
GND15
GND26
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+CAP_LDO trace width 20 mils
ME_FWP PCH has internal 20K PD.
(suspend power rail)
trace width 20 mils
trace width 20 mils
VGA_ID0
Discrete
UMA 1
0
EMI depop location(EMC)
CLK_PCI_5048
RUN_ON
D_CLKRUN#
D_SERIRQ
D_DLDRQ1#
CPU_VTT_ON
LCD_TST
SP_TPM_LPC_EN
SYS_LED_MASK#
SYS_LED_MASK#
LPC_LAD3
IRQ_SERIRQ
PCH_PLTRST#_EC
CLKRUN#
LPC_LAD1LPC_LAD2
D_LAD3
D_LAD1
D_DLDRQ1#
CLK_PCI_5048
LPC_LFRAME#
LAN_DISABLE#_R
D_CLKRUN#D_LFRAME#
LID_CL_SIO#
ME_FWP
WLAN_RADIO_DIS#
D_LAD0
D_LAD2
LPC_LAD0
D_SERIRQ
WWAN_RADIO_DIS#
SIO_SLP_A#
AUX_EN_WOWL
WIRELESS_ON#/OFF
BC_INT#_ECE5048BC_DAT_ECE5048BC_CLK_ECE5048
BCM5882_ALERT#
EN_DOCK_PWR_BAR
PSID_DISABLE#
ENVDD_PCHPANEL_BKEN_EC
USH_PWR_STATE#
LCD_TST
AUD_NB_MUTE#DOCK_DET#
LCD_VCC_TEST_EN
DOCKED
MCARD_WWAN_PWREN
AUD_HP_NB_SENSE
SIO_SLP_LAN#
DOCK_HP_DETDOCK_MIC_DET
+CAP_LDO
ME_FWP
RUN_ON
CPU_DETECT#
PBAT_PRES#
SLICE_BAT_PRES#
LID_CL_SIO#
CPU_DETECT#
SLP_ME_CSW_DEV#
SYS_PWROK
CPU_VTT_ON
SIO_SLP_SUS#
VGA_ID
SLICE_BAT_ON
CHARGE_EN
SLICE_BAT_ON
WIRELESS_LED#
MASK_SATA_LED#
LED_SATA_DIAG_OUT#
RUNPWROK
ALS_INT#
SLICE_BAT_PRES#
ALS_INT#
SUS_ON
EDID_SELECT#
DGPU_SELECT#
HW_GPS_DISABLE2#
HW_GPS_DISABLE2#BREATH_LED#
BAT1_LED#
BAT2_LED#
USB_PWR_SHR_EN#
PROCHOT_GATE
USB_PWR_SHR_VBUS_EN
USB_PWR_SHR_VBUS_EN
CHARGE_EN
DOCK_SMB_ALERT#
DOCK_SMB_ALERT#WIRELESS_ON#/OFF
MCARD_MISC_PWREN
TOUCH_SCREEN_PD#
USB_SIDE_EN#EN_I2S_NB_CODEC#
ESATA_USB_PWR_EN#
CCD_OFF
MODULE_ON
MODULE_BATT_PRES#
CHARGE_PBATT
WIGIG60GHZ_DIS#
XFR_ID_BIT#
DP_HDMI_HPD
BT_RADIO_DIS#
MODC_EN
USB_SIDE_EN#
ESATA_USB_PWR_EN#
WIGIG60GHZ_DIS#
BT_RADIO_DIS#
mCARD_PCIE_SATA#
VGA_ID
LPC_LDRQ1#
LPC_LDRQ1#
SP_TPM_LPC_EN
FP_POA_EN
USB_PWR_SHR_EN#
SUS_ON
PROCHOT_GATEXFR_ID_BIT#WWAN_RADIO_DIS#
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN+3.3V_RUN
+3.3V_ALW +3.3V_ALW_U37
+3.3V_ALW
+3.3V_ALW
LPC_LFRAME# <25,29,37,7>
SYS_LED_MASK#<40>
WLAN_RADIO_DIS#<31>
WWAN_RADIO_DIS#<31>
LID_CL# <31,40>
IMVP_VR_ON <46>
SIO_EXT_WAKE#<12,9>
D_SERIRQ <34>D_DLDRQ1# <34>
CLK_PCI_5048 <7>
D_LAD3 <34>
D_CLKRUN# <34>
D_LAD1 <34>
PCH_PLTRST#_EC <25,29,31,37,9>
D_LAD2 <34>
D_LFRAME# <34>
IRQ_SERIRQ <12,29,37>
D_LAD0 <34>
CLKRUN# <10,29,37,9>
SIO_SLP_A# <39,44,9>
SIO_SLP_S4# <39,43,9>SIO_SLP_S3# <39,43,9>
WIRELESS_ON#/OFF<35> BC_CLK_ECE5048 <37>
BC_INT#_ECE5048 <37>BC_DAT_ECE5048 <37>
BCM5882_ALERT#<29>
EN_DOCK_PWR_BAR<48>
PSID_DISABLE#<41>
LCD_TST<22>ENVDD_PCH<10,22>
USH_PWR_STATE#<29>
PANEL_BKEN_EC<22>
DOCKED<21,27,28,32>DOCK_DET#<34,48>
AUD_NB_MUTE#<26>
LCD_VCC_TEST_EN<22>
AUD_HP_NB_SENSE<25,26>
DOCK_AC_OFF_EC <48>
WLAN_LAN_DISB# <28>SIO_SLP_LAN# <28,9>
GPIO_PSID_SELECT <41>
DOCK_HP_DET <26>DOCK_MIC_DET <26>
ME_FWP <6>
RUN_ON <26,37,39>
SPI_WP#_SEL <7>
IMVP_PWRGD <46>
EC_32KHZ_ECE5048 <37>
PCH_DPWROK<9>
PBAT_PRES#<41,48>
SLICE_BAT_PRES#<34,41,48>
CPU_DETECT#<9>
SLP_ME_CSW_DEV#<12>
SYS_PWROK<9>
SIO_SLP_SUS# <9>
SLICE_BAT_ON<48>
WIRELESS_LED#<31,40>
MASK_SATA_LED# <40>
LED_SATA_DIAG_OUT# <40>
RUNPWROK <37,9>
SUSACK#<12,9>
LAN_DISABLE#_R<28>
LPC_LAD0 <25,29,37,7>
SUS_ON <39,43>
HW_GPS_DISABLE2# <31>BREATH_LED# <34,40>
BAT1_LED# <40>
BAT2_LED# <40>
LPC_LAD1 <25,29,37,7>LPC_LAD2 <25,29,37,7>LPC_LAD3 <25,29,37,7>
PROCHOT_GATE<47>
USB_PWR_SHR_VBUS_EN<33>
DOCK_SMB_ALERT#<34,41,48>
SIO_SLP_WLAN#<9>
USB_SIDE_EN#<35>
ESATA_USB_PWR_EN#<33>
WIGIG60GHZ_DIS#<31>
BT_RADIO_DIS#<31>
mCARD_PCIE_SATA#<6>
EN_I2S_NB_CODEC#<26>
DIS_BAT_PROCHOT# <48>
SP_TPM_LPC_EN <29>
AC_DIS <41,48>CCD_OFF<22>
USH_PWR_ON <39>
USB_PWR_SHR_EN# <33>
EC5048_TX<31,37>
DOCKED_LIO_EN<33>
AUX_EN_WOWL <31>
MCARD_WWAN_PWREN<28>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
SIO & GPIO ECE5048
36 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
SIO & GPIO ECE5048
36 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
SIO & GPIO ECE5048
36 59Friday, May 17, 2013
Compal Electronics, Inc.
R282 100K_0402_5%R282 100K_0402_5%
1 2
R296 10K_0402_5%R296 10K_0402_5%
12
R281 10K_0402_5%R281 10K_0402_5%
1 2
C3370.047U_0402_16V4ZC3370.047U_0402_16V4Z
1
2C339
33P_0402_50V8J@C339
33P_0402_50V8J@
1
2
R289 100K_0402_5%R289 100K_0402_5%
1 2
R310 10K_0402_5%R310 10K_0402_5%
1 2
R3
17
10
0K
_0
40
2_
5%
R3
17
10
0K
_0
40
2_
5%
12
C32810U_0603_6.3V6MC32810U_0603_6.3V6M
1
2
R284 100K_0402_5%R284 100K_0402_5%
1 2
R303 100K_0402_5%R303 100K_0402_5%
12
R292 100K_0402_5%R292 100K_0402_5%
1 2
R287 100K_0402_5%R287 100K_0402_5%
1 2
R300 100K_0402_5%R300 100K_0402_5%
12
R32433_0402_5%
@R32433_0402_5%
@
12
R322100K_0402_5%R322100K_0402_5%
12
R321 1K_0402_5%R321 1K_0402_5%
1 2
C3340.1U_0402_10V7KC3340.1U_0402_10V7K
1
2
T97 PAD~D@ T97 PAD~D@
C3310.1U_0402_25V6C3310.1U_0402_25V6
1
2
T100PAD~D @T100PAD~D @
R285 100K_0402_5%R285 100K_0402_5%
1 2
R304 10K_0402_5%@R304 10K_0402_5%@
1 2
R288 10K_0402_5%R288 10K_0402_5%
1 2
T110 PAD~D@ T110 PAD~D@
U37
DB Version 0.4ECE5048-LZY_DQFN132_11X11~D
U37
DB Version 0.4ECE5048-LZY_DQFN132_11X11~D
GPIOA0B52
GPIOA1A49
GPIOA2B53
GPIOA3A50
GPIOA4B54
GPIOA5A51
GPIOA6B55
GPIOA7A52
GPIOD1B32
GPIOD2A31
GPIOD3B33
GPIOD4B15
GPIOD5A15
GPIOD6B16
GPIOD7A16
GPIOF7B58 GPIOF6A55 GPIOF5B59 GPIOF4/TACH7A56
GPIOL0/PWM7B60
GPIOL1/PWM8A57
GPIOF3/TACH8B61 GPIOF2A58 GPIOF1B62 GPIOF0A59
VC
C1
B5
CAP_LDOB46
TEST_PINB19
LAD0A27
LAD1A26
LAD2B26
LAD3B25
LFRAME#A21
LRESET#B22
PCICLKA28
CLKRUN#B20
GPIOI0A23
LDRQ1#A22
SER_IRQB21
14.318MHZ/GPIOM0A32
GPIOM4/PWM6B51
DLAD0B29
DLAD1B28
DLAD2A25
DLAD3A24
DLFRAME#B23
DCLKRUN#A19
DLDRQ1#B24
DSER_IRQA20
PWRGDA4
OUT65B56
VSSB27
GPIOM3/PWM4B39
GPIOL2/PWM0B64
VC
C1
A1
7
VC
C1
B3
0
VC
C1
A4
3
VC
C1
A5
4
BC_INT#A29
BC_DATB31
BC_CLKA30
GPIOB0A33
GPIOB1B36
GPOC2A34
GPOC3B37
GPOC4A35
GPOC5B38
GPOC6/TACH4A36
GPIOC7A37
GPIOD0B40
GPIOC1A38
GPIOC0B41
GPIOB7A39
GPIOB6B42
GPIOB5A40
GPIOB4B43
GPIOB3A41
GPIOB2B44
GPIOH0B13
GPIOH1A13
SYSOPT1/GPIOH2A53
SYSOPT0/GPIOH3B57
GPIOH4B14
GPIOH5A14
GPIOH6B17
GPIOH7B18
GPIOE0/RXDA1
GPIOE1/TXDB2
GPIOE2/RTS#A2
GPIOE3/DSR#B3
GPIOE4/CTS#A3
GPIOE5/DTR#B45
GPIOE6/RI#A42
GPIOE7/DCD#B4
GPIOG0/TACH5B47
GPIOG1A45
GPIOG2B48
GPIOG3A46
GPIOG4B49
GPIOG5A47
GPIOG6B50
GPIOG7/TACH6A48
GPIOK0A8
GPIOK1/TACH3B9
GPIOK2B10
GPIOK3A10
GPIOK4B11
GPIOK5A11
GPIOK6B12
GPIOK7A12
GPIOI1B63
GPIOI2/TACH0A60
GPIOI3A61
GPIOI4B65
GPIOI5A62
GPIOI6B66
GPIOI7A63
GPIOJ0B67
GPIOJ1/TACH1A64
GPIOJ2/TACH2A5
GPIOJ3B6
GPIOJ4A6
GPIOJ5B7
GPIOJ6A7
GPIOJ7B8
GPIOM1B34
CLK32/GPIOM2B35
EPC1
GPIOL3/PWM1B68
GPIOL4/PWM3A9
GPIOL5/PWM2B1
GPIOL6A18
GPIOL7/PWM5A44
R291 100K_0402_5%R291 100K_0402_5%
1 2
T101PAD~D @T101PAD~D @
T118 PAD~D@ T118 PAD~D@
R3261K_0402_5%@R3261K_0402_5%@
12
C3290.1U_0402_25V6C3290.1U_0402_25V6
1
2
PJP6
PAD-OPEN1x1m
PJP6
PAD-OPEN1x1m
1 2
R325 10_0402_1%R325 10_0402_1%
12
C3320.1U_0402_25V6C3320.1U_0402_25V6
1
2
C3300.1U_0402_25V6C3300.1U_0402_25V6
1
2
C3364.7U_0603_6.3V6KC3364.7U_0603_6.3V6K
1
2
T107 PAD~D@ T107 PAD~D@
R319@ 0_0402_5%R319@ 0_0402_5%
1 2
R301 100K_0402_5%R301 100K_0402_5%
12
R313 100K_0402_5%R313 100K_0402_5%
1 2
R309 100K_0402_5%R309 100K_0402_5%
1 2T115 PAD~D@ T115 PAD~D@
RP11
100K_0804_8P4R_5%
RP11
100K_0804_8P4R_5%
18273645
R295 100K_0402_5%R295 100K_0402_5%
1 2T98 PAD~D@ T98 PAD~D@
R293 100K_0402_5%R293 100K_0402_5%
1 2
R299 100K_0402_5%R299 100K_0402_5%
12
R307 100K_0402_5%R307 100K_0402_5%
12
R305 100K_0402_5%R305 100K_0402_5%
12
T106 PAD~D@ T106 PAD~D@
T121 PAD~D@ T121 PAD~D@
R3
20
10
0K
_0
40
2_
5%
@R
32
0
10
0K
_0
40
2_
5%
@ 12
R298 100K_0402_5%R298 100K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1K4700p4700p
4700p4700p4700p4700p
X02
X01X00
62K33K8.2K4.3K
R392 C368
130K 4700p
REV
240K 4700p
2K*
CHIPSET_ID for BID function
BOARD_ID rise time is measured from 5%~68%.
A00
R866 close to U51 at least 250mils
15mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE:
THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
1: Channel 1 will provide Thermistor Readings
0: Channel 1 will provide Diode Readings
Rest=1.58K , Tp=96 degree
Place close pin A29
32 KHz Clock
Place close pin A21
C283, C285, C286, C287 Place near U51
ESR <2ohms
V.R
DP1/DN1
DP2/DN2
DP4/DN4
Location
CPU
DIMM
Thermal diode mapping
5075 Channel
Place under CPU
Place C266 close to the Q11 as possible
DP2/DN2 for SODIMM on Q13, place Q13 close
to SODIMM and C372 close to Q13
DP4/DN4 for Skin on Q14, place Q14 close to Vcore VR choke.
5075 Setting for Thermal Design
driven low when +3.3V_RUN is OFF;
driven high when +3.3V_RUN is ON
change to 10K by vendor feedback
Pin8 5075_TXD for EC Debug
pin9 5048_TXD for SBIOS debug
5048_TX should be change Host_debug_tx
H=0.98
pin define different with original part
EMI depop location(EMC)
Align E5,P5 Fan module pin define
then swap pin define
***
*********
ESD Request XB use SA00005IH1L(S IC MEC5075-LZY-SAL00 DQFN 132P EC)
BC_DAT_ECE5048
BC_DAT_ECE1117
PBAT_SMBDAT
PBAT_SMBCLK
CHARGER_SMBDAT
CHARGER_SMBCLK
SYSTEM_ID
JTAG_TDO
FWP#
POWER_SW_IN#
JTAG_TDIJTAG_TMS
DOCK_SMB_CLK
DOCK_SMB_DAT
JTAG_RST#
DYN_TUR_CURRNT_SET#
PCIE_WAKE#
PROCHOT#_EC
HOST_DEBUG_TXHOST_DEB_TX
MSCLKMSDATA
MEC_XTAL2MEC_XTAL1
LPC_LAD0LPC_LAD1LPC_LAD2LPC_LAD3
+3.3V_VTR_ADC
SIO_EXT_SCI#CLKRUN#
MEC_XTAL2 MEC_XTAL2_RMEC_XTAL1
PCH_RSMRST#
SML1_SMBCLKSML1_SMBDATA
+PECI_VREF
DAT_TP_SIOCLK_TP_SIO
MSCLK
CLK_KBDDAT_KBD
JTAG_RST#
CLK_MSEDAT_MSE
PROCHOT#_EC
+3.3V_VTR
BC_DAT_ECE1117BC_CLK_ECE1117
PCH_ALW_ON
BC_INT#_ECE1117
+V
R_C
AP
BIA_PWM_EC
SIO_EXT_SMI#
PBAT_SMBCLKPBAT_SMBDAT
SIO_RCIN#
JTAG_TDIJTAG_TDO
FAN1_PWM
THSEL_STRAP
IRQ_SERIRQ
+RTC_CELL_VBAT
JTAG_CLKJTAG_TMS
PCH_PLTRST#_ECCLK_PCI_MEC
BC_INT#_ECE5048BC_DAT_ECE5048BC_CLK_ECE5048
LPC_LFRAME#
USH_SMBCLK
CLK_PCI_MEC
POA_WAKE#
VCI_IN2#
DOCK_POR_RST#
SIO_SLP_S5#
FAN1_TACH
VSET_5075
THSEL_STRAP
JTAG_CLK
PCH_RSMRST#
PCH_ALW_ON
VOL_UP
MSDATA
DOCK_POR_RST#
EN_INVPWR
RESET_OUT#
VOL_DOWN
VOL_MUTE
DOCK_PWR_SW#
ALWON
THERMATRIP2#
REM_DIODE2_P
REM_DIODE4_N
VCI_IN2#
VOL_MUTE_R
PCH_PCIE_WAKE#
BOARD_ID
DOCK_SMB_DAT
AC_PRESENT
MSDATA
ACAV_IN
USH_SMBDAT
PCIE_WAKE#
VOL_UP_R
FWP#
REM_DIODE1_P
VSET_5075
CHARGER_SMBDAT
RUNPWROK
SYSTEM_ID
REM_DIODE2_N
PECI_EC_RPECI_EC_R
1.35V_SUS_PWRGD
REM_DIODE1_N
HOST_DEBUG_TX
CHARGER_SMBCLK
DOCK_SMB_CLK
HOST_DEBUG_RX
PM_APWROKRESET_OUT#
DDR_HVREF_RST_GATE
PS_ID
SIO_PWRBTN#
POWER_SW_IN#
EN_INVPWRPCH_SATA_MOD_EN#
REM_DIODE4_P
BOARD_ID
1.05V_A_PWRGDCLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
BEEP
ACAV_IN_NB
POA_WAKE#
DOCK_PWR_SW#
VOL_DOWN_R
ALW_PWRGD_3V_5V
REM_DIODE1_N
REM_DIODE1_P
REM_DIODE2_P
REM_DIODE2_N
REM_DIODE4_P
REM_DIODE4_N
THERMATRIP2#
CARD_SMBCLK
BAY_SMBCLK
DEVICE_DET#
A_ON
GPU_SMBDATGPU_SMBCLK
BAY_SMBDAT
CARD_SMBDAT
A_ON
LCD_SMBCLK
LCD_SMBDAT
BAY_SMBCLK
BAY_SMBDAT
DDR_HVREF_RST_GATE
FAN1_PWM
FAN1_TACH
THERMATRIP3#
THERMATRIP3#
RUNPWROK
RUN_ON#
DEVICE_DET#
HOST_DEBUG_RX
FAN1_PWMFAN1_TACH
LCD_SMBDATLCD_SMBCLK
HOST_DEBUG_TXMSCLKJTAG_CLKJTAG_TDI
CARD_SMBDATGPU_SMBDATGPU_SMBCLKCARD_SMBCLK
LAN_WAKE#
VOL_UP_R
VOL_DOWN_R
VOL_MUTE_R
+3.3V_ALW
+3.3V_ALW
+RTC_CELL
+3.3V_ALW
+RTC_CELL
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+1.05V_RUN
+RTC_CELL
+RTC_CELL
+1.05V_RUN
+3.3V_RUN
+3.3V_ALW
+3.3V_ALW2
+3.3V_ALW_U38
+5V_RUN
+1.05V_RUN
+3.3V_ALW
+3.3V_ALW +3.3V_ALW_U38
+3.3V_RUN
+3.3V_ALW
+5V_RUN
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW_U38
POWER_SW#_MB <40,9> DOCK_PWR_BTN# <34>
H_PROCHOT# <46,47,48,9>
LPC_LAD1<25,29,36,7>LPC_LAD2<25,29,36,7>LPC_LAD3<25,29,36,7>
LPC_LAD0<25,29,36,7>
SIO_EXT_SCI#<12>CLKRUN#<10,29,36,9>
PCIE_WAKE# <31>
DOCK_POR_RST#<34>
EC_32KHZ_ECE5048<36>
PCH_RSMRST# <38>
DYN_TUR_CURRNT_SET# <47>
AC_PRESENT <12,9>
SML1_SMBDATA<7>SML1_SMBCLK<7>
PS_ID <41>
MSCLK <31>MSDATA <31>
SIO_PWRBTN# <9>
PCH_PCIE_WAKE# <9>
VOL_MUTE <40>
CLK_KBD<34>DAT_KBD<34>
VOL_UP <40>
DOCK_SMB_DAT <34>DOCK_SMB_CLK <34>
ALWON <42>
ME_SUS_PWR_ACK <9>
HOST_DEBUG_TX <31>
1.35V_SUS_PWRGD <43>
DAT_MSE<34>CLK_MSE<34>
PECI_EC <9>
PM_APWROK <9>
BC_CLK_ECE1117<38>
PCH_ALW_ON<39>
BC_DAT_ECE1117<38>
BC_INT#_ECE1117<38>
RESET_OUT# <15,9>
BIA_PWM_EC<22>
SIO_EXT_SMI#<12>
PBAT_SMBDAT<41>PBAT_SMBCLK<41>
SIO_RCIN#<12>
RUNPWROK <36,9>
IRQ_SERIRQ<12,29,36>
EN_INVPWR <22>
PCH_PLTRST#_EC<25,29,31,36,9>
CHARGER_SMBCLK <47>CHARGER_SMBDAT <47>
CLK_PCI_MEC<7>
BC_DAT_ECE5048<36>BC_INT#_ECE5048<36>
BC_CLK_ECE5048<36>
LPC_LFRAME#<25,29,36,7>
USH_SMBDAT <29>USH_SMBCLK <29>
VOL_DOWN <40>
ALW_PWRGD_3V_5V <42>
V_SYS <47>
H_THERMTRIP#<12>
A_ON<39,44>
BEEP<26>SIO_SLP_S5#<9>
1.05V_A_PWRGD <44>
ACAV_IN <47,48>
ACAV_IN_NB<47,48>
CLK_TP_SIO<38>DAT_TP_SIO<38>
RUN_ON<26,36,39>
EC5048_TX <31,36>
VCP <47>
SLICE_PERF_EN <48>
SIO_SLP_S0# <9>
LAN_WAKE# <12,28>
EC_WAKE#<12>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
KBC & SIO MEC5075
37 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
KBC & SIO MEC5075
37 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P0.3
KBC & SIO MEC5075
37 59Friday, May 17, 2013
Compal Electronics, Inc.
JDEG1
ACES_50521-01041-P01
CONN@JDEG1
ACES_50521-01041-P01
CONN@
44
33
22
11
66
55
GND111GND212
7788991010
U38
MEC5075-LZY_DQFN132_11X11~D
U38
MEC5075-LZY_DQFN132_11X11~D
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA/GANG_BUSYA5
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK/GANG_ERRORB6
GPIO011/nSMI/GANG_DATA0A6
GPIO030/GPTP-IN2/BCM_E_INT#B19 GPIO031/GPTP-OUT2/BCM_E_DATA18 GPIO032/BCM_E_CLKB20
GPIO045/LSBCM_D_INT#A19 GPIO046/LSBCM_D_DATB21 GPIO047/LSBCM_D_CLKA20
GPIO061/LPCPD#A27
GPIO024/THSEL_STRAPB29
SER_IRQA28
LRESET#B30
GPIO100/NEC_SCIA33
GPIO110/PS2_CLK2/GPTP-IN6A37
GPIO111/PS2_DAT2/GPTP-OUT6B40
GPIO160/32KHZ_OUTB62
XTAL1A61
XTAL2A62
GPIO112/PS2_CLK1AA38
GPIO113/PS2_DAT1AB41
GPIO114/PS2_CLK0AA39
GPIO115/PS2_DAT0AB42
GPIO154/I2C1C_DATA/PS2_CLK1BB59
GPIO155/I2C1C_CLK/PS2_DAT1BA56
GPIO145/I2C1K_DATA/JTAG_TDIA51
GPIO146/I2C1K_CLK/JTAG_TDOB55
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLKB56
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMSA53
GPIO156/LED0B57
GPIO050/FAN_TACH1/GTACHB22
GPIO051/FAN_TACH2A21
GPIO052/FAN_TACH3B23
GPIO053/PWM0B24
GPIO054/PWM1A23
GPIO055/PWM2B25
GPIO056/PWM3/GPWMA24
GPIO121/BCM_A_INT#A42 GPIO122/BCM_A_DATB45 GPIO123/BCM_A_CLKA43
PCI_CLKA29
LFRAME#B31
LAD0A30
LAD1B32
LAD2A31
LAD3B33
CLKRUN#A32
GPIO001/ECSPI_CS1B2
GPIO015/GPTP-OUT7/GANG_DATA3A8
GPIO016/GPTP-IN8/GANG_DATA4B9
GPIO017/GPTP-OUT8A9
GPIO020/RC_ID2B10GPIO021/RC_ID1A10
VCC_PWRGDB26
GPIO060/KBRST/BCM_B_INT#A25
GPIO101/ECGP_SCLK/GANG_DATA5B36
GPIO102/BCM_C_INT#/GANG_DATA6A34
GPIO103/ECGP_MISO/GANG_DATA7B37
GPIO104A35
GPIO105/ECGP_MOSIB38
GPIO106A36
GPIO107/NRESET_OUTB39
GPIO116/MSDATA/V2P_COUT_LO/TAP_SEL_STRAPA40
GPIO117/MSCLK/V2P_COUT_HIB43
GPIO120/UART_TXB44
GPIO124/GPTP-OUT5/UART_RXB46
GPIO125/GPTP-IN5A44
GPIO126B47
GPIO127/A20MA45
PROCHOT_IN#/PROCHOT_IO#A46
GPIO151/GPTP-IN4A54
GPIO152/GPTP-OUT4B58
GPIO153/LED2A55
JTAG_RST#A57
NFWPB65
VBATB64
H_VTRA22
PECI_DATA48VREF_PECIB51
VCI_OVRD_INA64
VCI_IN3#B68
GPIO003/I2C1A_DATA/GANG_MODEA3
GPIO004/I2C1A_CLK/GANG_STARTB4
GPIO005/I2C1B_DATA/BCM_B_DAT/GANG_STROBEA4
GPIO006/I2C1B_CLK/BCM_B_CLK/GANG_FULLB5
GPIO012/I2C1H_DATA/I2C2D_DATA/GANG_DATA1B7
GPIO013/I2C1H_CLK/I2C2D_CLK/GANG_DATA2A7
GPIO130/I2C2A_DATA/BCM_C_DATB48
GPIO131/I2C2A_CLK/BCM_C_CLKB49
GPIO132/I2C1G_DATAA47
GPIO140/I2C1G_CLKB50
GPIO141/I2C1F_DATA/I2C2B_DATAB52
GPIO142/I2C1F_CLK/I2C2B_CLKA49
GPIO143/I2C1E_DATAB53
GPIO144/I2C1E_CLKA50
SYSPWR_PRESA59
VCI_IN2#B63
VCI_OUTA60
VCI_IN1#A63VCI_IN0#B67
VTR_ADCA58
GPIO157/LED1B1
GPIO027/GPTP-OUT1A1
DN1-THERMB13
DP1-VREF_TA13
VSETA17
DN2B14
DP2A14
VINB15
DN3A15
DP3B16
VCPA12
DN4A16
DP4B17
THERMTRIP2#B34
GPIO002/THERMTRIP3#A2
VTRB3
VTRA11
VTRA26
VTRB35
VTRA41
VTRA52
AG
ND
B66
VS
SB
11
VS
S_A
DC
B60
VR
_C
AP
B12
VS
S_R
OB
54
H_V
SS
B18
EP
C1
GPIO026/GPTP-IN1B28
GPIO025/UART_CLKB27
V_ISYSB61
GPIO014/GPTP-IN7/RC_ID3B8
R345 2.2K_0402_5%R345 2.2K_0402_5%1 2
R3612.2K_0402_5% R3612.2K_0402_5%12
R368 100K_0402_5%R368 100K_0402_5%1 2
R385
10K
_0402_5%
R385
10K
_0402_5%
12
R399
10K
_0402_5%
@R
399
10K
_0402_5%
@
12
R490 0_0402_5%@R490 0_0402_5%@1 2
R394
1.5
8K
_0402_1%
R394
1.5
8K
_0402_1%
12
R338 10K_0402_5%R338 10K_0402_5%1 2
R365100K_0402_5% R365100K_0402_5%12
C343
1U
_0402_6.3
V6K
C343
1U
_0402_6.3
V6K
1
2
PJP7
PAD-OPEN1x1m
PJP7
PAD-OPEN1x1m
1 2
R346100K_0402_5% R346100K_0402_5%12
R4522.2K_0402_5% R4522.2K_0402_5%12
R344 100K_0402_5%R344 100K_0402_5%1 2
C345
0.1
U_0402_25V
6C
345
0.1
U_0402_25V
6
1
2
R364100K_0402_5% R364100K_0402_5%12
C354
0.1
U_0402_25V
6C
354
0.1
U_0402_25V
6
1
2
C359 2200P_0402_50V7KC359 2200P_0402_50V7K1 2
R347100K_0402_5% R347100K_0402_5%12
R403 2.2K_0402_5%R403 2.2K_0402_5%1 2
R353100K_0402_5% R353100K_0402_5%12
R357 4.7K_0402_5%R357 4.7K_0402_5%1 2
R40110K_0402_5% R40110K_0402_5%12
T123PAD~D @T123PAD~D @
R381 4.7K_0402_5%R381 4.7K_0402_5%1 2
R342
100K
_0402_5%
@R
342
100K
_0402_5%
@
12
R369 100K_0402_5%R369 100K_0402_5%1 2
R352 10K_0402_5%R352 10K_0402_5%1 2
E
B
C
Q13
MMBT3904WT1G_SC70-3~DE
B
C
Q13
MMBT3904WT1G_SC70-3~D
2
31
G
S
D
Q5B
DM
N66D
0LD
W-7
_S
OT
363-6
G
S
D
Q5B
DM
N66D
0LD
W-7
_S
OT
363-6
61
2
R4532.2K_0402_5% R4532.2K_0402_5%12
R400 0_0402_5%@R400 0_0402_5%@1 2
R380
100K
_0402_5%
R380
100K
_0402_5%
12
C352
1U
_0402_6.3
V4Z
C352
1U
_0402_6.3
V4Z
1
2
RP1
10K_8P4R_5%
RP1
10K_8P4R_5%
1 82 73 64 5
R398
100K
_0402_5%
@R
398
100K
_0402_5%
@
12
R348 10K_0402_5%R348 10K_0402_5%1 2
R375 43_0402_5%R375 43_0402_5%1 2
C348
10U
_0603_6.3
V6M
C348
10U
_0603_6.3
V6M
1
2
R393
10K
_0402_5%
R393
10K
_0402_5%
12
R343 100K_0402_5%R343 100K_0402_5%1 2
R379 0_0402_5%@R379 0_0402_5%@1 2
Y432.768KHZ_12.5PF_Q13FC1350000~D
Y432.768KHZ_12.5PF_Q13FC1350000~D
1 2
C344
1U
_0402_6.3
V6K
C344
1U
_0402_6.3
V6K
1
2
R36
100K
_0402_5%
R36
100K
_0402_5%
12
R408 10K_0402_5%R408 10K_0402_5%1 2
R335
10K
_0402_5%
@R
335
10K
_0402_5%
@12
R388
49.9
_0402_1%
R388
49.9
_0402_1%
12
C365
22P
_0402_50V
8J
C365
22P
_0402_50V
8J
1
2
R356 4.7K_0402_5%R356 4.7K_0402_5%1 2
RP3
2.2K_0804_8P4R_5%
RP3
2.2K_0804_8P4R_5%
18273645
R4512.2K_0402_5% R4512.2K_0402_5%12
C347
1U
_0402_6.3
V4Z
C347
1U
_0402_6.3
V4Z
1
2
R3592.2K_0402_5% R3592.2K_0402_5%12
R371 100K_0402_5%R371 100K_0402_5%1 2
S
GD
Q5A
DM
N66D
0LD
W-7
_S
OT
363-6
S
GD
Q5A
DM
N66D
0LD
W-7
_S
OT
363-6
5
34
R336 0_0402_5%@ R336 0_0402_5%@1 2
C342
1U_0402_6.3V6K
@C342
1U_0402_6.3V6K
@1 2
C340
1U_0402_6.3V6K
@C340
1U_0402_6.3V6K
@1 2
R373 8.2K_0402_5%@R373 8.2K_0402_5%@1 2
C361 2200P_0402_50V7KC361 2200P_0402_50V7K1 2
C372
100P
_0402_50V
8J
@C
372
100P
_0402_50V
8J
@ 1
2
D1
RB
751V
40_S
C76-2
@D1
RB
751V
40_S
C76-2
@
21
R377 10K_0402_5%R377 10K_0402_5%1 2
R354 4.7K_0402_5%R354 4.7K_0402_5%1 2
R358 100K_0402_5%@ R358 100K_0402_5%@1 2
C368
4700P
_0402_25V
7K
C368
4700P
_0402_25V
7K
1
2
R386
1K
_0402_5%
R386
1K
_0402_5%
12
C371
0.1
U_0402_25V
6C
371
0.1
U_0402_25V
6
1
2
JTA
G1
@S
HO
RT
PA
DS
~D
CO
NN
@JT
AG
1@
SH
OR
T P
AD
S~
DC
ON
N@
11
22
C455 0.1U_0402_25V6EMC@ C455 0.1U_0402_25V6EMC@1 2
R372 100K_0402_5%R372 100K_0402_5%1 2
G
D
S
Q9
L2N7002WT1G_SC-70-3
@G
D
S
Q9
L2N7002WT1G_SC-70-3
@2
13
R340 10K_0402_5%R340 10K_0402_5%1 2
R362 100K_0402_5%@ R362 100K_0402_5%@1 2
R397
10K
_0402_5%
R397
10K
_0402_5%
12
C369
4700P
_0402_25V
7K
C369
4700P
_0402_25V
7K
1
2
E
B
C
Q12MMST3904-7-F_SOT323-3
E
B
C
Q12MMST3904-7-F_SOT323-3
2
31
C364
22P
_0402_50V
8J
C364
22P
_0402_50V
8J
1
2
R367 1K_0402_5%R367 1K_0402_5%1 2
JFAN1
ACES_50277-0040N-001
CONN@JFAN1
ACES_50277-0040N-001
CONN@
44
112233
GND15 GND26
R349 10K_0402_5%R349 10K_0402_5%1 2
C358 2200P_0402_50V7KC358 2200P_0402_50V7K1 2
R382
10_0402_1%
@R
382
10_0402_1%
@
12
R360 100K_0402_5%@ R360 100K_0402_5%@1 2
R328
100K
_0402_5%
R328
100K
_0402_5%
12
R363100K_0402_5% R363100K_0402_5%12
C350
0.1
U_0402_25V
6C
350
0.1
U_0402_25V
6
1
2
C349
0.1
U_0402_25V
6
@C349
0.1
U_0402_25V
6
@1
2
C456 0.1U_0402_25V6EMC@ C456 0.1U_0402_25V6EMC@1 2
C356
0.1
U_0402_25V
6C
356
0.1
U_0402_25V
6
1
2
R383 1K_0402_5%R383 1K_0402_5%1 2
C370
100P
_0402_50V
8J
@C
370
100P
_0402_50V
8J
@
1
2
C367
0.1
U_0402_25V
6C
367
0.1
U_0402_25V
6
1
2
C353
0.1
U_0402_25V
6C
353
0.1
U_0402_25V
6
1
2
R366 10K_0402_5%R366 10K_0402_5%1 2
C360
0.1
U_0402_25V
6C
360
0.1
U_0402_25V
6
1
2
E
B
C
Q11
MMBT3904WT1G_SC70-3~DE
B
C
Q11
MMBT3904WT1G_SC70-3~D
2
31
R350 10K_0402_5%R350 10K_0402_5%1 2
R392
1K
_0402_5%
R392
1K
_0402_5%
12
C355
0.1
U_0402_25V
6C
355
0.1
U_0402_25V
6
1
2
R376 10K_0402_5%R376 10K_0402_5%1 2
R374 0_0402_5%@R374 0_0402_5%@1 2
E
B
C
Q14
MMBT3904WT1G_SC70-3~DE
B
C
Q14
MMBT3904WT1G_SC70-3~D
2
31
C351
0.1
U_0402_25V
6C
351
0.1
U_0402_25V
6
1
2
R402
8.2
K_0402_5%
R402
8.2
K_0402_5%
12
R391
10K
_0402_5%
R391
10K
_0402_5%
12
C7
22U
_0805_6.3
V6M
C7
22U
_0805_6.3
V6M
1
2
C366
4.7
U_0603_6.3
V6K
C366
4.7
U_0603_6.3
V6K
1
2
C357
0.1
U_0402_25V
6C
357
0.1
U_0402_25V
6
1
2
R355 4.7K_0402_5%R355 4.7K_0402_5%1 2
C457 0.1U_0402_25V6EMC@ C457 0.1U_0402_25V6EMC@1 2
R334 0_0402_5%@R334 0_0402_5%@1 2
C373
100P
_0402_50V
8J
@C
373
100P
_0402_50V
8J
@
1
2
R327
100K
_0402_5%
R327
100K
_0402_5%
12
R339 2.2K_0402_5%R339 2.2K_0402_5%1 2
C346
0.1
U_0402_25V
6C
346
0.1
U_0402_25V
6
1
2
R378 0_0402_5%@R378 0_0402_5%@12
R332 0_0402_5%@R332 0_0402_5%@1 2
R384
100_0402_1%
@R384
100_0402_1%
@
12
C362
1U
_0402_6.3
V6K
C362
1U
_0402_6.3
V6K
1
2
R35
10K
_0402_5%
R35
10K
_0402_5%
12
R370
100K
_0402_5%
R370
100K
_0402_5%
12
R330 10K_0402_5%R330 10K_0402_5%1 2
R329 10K_0402_5%R329 10K_0402_5%1 2
R3872.2K_0402_5% R3872.2K_0402_5%12
C363
4.7
P_0402_50V
8C
@C
363
4.7
P_0402_50V
8C
@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Touch Pad
RSMRST circuit
Place close to JKBTP1
EC SIDE
change to E4 solution
EMI depop location(EMC) EMI depop location(EMC)
ST change to 6718K-Y16N-01L
TP_DATA
TP_CLK
KB_DET#
RSMRST#+5V_ALW_U41
TP_DATATP_CLK
+3.3V_TP
+5V_RUN+3.3V_ALW
+3.3V_TP
+5V_RUN+3.3V_ALW
+3.3V_TP
+3.3V_ALW+3.3V_ALW
+3.3V_RUN +3.3V_TP
+5V_ALW
BC_CLK_ECE1117<37>
BC_INT#_ECE1117<37>BC_DAT_ECE1117<37>
KB_DET#<12,9>
PCH_RSMRST#<37>PCH_RSMRST#_Q <9>
I2C1_SDA_TCH_PAD<12>
DAT_TP_SIO<37>
CLK_TP_SIO<37>
I2C1_SCL_TCH_PAD<12>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
KB/TP/RSMRST
38 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
KB/TP/RSMRST
38 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
KB/TP/RSMRST
38 59Friday, May 17, 2013
Compal Electronics, Inc.
R449 0_0402_5%@R449 0_0402_5%@
1 2
JKBTP1CONN@
E-T_6718K-Y16N-01L
JKBTP1CONN@
E-T_6718K-Y16N-01L
11 22 33 44 55 66
GND117 GND218
77 88 99 10
10 1111 1212 1313 1414 1515 1616
Part Number Description
NBX0001CV00 FFC 16P F P0.5 PAD=0.3 104.4MM MB-KBTP
TP_FFC@
Part Number Description
NBX0001CV00 FFC 16P F P0.5 PAD=0.3 104.4MM MB-KBTP
TP_FFC@
C3
77
10
P_
04
02
_5
0V
8J
@C3
77
10
P_
04
02
_5
0V
8J
@1
2
C386
0.1U_0402_25V6
@C386
0.1U_0402_25V6
@1 2
C3
87
.01
U_
04
02
_1
6V
7K
C3
87
.01
U_
04
02
_1
6V
7K
1
2
Part Number Description
DC02001PA00 H-CONN SET 0VM MB-EDP-LED-CAM-TS
eDP Cable (40P Touch Screen)@
Part Number Description
DC02001PA00 H-CONN SET 0VM MB-EDP-LED-CAM-TS
eDP Cable (40P Touch Screen)@
R41133_0402_5%R41133_0402_5%
12
Part Number Description
GC20323MX00 BATT CR2032 3V
220MAH MAXELL
RTC BATT@
Part Number Description
GC20323MX00 BATT CR2032 3V
220MAH MAXELL
RTC BATT@
R4
04
4.7
K_
04
02
_5
%R
40
44
.7K
_0
40
2_
5%
12
Part Number Description
NBX0001CX00 FFC 6P G P0.5 PAD=0.3 86.4MM USH/B-FP
FP FFC@
Part Number Description
NBX0001CX00 FFC 6P G P0.5 PAD=0.3 86.4MM USH/B-FP
FP FFC@
C3
79
10
P_
04
02
_5
0V
8J
@C3
79
10
P_
04
02
_5
0V
8J
@1
2
[email protected]_0402_25V6@
1
2
R441 0_0402_5%@R441 0_0402_5%@
1 2
Part Number Description
DC02001P900 H-CONN SET 0VM MB-SNIFFER
Sniffer cable@
Part Number Description
DC02001P900 H-CONN SET 0VM MB-SNIFFER
Sniffer cable@
R413 0_0402_5%@R413 0_0402_5%@
1 2
Part Number Description
NBX0001CT00 FFC 20P G P0.5 PAD=0.3 33.5MM MB-USH/B
USH FFC@
Part Number Description
NBX0001CT00 FFC 20P G P0.5 PAD=0.3 33.5MM MB-USH/B
USH FFC@
R450 0_0402_5%@R450 0_0402_5%@
1 2
R4
05
4.7
K_
04
02
_5
%R
40
54
.7K
_0
40
2_
5%
12
[email protected]_0402_25V6@
1
2
Part Number Description
NBX0001CU00 FFC 15P F P0.5 PAD=0.3 56.01MM MB-NFC
NFC board _FFC@
Part Number Description
NBX0001CU00 FFC 15P F P0.5 PAD=0.3 56.01MM MB-NFC
NFC board _FFC@
Part Number Description
DC020014Z10 H-CONN SET 0FD M/B-BATTERY 9PIN
Battery bridge cable@
Part Number Description
DC020014Z10 H-CONN SET 0FD M/B-BATTERY 9PIN
Battery bridge cable@
Part Number Description
DC02001PB00 H-CONN SET 0VM MB-EDP-LED-CAM
eDP Cable (30P Normal)@
Part Number Description
DC02001PB00 H-CONN SET 0VM MB-EDP-LED-CAM
eDP Cable (30P Normal)@
R444 0_0402_5%@R444 0_0402_5%@
1 2
Part Number Description
NBX0001CS00 FFC 8P G P0.5 PAD=0.3 51.8MM MB-MEDIA/B
Media Board FFC@
Part Number Description
NBX0001CS00 FFC 8P G P0.5 PAD=0.3 51.8MM MB-MEDIA/B
Media Board FFC@
R4
40
10
K_
04
02
_5
%
R4
40
10
K_
04
02
_5
%
12
PJP8
PAD-OPEN1x1m
PJP8
PAD-OPEN1x1m
1 2
Part Number Description
NBX0001CR00 FFC 12P G P0.5 PAD=0.3 73.3MM MB-SIM+HALL/B
SIM Board FFC + Hall Sensor FFC@
Part Number Description
NBX0001CR00 FFC 12P G P0.5 PAD=0.3 73.3MM MB-SIM+HALL/B
SIM Board FFC + Hall Sensor FFC@
C3
80
10
P_
04
02
_5
0V
8J
@C3
80
10
P_
04
02
_5
0V
8J
@1
2
U41
RT9818A-44GU3_SC70-3~D
U41
RT9818A-44GU3_SC70-3~D
VCC1
GND2 RESET#
3
C3
78
10
P_
04
02
_5
0V
8J
@C3
78
10
P_
04
02
_5
0V
8J
@1
2
Part Number Description
DC30100BN0 CONN SET 0FD DCJACK-MB WDMD-DCE30004-DF
UMA DC_IN wire cable@
Part Number Description
DC30100BN0 CONN SET 0FD DCJACK-MB WDMD-DCE30004-DF
UMA DC_IN wire cable@
U42
TC7SH08FU_SSOP5~D
U42
TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
R4140_0402_5%
@R4140_0402_5%
@
1 2
[email protected]_0402_25V6@
1
2
Part Number Description
PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG
Speak@
Part Number Description
PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG
Speak@
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DC/DC Interface+3.3V_ALW_PCH/+1.05V_RUN source
+3.3V_SUS/+3.3V_M source
+3.3V_RUN/+5V_RUN source
+1.05V_MODPHY
+5V_RUN_U46
RUN_ON
SIO_SLP_S3#
+3.3V_RUN_U46
+3.3V_M_U45
+3.3V_SUS_U45
+3.3V_ALW_PCH_U43
RUN_ON
SIO_SLP_S3#
+1.05V_RUN_U43
MPHYP_PWR_EN#
1.05V_MODPHY_EN
+5V_ALW
+5V_RUN
+3.3V_RUN+3.3V_ALW
+3.3V_SUS
+3.3V_M+3.3V_ALW
+5V_ALW
+3.3V_ALW_PCH
+5V_ALW
+3.3V_ALW
+1.05V_RUN+1.05V_M
+3.3V_ALW2
+5V_ALW+1.05V_M +1.05V_MODPHY
SUS_ON<36,43>
SIO_SLP_S4#<36,43,9>
A_ON<37,44>
SIO_SLP_A#<36,44,9>
PCH_ALW_ON<37>
RUN_ON<26,36,37>
SIO_SLP_S3#<36,43,9>
USH_PWR_ON<36>MPHYP_PWR_EN<12>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
POWER CONTROL
39 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
POWER CONTROL
39 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
POWER CONTROL
39 59Friday, May 17, 2013
Compal Electronics, Inc.
R425 0_0402_5%@R425 0_0402_5%@
1 2
U45
TPS22966DPUR_SON14_2X3~D
U45
TPS22966DPUR_SON14_2X3~D
GND11
VIN26
VBIAS4
ON25
VOUT29
VIN27
CT112
VOUT114
VOUT28
VOUT113
VIN12
ON13
VIN11
CT210
GPAD15 PJP17 PAD-OPEN1x1mPJP17 PAD-OPEN1x1m
12
R417 0_0402_5%@R417 0_0402_5%@
1 2
R418 0_0402_5%@R418 0_0402_5%@
1 2
R439 0_0402_5%@R439 0_0402_5%@
1 2
C390 470P_0402_50V7KC390 470P_0402_50V7K
1 2
R4
45
10
K_
04
02
_5
%R
44
51
0K
_0
40
2_
5%1
2
C391 470P_0402_50V7KC391 470P_0402_50V7K
1 2
C4
12
22
00
P_
04
02
_5
0V
7K
C4
12
22
00
P_
04
02
_5
0V
7K
1
2
R420 0_0402_5%@R420 0_0402_5%@
1 2
R416 0_0402_5%@R416 0_0402_5%@
1 2
C401470P_0402_50V7K
C401470P_0402_50V7K
1 2
R426 0_0402_5%@R426 0_0402_5%@
1 2
C399
0.1U_0402_10V7K
C399
0.1U_0402_10V7K
1
2
S
G
D
Q125
SI3456DDV-T1-GE3_TSOP6
S
G
D
Q125
SI3456DDV-T1-GE3_TSOP6
3
6
245
1
C398470P_0402_50V7K
C398470P_0402_50V7K
1 2
R422 0_0402_5%@R422 0_0402_5%@
1 2
G
S
D
Q1
24
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
G
S
D
Q1
24
BD
MN
66
D0
LD
W-7
_S
OT
36
3-6
61
2
C4021000P_0402_50V7K
C4021000P_0402_50V7K
1 2
U43
TPS22966DPUR_SON14_2X3~D
U43
TPS22966DPUR_SON14_2X3~D
GND11
VIN26
VBIAS4
ON25
VOUT29
VIN27
CT112
VOUT114
VOUT28
VOUT113
VIN12
ON13
VIN11
CT210
GPAD15
R423 0_0402_5%@R423 0_0402_5%@
1 2
C389 0.1U_0402_10V7KC389 0.1U_0402_10V7K
1 2
S
GD Q
12
4A
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6
S
GD Q
12
4A
DM
N6
6D
0L
DW
-7_
SO
T3
63
-6
53
4
C4
13
10
U_
06
03
_6
.3V
6M
C4
13
10
U_
06
03
_6
.3V
6M
1
2
U46
TPS22966DPUR_SON14_2X3~D
U46
TPS22966DPUR_SON14_2X3~D
GND11
VIN26
VBIAS4
ON25
VOUT29
VIN27
CT112
VOUT114
VOUT28
VOUT113
VIN12
ON13
VIN11
CT210
GPAD15
PJP18
PAD-OPEN1x1m
PJP18
PAD-OPEN1x1m
12
PJP14
PAD-OPEN1x1m
PJP14
PAD-OPEN1x1m
12
R4
42
10
0K
_0
40
2_
5%
R4
42
10
0K
_0
40
2_
5%1
2
C403
0.1U_0402_10V7K
C403
0.1U_0402_10V7K
1
2
C397470P_0402_50V7K
C397470P_0402_50V7K
1 2
R421 0_0402_5%@R421 0_0402_5%@
1 2
R4
47
20
K_
04
02
_5
%@
R4
47
20
K_
04
02
_5
%@
12
PJP19 PAD-OPEN1x1mPJP19 PAD-OPEN1x1m
12
PJP15 PAD-OPEN1x1mPJP15 PAD-OPEN1x1m
12
C393
0.1U_0402_10V7K
C393
0.1U_0402_10V7K
1
2
PJP16
PAD-OPEN1x1m
PJP16
PAD-OPEN1x1m
12
C400 0.1U_0402_10V7KC400 0.1U_0402_10V7K
1 2
R424 0_0402_5%@R424 0_0402_5%@
1 2
C396 0.1U_0402_10V7KC396 0.1U_0402_10V7K
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
WLAN LED solution for White LEDPlace LED1 close to SW1
Fiducial Mark
SYS_LED_MASK# LID_CL#
Mask All LEDs (Sniffer Function)
Mask Base MB LEDs (Lid Closed)
0
1 0
X
LED Circuit Control Table
Do not Mask LEDs (Lid Opened) 11
HDD LED solution for White LEDBattery LED
Breath LED
POWER & INSTANT ON SWITCH
LED(white) current need to reach 2mA,
need to check current limit resistor
ST update symbol to 6718K-Y06N-01L
BREATH_WHITE_LED_SNIFFBREATH_LED#_Q
MASK_BASE_LEDS#
MASK_BASE_LEDS#SYS_LED_MASK#
WLAN_LED
MASK_BASE_LEDS#
MASK_BASE_LEDS#SATA_LED
BAT1_LED#_Q
BAT2_LED#_Q
MASK_BASE_LEDS#
MASK_BASE_LEDS#
BATT_WHITE#
BATT_YELLOW#
SYS_LED_MASK#
+5V_ALW
+3.3V_ALW
+3.3V_ALW
+5V_ALW
+5V_ALW
+3.3V_ALW
+5V_ALW +5V_ALW
BREATH_LED#<34,36>
BREATH_WHITE_LED# <22>
SYS_LED_MASK#<36>
LID_CL#<31,36>
WIRELESS_LED#<31,36>
SATA_ACT#<6>
LED_SATA_DIAG_OUT#<36>
MASK_SATA_LED#<36>
BAT2_LED#<36>
BAT1_LED#<36>
BATT_WHITE_LED# <22>
BATT_YELLOW_LED# <22>
POWER_SW#_MB<37,9>
PANEL_HDD_LED# <22>
MASK_BASE_LEDS# <28>
VOL_UP<37>VOL_DOWN<37>VOL_MUTE<37>
+COINCELL<31,41>
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
PAD & ME & LED
40 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
PAD & ME & LED
40 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
PAD & ME & LED
40 59Friday, May 17, 2013
Compal Electronics, Inc.
SW1
SKRBAAE010_4P
SW1
SKRBAAE010_4P
1
3
2
4
H8H_3P4@ H8H_3P4@
1
LED6
LTW-193ZDS5_WHITE
LED6
LTW-193ZDS5_WHITE
2 1
H5H_2P3@ H5H_2P3@
1
ST1CLIP_C5P1@ ST1CLIP_C5P1@
1
FD2
FIDUCIAL MARK~D
@ FD2
FIDUCIAL MARK~D
@1
S
GD
Q23A
DMN66D0LDW-7_SOT363-6
S
GD
Q23A
DMN66D0LDW-7_SOT363-6
5
34
G
S D
Q25BDMN66D0LDW-7_SOT363-6
G
S D
Q25BDMN66D0LDW-7_SOT363-6
61
2
H4H_2P8@ H4H_2P8@
1
R434 150_0402_5%R434 150_0402_5%1 2
H18H_2P8@ H18H_2P8@
1
H17H_2P8@ H17H_2P8@
1
FD3
FIDUCIAL MARK~D
@ FD3
FIDUCIAL MARK~D
@1
H10H_3P4@ H10H_3P4@
1
FD1
FIDUCIAL MARK~D
@ FD1
FIDUCIAL MARK~D
@1
JMEDIA
E-T_6718K-Y06N-01L
CONN@JMEDIA
E-T_6718K-Y06N-01L
CONN@
44
33
22
11
66
55
GND17GND28
H12H_2P8@ H12H_2P8@
1
H16H_2P8@ H16H_2P8@
1
R427 150_0402_5%R427 150_0402_5%1 2
R431150_0402_5%
R431150_0402_5%
1 2
H1H_2P8@ H1H_2P8@
1
G
S D
Q23B
DMN66D0LDW-7_SOT363-6
G
S D
Q23B
DMN66D0LDW-7_SOT363-661
2
H13H_2P8@ H13H_2P8@
1
LED1
LTW-193ZDS5_WHITE
LED1
LTW-193ZDS5_WHITE
21
R432100K_0402_5%R432100K_0402_5%
12
H14H_2P1@ H14H_2P1@
1
R436 330_0402_5%R436 330_0402_5%1 2
R438 220_0402_5%R438 220_0402_5%1 2
S
GD
Q28ADMN66D0LDW-7_SOT363-6
S
GD
Q28ADMN66D0LDW-7_SOT363-6
5
34
R429330_0402_5%R429330_0402_5%
1 2
Q16PDTA114EU_SC70-3Q16PDTA114EU_SC70-3
2
13
Q15PDTA114EU_SC70-3Q15PDTA114EU_SC70-3
2
13
R42810K_0402_5%R42810K_0402_5%
12
JRTC1
TYCO_2-1775293-2~D
@ JRTC1
TYCO_2-1775293-2~D
@
11
22
G4G3
FD4
FIDUCIAL MARK~D
@ FD4
FIDUCIAL MARK~D
@1
C404 0.1U_0402_25V6@ C404 0.1U_0402_25V6@1 2
R433150_0402_5%
R433150_0402_5%
1 2
U47
TC7SH08FU_SSOP5~D
U47
TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
H3H_2P8@ H3H_2P8@
1
G
S D
Q28BDMN66D0LDW-7_SOT363-6
G
S D
Q28BDMN66D0LDW-7_SOT363-6
61
2
H2H_2P8@ H2H_2P8@
1S
GD
Q24ADMN66D0LDW-7_SOT363-6
S
GD
Q24ADMN66D0LDW-7_SOT363-6
5
34
H15H_2P8@ H15H_2P8@
1
H9H_3P4@ H9H_3P4@
1
D24
RB751S40T1G_SOD523-2
D24
RB751S40T1G_SOD523-2
21
S
GD
Q25ADMN66D0LDW-7_SOT363-6
S
GD
Q25ADMN66D0LDW-7_SOT363-6
5
34
LED5
LTW-193ZDS5_WHITE
LED5
LTW-193ZDS5_WHITE
2 1
W
Y
LED7
LTW-295DSKS-5A_YEL-WHITE
W
Y
LED7
LTW-295DSKS-5A_YEL-WHITE
21
43D23
RB751S40T1G_SOD523-2
D23
RB751S40T1G_SOD523-2
21
Q26PDTA114EU_SC70-3Q26PDTA114EU_SC70-3
2
13
G
S D
Q24B
DMN66D0LDW-7_SOT363-6
G
S D
Q24B
DMN66D0LDW-7_SOT363-661
2
H11H_3P4@ H11H_3P4@
1
R435 150_0402_5%R435 150_0402_5%1 2
ST2H_2P8@ ST2H_2P8@
1
R430 150_0402_5%R430 150_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
DC_IN+ Source
COIN RTC Battery
Primary Battery Connector
change from 0603 to 0402 size PN: SM010028600
NB_PSID_TS5A63157
+DC_IN
NB_PSID
+DCIN_JACK
-DCIN_JACK
Z4012
PBATT+_C
Z4306Z4305Z4304
+3.3V_ALW
+5V_ALW
+DC_IN_SS+DC_IN
+5V_ALW
+COINCELL
+RTC_CELL
+3.3V_RTC_LDO
GND
+5V_ALW
+3.3V_ALW
GND
+PBATT
+COINCELL
PSID_DISABLE# <36>
DOCK_PSID<34> GPIO_PSID_SELECT <36>
PS_ID <37>
SOFT_START_GC <48>
PBAT_PRES# <36,48>
PBAT_SMBCLK <37>PBAT_SMBDAT <37>
DOCK_SMB_ALERT# <34,36,48>
SLICE_BAT_PRES#<34,36,48>
AC_DIS <36,48>
+COINCELL <31,40>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
+DCIN
41 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
+DCIN
41 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
+DCIN
41 58Friday, May 17, 2013
Compal Electronics, Inc.
PR933_0402_5%~D
PR933_0402_5%~D
1 2
PD
6
VZ
0603M
260A
PT
_0603
@
PD
6
VZ
0603M
260A
PT
_0603
@
1
2
PD1
TVNST52302AB0_SOT523-3
PD1
TVNST52302AB0_SOT523-3
2 31
PD5
DA204U_SOT323~D
@ PD5
DA204U_SOT323~D
@
231
PD4
SDMK0340L-7-F_SOD323-2~D
PD4
SDMK0340L-7-F_SOD323-2~D
1 2
PR8
2.2K_0402_5%~D
PR8
2.2K_0402_5%~D
12
PR7
0_0402_5%~D
@ PR7
0_0402_5%~D
@1 2
PC
7
0.1
U_0603_25V
7K
~D
@
PC
7
0.1
U_0603_25V
7K
~D
@
12
PQ6A
DCX124EK-7-F PNP/NPN_SC74-6~D
PQ6A
DCX124EK-7-F PNP/NPN_SC74-6~D
5
16
PL3BLM15AG102SN1D_2P
PL3BLM15AG102SN1D_2P
12
PR2
100K_0402_5%~D
PR2
100K_0402_5%~D
12
PR18
1M_0402_5%~D
PR18
1M_0402_5%~D
12
PR17
10K_0402_5%~D
PR17
10K_0402_5%~D
1 2
PR
14
1M
_0402_5%
~D
PR
14
1M
_0402_5%
~D
12
PR11
10K_0402_1%~D
PR11
10K_0402_1%~D
12
PC
50.0
22U
_0805_50V
7K
~D
PC
50.0
22U
_0805_50V
7K
~D
12
PC4
1500P_0402_7K~D
PC4
1500P_0402_7K~D
12
PC
91000P
_0603_50V
7K
~D
PC
91000P
_0603_50V
7K
~D 1
2PD3
BAS40CW SOT-323
PD3
BAS40CW SOT-323
231
PJPDC1
ACES_50299-00501-003
@ PJPDC1
ACES_50299-00501-003
@
1122334455
GND6GND7
E
B
C
PQ3MMST3904-7-F_SOT323~D
E
B
C
PQ3MMST3904-7-F_SOT323~D
2
31
PR11K_0402_5%~DPR11K_0402_5%~D
12
PC
10
10U
_0805_25V
6K
PC
10
10U
_0805_25V
6K
12
PD2
TVNST52302AB0_SOT523-3
PD2
TVNST52302AB0_SOT523-3
2 31
PL1
FBMJ4516HS720NT_2P~D
PL1
FBMJ4516HS720NT_2P~D1 2
PC
6
0.1
U_0603_25V
7K
~D
@
PC
6
0.1
U_0603_25V
7K
~D
@
12
PC
11
0.1
U_0603_25V
7K
~D
@
PC
11
0.1
U_0603_25V
7K
~D
@
12
PL4FBMJ4516HS720NT_2P~D
PL4FBMJ4516HS720NT_2P~D
1 2
PR13
10K_0402_5%~D
@ PR13
10K_0402_5%~D
@1 2
PRP2
100_0804_8P4R_5%
PRP2
100_0804_8P4R_5%
18273645
PR12
15K_0402_1%~D
PR12
15K_0402_1%~D
12
PJP1
PAD-OPEN 1x3m
PJP1
PAD-OPEN 1x3m
1 2
PC12
0.1U_0603_25V7K~D
@PC12
0.1U_0603_25V7K~D
@
12
PU111
TS5A63157DCKR_SC70-6~D
PU111
TS5A63157DCKR_SC70-6~D
V+5
NC3
COM4
GND2
IN6
NO1
PC11U_0603_10V4Z~DPC11U_0603_10V4Z~D
1
2PL2
FBMJ4516HS720NT_2P~D
PL2
FBMJ4516HS720NT_2P~D1 2
PQ6B
DC
X124E
K-7
-F P
NP
/NP
N_S
C74-6
~D
PQ6B
DC
X124E
K-7
-F P
NP
/NP
N_S
C74-6
~D
2
43
PC
8
0.1
U_0603_25V
7K
~D
@
PC
8
0.1
U_0603_25V
7K
~D
@
12
PR6
0_0402_5%
@ PR6
0_0402_5%
@
1 2
2
1 3
PQ1
ME2301D-G 1P SOT-23-3
2
1 3
PQ1
ME2301D-G 1P SOT-23-3
2
1 3
G
D S
PQ2FDV301N_G_NL_SOT23-3~DG
D S
PQ2FDV301N_G_NL_SOT23-3~D2
1 3
PC2
0.1U_0603_25V7K~D
@ PC2
0.1U_0603_25V7K~D
@
12
PBATT1
LLTOP_ALLTOP C144LS-109A9-L 9P BATT P2
@ PBATT1
LLTOP_ALLTOP C144LS-109A9-L 9P BATT P2
@
11
33
44
55
66
88
99
22
77
GND10
GND11
PC
32200P
_0402_50V
7K
~D
PC
32200P
_0402_50V
7K
~D
12
PR
16
4.7
K_0805_5%
~D
@P
R16
4.7
K_0805_5%
~D
@1
2
PR10
100K_0402_1%~D
PR10
100K_0402_1%~D
12
PR
15
100K
_0402_5%
~D
PR
15
100K
_0402_5%
~D1
2
PQ4
FDMC6679AZ_MLP8-5
PQ4
FDMC6679AZ_MLP8-5
3 52
4
1
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5VALWPTDC 4.88 APeak Current 6.89 AOCP Current 8.268 ARds(on):13.6m ohm (max)
3VALWPTDC 6.7 APeak Current 8.1 AOCP Current 9.72 ARds(on): 13.6m ohm (max)
LG_3V
EN
SW1
PGOOD_3V_5V
UG_5V
BST_5V
LG_5VEN
BST_3V
UG_3V
SW2
EN
+3.3V_ALW2
+DC1_PWR_SRC
+5V_ALWP
+DC1_PWR_SRC
+DC1_PWR_SRC
+3.3V_ALWP
+PWR_SRC
+5V_ALW2
+3.3V_RTC_LDO
+5V_ALWP
+3.3V_ALW
+5V_ALW
+3.3V_ALWP
+3.3V_ALW
ALWON<37>
ALW_PWRGD_3V_5V<37>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
+5V_ALW/3.3V_ALW
42 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
+5V_ALW/3.3V_ALW
42 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
+5V_ALW/3.3V_ALW
42 58Friday, May 17, 2013
Compal Electronics, Inc.
PC
10
04
.7U
_0
60
3_
10
V6
KP
C1
00
4.7
U_
06
03
_1
0V
6K
12
PR111
4.7_1206_5%
@ PR111
4.7_1206_5%
@
12
PC
11
91
U_
06
03
_1
0V
6K
@
PC
11
91
U_
06
03
_1
0V
6K
@
12
PC111
680P_0603_50V7K
@ PC111
680P_0603_50V7K
@ 12
TPS51285BRUKR QFN 20P
PU100
TPS51285BRUKR QFN 20P
PU100
CS
11
VF
B1
2
VR
EG
33
VF
B2
4
CS
25
EN26
PGOOD7
SW28
VBST29
DRVH210
DR
VL
21
1
VIN
12
VR
EG
51
3
VO114
DR
VL
11
5
DRVH116
VBST117
SW118
VCLK19
EN
12
0
PAD21
PC
10
21
0U
_0
80
5_
25
V6
KP
C1
02
10
U_
08
05
_2
5V
6K
12
PC
11
2
0.1
U_
06
03
_2
5V
7K
@
PC
11
2
0.1
U_
06
03
_2
5V
7K
@
12
PR10410K_0402_5%~D
PR10410K_0402_5%~D
12
PC1090.1U_0603_25V7K
PC1090.1U_0603_25V7K
1 2
PL1012.2UH_ETQP3W2R2WFN_8.5A_20%
PL1012.2UH_ETQP3W2R2WFN_8.5A_20%
12
PL1001UH_PCMB053T-1R0MS_7A_20%
PL1001UH_PCMB053T-1R0MS_7A_20%
12
PR10115K_0402_1%
PR10115K_0402_1%
12
PQ103
FDMC7692S_POWER33-8-5
PQ103
FDMC7692S_POWER33-8-5 35
2
4
1
PR106
16.9K_0402_1%
PR106
16.9K_0402_1%
12
PR112
4.7_1206_5%
@PR112
4.7_1206_5%
@
12
PR108
0_0402_5%
@ PR108
0_0402_5%
@
1 2
PQ102
FDMC7692S_POWER33-8-5
PQ102
FDMC7692S_POWER33-8-5
35
2
4
1
PC
10
41
0U
_0
80
5_
25
V6
K
@
PC
10
41
0U
_0
80
5_
25
V6
K
@
12
PR
10
3
0_
04
02
_5
%
@
PR
10
3
0_
04
02
_5
%
@
12
PR105
20K_0402_1%~D
PR105
20K_0402_1%~D
12
PQ101
FDMC8884_POWER33-8-5
PQ101
FDMC8884_POWER33-8-535
2
4
1
PC
10
52
20
0P
_0
40
2_
50
V7
K
@
PC
10
52
20
0P
_0
40
2_
50
V7
K
@
12
PC
10
10
.1U
_0
40
2_
25
V6
@
PC
10
10
.1U
_0
40
2_
25
V6
@
12
PR1102.2_0603_5%
PR1102.2_0603_5%1 2
PJP100
PAD-OPEN 1x3m
@ PJP100
PAD-OPEN 1x3m
@
1 2
PC
11
60
.1U
_0
60
3_
25
V7
K
@
PC
11
60
.1U
_0
60
3_
25
V7
K
@
12
PR114
200_0402_1%
PR114
200_0402_1%12
PR107
100K_0402_1%~D
PR107
100K_0402_1%~D
12
PC
10
80
.1U
_0
40
2_
25
V6
@
PC
10
80
.1U
_0
40
2_
25
V6
@
12
PR1006.49K_0402_1%~D
PR1006.49K_0402_1%~D
1 2
PC
10
71
0U
_0
80
5_
25
V6
KP
C1
07
10
U_
08
05
_2
5V
6K
12
PC1100.1U_0603_25V7K
PC1100.1U_0603_25V7K
1 2
PC
11
70
.1U
_0
60
3_
25
V7
KP
C1
17
0.1
U_
06
03
_2
5V
7K
12
+
PC
11
33
30
U_
D_
6.3
VM
_R
25
M
+
PC
11
33
30
U_
D_
6.3
VM
_R
25
M
1
2
PR1092.2_0603_5%
PR1092.2_0603_5%1 2
PR10210K_0402_5%~D
PR10210K_0402_5%~D
1 2
PJP101
PAD-OPEN 1x3m
PJP101
PAD-OPEN 1x3m
1 2
PC
10
62
20
0P
_0
40
2_
50
V7
K
@
PC
10
62
20
0P
_0
40
2_
50
V7
K
@
12
PC114
680P_0603_50V7K
@PC114
680P_0603_50V7K
@
12
PQ100
FDMC8884_POWER33-8-5
PQ100
FDMC8884_POWER33-8-5
35
2
4
1
PL1023.3UH_ETQP3W3R3WFN_7A_20%
PL1023.3UH_ETQP3W3R3WFN_7A_20%
1 2
PC
11
84
.7U
_0
60
3_
10
V6
KP
C1
18
4.7
U_
06
03
_1
0V
6K
12
+
PC
11
53
30
U_
D_
6.3
VM
_R
25
M
+
PC
11
53
30
U_
D_
6.3
VM
_R
25
M
1
2
PC
10
31
0U
_0
80
5_
25
V6
K
@
PC
10
31
0U
_0
80
5_
25
V6
K
@
12
PJP102
PAD-OPEN 1x3m
PJP102
PAD-OPEN 1x3m
1 2
PR113
0_0402_5%
@ PR113
0_0402_5%
@12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
0.75Volt +/- 5%
TDC 0.525A
Peak Current 0.75A
OCP Current 0.9A
Mode S3 S5 +1.5V_MEN +V_DDR_REF +0.75V_P
S5 L L off off off
S3 L H on on off(Hi-Z)
S0 H H on on on
FB sense trace
FB sense trace when FB pull down to GND
1.35Volt +/- 5%
TDC: 7.2 A
Peak Current: 10 A
OCP current: 12 A
Rds(on): 13.6m ohm(max)
DH_1.35V
SW_1.35V
CS_1.35V
1.35V_SUS_PWRGD
1.35V_B+
VDD_1.35V
+VLDOIN_1.35V
S5_1.35V
SN
UB
_1.3
5V
BOOT_1.35V
1.35V_B+
+V_DDR_REF
1.35V_FB
+1.35V_MEN_P
DL_1.35V
+1.35V_MEN_P +1.35V_MEM +0.675V_DDR_VTT+0.675V_P
+PWR_SRC
+5V_ALW
+5V_ALW
+1.35V_MEN_P
+0.675V_P
+3.3V_ALW
+1.35V_MEN_P
+V_DDR_REF
+1.35V_MEN_P
0.675V_DDR_VTT_ON<18>
1.35V_SUS_PWRGD<37>
SIO_SLP_S4#<36,39,9>
SUS_ON<36,39>
SIO_SLP_S3#<36,39,9>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
+1.35V_MEN/+0.675V_DDR_VTT
43 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
+1.35V_MEN/+0.675V_DDR_VTT
43 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
+1.35V_MEN/+0.675V_DDR_VTT
43 58Friday, May 17, 2013
Compal Electronics, Inc.
PC
202
0.1
U_0402_25V
6
@
PC
202
0.1
U_0402_25V
6
@
12
PR2058.06K_0402_1%~D
PR2058.06K_0402_1%~D
12
PC
205
22U
_0805_6.3
V6M
PC
205
22U
_0805_6.3
V6M
12
PR208
0_0402_5%
@ PR208
0_0402_5%
@1 2
PC
201
4.7
U_0805_25V
6K
~D
PC
201
4.7
U_0805_25V
6K
~D
12
PR209
10K_0402_1%
PR209
10K_0402_1%
12
PQ200
FDMC8884_POWER33-8-5
PQ200
FDMC8884_POWER33-8-5
35
2
4
1
PR200
2.2_0603_5%~D
PR200
2.2_0603_5%~D
1 2
PC2091U_0603_10V6K~D
PC2091U_0603_10V6K~D
PC
204
0.2
2U
_0603_16V
7K
~D
PC
204
0.2
2U
_0603_16V
7K
~D
12
PQ201
FDMC7692S_POWER33-8-5
PQ201
FDMC7692S_POWER33-8-5
35
2
4
1
PL2001UH_PCMB063T-1R0MS_12A_20%
PL2001UH_PCMB063T-1R0MS_12A_20%1 2
PR2070_0402_5%~D@ PR2070_0402_5%~D@
1 2
PJP200
PAD-OPEN 1x2m~D
PJP200
PAD-OPEN 1x2m~D
2 1
PR20123.7K_0402_1%
PR20123.7K_0402_1%
1 2
PR206
1M_0402_1%~D
PR206
1M_0402_1%~D
1 2
PC2120.033U_0402_16V7~DPC2120.033U_0402_16V7~D
PR204
100K_0402_1%~D
PR204
100K_0402_1%~D
12
PC208
680P_0603_50V7K
@ PC208
680P_0603_50V7K
@12
PJP203
JUMP_1x3m
PJP203
JUMP_1x3m
11
22
PC
200
4.7
U_0805_25V
6K
~D
PC
200
4.7
U_0805_25V
6K
~D
12
PC211
1U_0603_10V6K~D
PC211
1U_0603_10V6K~D
PC215
0.1U_0402_16V7K~D
@ PC215
0.1U_0402_16V7K~D
@
12
PR210
0_0402_5%
@ PR210
0_0402_5%
@1 2
PC213100P_0402_50V8J~D
PC213100P_0402_50V8J~D
12
+
PC
207
330U
_D
2_2V
M_R
15M
+
PC
207
330U
_D
2_2V
M_R
15M
1
2
PR202
5.1_0603_5%~D
PR202
5.1_0603_5%~D
1 2
PJP202
PAD-OPEN1x1m
PJP202
PAD-OPEN1x1m
12
PU11
RT8207MZQW_WQFN20_3X3
PU11
RT8207MZQW_WQFN20_3X3
VTTSNS2
FB
6
S5
8
PG
OO
D10
VDDP12
PH
AS
E16
BO
OT
18
VTTREF4
PGND14
VTTGND1
GND3
VDDQ5
S3
7
TO
N9
VDD11
CS13
LGATE15 U
GA
TE
17
VT
T20
VLD
OIN
19
PAD21
PR203
4.7_1206_5%
@ PR203
4.7_1206_5%
@
12
PJP201
PAD-OPEN1x1m
PJP201
PAD-OPEN1x1m
12
PR211
0_0402_5%~D
@ PR211
0_0402_5%~D
@1 2
PJP204
JUMP_1x3m
PJP204
JUMP_1x3m
11
22
PC
203
2200P
_0402_50V
7K
~D
@
PC
203
2200P
_0402_50V
7K
~D
@
12
PC214
0.1U_0402_16V7K~D
@ PC214
0.1U_0402_16V7K~D
@12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05Volt +/- 5%
TDC 3.67 A
Peak Current 5.25 A
OCP current 6.3 A
Rds(on): 13.6m ohm (max)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
S0 mode be high level
BST_+V1.05SP
SW_+V1.05SP
UG_+V1.05SP
LG_+V1.05SP
TRIP_+V1.05SP
EN_+V1.05SP
FB_+V1.05SP
RF_+V1.05SP
+V1.05SP_B++PWR_SRC
+5V_ALW
+1.05V_MP
+1.05V_MP +1.05V_M
+3.3V_ALW
SIO_SLP_A#<36,39,9>
1.05V_A_PWRGD<37>
A_ON<37,39>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
+1.05V_M
44 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
+1.05V_M
44 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
+1.05V_M
44 58Friday, May 17, 2013
Compal Electronics, Inc.
PC3040.1U_0603_25V7K
PC3040.1U_0603_25V7K
1 2
PR3012.2_0603_5%
PR3012.2_0603_5%1 2
PL3002.2UH_ETQP3W2R2WFN_8.5A_20%
PL3002.2UH_ETQP3W2R2WFN_8.5A_20%
1 2
PJP301
PAD-OPEN 1x2m~D
PJP301
PAD-OPEN 1x2m~D
2 1
PJP300
PAD-OPEN 1x2m~D
PJP300
PAD-OPEN 1x2m~D
2 1
PR300
100K_0402_1%~D
PR300
100K_0402_1%~D
12
PR307
4.99K_0402_1%
PR307
4.99K_0402_1%
12
PQ300FDMC8884_POWER33-8-5PQ300FDMC8884_POWER33-8-53
52
4
1
PC
30
1
22
00
P_
04
02
_5
0V
7K
@
PC
30
1
22
00
P_
04
02
_5
0V
7K
@
12
PU300
TPS51212DSCR_SON10_3X3
PU300
TPS51212DSCR_SON10_3X3
EN3
TRIP2
V5IN7
DRVH9
SW8
DRVL6
VBST10
RF5
VFB4
PGOOD1
TP11
PC305
1U_0402_6.3V6K~D
PC305
1U_0402_6.3V6K~D
12
PC
30
0
0.1
U_
04
02
_2
5V
6
@
PC
30
0
0.1
U_
04
02
_2
5V
6
@
12
PR304
0_0402_5%
@ PR304
0_0402_5%
@1 2
PC308
0.1U_0402_16V7K
@ PC308
0.1U_0402_16V7K
@
12
PC
30
2
4.7
U_
08
05
_2
5V
6K
~D
@
PC
30
2
4.7
U_
08
05
_2
5V
6K
~D
@
12
PR303
0_0402_5%~D
@ PR303
0_0402_5%~D
@1 2
PC306
680P_0603_50V7K
@ PC306
680P_0603_50V7K
@
12
PR306
4.7_1206_5%
@ PR306
4.7_1206_5%
@
12
+PC307
220U_B2_2.5VM_R15M
+PC307
220U_B2_2.5VM_R15M
1
2
PR302
95.3K_0402_1%
PR302
95.3K_0402_1%
1 2
PC
30
3
10
U_
08
05
_2
5V
PC
30
3
10
U_
08
05
_2
5V
12
PR308
10K_0402_1%
PR308
10K_0402_1%
12
PQ301FDMC7692S_POWER33-8-5
PQ301FDMC7692S_POWER33-8-5
35
2
4
1
PR305
470K_0402_1%
PR305
470K_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Chief River VC
1.5VSP
+3.3V_RUN
+1.5V_THERMAL
+5V_ALW
+3.3V_RUN
+3.3V_ALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
+1.05VS_VTTP/+1.0VSP
Custom
45 58Friday, May 17, 2013
<Issued_Date> <Deciphered_Date>
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
+1.05VS_VTTP/+1.0VSP
Custom
45 58Friday, May 17, 2013
<Issued_Date> <Deciphered_Date>
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
+1.05VS_VTTP/+1.0VSP
Custom
45 58Friday, May 17, 2013
<Issued_Date> <Deciphered_Date>
Compal Electronics, Inc.
PC404
22U_0805_6.3V6M
PC404
22U_0805_6.3V6M
12
PC403
0.01U_0402_25V7K
PC403
0.01U_0402_25V7K
12
PU400
APL5930KAI-TRG_SO8
PU400
APL5930KAI-TRG_SO8
GN
D1
VOUT4POK
7
EN8
VC
NT
L6
VIN5
VOUT3
FB2
VIN9
PC402
0.1U_0402_16V7K
@ PC402
0.1U_0402_16V7K
@
12
PJP400
PAD-OPEN1x1m
PJP400
PAD-OPEN1x1m
12
PR401
47K_0402_5%
@ PR401
47K_0402_5%
@
12
PC4014.7U_0805_6.3V6KPC4014.7U_0805_6.3V6K
12
PR4021.54K_0402_1%
PR4021.54K_0402_1%
12
PJP402
PAD-OPEN1x1m
@ PJP402
PAD-OPEN1x1m
@
12
PR403
1.74K_0402_1%
PR403
1.74K_0402_1%
12
PC400
1U_0402_6.3V6K
PC400
1U_0402_6.3V6K
12
PR400
100K_0402_5%~D
PR400
100K_0402_5%~D
1 2
PJP401
PAD-OPEN1x1m
PJP401
PAD-OPEN1x1m
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
TI recommend 1nF
from processor
CPUTDC 10 APeak Current 32 AOCP Current 38.4 ADCR: 0.82m +-5% ohmPH500 B value: 4250k 1%PH501 B value: 3435k 1%
20120911 TI-Alex Note: Although there is no pulse-overlap in 1-phase mode, during USR, the pulse comes in immediately.So, the problem with PR504 = DNP is that if there is a high ripple, and USR is faultily detected, you will get a double-pulse.So, we want to make sure USR is not active if it is not necessary. So, I moved it all the way to highest level so PR504 works to 8.87k.
O-USR
PWM1
CSP1
CSN1
IMON
OCP-I
+VCC_PWR_SRC
VFB
GFB
SLEWA
VREF
B-RAMP
VID
AL
ER
T_
N
VID
SC
LK
VF
B
GF
B
SKIP#
PWM1
F-IMAX
VID
SO
UT
+VCC_PWR_SRC
VR
_H
OT
#
CSN1
CSP1
VREF
SKIP#SKIP#1
+VCC_CORE
+3.3V_RUN
+5V_RUN+5V_ALW
+3.3V_RUN
+3.3V_RUN
+1.05V_VCCST
+PWR_SRC
+3.3V_RUN
H_PROCHOT#<37,47,48,9>
VCCSENSE<15>
VSSSENSE<17>
IMVP_VR_ON <36>
IMVP_PWRGD <36>
VIDALERT_N<15>
VIDSCLK<15>
H_VR_EN <15>
H_VR_READY <15>
VIDSOUT<15>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
+VCC_CORE
46 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
+VCC_CORE
46 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
+VCC_CORE
46 58Friday, May 17, 2013
Compal Electronics, Inc.
PH
50
11
0K
_0
40
2_
1%
_T
SM
0A
10
3F
34
D1
RZ
PH
50
11
0K
_0
40
2_
1%
_T
SM
0A
10
3F
34
D1
RZ
12
PC
51
4
47
P_
04
02
_5
0V
8J~
D
PC
51
4
47
P_
04
02
_5
0V
8J~
D
12
PR
50
6
75
K_
04
02
_1
%
PR
50
6
75
K_
04
02
_1
%
12
PR5390_0402_5%@ PR5390_0402_5%@
12
PC
73
22
2U
_0
80
5_
25
V6
KP
C7
32
22
U_
08
05
_2
5V
6K
12
PC507
0.33U_0603_10V7K~D
PC507
0.33U_0603_10V7K~D 12
PR
52
8
75
_0
40
2_
1%
@
PR
52
8
75
_0
40
2_
1%
@
12
+
PC
73
8
10
0U
_D
3L
_2
0V
M_
R5
5M
+
PC
73
8
10
0U
_D
3L
_2
0V
M_
R5
5M1
2
PU501
CSD97374CQ4M_SON8_3P5X4P5
PU501
CSD97374CQ4M_SON8_3P5X4P5
PGND13
VDD2
SKIP#1
VSW4PWM
8
VIN5
BOOT7
BOOT_R6
PGND29
PR5360_0402_5%@ PR536
0_0402_5%@
12
PR
53
4
0_
04
02
_5
%
@
PR
53
4
0_
04
02
_5
%
@
12
PC
73
11
0U
_0
80
5_
25
V6
KP
C7
31
10
U_
08
05
_2
5V
6K
12
PU500
TPS51622RSM
PU500
TPS51622RSM
SL
EW
A1
5V
BA
T1
6
TH
ER
M1
4
GFB23
PU321
CO
MP
26
VC
LK
31
V5
A2
8
DR
OP
25
AL
ER
T#
32
VFB24
N/C22
GN
D3
3
GN
D2
9
PGOOD3
VR
_H
OT
#3
0
VR
EF
27
VDIO1VDD2
N/C4PWM25PWM16SKIP#7VR_ON8
IMO
N1
3
OC
P-I
12
B-R
AM
P1
1
F-I
MA
X1
0
O-U
SR
9CSP2
20
CSP117
CSN219 CSN118
PR5170_0603_5%~D
PR5170_0603_5%~D
12
PC5121500P_0402_50V7K
PC5121500P_0402_50V7K
1 2
PR
50
4
8.8
7K
_0
40
2_
1%
PR
50
4
8.8
7K
_0
40
2_
1%
12
PR
52
75
4.9
_0
40
2_
1%
PR
52
75
4.9
_0
40
2_
1%
12
PR
51
53
.01
K_
04
02
_1
%P
R5
15
3.0
1K
_0
40
2_
1%
12P
R5
29
11
0_
04
02
_1
%
PR
52
9
11
0_
04
02
_1
%
12
PR
50
7
15
0K
_0
40
2_
1%
PR
50
7
15
0K
_0
40
2_
1%
12
PR
50
9
15
0K
_0
40
2_
1%
PR
50
9
15
0K
_0
40
2_
1%
12
PR523
10K_0402_5%~D
PR523
10K_0402_5%~D
1 2
PR
50
2
75
_0
40
2_
1%
@
PR
50
2
75
_0
40
2_
1%
@
12
PR
50
3
1M
_0
40
2_
1%
PR
50
3
1M
_0
40
2_
1%
12
PR5122.1K_0402_1%~D
PR5122.1K_0402_1%~D
12
PH
50
0
100K_0402_1%_NCP15WF104F03RC
PH
50
0
100K_0402_1%_NCP15WF104F03RC
12
PC511
0.1U_0402_25V6
PC511
0.1U_0402_25V6
12
PR
52
2
4.7
_1
20
6_
5%
~D
PR
52
2
4.7
_1
20
6_
5%
~D
12
PC506
100P_0402_50V8~D
@ PC506
100P_0402_50V8~D
@1 2
PR526
10_0603_1%
PR526
10_0603_1%
12
PR
51
44
3.2
K_
04
02
_1
%P
R5
14
43
.2K
_0
40
2_
1%
12
PJP500
PAD-OPEN 4x4m
@ PJP500
PAD-OPEN 4x4m
@
1 2
PR500
75_0402_1%
@ PR500
75_0402_1%
@
12
PC504
0.1U_0402_25V6
PC504
0.1U_0402_25V6
1 2
PR5200_0402_5%@PR5200_0402_5%@
1 2
PC
50
51
U_
06
03
_1
0V
6K
PC
50
51
U_
06
03
_1
0V
6K
12
PC
51
3
0.0
68
U_
04
02
_1
6V
7K
PC
51
3
0.0
68
U_
04
02
_1
6V
7K
12
PR513
75_0402_1%
@ PR513
75_0402_1%
@1 2
PC
51
01
U_
06
03
_1
0V
7K
~D
PC
51
01
U_
06
03
_1
0V
7K
~D
12
PR5310_0402_5%
@ PR5310_0402_5%
@
12
PR540
0_0402_5%
@ PR540
0_0402_5%
@12
PR
50
51
0K
_0
40
2_
5%
~D
PR
50
51
0K
_0
40
2_
5%
~D
12
PR5320_0402_5%@ PR5320_0402_5%@
12
PR516
1.91K_0402_1%~D
@ PR516
1.91K_0402_1%~D
@1 2
PC
73
41
0U
_0
80
5_
25
V6
KP
C7
34
10
U_
08
05
_2
5V
6K
12
PR
50
8
15
0K
_0
40
2_
1%
PR
50
8
15
0K
_0
40
2_
1%
12
PR
50
1
36
5K
_0
40
2_
1%
PR
50
1
36
5K
_0
40
2_
1%
12
PC
50
0
47
00
P_
06
03
_5
0V
7K
PC
50
0
47
00
P_
06
03
_5
0V
7K
12
PR519
1_0603_5%
PR519
1_0603_5%
12
PR5354.87K_0402_1%
PR5354.87K_0402_1%
1 2
PC
50
2
0.0
68
U_
04
02
_1
6V
7K
PC
50
2
0.0
68
U_
04
02
_1
6V
7K
12
PR521
2.32K_0402_1%
PR521
2.32K_0402_1%
1 2
PC
73
62
2U
_0
80
5_
25
V6
KP
C7
36
22
U_
08
05
_2
5V
6K
12
PC503
1000P_0402_50V7K~D
PC503
1000P_0402_50V7K~D1 2
PR510
39K_0402_5%~D
PR510
39K_0402_5%~D
12
PL5000.22UH_FDUE0640J-H-R22M=P3_25A_20%
PL5000.22UH_FDUE0640J-H-R22M=P3_25A_20%
1
3
4
2
PR511
10K_0402_5%~D
PR511
10K_0402_5%~D
1 2PL501
FBMA-L11-453215-121LMA90T
PL501
FBMA-L11-453215-121LMA90T
1 2
PC509
1U_0603_10V7K~D
PC509
1U_0603_10V7K~D
12
PR537 0_0402_5%@ PR537 0_0402_5%@
12
+
PC
73
5
33
U_
D_
25
VM
_R
60
M
@
+
PC
73
5
33
U_
D_
25
VM
_R
60
M
@
1
2
PC
50
8
82
0P
_0
60
3_
50
V7
K~
D
PC
50
8
82
0P
_0
60
3_
50
V7
K~
D
12
PC
50
10
.1U
_0
40
2_
16
V7
K~
DP
C5
01
0.1
U_
04
02
_1
6V
7K
~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARYAdapter Protection Circuit for Turbo Mode
DYN_TUR_CURRENT_SET#
Low
High
65W
45W
Discrete current monitor circuit
sense adapter
CHG_LGATE
CS
SN
_1
CS
SP
_1
BQ24715_REGN
VCP
BQ24715_REGN
CHG_UGATE
+DCIN
CSSN_1
BQ24715_REGN
CSSP_1
BQ24715_REGN
GNDA_CHG
+SDC_IN
+VCHGR
CHAGER_SRC
+PWR_SRC
GNDA_CHG
GNDA_CHG
+SDC_IN
+DC_IN_SS
GNDA_CHG
GNDA_CHG
GNDA_CHG
+DOCK_PWR_BAR
+DC_IN_SS
GNDA_CHG
+5V_ALW
+5V_ALW
+DC_IN
+5V_ALW+3.3V_ALW2
+3.3V_ALW+3.3V_ALW
GNDA_CHG
GNDA_CHG
+SDC_IN
+3.3V_ALW
+SDC_IN
+PWR_SRC_AC
+3.3V_ALW2
+3.3V_ALW2
CHARGER_SMBDAT<37>
ACAV_IN<37,47,48>
DOCK_DCIN_IS- <34>
CHARGER_SMBCLK<37>
DOCK_DCIN_IS+ <34>
CSS_GC<48>
DC_BLOCK_GC <48>
+CHGR_DC_IN<48>
DK_CSS_GC <48>
ACAV_IN_NB <37,48>DYN_TUR_CURRNT_SET#<37>
PROCHOT_GATE <36>
H_PROCHOT# <37,46,48,9>
ACAV_IN <37,47,48>
V_SYS<37>
BATDRV# <48>
VCP<37>
CHARGER_CELL_PIN<48>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
+GPU_CORE
47 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
+GPU_CORE
47 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
+GPU_CORE
47 58Friday, May 17, 2013
Compal Electronics, Inc.
PC
713
0.0
47U
_0603_25V
7M
PC
713
0.0
47U
_0603_25V
7M 1
2
PR
724
4.7
_1206_5%
~D
PR
724
4.7
_1206_5%
~D
12
PR7160.01_1206_1%~D
PR7160.01_1206_1%~D
1
3
4
2
PC708 0.1U_0402_25V6PC708 0.1U_0402_25V6
12
PR709
0_0402_5%
@ PR709
0_0402_5%
@1 2
PR7291.8M_0402_1%
PR7291.8M_0402_1%
1 2
PR702
0_0402_5%
@ PR702
0_0402_5%
@1 2
PC
725
0.0
1U
_0402_25V
7K
~D
@
PC
725
0.0
1U
_0402_25V
7K
~D
@
12
PR
734
210K
_0402_1%
PR
734
210K
_0402_1%
12
PC
715
0.1
U_0603_25V
7K
~D
@
PC
715
0.1
U_0603_25V
7K
~D
@
12
PQ712B
DMN66D0LDW-7 2N SOT363-6
PQ712B
DMN66D0LDW-7 2N SOT363-6
3
5
4
PD702
BAT54HT1G_SOD323-2~D
PD702
BAT54HT1G_SOD323-2~D
12
PC
711
22U
_0805_25V
6M
PC
711
22U
_0805_25V
6M
12
PU703
INA199A1DCKR_SC70-6~D
PU703
INA199A1DCKR_SC70-6~D
V+3
IN-5
IN+4
GND2
Out6
REF1
PR
718
0_0402_5%
@
PR
718
0_0402_5%
@
12
PR725
0_0402_5%
@ PR725
0_0402_5%
@1 2
G
S
DPQ701NTR4502PT1G_SOT23-3~DG
S
DPQ701NTR4502PT1G_SOT23-3~D
2
13
PR701
0_0402_5%
@ PR701
0_0402_5%
@1 2
PC
718
10U
_0805_25V
6K
PC
718
10U
_0805_25V
6K
12
PR740
100K_0402_5%~D
PR740
100K_0402_5%~D
12 PR741
0_0402_5%
@ PR741
0_0402_5%
@1 2
PR727
221K_0402_1%~D
PR727
221K_0402_1%~D
12
PJP701
PAD-OPEN1x1m
PJP701
PAD-OPEN1x1m
1 2
PC
727
220P
_0402_50V
8J~
DP
C727
220P
_0402_50V
8J~
D
12
PR708
1_0805_1%~D
@ PR708
1_0805_1%~D
@1 2
PR
739
10K
_0402_1%
~D
PR
739
10K
_0402_1%
~D
12
PC
730
100P
_0402_50V
8J~
DP
C730
100P
_0402_50V
8J~
D1
2
PQ
710B
DM
N66D
0LD
W-7
2N
SO
T363-6
PQ
710B
DM
N66D
0LD
W-7
2N
SO
T363-6
3
5
4
PC705
0.1U_0603_25V7K~D
PC705
0.1U_0603_25V7K~D
1 2
PC
714
820P
_0603_50V
7K
~D
PC
714
820P
_0603_50V
7K
~D
12
PR7000.01_1206_1%~D
PR7000.01_1206_1%~D
1
3
4
2
PQ700 V30415-T1-GE3 1P POWERPAK1212-8PQ700 V30415-T1-GE3 1P POWERPAK1212-8
352
4
1
PR
747
100K
_0402_1%
~D
PR
747
100K
_0402_1%
~D
12
PR710
0_0402_5%
@ PR710
0_0402_5%
@
1 2
PR
737
232K
_0402_1%
~D
PR
737
232K
_0402_1%
~D 1
2
PC733
0.1U_0603_25V7K~D
PC733
0.1U_0603_25V7K~D
12
PC
741
22U
_0805_25V
6M
PC
741
22U
_0805_25V
6M
12
PR726
10K_0402_1%~D
@ PR726
10K_0402_1%~D
@
1 2
PR70310K_0402_5%~D
PR70310K_0402_5%~D
12
PQ712A
DMN66D0LDW-7 2N SOT363-6
PQ712A
DMN66D0LDW-7 2N SOT363-6
61
2
PR
744
10K
_0402_1%
~D
PR
744
10K
_0402_1%
~D
12
PC
729
100P
_0402_50V
8J~
DP
C729
100P
_0402_50V
8J~
D1
2
PC709
1U_0603_10V6K~D
PC709
1U_0603_10V6K~D
1 2
PR7152.2_0603_5%
PR7152.2_0603_5%1 2
PC7200.1U_0603_25V7K~D
@ PC7200.1U_0603_25V7K~D
@
1 2
PR
742
22.6
K_0402_1%
~D
PR
742
22.6
K_0402_1%
~D
12
PC740
220P_0402_50V8J
@ PC740
220P_0402_50V8J
@
12
PC
737
10U
_0805_25V
6K
PC
737
10U
_0805_25V
6K
12
PR
746
121K
_0402_1%
~D
PR
746
121K
_0402_1%
~D 1
2
G
DS
PQ703ASI3993CDV-T1-GE3_TSOP6~D
G
DS
PQ703ASI3993CDV-T1-GE3_TSOP6~D
1
65
PU2A
LM393DR_SO8~D
PU2A
LM393DR_SO8~D
+3
-2 O
1
P8
G4
PR730150K_0402_1%PR730150K_0402_1%
12
PQ706
SIRA06DP-T1-GE3_POWERPAKSO-8
PQ706
SIRA06DP-T1-GE3_POWERPAKSO-8
4
5
123
PR
743
42.2
K_0402_1%
~D
PR
743
42.2
K_0402_1%
~D
12
PC722
0.1U_0603_25V7K~D
PC722
0.1U_0603_25V7K~D
1 2
PR7224.02K_0402_1%
PR7224.02K_0402_1%1 2
PR7361M_0402_1%~D
PR7361M_0402_1%~D1 2
PR
735
69.8
K_0402_1%
PR
735
69.8
K_0402_1%
12
PR728
0_0402_5%
@ PR728
0_0402_5%
@
12
PR749
59_0402_1%
PR749
59_0402_1%
12
PR
707
100K
_0402_1%
~D
PR
707
100K
_0402_1%
~D 1
2
PC7040.1U_0603_25V7K~D
PC7040.1U_0603_25V7K~D
1 2
PC
726
100P
_0402_50V
8J~
DP
C726
100P
_0402_50V
8J~
D1
2
PR713261K_0402_1%
PR713261K_0402_1%
12
PR751
10K_0402_1%~D
@ PR751
10K_0402_1%~D
@1 2
PD701
BAT54CW_SOT323~D
PD701
BAT54CW_SOT323~D
3
2
1
PR711
10K_0402_1%~D
PR711
10K_0402_1%~D
1 2
PJP700
PAD-OPEN 4x4m
@ PJP700
PAD-OPEN 4x4m
@
1 2
PL7001UH_PCMB042T-1R0MS_4.5A_20%
PL7001UH_PCMB042T-1R0MS_4.5A_20%
12
PC7031U_0603_25V6K
PC7031U_0603_25V6K
1 2
PC
700
0.1
U_0603_25V
7K
~D
@
PC
700
0.1
U_0603_25V
7K
~D
@
12
PU700
BQ24715RGRR_QFN
PU700
BQ24715RGRR_QFN
PHASE19
SRN12
LODRV15
TP
21
SCL9
IOUT7
AC
P2
VCC20
CMSRC3
ACDET6
SDA8
ACDRV4
ACOK5
BTST17
HIDRV18
REGN16
AC
N1
/BATDRV11
SRP13
GND14
CELL10
PR73220K_0402_1%~D
PR73220K_0402_1%~D
1 2
PR74844.2_0402_1%~D
PR74844.2_0402_1%~D
12
PC70610U_0805_25V6K
PC70610U_0805_25V6K
12
PR
719
0_0402_5%
@
PR
719
0_0402_5%
@ 12
PR71449.9K_0402_1%~D
PR71449.9K_0402_1%~D
12
G
DS
PQ703BSI3993CDV-T1-GE3_TSOP6~D
G
DS
PQ703BSI3993CDV-T1-GE3_TSOP6~D
3
42
PR
704
10_0402_5%
~D
PR
704
10_0402_5%
~D
12
PC
717
10U
_0805_25V
6K
PC
717
10U
_0805_25V
6K
12
PR
745
10_1206_5%
~D
PR
745
10_1206_5%
~D 1
2
PC7210.1U_0603_25V7K~D
PC7210.1U_0603_25V7K~D
1 2
PL701
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
PL701
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D12
PC
742
22U
_0805_25V
6M
PC
742
22U
_0805_25V
6M
12
PR
705
10_0402_5%
~D
PR
705
10_0402_5%
~D
12
PC
712
22U
_0805_25V
6M
PC
712
22U
_0805_25V
6M
12P
C707
2200P
_0402_50V
7K
~D
PC
707
2200P
_0402_50V
7K
~D
12
PC
724
100P
_0402_50V
8J~
D
@
PC
724
100P
_0402_50V
8J~
D
@
12
PC728
0.1U_0402_25V4Z~D
PC728
0.1U_0402_25V4Z~D12
PC
716
10U
_0805_25V
6K
PC
716
10U
_0805_25V
6K
12
PU3
TC7SH08FU_SSOP5~D
PU3
TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
PU2B
LM393DR_SO8~D
PU2B
LM393DR_SO8~D
+5
-6 O
7
P8
G4
G
S
D
PQ702NTR4502PT1G_SOT23-3~D
G
S
D
PQ702NTR4502PT1G_SOT23-3~D
2
13
PQ704
SIRA14DP-T1GE3_POWERPAK-SO8-5
PQ704
SIRA14DP-T1GE3_POWERPAK-SO8-5
4
5
123
PQ
710A
DM
N66D
0LD
W-7
2N
SO
T363-6
PQ
710A
DM
N66D
0LD
W-7
2N
SO
T363-6
61
2
PR
706
100K
_0402_1%
~D
PR
706
100K
_0402_1%
~D
12
PC
719
100P
_0402_50V
8J~
DP
C719
100P
_0402_50V
8J~
D
12
PR717
0_0402_5%
@ PR717
0_0402_5%
@1 2
PR
738
48.7
K_0402_1%
PR
738
48.7
K_0402_1% 1
2
PR750
0_0402_5%
@PR750
0_0402_5%
@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Purpose: Trigger PROCHOT# when
active battery is removed from
system.
Allows EC to re-establish
system performance for battery
next in line.
Purpose: Turn on the PQ817
for primary or module bay
battery to provide power to
dock side without AC exist.
Purpose: Turn on the PQ817
for Slice battery discharge
without AC exist
DK_AC_OFF
CH
GV
R_
DC
IN
SL_BAT_PRES#
ER
C2
ERC1
P33ALW
ACAVDK_SRCACAVDK_SRC
ERC3
DK_AC_OFF_ENCD3301_SDC_IN
3301_PWRSRC
3301_ACAV_IN_NB
STSTART_DCBLOCK_GC
P50ALW
CD_PBATT_OFF
DK
_P
WR
BA
RD
C_
IN_
SS
ACAVIN
CD3301_DCIN
P33ALW2
EN_DK_PWRBAR
+BATT_SUM
SLICE_BAT_PRES#
SLICE_BAT_ON
PBAT_PRES#
ST
ST
AR
T_
DC
BL
OC
K_
GC
+PBATT_IN_SS
SLICE_BAT_ON
ACAV_IN#
ACAV_IN#
ACAV_IN#
3301_DSCHRG_FET_GC
DS
CH
RG
_M
OS
FE
T_
GC
3301_DSCHRG_FET_GC
+PWR_SRC_AC
+DC_IN_SS
+DC_IN
+SDC_IN
+3.3V_ALW2
+PWR_SRC_AC
+3.3V_ALW
+5V_ALW+3.3V_ALW2
+PBATT
+PBATT
+DOCK_PWR_BAR
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+VCHGR
+3.3V_ALW2
+3.3V_ALW2
+3.3V_ALW2
+DOCK_PWR_BAR
+NBDOCK_DC_IN_SS
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW2
+3.3V_ALW2
+3.3V_ALW2
+3.3V_ALW2+3.3V_ALW2
+3.3V_ALW2
+NBDOCK_DC_IN_SS
+DC_IN_SS
+3.3V_ALW2
+NBDOCK_DC_IN_SS
+3.3V_ALW2
+3.3V_ALW2
+PBATT
+3.3V_ALW2
+3.3V_ALW2
+3.3V_ALW
CSS_GC<47>DK_CSS_GC<47>
+CHGR_DC_IN<47>
SLICE_BAT_ON <36,48>
ACAV_IN_NB <37,47>
DOCK_AC_OFF_EC <36>
SLICE_BAT_PRES# <34,36,41,48>
SOFT_START_GC<41>
ACAV_DOCK_SRC#<34>
DC_BLOCK_GC<47>
ACAV_IN<37,47,48>
PBAT_PRES#<36,41> SLICE_BAT_ON <36,48>
H_PROCHOT# <37,46,47,9>
DOCK_AC_OFF <34>
EN_DOCK_PWR_BAR <36>
BATDRV#<47>
DOCK_DET# <34,36,48>
SLICE_BAT_PRES# <34,36,41,48>
DIS_BAT_PROCHOT#<36>
SLICE_BAT_ON <36,48>
SLICE_BAT_PRES# <34,36,41,48>
SLICE_PERF_EN <37,48>
SLICE_PERF_EN<37,48>
SLICE_PERF_EN<37,48>
SLICE_PERF_EN<37,48>
CHARGER_CELL_PIN <47>
ACAV_IN<37,47,48>
DOCK_SMB_ALERT# <34,36,41>
DOCK_DET#<34,36,48>
DOCK_DET#<34,36,48>
SLICE_BAT_PRES# <34,36,41,48>
DOCK_DET# <34,36,48>
SLICE_BAT_PRES# <34,36,41,48>
SLICE_BAT_PRES# <34,36,41,48>
DOCK_DET# <34,36,48>
AC_DIS<36,41>
SLICE_BAT_PRES#<34,36,41,48>
Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
Selector
48 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
Selector
48 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
Selector
48 58Friday, May 17, 2013
Compal Electronics, Inc.
PR859
0_0402_5%
@ PR859
0_0402_5%
@1 2
PR858
1M_0402_5%~D
PR858
1M_0402_5%~D
1 2
PR824
100K_0402_5%~D
@PR824
100K_0402_5%~D
@
12
PR835
47_0805_5%~D
PR835
47_0805_5%~D
1 2
PR838
0_0402_5%
@PR838
0_0402_5%
@12
PR847
0_0402_5%
@ PR847
0_0402_5%
@1 2
PQ815
FDS6679AZ-G_SO8~D
PQ815
FDS6679AZ-G_SO8~D
36 578
2
4
1
PC
81
60
.04
7U
_0
60
3_
25
V7
MP
C8
16
0.0
47
U_
06
03
_2
5V
7M
12
PR801100K_0402_5%~D
PR801100K_0402_5%~D
12
PC8140.1U_0402_10V7K
PC8140.1U_0402_10V7K
12
PR851
0_0402_5%~D
@ PR851
0_0402_5%~D
@
12
G
D
SPQ825
DMN65D8LW-7_SOT323-3~D
G
D
SPQ825
DMN65D8LW-7_SOT323-3~D
2
13
PR
82
2
10
K_
04
02
_5
%~
D
PR
82
2
10
K_
04
02
_5
%~
D
12
PR843
0_0402_5%@ PR843
0_0402_5%@
1 2
G
D
S PQ827
DMN65D8LW-7_SOT323-3~D
@
G
D
S PQ827
DMN65D8LW-7_SOT323-3~D
@
2
13
PQ807B
DMN66D0LDW-7 2N_SOT363-6~D
PQ807B
DMN66D0LDW-7 2N_SOT363-6~D
3
5
4
PC8050.1U_0402_10V7K
PC8050.1U_0402_10V7K
1 2
PQ
80
6A
DM
N6
6D
0L
DW
-7 2
N_
SO
T3
63
-6~
D
PQ
80
6A
DM
N6
6D
0L
DW
-7 2
N_
SO
T3
63
-6~
D
61
2
PR827
100K_0402_5%~D
PR827
100K_0402_5%~D
1 2
PR
81
51
0K
_0
40
2_
5%
~D
PR
81
51
0K
_0
40
2_
5%
~D1
2
PR829
100K_0402_5%~D
PR829
100K_0402_5%~D
12
PR8570_0402_5%
@ PR8570_0402_5%
@1 2
PC
81
50
.1U
_0
60
3_
25
V7
K~
DP
C8
15
0.1
U_
06
03
_2
5V
7K
~D
12
2
13
PQ801NTR4502PT1G 1P SOT23-3
2
13
PQ801NTR4502PT1G 1P SOT23-3
2
13
PQ826
FDMC6679AZ_MLP8-5
PQ826
FDMC6679AZ_MLP8-5
4
5
1 2 3
PR875100K_0402_5%~D
@ PR875100K_0402_5%~D
@
1 2
PR8550_0402_5%
@ PR8550_0402_5%
@
1 2
PC8120.1U_0402_10V7K
PC8120.1U_0402_10V7K
12
PD814SDMK0340L-7-F_SOD323-2~D
PD814SDMK0340L-7-F_SOD323-2~D
1 2
PC803
0.1U_0603_25V7K~D
PC803
0.1U_0603_25V7K~D
1 2
PR819
100K_0402_5%~D
PR819
100K_0402_5%~D
1 2
PC8080.1U_0402_10V7K
PC8080.1U_0402_10V7K
12
PD807
SDMK0340L-7-F_SOD323-2~D
PD807
SDMK0340L-7-F_SOD323-2~D
12
PR836100K_0402_5%~D
PR836100K_0402_5%~D
12
PR
85
30
_0
40
2_
5%
@
PR
85
30
_0
40
2_
5%
@
12
PQ813B
DMN66D0LDW-7 2N_SOT363-6~D
PQ813B
DMN66D0LDW-7 2N_SOT363-6~D
35
4
PQ824A
DMN66D0LDW-7 2N_SOT363-6~D
@ PQ824A
DMN66D0LDW-7 2N_SOT363-6~D
@
61
2
G
D
S
PQ
81
8
DM
N6
5D
8L
W-7
_S
OT
32
3-3
~D
G
D
S
PQ
81
8
DM
N6
5D
8L
W-7
_S
OT
32
3-3
~D
2
13
G
D S
PQ831
DMN65D8LW-7_SOT323-3~D
G
D S
PQ831
DMN65D8LW-7_SOT323-3~D
2
1 3
PU805TC7SH08FU_SSOP5~D
PU805TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
PR868
0_0402_5%
@PR868
0_0402_5%
@1 2
2
1
3
PQ
81
4N
TR
45
02
PT
1G
1P
SO
T2
3-3
2
1
3
PQ
81
4N
TR
45
02
PT
1G
1P
SO
T2
3-3
2
13
PC806
2200P_0402_50V7K~D
PC806
2200P_0402_50V7K~D
1 2
PR869
240K_0402_5%~D
@ PR869
240K_0402_5%~D
@
1 2
PR808
100K_0402_5%~D
PR808
100K_0402_5%~D
12
2
13
PQ823ME2301D-G 1P SOT-23-3
@
2
13
PQ823ME2301D-G 1P SOT-23-3
@
2
13
PR841
0_0402_5%
@PR841
0_0402_5%
@12
PR804
100K_0402_5%~D
PR804
100K_0402_5%~D
12
PQ824B
DMN66D0LDW-7 2N_SOT363-6~D
@ PQ824B
DMN66D0LDW-7 2N_SOT363-6~D
@
3
5
4
PC807
0.47U_0805_25V7K~D
PC807
0.47U_0805_25V7K~D
1 2
PR810
100K_0402_5%~D
PR810
100K_0402_5%~D
12
PQ802A
DMN66D0LDW-7 2N_SOT363-6~D
PQ802A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
PR8950_0402_5%
@ PR8950_0402_5%
@
1 2
PR820
0_0402_5%
@ PR820
0_0402_5%
@1 2
PD818
SDMK0340L-7-F_SOD323-2~D
@ PD818
SDMK0340L-7-F_SOD323-2~D
@
1 2
PR816
100K_0402_5%~D
PR816
100K_0402_5%~D
12
PD820SDMK0340L-7-F_SOD323-2~D
PD820SDMK0340L-7-F_SOD323-2~D
1 2
PR839
100K_0402_5%~D
PR839
100K_0402_5%~D
12
PD813
SDMK0340L-7-F_SOD323-2~D
PD813
SDMK0340L-7-F_SOD323-2~D
12
PR8600_0402_5%
@ PR8600_0402_5%
@
1 2
2
13
PQ829SI2301CDS-T1-GE3 1P_SOT23-3
2
13
PQ829SI2301CDS-T1-GE3 1P_SOT23-3
2
13
PR870
47K_0402_5%~D
@ PR870
47K_0402_5%~D
@
1 2
PQ809SI4835DDY-T1-GE3_SO8~D
PQ809SI4835DDY-T1-GE3_SO8~D
3 65
78
2
4
1
PU804
TC7SH08FU_SSOP5~D
PU804
TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
2
1
3
PQ
83
0N
TR
45
02
PT
1G
_S
OT
23
-3~
D
2
1
3
PQ
83
0N
TR
45
02
PT
1G
_S
OT
23
-3~
D
2
13
PR826
100K_0402_5%~D
PR826
100K_0402_5%~D
12
PD815
BAT54CW_SOT323~D
PD815
BAT54CW_SOT323~D
3
2
1
PD819SDMK0340L-7-F_SOD323-2~D
PD819SDMK0340L-7-F_SOD323-2~D
1 2
PQ810FDS6679AZ-G_SO8~DPQ810FDS6679AZ-G_SO8~D
36 578
2
4
1
PQ800SI4835DDY-T1-GE3_SO8~D
PQ800SI4835DDY-T1-GE3_SO8~D
3 65
78
2
4
1
PR894
0_0402_5%~D
@ PR894
0_0402_5%~D
@1 2
PR
81
3
10
0K
_0
40
2_
5%
~D
PR
81
3
10
0K
_0
40
2_
5%
~D
12
PR874
1M_0402_5%~D
PR874
1M_0402_5%~D
1 2
PR852
0_0402_5%
@ PR852
0_0402_5%
@
12
G
D
SPQ
81
6
AO
34
18
_S
OT
23
-3
G
D
SPQ
81
6
AO
34
18
_S
OT
23
-3
2
13
PR
81
8
10
0K
_0
40
2_
5%
~D
PR
81
8
10
0K
_0
40
2_
5%
~D
12 PC810
0.1U_0402_10V7K
PC810
0.1U_0402_10V7K
12
PR8660_0402_5%
@ PR8660_0402_5%
@
12
PD806PDS5100H-13_POWERDI5-3~D
PD806PDS5100H-13_POWERDI5-3~D
2
31
PD821
SDMK0340L-7-F_SOD323-2~D
PD821
SDMK0340L-7-F_SOD323-2~D
12
PQ805A
DMN66D0LDW-7 2N_SOT363-6~D
PQ805A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
PC8130.1U_0603_50V4Z~D
PC8130.1U_0603_50V4Z~D
12
G
D
S
PQ828
DMN65D8LW-7_SOT323-3~D
G
D
S
PQ828
DMN65D8LW-7_SOT323-3~D
2
13
PR864100K_0402_5%~D
PR864100K_0402_5%~D
12
PC8010.1U_0402_10V7K
PC8010.1U_0402_10V7K
1 2
PR872
0_0402_5%
@ PR872
0_0402_5%
@1 2
PD800PDS5100H-13_POWERDI5-3~D
PD800PDS5100H-13_POWERDI5-3~D
2
31
PR849
100K_0402_5%~D
PR849
100K_0402_5%~D
12
PR834
0_0402_5%
@ PR834
0_0402_5%
@1 2
PR
84
8
0_
04
02
_5
%~
D
@
PR
84
8
0_
04
02
_5
%~
D
@
12
PU808TC7SH08FU_SSOP5~D
PU808TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
PR833
0_0402_5%@ PR833
0_0402_5%@
1 2
PU806
TC7SH08FU_SSOP5~D
PU806
TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
PR817
330K_0402_5%~D
PR817
330K_0402_5%~D
1 2
PD
81
1
SD
MK
03
40
L-7
-F_
SO
D3
23
-2~
D
PD
81
1
SD
MK
03
40
L-7
-F_
SO
D3
23
-2~
D
12 PR811
0_0402_5%
@ PR811
0_0402_5%
@12
PR850
0_0402_5%
@PR850
0_0402_5%
@1 2
PR846
100K_0402_5%~D
PR846
100K_0402_5%~D
1 2
PR8320_0402_5%
@ PR8320_0402_5%
@
12
PR814330K_0402_5%~D
PR814330K_0402_5%~D
12
PQ
80
6B
DM
N6
6D
0L
DW
-7 2
N_
SO
T3
63
-6~
D
PQ
80
6B
DM
N6
6D
0L
DW
-7 2
N_
SO
T3
63
-6~
D3
5
4
PR840
100K_0402_5%~D
PR840
100K_0402_5%~D
1 2
PR812
0_0402_5%
@ PR812
0_0402_5%
@1 2
G
D
S
PQ832
DMN65D8LW-7_SOT323-3~D
G
D
S
PQ832
DMN65D8LW-7_SOT323-3~D2
13
PR862
0_0402_5%
@ PR862
0_0402_5%
@1 2
PQ812A
DMN66D0LDW-7 2N_SOT363-6~D
PQ812A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
G
D
S PQ817DMN65D8LW-7_SOT323-3~D
G
D
S PQ817DMN65D8LW-7_SOT323-3~D
2
13
PQ821ADMN66D0LDW-7 2N_SOT363-6~D
PQ821ADMN66D0LDW-7 2N_SOT363-6~D
612
PR807
100K_0402_5%~D
PR807
100K_0402_5%~D
12
PR856
0_0402_5%~D
@ PR856
0_0402_5%~D
@
12
PR830100K_0402_5%~D
PR830100K_0402_5%~D
12 P
Q8
19
BD
MN
66
D0
LD
W-7
2N
_S
OT
36
3-6
~D
@
PQ
81
9B
DM
N6
6D
0L
DW
-7 2
N_
SO
T3
63
-6~
D
@
3
5
4
PR863
0_0402_5%
@ PR863
0_0402_5%
@1 2
PD816
SDMK0340L-7-F_SOD323-2~D
PD816
SDMK0340L-7-F_SOD323-2~D
12
PR825
0_0402_5%
@ PR825
0_0402_5%
@1 2
PU807TC7SH08FU_SSOP5~D
PU807TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
PQ811
FDS6679AZ-G_SO8~D
PQ811
FDS6679AZ-G_SO8~D
3 65
78
2
4
1
PD808
PDS5100H-13_POWERDI5-3~D
PD808
PDS5100H-13_POWERDI5-3~D
2 31
PR8310_0402_5%
@ PR8310_0402_5%
@
1 2
PR844
10K_0402_5%~D
@ PR844
10K_0402_5%~D
@
12
2
1
3
PQ822
NTR4502PT1G 1P SOT23-32
1
3
PQ822
NTR4502PT1G 1P SOT23-3
2
13
PR828
10K_0402_5%~D
PR828
10K_0402_5%~D1 2
PR823
100K_0402_5%~D
PR823
100K_0402_5%~D
12
PR821820_0603_5%~D
PR821820_0603_5%~D
1 2
PC8110.01U_0603_25V7K~D
PC8110.01U_0603_25V7K~D
12
PU801
TC7SH08FU_SSOP5~D
PU801
TC7SH08FU_SSOP5~D
B1
A2
G3
O4
P5
PQ805B
DMN66D0LDW-7 2N_SOT363-6~D
PQ805B
DMN66D0LDW-7 2N_SOT363-6~D
3
5
4
PC809
1500P_0402_7K~D
@
PC809
1500P_0402_7K~D
@
12
PQ807A
DMN66D0LDW-7 2N_SOT363-6~D
PQ807A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
PC
81
70
.1U
_0
40
2_
25
V4
Z~
D
@
PC
81
70
.1U
_0
40
2_
25
V4
Z~
D
@
12
PQ819ADMN66D0LDW-7 2N_SOT363-6~D
@ PQ819ADMN66D0LDW-7 2N_SOT363-6~D
@
61
2
PR877
0_0402_5%
@ PR877
0_0402_5%
@1 2
PD810
SDMK0340L-7-F_SOD323-2~D
PD810
SDMK0340L-7-F_SOD323-2~D
1 2
PR802
100K_0402_5%~D
PR802
100K_0402_5%~D
12
PQ821B
DMN66D0LDW-7 2N_SOT363-6~D
PQ821B
DMN66D0LDW-7 2N_SOT363-6~D
3
5
4PU800
CD3301BRHHR_QFN36_6X6~D
PU800
CD3301BRHHR_QFN36_6X6~D
DC_IN1
SS_GC2
ERC13
ACAVDK_SRC4
GND5
SDC_IN6
DC_BLK_GC7
ACAV_IN8
SS
_D
CB
LK
_G
C1
6
CS
S_
GC
10
DK
_C
SS
_G
C1
1
ER
C3
12
ER
C2
13
GN
D1
4
PW
R_
SR
C1
5
BLKNG_MOSFET_GC20SL_BAT_PRES#21DK_AC_OFF_EN22GND23ACAV_IN_NB24DK_AC_OFF_EN25PBATT_OFF26P50ALW27
PB
att
+2
8D
SC
HR
G_
MO
SF
ET
_G
C2
9B
LK
_M
OS
FE
T_
GC
30
NC
31
DK
_P
WR
BA
R3
3D
C_
IN_
SS
34
CH
AR
GE
RV
R_
DC
IN3
5
P33ALW29
EN
_D
K_
PW
RB
AR
17
P3
3A
LW
18
TP37
NBDK_DCINSS19
NC
36
GN
D3
2
PR837100K_0402_5%~D
PR837100K_0402_5%~D
12
PR8610_0402_5%
@ PR8610_0402_5%
@
1 2
PR854
0_0402_5%
@ PR854
0_0402_5%
@1 2
PQ
81
2B
DM
N6
6D
0L
DW
-7 2
N_
SO
T3
63
-6~
DP
Q8
12
BD
MN
66
D0
LD
W-7
2N
_S
OT
36
3-6
~D 3
5
4
PQ813A
DMN66D0LDW-7 2N_SOT363-6~D
PQ813A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Based on PDDG rev 0.7 Table 5-1.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
PROCESSOR DECOUPLING
49 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
PROCESSOR DECOUPLING
49 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
PROCESSOR DECOUPLING
49 58Friday, May 17, 2013
Compal Electronics, Inc.
PC92822U_0805_6.3V6MPC92822U_0805_6.3V6M
1
2
PC92422U_0805_6.3V6M
@PC92422U_0805_6.3V6M
@
1
2
PC90422U_0805_6.3V6MPC90422U_0805_6.3V6M
1
2
PC91322U_0805_6.3V6MPC91322U_0805_6.3V6M
1
2
PC90522U_0805_6.3V6MPC90522U_0805_6.3V6M
1
2
PC91222U_0805_6.3V6MPC91222U_0805_6.3V6M
1
2
PC91722U_0805_6.3V6MPC91722U_0805_6.3V6M
1
2
PC90622U_0805_6.3V6MPC90622U_0805_6.3V6M
1
2
PC91922U_0805_6.3V6M
@PC91922U_0805_6.3V6M
@
1
2
PC92322U_0805_6.3V6M
@PC92322U_0805_6.3V6M
@
1
2
PC92122U_0805_6.3V6MPC92122U_0805_6.3V6M
1
2
PC90122U_0805_6.3V6M
@PC90122U_0805_6.3V6M
@
1
2
PC90922U_0805_6.3V6MPC90922U_0805_6.3V6M
1
2
PC92222U_0805_6.3V6MPC92222U_0805_6.3V6M
1
2
PC91522U_0805_6.3V6MPC91522U_0805_6.3V6M
1
2
PC90722U_0805_6.3V6M
@PC90722U_0805_6.3V6M
@
1
2
PC91422U_0805_6.3V6MPC91422U_0805_6.3V6M
1
2
PC90322U_0805_6.3V6MPC90322U_0805_6.3V6M
1
2
PC91822U_0805_6.3V6M
@PC91822U_0805_6.3V6M
@
1
2
PC91622U_0805_6.3V6MPC91622U_0805_6.3V6M
1
2
PC91122U_0805_6.3V6M
@PC91122U_0805_6.3V6M
@
1
2
PC91022U_0805_6.3V6M
@PC91022U_0805_6.3V6M
@
1
2
PC90022U_0805_6.3V6MPC90022U_0805_6.3V6M
1
2
PC92922U_0805_6.3V6MPC92922U_0805_6.3V6M
1
2
PC90822U_0805_6.3V6MPC90822U_0805_6.3V6M
1
2
PC92722U_0805_6.3V6MPC92722U_0805_6.3V6M
1
2
PC92522U_0805_6.3V6MPC92522U_0805_6.3V6M
1
2
PC90222U_0805_6.3V6M
@PC90222U_0805_6.3V6M
@
1
2
PC92622U_0805_6.3V6MPC92622U_0805_6.3V6M
1
2
PC92022U_0805_6.3V6MPC92022U_0805_6.3V6M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
P age 1P age 1P age 1P age 1
Solution D escriptionSolution D escriptionSolution D escriptionSolution D escription R ev .R ev .R ev .R ev .P age#P age#P age#P age# T itleT itleT itleT itle
V ersion C hange L ist ( P . I . R . L ist )V ersion C hange L ist ( P . I . R . L ist )V ersion C hange L ist ( P . I . R . L ist )V ersion C hange L ist ( P . I . R . L ist )
ItemItemItemItem Issue D escriptionIssue D escriptionIssue D escriptionIssue D escriptionD ateD ateD ateD ateR equestR equestR equestR equest
O w nerO w nerO w nerO w ner
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
2
3
4
5
6
1 P45 1.5VSP 8/17 Compal Base power budget request, add 1.5V powre rail Add PU400
P42 +5V/+3.3V 8/17 Compal reserver PR114 for TPS51282 application ADD @PR114
P47 Charger 8/17 Compal modify SMBus net for correct connectEC can't detect charger IC cause can't charger
P46 Vcore 8/17 Compal schematic control error cause can't set OCP add Vref net for correct connect
P48 Selector 8/17 Compal in order to meet latest multi-battery request change control signal for meet E5 request
P43 1.35V/0.675V 8/17 Compal chagne OCP setting change PR201 from 20k to 24.9k.
Reserve 0ohm for 3v5v enable debug
Compal10/22+1.05V_MPP448
7
+1.05V_MP EA for ripple portion can't meet
spec. 31.5mv, after change from 1u to 2.2u test is pass
Change PL300
from SH00000PJ00 (S COIL 1UH +-20% PCMB063T-1R0MS 12A)
to SH00000MR00 (S COIL 2.2UH +-20% ETQP3W2R2WFN 8.5A)
P42 +5V/+3.3V 10/22 Compal
Original 3v5v IC -TPS51225 can't support 2cell battery
follow TI suggestion, When TPS51285A/B is used,
please update the below four components.
1)VREG5 cap to 4.7uF
2)VREG3 cap to 4.7uF
3)CS1 resistor to 1/5 of the Tps51275’s value
4)CS2 resistor to 1/5 of the Tps51275’s value
5)VCLK connection (when not be used): add 200-ohm to GND
10/22 Compal+5V/+3.3VP429
X01Change PR113
from SD03420018L (S RES 1/16W 2K +-1% 0402)
to SD028000080 (S RES 1/16W 0 +-5% 0402)
X01
Change PU100from SA00005LS00 (S IC TPS51225CRUKR QFN 20P PWM) to SA000064T00 (S IC TPS51285BRUKR QFN 20P PWM)
1)2)Change PC118(VREG5 Cap) and PC100(VREG3 Cap) from SE080105K80(S CER CAP 1U 10V K X5R 0603) to SE00000MA00(S CER CAP 4.7U 10V K X5R 0603)
X01
3) Change PR106(for CS1) from SD03484528L (S RES 1/16W 84.5K +-1% 0402) to SD034169280 (S RES 1/16W 16.9K +-1% 0402)
4) Change PR105(for CS2) from SD03410038L (S RES 1/16W 100K +-1% 0402) to SD034200280 (S RES 1/16W 20K +-1% 0402)
5) Add PR114 SD034200080(S RES 1/16W 200 +-1% 0402)
To avoid HW and Power SMT materials can't entirely
replaceChange PU3,PU801,PU804,PU805,PU806,PU807
from SA74108040L(S IC 74AHC1G08GW SOT353 AND)
to SA00708012L(S IC TC7SH08FU SSOP 5P AND)
X01P47 Charger
P48 Selector
Compal10/2210
ChargerP4711 10/22 Compal follow E5- Salado 14"15" schematic 1) @PQ819, @PQ824 X012) EMI request for add PL700
SH00000IW00(S COIL 1UH +-20% PCMB042T-1R0MS 4.5A)
12 follow TI suggestion modify setting value to meet Intel
VR12.6(ULV) validation EA
1) Imon
2) Loadline
3) transient
Compal11/02VcoreP461) Change PR501
from SD034422380 (S RES 1/16W 422K +-1% 0402)
to SD034365380 (S RES 1/16W 365K +-1% 0402)
2) Change PR521
from SD000009M80 (S RES 1/16W 2.61K +-1% 0402)
to SD00000WS8L(S RES 1/16W 2.32K +-1% 0402)
3) @PC506 100p_0402 and change PR535
from SD02810028L(S RES 1/16W 10K +-5% 0402)
to SD034487100 (S RES 1/16W 4.87K +-1% 0402 (LF))
X01
Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
PWR_PIR 1
50 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
PWR_PIR 1
50 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
PWR_PIR 1
50 58Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
P age 1P age 1P age 1P age 1
Solution D escriptionSolution D escriptionSolution D escriptionSolution D escription R ev .R ev .R ev .R ev .P age#P age#P age#P age# T itleT itleT itleT itle
V ersion C hange L ist ( P . I . R . L ist )V ersion C hange L ist ( P . I . R . L ist )V ersion C hange L ist ( P . I . R . L ist )V ersion C hange L ist ( P . I . R . L ist )
ItemItemItemItem Issue D escriptionIssue D escriptionIssue D escriptionIssue D escriptionD ateD ateD ateD ateR equestR equestR equestR equest
O w nerO w nerO w nerO w ner
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
14
15
13 Compal
P42 +5V/+3.3VCompal
P47 Charger
Compal
Compal
- EMC team
Wen. Andy
P48
+1.05VTTP
1.35V/0.675V
11/05
+1.05V_MP
18 +5V/+3.3V
2) Reserve 0 ohm for debug
1) TI suggestion BQ24715 cell pin pull high 3.3V change
to V_regn(6v) for sequence issue
Delete @PR731, @PR733, @PU702
1) Change PR711
from SD02800008L (S RES 1/16W 0 +-5% 0402)
to SD034100280 (S RES 1/16W 10K +-1% 0402)
,add PR750 SD028000080(S RES 1/16W 0 +-5% 0402)
2) Add @PR751
Improve charger efficiency Change PR715
from SD028200A80 (S RES 1/16W 20 +-5% 0402)
to SD013220B80 (S RES 1/10W 2.2 +-5% 0603)
11/05 X01
follow E5- Salado 14"15" schematic X0111/051) @PR863, @PR870, @PR869, @PR824, @PR875, @PQ823
2) Add @PR848, @PR851
and add PR834, PR852, PR853, all is
SD028000080(S RES 1/16W 0 +-5% 0402)
P47 Charger 11/05 X01
3) Add PR874 SD028100480(S RES 1/16W 1M +-5% 0402)
4) Add PD819 SCS0340L01L(S SCH DIO SDMK0340L-7-F SOD-323)
X0116 P47 Charger 11/05 Compal
17X01
follow E5- Salado 14"15" schematic
P44 11/05Compal
-QAD team
-Huang.Hanks
(PCP)
Support QAD WCEPTA analysis, to modify 1.05 OCP Rtrip
resistance to 95K, Cpk value will pass specification.
Change PR302
from SD00000H880 (S RES 1/16W 54.9K +-1% 0402)
to SD034953280 (S RES 1/16W 95.3K +-1% 0402 )
X01EMC team suggestion @PC105, @PC203, @PC301
19 follow E5- Salado 14"15" schematicAdd
PQ827 SB00000UO00 (S TR DMN65D8LW-7 1N SOT323-3),
@PR856 SD028000080 (S RES 1/16W 0 +-5% 0402),
PQ816 SB534020000 (S TR AO3402 1N SOT-23),
PQ828 SB00000UO00 (S TR DMN65D8LW-7 1N SOT323-3),
PR861 SD028000080 (S RES 1/16W 0 +-5% 0402)
PR802, PR827, PR840 change
from SD028240380 (S RES 1/16W 240K +-5% 0402)
to SD028470280 (S RES 1/16W 47K +-5% 0402),
PR804, PR826, PR839 change
from SD028470280 (S RES 1/16W 47K +-5% 0402),
to SD028240380 (S RES 1/16W 240K +-5% 0402)
11/15 CompalSelectorP48 X01
X0120 P47 Charger
P48 Selector
12/12 Compal Change PR713
from SD034294380 (S RES 1/16W 294K +-1% 0402)
to SD034261380 (S RES 1/16W 261K +-1% 0402)
@PR844
P41 ESD team's PD1 vendor(NXP) proposal PD1 pin 5
connected to the VCC (5V or 3.3V).21 +DCIN 2013
/01/11Compal-
ESD team
PD1 pin5 connect to +3.3V_ALW X01_2
for undock shutdown issue
Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
PWR_PIR 2
51 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
PWR_PIR 2
51 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9591P 0.3
PWR_PIR 2
51 58Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
P age 1P age 1P age 1P age 1
Solution D escriptionSolution D escriptionSolution D escriptionSolution D escription R ev .R ev .R ev .R ev .P age#P age#P age#P age# T itleT itleT itleT itle
V ersion C hange L ist ( P . I . R . L ist )V ersion C hange L ist ( P . I . R . L ist )V ersion C hange L ist ( P . I . R . L ist )V ersion C hange L ist ( P . I . R . L ist )
ItemItemItemItem Issue D escriptionIssue D escriptionIssue D escriptionIssue D escriptionD ateD ateD ateD ateR equestR equestR equestR equest
O w nerO w nerO w nerO w ner
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
22 P481). Add PU808
P/N: SA007080120 (S IC TC7SH08FU SSOP 5P AND)
2). Add PQ830
P/N: SB000007900 (S TR NTR4502PT1G 1P SOT23-3)
3). Add PQ831
P/N: SB00000UO00 (S TR DMN65D8LW-7 1N SOT323-3)
4). Add PD821
P/N: SCS0340L010 (S SCH DIO SDMK0340L-7-F SOD-323)
5). Add PR836, PR837
P/N: SD028100380 (S RES 1/16W 100K +-5% 0402)
6). Add PC814
P/N: SE102104K00 (S CER CAP 0.1U 10V +-10% X7R 0402)
X01_2To avoid +DOCK_PWR_BAR leakage voltage when system
only with main batterySelector 2013/
01/23Compal
P41 +DCIN 2013
/02/07Compal23 X02PPM-Jovins_Chang and Sourcer-Willie_Zeng highlight
SB000009N8L will shortage after 2013/05Change PQ6
From : SB000009N8L (S TR IMD2AT-108 PNP/NPN SC74-62)
To : SB000009P80 (TR DCX124EK-7-F PNP/NPN SC74R-6)
Selector 2013/
02/18Compal24 P48 GPIO net - AC_DIS# is high active. Corrent net name.
AC_DIS circuit modify to improve output voltage level.
1). Change PQ6A.5 and PR828.1 net name from AC_DIS#
to AC_DIS
2). Add PQ829
P/N: SB00000H500 (S TR SI2301CDS-T1-GE3 1P SOT23-3)
, PQ832
P/N: SB00000UO00 (S TR DMN65D8LW-7 1N SOT323-3)
, PD820
P/N: SCS0340L010 (S SCH DIO SDMK0340L-7-F SOD-323)
, @PR894
, PR895
P/N: SD028000080 (S RES 1/16W 0 +-5% 0402)
3). modify PR828,PR830
4). Delete PQ820
5). Delete PL5, add PJP1
P41 +DCIN25 2013/
02/18Compal-ME DFX highlight Battery connetor(locattion:PBATT1)
hard to insert.
Battery connetor(locattion:PBATT1) footprint follow
ME team Iris requesti to change
from SUYIN_200277GR009M262ZR_9P-T
to ALLTO_C144LS-109A9-L_9P-T
X02
X02
Selector 2013/
02/1826 CompalP48 layout spec limit Delete PD817, modify PD815 footprint same as PD701,
from SDMK0340L-7-F_SOD323-2
to RB717F_SOT323-3
X02
SelectorP48
VcoreP4627
2013/
02/18Compal-
ESD team
Hsu. Matt
Add snubber component by ESD team request Add
PC508, PC714
P/N:SE025821K80 (S CER CAP 820P 50V K X7R 0603)
PR522, PR724
P/N:SD001470B80 (S RES 1/4W 4.7 +-5% 1206 )
X02
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
PWR_PIR 3
52 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
PWR_PIR 3
52 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
PWR_PIR 3
52 58Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
P age 1P age 1P age 1P age 1
Solution D escriptionSolution D escriptionSolution D escriptionSolution D escription R ev .R ev .R ev .R ev .P age#P age#P age#P age# T itleT itleT itleT itle
V ersion C hange L ist ( P . I . R . L ist )V ersion C hange L ist ( P . I . R . L ist )V ersion C hange L ist ( P . I . R . L ist )V ersion C hange L ist ( P . I . R . L ist )
ItemItemItemItem Issue D escriptionIssue D escriptionIssue D escriptionIssue D escriptionD ateD ateD ateD ateR equestR equestR equestR equest
O w nerO w nerO w nerO w ner
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
28 P481). Change PC703 from 0.1U to 1U
P/N: SE000006900 (S CER CAP 1UF 25V K X5R 0603)
2). Change PC706 from 1U to 0.1U
P/N: SE00000QK00 (S CER CAP 10U 25V K X5R 0805 H1.25)
3). Change PC708 from 0.01U to 10U
P/N: SE00000G880 (S CER CAP 0.1U 25V K X5R 0402)
4). Change PR734 from 100K ohm to 210K ohm
P/N: SD034210380 (S RES 1/16W 210K +-1% 0402)
Change PR735 from 46.4K ohm to 69.8K ohm
P/N: SD034698280 (S RES 1/16W 69.8K +-1% 0402)
5). Add @PC740
6). Change PR738.pin1 from BQ24715_REGN connect to +3.3V_ALW2.
Change PR738 from 118K ohm to 48.7K ohm
P/N: SD034487280 (S RES 1/16W 48.7K +1% 0402)
Change PR744 from 12K ohm to 10K ohm
P/N: SD034100280 (S RES 1/16W 10K +-1%
7). Change PR748 from 6.8 ohm to 210K ohm
P/N: SD034442A80 (S RES 1/16W 44.2 +-1% 0402)
Change PR749 from 10 ohm to 69.8K ohm
P/N: SD00000W200 (S RES 1/16W 59 +-1% 0402)
1) For Input current sense stablilze
2) To provent charger into sleep mode dual
AC transient.
3) Fine tune ACOK response time.
4) Adapter protect rating setting
5) Fine tune H_PROCHOT# response time.
6) Improve ACAV_IN_NB ref voltage accuracy.
7) Improve current sense accuracy.
Selector 2013/
02/21Compal X02follow E5- Salado 14"15" schematic
P46 Vcore29 2013/
02/26
Compal-
ESD team
Hsu. Matt
Add 22U_0805 by ESD team request Change PC732, PC736 from 10U to 22U
from
P/N: SE00000QK00 (S CER CAP 10U 25V K X5R 0805 H1.25)
to
P/N: SE00000XH80 (S CER CAP 22U 25V M X5R 0805 H1.25)
X02
X0230 P48 Selector 2013/
02/27Compal Modify resistor value to meet voltage
tolerence 1). Change PR802,PR827,PR840 from 47K ohm to 100K
P/N: SD028100380 (S RES 1/16W 100K +-5% 0402)
2). Change PR804,PR826,PR839 from 240K to 100K
P/N: SD028100380 (S RES 1/16W 100K +-5% 0402)
X02_131 Compal2013/
03/18
1). Add PC741, PC742
P/N: SE00000XH80 (S CER CAP 22U 25V M X5R 0805 H1.25)
follow E5- Salado 14"15" schematic to
add charger input MLCC to 88uChargerP47
2). Due to space limit, so delete @PC701, @PC702,
@PC710
+5V/+3.3V1.35V/0.675V
P42
+1.05V_MPP43P44
32 Compal2013/
03/20
1). Change PL101, PL102, PL200, PL300 PCB FootPrint
change
from CYNTE_PCMC063T-2R2MN_2P
to CYNTE_PCMB064T-3R3MS_2P
support DFX team change choke layout pad
to avoid soldering issueX02_1
Vcore 3). Change PC738
from 33U(SGA00005M00) to 100U
P/N: SGA00008R00 (S POLY C 100U 20V M D ESR55M
(D3L_H=2.8mm)
P46 2013/
03/2133 Support acoustic team to reduce noiseCompal X02_1
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
PWR_PIR 4
53 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
PWR_PIR 4
53 58Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
PWR_PIR 4
53 58Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
T itleT itleT itleT itleP age#P age#P age#P age# R ev .R ev .R ev .R ev .Solution D escriptionSolution D escriptionSolution D escriptionSolution D escriptionR equestR equestR equestR equest
O w nerO w nerO w nerO w nerD ateD ateD ateD ate Issue D escriptionIssue D escriptionIssue D escriptionIssue D escriptionItemItemItemItem
V ersion Change L ist ( P . I . R . L ist )V ersion Change L ist ( P . I . R . L ist )V ersion Change L ist ( P . I . R . L ist )V ersion Change L ist ( P . I . R . L ist )
ESD 11/05/20121 ESD team request22,40,38
26,34
COMPAL 0.2(X01)Remove D3,D27,D22,DE1,DE2
Reserve D20
Safty2 COMPAL 0.2(X01)27 11/05/2012 Safty team request Pop F2 and reserve R160
3 HW COMPAL 0.2(X01)37 11/05/2012 Based on align E5,P5 Fan module pin define Swap JFAN1 pin define
HW4 22,40,38
26
11/06/2012 To avoid PT phase occurs ESD issue and
change back ESD request
COMPAL Reserve D3,D27,D22,DE1,DE2 0.2(X01)
DELL drop Media LED function Remove backlight LED function and change connector to 6pin40 36 DELLHW 11/08/20125 0.2(X01)
HW COMPAL26 Remove EMI solution at Speaker side Remove R132, R133, R134 and R1356 11/09/2012 0.2(X01)
DELL DELL drop ALS function Remove ALS interface from EC and CPU side than move touch screen
signal to eDP side
0.2(X01)HW12,22,37 11/09/20127
COMPAL change Webcam power enable from PCH pop R106 and de-pop R102HW 11/09/2012228 0.2(X01)
COMPAL Schmatic error and remove eDP backlight
control pull up resistor
Remove RC150 0.2(X01)HW9 10 11/09/2012
10 39 +1.05V_MODPHY can't meet INTEL timing spec change +1.05V_MODPHY to MOS solutionCOMPALHW 11/12/2012 0.2(X01)
11 HW18 19 11/12/2012 COMPAL Remove DIMM VERF power rail from power side Remove RD2, RD4, RD8 and RD9 0.2(X01)
COMPAL12 HW remove D10 R160 F2 and add U50 de-pop C383change miniDP OCP solution 27 11/12/2012 0.2(X01)
13 HW COMPAL26 refer salado 14" to change PCBEEP circuit remove C132,C146,R146,R138,C133 and C143 than add C145,C146,R147,R151
and de-pop R194 R153
11/12/2012 0.2(X01)
14 HW COMPAL26 If doesn't has external power, Sleeve will
be floating mode and no reference GND.
Add AUD_NB_MUTE# to control Sleeve pin.11/12/2012 0.2(X01)
15 HW COMPAL37 11/12/2012 Change board ID to X01 change R392 form 240K to 130Kohm 0.2(X01)
16 HW COMPAL21 11/12/2012 Vendor update schematic for power saving
R85 change to 3.74K_1%
change +1.05V_RUN_VMM power enable signal from LP_EN to DOCKED and add
+3.3V_RUN_VMM for DP2320 series 3.3V power rail
remove L3 and move U6.E5 to +1.05V_VMM_VDD power rail
change U6.J4 to +3.3V_RUN_VDDA
remove LP_EN, R232 and U6A.A5 to NC
remove R55 and pop-option R207 when use VMM2310
0.2(X01)
17 COMPAL21 HW 11/12/2012 change VMM2320 config remove DP to VGA PTN3392 circuit and add 0ohm pop option for 2320 config 0.2(X01)
11/13/2012HW COMPAL18 Add Mic power and remove DBC function22 Add 3.3V_RUN for Mic power and remove DBC function at JeDP.2 0.2(X01)
1919 change RC68, RC126 and RC173 from 2.2 to 2ohm 1%
change RC67,RC69,RC130,RC132,RC217 and RC221 from 1.82K to 1.8Kohm 1%
refer PDG1.0 to change SODIMM control
circuit resistor
11/13/2012HW COMPAL 0.2(X01)
HW COMPAL37,36,12 11/13/2012 GPIO map update to 2.7 version Move EC_WAKE# from ECE5048[L]5 to MEC5075 GPIO52.
Change name: 1.5V_SUS_PWRGD to 1.35V_SUS_PWRGD for DDR3L.
Add NFC_DET# ECE5048 GPIOL[5] to NFC moudle & add R38 PU
20 0.2(X01)
11/13/2012 change JmDP1,JNFC1,JMEDIA,JKBTP1,JUSH1ME change connectorCOMPALME 0.2(X01)20,27,29
,38,40
21
align AUX/DDC SW voltage with DP Hub to +3.3V_RUN_VMMVendor update schematic for power savingCOMPAL11/14/2012HW2422 0.2(X01)
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
EE P.I.R (1/6)
54 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
EE P.I.R (1/6)
54 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
EE P.I.R (1/6)
54 59Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
T itleT itleT itleT itleP age#P age#P age#P age# R ev .R ev .R ev .R ev .Solution D escriptionSolution D escriptionSolution D escriptionSolution D escriptionR equestR equestR equestR equest
O w nerO w nerO w nerO w nerD ateD ateD ateD ate Issue D escriptionIssue D escriptionIssue D escriptionIssue D escriptionItemItemItemItem
V ersion Change L ist ( P . I . R . L ist )V ersion Change L ist ( P . I . R . L ist )V ersion Change L ist ( P . I . R . L ist )V ersion Change L ist ( P . I . R . L ist )
HW 11/15/201223 update SATA topology fro Mainstream CPU 2,3,6,34 COMPAL 0.2(X01)exchange SATA1&SATA2 topology
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
24 HW 11/15/201212 Pop RC301 to link LAN_WAKE# and EC_WAKE#Add LAN_WAKE# T-topology COMPAL 0.2(X01)
HW COMPAL11/15/20121525 change RC252 to PJP11(1mm jumper-short)remove RC252 for cost saving 0.2(X01)
HW26 16 11/15/2012 INTEL MOW_WW46 request change for VCCUSB3PLL and
VCCSATA3PLL
change CC42 and CC49 from 1u_0402 to 22u_0603
change CC76 and CC77 from 100u_1206 to 22u_0603
0.2(X01)
COMPAL27 Change U20, U26, U29 and U30 from SA74108040L to SA00708012L change AND gate to same source11/15/2012HW20,28,30,31 0.2(X01)
COMPAL34 11/15/2012 ME change Docking connector change JDOCK1 that Pin145 from PWR1 to GND1 & Pin148 from PWR2 to GND228 ME 0.2(X01)
11/15/201238,12 remove U40, R458,C424 and C423remove +3.3V_TP power load switch solutionCOMPALHW29 0.2(X01)
30 HW COMPAL22 11/15/2012 change LCDVDD power control circuit change U9 from TPS22966 to APL3512 solution 0.2(X01)
31 HW COMPAL31,32 11/15/2012 remove TPS22965 solution remove U51(TPS22965) and U34(TPS22965) than add U3(TPS22966) 0.2(X01)
32 10,27 HW 11/15/2012 COMPAL ESD solution for black screen issue Add CC450 on EDP_CPU_HPD to GND and C451 on DPC_HPD to GND 0.2(X01)
33 40 ME 11/16/2012 COMPAL ME change drawing Add H18 and H10,H11 change size from 2.3 to 3.4 ,
H5 change size from 2.8 to 2.3
0.2(X01)
HW34 COMPAL remove D4,D5,D6,D7 and add D10,D21change diode to daul-diode fro cost saving11/16/201222 0.2(X01)
35 ME COMPAL40 11/16/2012 ME request change SW1 to SKRBAAE010 0.2(X01)
change SD1ME change connectorCOMPAL11/16/2012ME3036 0.2(X01)
COMPALHW37 Add PJP12~25 for +1.05V_RUN_VMM,+3.3V_RUN_VMM,+3.3V_ALW_PCH,+1.05V_RUN,
+3.3V_SUS,+3.3V_M,+5V_RUN,+3.3V_RUN,+3.3V_LAN,+3.3V_mSATA_WWAN,+3.3V_HDD
,+3.3V_WLAN,+5V_RUN_AUDIO,+3.3V_RUN_AUDIO
For EA rework request11/16/201221,26,28,
31,39
0.2(X01)
COMPALHW38 change Q11,Q13 and Q14 form SB000008P0L to SB33904510Lchange thermal diode for cost saving11/19/201237 0.2(X01)
COMPALHW39 11/19/201238,26,30,22
change L44 and L45 from SM01000558L to SM01000C500
change L35 and L36 from SM01000AM0L to SM01000C500
change LE1 from SM01000DH0L to SM01000BV00
change L21 from SM01001788L to SM010005N00
change Bead for cost reduce
0.2(X01)
HW40 COMPAL Change JAPS1.11 net name from SIO_PWRBTN# to POWER_SW#_MBchange APS pin 11 net_name for DELL APS debug11/19/20129 0.2(X01)
HW COMPAL41 support TLS confidentility 11/19/201212,28change net name from HOST_ALERT1_R_N to PCH_GPIO15, and pop RC190
remove R1880.2(X01)
42 COMPALHW37 11/19/2012 change thermal OTP to 98 degree change R394 from 1.24K to 1.82K_1% 0.2(X01)
43 31 HW 11/20/2012 COMPAL Intel notice remove HDD_DEVSLP function on
WWAN JMINI port
remove HDD_DEVSLP from JMINI2.44
de pop HDD_DEVSLP pull up resistor R155
0.2(X01)
44 28 HW 11/20/2012 COMPAL LOM LED issue reverse Q32,Q33 of C & D gate 0.2(X01)
45 22 HW 11/20/2012 COMPAL 0.2(X01)ME change connector change JLED1
HW3546 COMPAL11/21/2012 change L54 pat to DLW21SN900SQ2L that same with L42, L39Align EMI part 0.2(X01)
47 15 HW 11/22/2012 COMPAL Per Intel CRB updated change VCCST_PWRGD pull high value from 10K ohm to 1K ohm 0.2(X01)
0.2(X01)48 26 HW 11/22/2012 COMPAL Universal Jack no longer supported on X5 Remove D9,D11,R209,R210,C195,C196,R198,R199
49 6,12,25,31 HW 11/26/2012 DELL For support DEVSLP on WWAN JMINI2 & mSATA
JMINI3
SATA HDD change from port0 to port1, and connect HDD_DEVSLP
Dock change from port1 to port2, and connect mSATA_DEVSLP
0.2(X01)
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
EE P.I.R (2/6)
55 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
EE P.I.R (2/6)
55 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
EE P.I.R (2/6)
55 59Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
T itleT itleT itleT itleP age#P age#P age#P age# R ev .R ev .R ev .R ev .Solution D escriptionSolution D escriptionSolution D escriptionSolution D escriptionR equestR equestR equestR equest
O w nerO w nerO w nerO w nerD ateD ateD ateD ate Issue D escriptionIssue D escriptionIssue D escriptionIssue D escriptionItemItemItemItem
V ersion Change L ist ( P . I . R . L ist )V ersion Change L ist ( P . I . R . L ist )V ersion Change L ist ( P . I . R . L ist )V ersion Change L ist ( P . I . R . L ist )
HW 11/26/201250 change Bead for cost reduce21,26 COMPAL 0.2(X01)L6 and L7 from SM01000GG0L to BLM15PX471SN1D(SM01000M700)
L22, L23, L24 and L25 from SM010028800 to BLM15PX121SN1D(SM01000L300)
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
51 31 HW 11/26/2012 COMPAL change WWAN power control signal Change U3.5 from 3.3_1.5V_WLAN_E to SIO_SLP_WLAN# 0.2(X01)
52 NFC_DET# change to PCH side GPIO5912,36 HW 11/27/2012 COMPAL UC1.AT5 change from PCH_GPIO59 to NFC_DET#
U37.B1 change to NC0.2(X01)
53 HW 11/27/2012 COMPAL 0.2(X01)Remove ESD reserve location Per ESD experiment, D3,D27,D22,DE1,DE2 can be remove22,26,38,40
54 33 HW 11/27/2012 COMPAL Per USB2.0 EA result Change U42 from SM01002080L(DLW21SN900SQ2L) to SM070001600(OCE2012120YZF)0.2(X01)
55 6,12,25,31 HW 11/27/2012 DELL Per Dell requset, only JMINI3(mSATA )
support DEVSLP
SATA HDD use port0 ,Dock use port1 0.2(X01)
HW 11/28/2012 COMPAL change +3.3V_WLAN PWR control from SIO_SLP_WLAN# to AUX_EN_WOWLchange +3.3V_WLAN PWR control 0.2(X01)56
57
31
28 HW 11/28/2012 COMPAL change +3.3V_mSATA_WWAN control from WWAN_mSATA_EN to MCARD_WWAN_PWRENchange +3.3V_mSATA_WWAN control 0.2(X01)
58 34 HW 11/28/2012 COMPAL For EMI request, change to 33 ohm for
docking DVI noise0.2(X01)
R252/R253/R254/R255/R256/R257/R258/R259/R260/
R261/R262/R263/R264/R265/R266/R267 change to 33ohm from 0 ohm
59 21 HW 11/28/2012 COMPAL For use IDT2320, need change EEPROM PN U7 change from SA00003FL10(W25X10BVSNIG) to SA00006HH00(W25X10CLSNIG) 0.2(X01)
60 HW 11/28/2012 COMPAL22 change Bead for cost reduce LE1 change from SM01000DH0L(BLM18BB221SN1D)to SM01000BV00(BLM15BB221SN1D)0.2(X01)
61 6,25,31 HW DELL11/29/2012 To support mainstream and Premium CPU,
change to SATA port assignment.
SATA HDD change from port0 to port1, and connect HDD_DEVSLP
Dock change from port1 to port0, and connect mSATA_DEVSLP0.2(X01)
62 12,31,34 HW 11/29/2012 DELL To support the SATA DevSLP function for
new SATA port assignment.
Change DEVSLP0/GPIO33 to mSATA_DEVSLP
and DEVSLP1 to HDD_DEVSLP
0.2(X01)
63 33 HW 01/10/2013 COMPAL For USB3.0 EA result L37 & L38 change to SM070000S80(S COM FI_ CHENG HANN WCM2012F2SF-670T04) 0.3(X02)
64 40 HW 01/10/2013 COMPAL For ME team force test result SW1 change to SN111005800(S TACK SW BCL31 SKRBAAE010 SPST) 0.3(X02)
65 9 HW 01/17/2013 COMPAL PCH_RSMRST#_R add RC136 10K pull dowm 0.3(X02)For U42 2nd source (MC74VHC1G08DFT2G)can't
boot issue
66 28 HW 01/17/2013 COMPAL For meet INTEL LAN SPEC Y3 change to SJ10000JC00(S CRYSTAL 25MHZ 18PF +-30PPM 7V25000034) 0.3(X02)
67 HW 01/17/2013 COMPAL For trial run U9 2nd source U9 pin 4 & pin5 connect to +3.3V_ALW 0.3(X02)22
68 HW 01/17/2013 COMPAL40 For LED light test result
1.change R435 from 1.8k to 150(SD028150080)
2.R430/R438/R436 from 2.2k to 150(SD028150080)
3.R434 change from 220 to 150(SD028150080)
4.R427 change from 1K to 150 ohm(SD028150080)
5.R429 change from 620 to 330 ohm(SD028330080)
6.R431/R433 change from 330 to150 ohm(SD028150080)
0.3(X02)
69 HW 01/17/2013 COMPAL For prevent EDP pin shift then cause
broken issue
221. modify JEDP1 pin assignment
2. pin 29 (IO_LOOP) add 1k pull down0.3(X02)
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
EE P.I.R (3/6)
56 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
EE P.I.R (3/6)
56 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
EE P.I.R (3/6)
56 59Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
T itleT itleT itleT itleP age#P age#P age#P age# R ev .R ev .R ev .R ev .Solution D escriptionSolution D escriptionSolution D escriptionSolution D escriptionR equestR equestR equestR equest
O w nerO w nerO w nerO w nerD ateD ateD ateD ate Issue D escriptionIssue D escriptionIssue D escriptionIssue D escriptionItemItemItemItem
V ersion Change L ist ( P . I . R . L ist )V ersion Change L ist ( P . I . R . L ist )V ersion Change L ist ( P . I . R . L ist )V ersion Change L ist ( P . I . R . L ist )
HW 12/05/201270 For Audio Presison result25,26 COMPAL0.3(X02)
1.L22/L23/L24/L25 change to SM010019400 from SM01000L300
2.L51/L52 change to SM01000FV00 from SM01000AM0L
3.Delete L50/L53 & add R491/R492 0 ohm-short
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
71 37 HW 12/07/2012 COMPAL Change Board ID for ST R392 change to 33K ohm from 130k ohm 0.3(X02)
72 HW 02/19/2012 COMPAL Change connector tyoe
1. JNFC1 change to 6718K-Y15N-01L
2. JKBTP1 change to 6718K-Y16N-01L
3. JUSH1 change to 6718K-Y20N-00L
4. JUSB3 change to PUBAUE-09FLBS1FF4H0
5.JMEDIA change to 6718K-Y06N-01L
6. SH1 change to 6718K-Y12N-01L
0.3(X02)
73 37 HW 02/21/2012 COMPAL For OTP issue, & change OTP to 96 degree
from 98 degree
1. Q11/Q13/Q14 change to SB000008P00(S TR MMBT3904WT1G NPN SC70-3)
from SB33904510L(S TR PMST3904 NPN SOT323-3)
2. R394 chagne to SD00000SJ80(S RES 1/16W 1.58K +-1% 0402) from
SD034182180(S RES 1/16W 1.82K +-1% 0402)
0.3(X02)
74 7 HW 02/21/2012 COMPAL change JTAA1 connector type JTAA1 change to PANAS_AXK820145WG from ACES_50185-02041-001 0.3(X02)
75 38 HW 02/21/2012 COMPAL Per EMI Test result Remove L44 & L45 0.3(X02)
3876 HW 02/21/2012 COMPAL Per ESD Test result 0.3(X02)Pop C141 & C142 & C143
77 9 HW 02/21/2012 COMPAL change XDP circuit to XDP@add XDP@ for XDP component 0.3(X02)
78 9 HW 02/21/2012 COMPAL update XDP circuit for INTEL ITE can't boot remove RC121 and pop RC102 0.3(X02)
79 9,11,35 HW 02/21/2012 COMPAL Fixed 2 USB Port use the same OC# signal
issue
1.change JUSB3 OC# from USB_OC0# to USB_OC1#
2.change USB_OC1#/3# to USB_OC1#, USB_OC3# and add RC166 for OC1# pull
up resistor
0.3(X02)
80 9,11,35 HW 02/21/2012 COMPAL Add jumper for clock buffer co-layout add PJP26, PJP27 and PJP28 beween UC5 0.3(X02)
Per EMI test result
1.L42 change to SM070003N00(CHILISIN CMM0805-20Y-N)from SM070001600(
SUPERWORLD OCE2012120YZF)
2.L37/L38 change to SM070001R00(MURATA DLW21SN670HQ2L)
from SM070001E0L(MURATA DLW21SN900HQ2L)
3.L8/L39/L54 change to SM070001N00(MURATA DLW21HN900SQ2L)from
SM01002080L(MURATA DLW21SN900SQ2L)
0.3(X02)HW3381 COMPAL02/21/2013
Per ESD test result1. Pop CC71 & CC72 & CC73
2. Add C452 & C453 & C454(@) 22uF 0603 size
3. R338 & R349 & R352 change to 10k ohm from 1k ohm
4. Add C455 & C456 & C457 0.1UF
82 33 HW 02/22/2013 COMPAL0.3(X02)
83 For LID & AOAC S3 wake up issue9,12 HW 02/25/2013 COMPAL Change Net name to SIO_EXT_SMI# from USB_OC3# and change to
PCH_GPIO45 from SIO_EXT_SMI#0.3(X02)
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
EE P.I.R (4/6)
57 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
EE P.I.R (4/6)
57 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
EE P.I.R (4/6)
57 59Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
T itleT itleT itleT itleP age#P age#P age#P age# R ev .R ev .R ev .R ev .Solution D escriptionSolution D escriptionSolution D escriptionSolution D escriptionR equestR equestR equestR equest
O w nerO w nerO w nerO w nerD ateD ateD ateD ate Issue D escriptionIssue D escriptionIssue D escriptionIssue D escriptionItemItemItemItem
V ersion Change L ist ( P . I . R . L ist )V ersion Change L ist ( P . I . R . L ist )V ersion Change L ist ( P . I . R . L ist )V ersion Change L ist ( P . I . R . L ist )
HW 02/25/201384 add RF noise solution at clock buffer7 COMPAL 0.3(X02)
1. add CC86~CC90 between clock signal
2. add RC62 for UC5 power rail
3. change RC100 from 0ohm short to 10ohm
4. change UC5 from IDT_5V60034DCG8 to CYPRESS_CY2304SXI-1T
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
85 23 HW 02/25/2013 COMPAL refer INTEL MOW to upfate HDMI cost reduce
level shifter main link
change R462~R469 resistor from 680(SD034680080) to 470ohm(SD034470080) 0.3(X02)
86 33 HW 02/25/2013 COMPAL change USB charge solution for SAMSUNG phone change U39 from SA00004VH00 to SA00006L600 0.3(X02)
COMPAL02/27/2013HW2687 change R154 from PCH_AUDIO_EN to RUN_ONfor Fixed BIOS fliah HOTSOS issue 0.3(X02)
02/28/2013 COMPAL88 9 HW For ESD request Add CC149(@) on H_PROCHOT# near CPU side 0.3(X02)
02/28/2013 COMPAL89 9 HW Follow INTEL CRB XDP schematic CC68 change to 0.1uF from 0.01uF 0.3(X02)
90 7 02/28/2013 COMPALHW For RF 24MHz issue 1. remove UC5 CC25,CC57,CC80,CC86~CC90,CC22,RC62,RC100,CC23
2. Change RC65 to 0 ohm-short0.3(X02)
91 9 02/28/2013 COMPALHW For Touch panel issue 1.TOUCH_PANEL_INTR# add RC181(@) PU & RC180 PD 0.3(X02)
92 7,29 HW 03/01/2013 COMPAL refer GPIO3.0 to add PCH_TPM_LPC_EN 0.3(X02)1. add RC56 for pull up enable signal and add R198 for pop option
2. change R193 form 0hm to 10ohm
93 7 03/12/2013 COMPALHW Base on INTEL EDS SPEC Update Rev 1.5.1 1. LANCLK_REQ# change to UC1.AD1 from UC1.Y5
2. MINI1CLK_REQ# change to UC1.T2 from UC1.U2
3. MINI2CLK_REQ# change to UC1.N1 from UC1.T2
4. MMICLK_REQ# change to UC1.U5 from UC1.AD1
5. PCH_TPM_LPC_EN change to UC1.Y5 from UC1.U5
0.4(X02)
94 7 HW 03/14/2013 COMPAL For PCIE CLK & PCIE CLK REQ signal mapping 1. CLK_PCIE_LAN change CLKOUT_PCIE port2
2. CLK_PCIE_MINI2 change CLKOUT_PCIE port3
3. CLK_PCIE_MMI change CLKOUT_PCIE port4
4. CLK_PCIE_MINI1 change CLKOUT_PCIE port5
0.4(X02)
0.4(X02)95 30 HW 03/14/2013 COMPAL For O2 enters into test mode unexpectedly
with SD card inserted incompletely issue.
1. SD/MMCCD# add C256(0.1uF) & R493(1M) pull-down to GND
2. C222 change to 1uF(SE000000K80) from 0.1u(SE00000G880)
96 21 HW 03/15/2013 COMPAL For Synaptics vender request 1. Delete VMM2310 co-lay related schematic 0.4(X02)
97 21 HW 03/15/2013 COMPAL For ESD request 1. Add C458(@) &C459(@) &C460(@) &C461(@) 22uF 0603 size 0.4(X02)
98 7 HW 03/18/2013 COMPAL For INTEL request PCIECLK_REQ0# add RC57(10k) pull-high to+3.3V_RUN 0.4(X02)
99 21 HW 03/20/2013 COMPAL For Synaptics vender request 1. Delete R78/R80/R82
2. add C1320.4(X02)
100 21 HW 03/20/2013 COMPAL For ME request 0.4(X02)ST2 change to H_2P8 from CLIP_C5P1
101 9, 12, 15 HW 03/22/2013 COMPAL For ESD request 1. H_CPUPWRGD add CC90 100pF(@) to GND
2. H_THERMTRIP# add CC91 100pF(@) to GND
3. H_VCCST_PWRGD add CC22 100pF(@) to GND
0.4(X02)
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
EE P.I.R (5/6)
58 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
EE P.I.R (5/6)
58 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
EE P.I.R (5/6)
58 59Friday, May 17, 2013
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
T itleT itleT itleT itleP age#P age#P age#P age# R ev .R ev .R ev .R ev .Solution D escriptionSolution D escriptionSolution D escriptionSolution D escriptionR equestR equestR equestR equest
O w nerO w nerO w nerO w nerD ateD ateD ateD ate Issue D escriptionIssue D escriptionIssue D escriptionIssue D escriptionItemItemItemItem
V ersion Change L ist ( P . I . R . L ist )V ersion Change L ist ( P . I . R . L ist )V ersion Change L ist ( P . I . R . L ist )V ersion Change L ist ( P . I . R . L ist )
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
102 9 HW 03/27/2013 COMPAL For Touch panel issue pop RC181 and depop RC180(@) 0.4(X02)
103 9 HW 03/27/2013 COMPALFor XDP SPEC
pop RC97 & RC135 0.4(X02)
104 32 HW 04/24/2013 COMPAL For USB S3 wake up issue U33 power rail change from +3.3V_RUN to +3.3V_SUS 1.0(A00)
105
40
HW
04/25/2013
COMPAL
For LED EA
1.0(A00)
R436 change from150 ohm to 330 ohm;R438 change from 150 ohm to 220 ohm
106 37 HW 04/25/2013 COMPAL Change Board ID for A00 R392 change from33K ohm to 1K ohm 1.0(A00)
9 04/24/2013 For XDP signal should be contact to PCH change RC97 and RC135 to 0ohm short
HW COMPAL107
108 28 HW 04/25/2013 COMPAL for support Vpro reset pin depop U20 and add R145
1.0(A00)
1.0(A00)
109 12 HW 04/25/2013 COMPAL reserve for support non vpro pop option pin reserve RC292 100 ohm pull down 1.0(A00)
110 COMPALHW 05/13/2013 For Crystal EA result & RTC time fail issue 1. CC1 & CC2 change from 18pF to 15pF 1.0(A00)6
111 16 HW 05/17/2013 COMPAL For ESD request Depop CC71/CC72/CC73 1.0(A00)
Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
EE P.I.R (6/6)
59 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
EE P.I.R (6/6)
59 59Friday, May 17, 2013
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
LA-9431P 0.3
EE P.I.R (6/6)
59 59Friday, May 17, 2013
Compal Electronics, Inc.
