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High Power Switching Device SPICE Models
Based on Circuit Response
A Thesis
Submitted to the Faculty
of
Drexel University
by
Bryan A. Weaver
in partial fulfillment of the
requirements for the degree
of
Doctor of Philosophy
August 2011
© Copyright 2011 Bryan A. Weaver. All Rights Reserved
ii
Acknowledgement
Any undertaking of this size cannot take place in a vacuum, with the research for and
writing of this dissertation being no exception. Since this work was often punctuated by
other activities such as family and the formation of my consulting practice, patience and
encouragement were key elements that provided me with the energy and motivation to
complete this undertaking. I would like to thank all of my friends and family who kept
just enough pressure and encouragement on me to assure completion of this endeavor.
Most of all I am indebted to my dear wife Harrie, as I am sure that I would not have been
able to complete this undertaking without her support and encouragement.
I would like to thank committee members Dr. Karen Miu, Dr. Arye Rosen, Dr. Afshin
Daryoush, and Dr. Bahram Nabet for their insightful questions and suggestions during
my thesis defense.
Finally I am also indebted to my advisor Dr. Chika Nwankpa for his support and
guidance, helping me to see solutions when all that I saw was the enormity of this project.
iii
Table of Contents
List of Tables .................................................................................................................... vii
List of Figures .................................................................................................................. viii
Abstract ............................................................................................................................. xii
1. Introduction................................................................................................................. 1
1.1. Background......................................................................................................... 2
1.1.1. Power Electronic Systems........................................................................... 3
1.1.2. Power Semiconductor Devices ................................................................... 5
1.1.2.1. Schottky Diode.................................................................................... 8
1.1.2.2. Power MOSFET.................................................................................. 9
1.1.2.3. Insulated Gate Bipolar Transistor (IGBT) ........................................ 11
1.1.3. Model Availability / Accuracy.................................................................. 12
1.1.4. Circuit Response Modeling....................................................................... 13
1.2. Motivation......................................................................................................... 16
1.3. Organization of Thesis...................................................................................... 17
2. High Power Semiconductor Device Models............................................................. 19
2.1. Review of Available Models ............................................................................ 21
2.1.1. Physics Based Models............................................................................... 23
2.1.2. Native Models........................................................................................... 25
2.1.3. Macro-Models........................................................................................... 26
2.1.4. Behavioral Models .................................................................................... 27
2.1.5. Electro-Thermal Models ........................................................................... 28
2.2. Computer Simulation Platforms ....................................................................... 29
iv
2.2.1. Numerical.................................................................................................. 30
2.2.2. SABER...................................................................................................... 30
2.2.3. SPICE........................................................................................................ 31
2.2.4. Analog Behavioral Modeling.................................................................... 32
2.3. Speed vs. Complexity Tradeoff ........................................................................ 33
2.3.1. Forward Biased Diode .............................................................................. 34
2.3.2. Reverse Biased Diode ............................................................................... 40
2.3.3. MOSFET................................................................................................... 42
2.3.4. IGBT ......................................................................................................... 43
2.4. Circuit Response Modeling............................................................................... 45
2.4.1. Load-Lines ................................................................................................ 45
2.4.2. Diode Forward Voltage Drop ................................................................... 49
2.4.3. Power MOSFET / IGBT: Square Load-Line Switching........................... 50
3. Development of High Power Switching Device SPICE Models .............................. 54
3.1. Electro-Thermal Model..................................................................................... 55
3.1.1. Transient Thermal Impedance .................................................................. 57
3.2. Schottky Diode Model ...................................................................................... 64
3.2.1. Forward Voltage Drop .............................................................................. 65
3.2.2. Reverse Bias Leakage Current / Breakdown Voltage............................... 70
3.2.3. Reverse Bias Charge ................................................................................. 73
3.2.4. Power Dissipation ..................................................................................... 76
3.2.5. Model Results ........................................................................................... 77
3.3. Power MOSFET Model .................................................................................... 80
v
3.3.1. Gate Model: Capacitance and Input Admittance ...................................... 81
3.3.2. Forward Conduction (Drain-Source) Voltage Drop ................................. 86
3.3.3. Forward Blocking Leakage Current.......................................................... 92
3.3.4. Power Dissipation ..................................................................................... 93
3.3.5. Model Results ........................................................................................... 94
3.4. Insulated Gate Bipolar Transistor Model.......................................................... 98
3.4.1. Gate Model: Capacitance and Input Admittance ...................................... 99
3.4.2. Forward Conduction (Collector-Emitter) Voltage Drop......................... 101
3.4.3. Forward Blocking Leakage Current........................................................ 104
3.4.4. Turn-off Current Tail .............................................................................. 105
3.4.5. Power Dissipation ................................................................................... 106
3.4.6. Model Results ......................................................................................... 106
3.5. Summary of Model Development................................................................... 110
4. Model Results of System Connected Devices ........................................................ 112
4.1. Buck Converter ............................................................................................... 112
4.2. Power MOSFET / Schottky Diode ................................................................. 116
4.3. Insulated Gate Bipolar Transistor / Schottky Diode ....................................... 124
5. Conclusions and Future Work ................................................................................ 130
5.1. Conclusions..................................................................................................... 130
5.2. Future Work .................................................................................................... 130
List of References ........................................................................................................... 135
Appendix A: Parameter Naming Convention ................................................................. 141
Appendix B1: Thermal Model – Parameter Extraction Script........................................ 144
vi
Appendix B2: Thermal Model – Collected Input Data................................................... 148
Appendix C1: Schottky Diode Model – Subcircuit Diagram ......................................... 150
Appendix C2: Schottky Diode Model – SPICE Subcircuit File ..................................... 151
Appendix C3: Schottky Diode Model – Parameter Extraction Scripts........................... 154
Appendix C4: Schottky Diode Model – Collected Input Data ....................................... 172
Appendix D1: Power MOSFET Model – Subcircuit Diagram....................................... 175
Appendix D2: Power MOSFET Model – SPICE Subcircuit File................................... 176
Appendix D3: Power MOSFET Model – Parameter Extraction Scripts ........................ 179
Appendix D4: Power MOSFET Model – Collected Input Data ..................................... 186
Appendix E1: IGBT Model – Subcircuit Diagram......................................................... 190
Appendix E2: IGBT Model – SPICE Subcircuit File..................................................... 191
Appendix E3: IGBT Model – Parameter Extraction Scripts .......................................... 194
Appendix E4: IGBT Model – Collected Input Data ....................................................... 202
Vita.................................................................................................................................. 206
vii
List of Tables
Table 3.1 Transient Thermal Impedance Model Accuracy .............................................. 63
Table 3.2 Schottky Diode CRM Static Test Results 100ºC Heatsink............................... 77
Table 3.3 Power MOSFET CRM Switching Test Results 100ºC Heatsink...................... 96
Table 3.4 IGBT CRM Switching Test Results 50ºC Heatsink ....................................... 109
Table 4.1 MOSFET / Schottky Test: Initial Power Calculations.................................... 118
Table 4.2 MOSFET / Schottky Test: Simulation Results 60ºC ...................................... 119
Table 4.3 Power MOSFET Performance vs. Switching Frequency ............................... 123
Table 4.4 IGBT / Schottky Test: Initial Power Calculations .......................................... 126
Table 4.5 IGBT / Schottky Test: Numerical Results 60ºC Heatsink .............................. 126
Table 4.6 IGBT Performance vs. Switching Frequency ................................................. 128
viii
List of Figures
Figure 1.1 Summary of Switching Device Capabilities...................................................... 6
Figure 1.2 Schottky Diode .................................................................................................. 8
Figure 1.3 Enhancement Mode MOSFET Schematic Symbol ........................................... 9
Figure 1.4 Insulated Gate Bipolar Transistor Schematic Symbol..................................... 11
Figure 1.5 CREE C2D20120D Datasheet and SPICE Model Comparison...................... 13
Figure 1.6 Circuit Response Model of a Diode Forward Conduction Voltage Drop ....... 15
Figure 2.1 CREE C2D20120D Temperature Dependent Forward Characteristics .......... 22
Figure 2.2 Small Signal and Large Signal Model Contributions...................................... 36
Figure 2.3 Logarithmic and Straight Line Models at Low Forward Current.................... 37
Figure 2.4 Dissipation of Logarithmic and Straight Line Diode Models ......................... 38
Figure 2.5 Schematic Representation of Diode Forward Voltage ABM.......................... 39
Figure 2.6 CREE C2D20120D Leakage Current Characteristics..................................... 40
Figure 2.7 IXT12N120 MOSFET 25ºC Output Characteristics ....................................... 42
Figure 2.8 IXG12N120A2 25ºC Output Characteristics .................................................. 43
Figure 2.9 IGBT Equivalent Models ................................................................................ 44
Figure 2.10 Basic Buck Converter Circuit with Current Flow ......................................... 46
Figure 2.11 Voltage and Current Characteristics of an Inductive Switching Circuit ....... 47
Figure 2.12 Square Load-Line Switching with Diode Voltage Drop ............................... 48
Figure 2.13 Diode Voltage Drop Model Subcircuit.......................................................... 49
Figure 2.14 IXT12N120 MOSFET 25ºC Output Characteristics ..................................... 50
Figure 2.15 Power MOSFET Output Characteristics with 8 Amp Square Load Line ..... 52
Figure 2.16 IGBT Output Characteristics with 10 Amp Square Load Line ..................... 53
ix
Figure 3.1 Transient Thermal Impedance of Modeled Devices ....................................... 57
Figure 3.2 Typical Thermal Model Circuit Configurations.............................................. 58
Figure 3.3 C2D20120D Thermal Model Parameters and Accuracy................................. 61
Figure 3.4 IXT12N120 Thermal Model Parameters and Accuracy.................................. 62
Figure 3.5 IXG12N120A2 Thermal Model Parameters and Accuracy ............................ 63
Figure 3.6 Schottky Diode Circuit Response Model – Subcircuit Diagram..................... 65
Figure 3.7 CRM Voltage Drop Contributions with Current-Voltage Plane Excursion.... 66
Figure 3.8 VFWD(IFWD,T) Input Data(-) and Model Data(+) ............................................. 67
Figure 3.9 Percentage Error Between Input Data and Logarithmic VFWD Model ............ 69
Figure 3.10 Percentage Error Between Input Data and Straight Line VFWD Model ......... 69
Figure 3.11 Leakage Current Input Data .......................................................................... 71
Figure 3.12 Leakage Current with Model Parameter Data ............................................... 72
Figure 3.13 Reverse Bias Capacitance in pF (a), and 1/pF2 (b)........................................ 73
Figure 3.14 Reverse Bias Capacitance – Input and Extended Data.................................. 74
Figure 3.15 Comparison of Charge Input Data and Model Results.................................. 75
Figure 3.16 CRM and SPICE Model’s Response to 39 nC Reverse Charge.................... 79
Figure 3.17 Power MOSFET Circuit Response Model – Subcircuit Diagram................. 80
Figure 3.18 Input Data and Straight Line Model Input Admittance................................. 81
Figure 3.19 IXT12N120 CRM Input Admittance Characteristics.................................... 82
Figure 3.20 IXT12N120 Terminal Capacitance ............................................................... 84
Figure 3.21 Calculated MOSFET Gate Parameters.......................................................... 85
Figure 3.22 MOSFET Gate Charge Curve with Region Boundaries................................ 86
Figure 3.23 IXT12N120 25ºC Output Characteristics...................................................... 88
x
Figure 3.24 IXT12N120 125ºC Output Characteristics.................................................... 89
Figure 3.25 Voltage and Current Characteristics of an Inductive Switching Circuit ....... 90
Figure 3.26 IXT12N120 Output Characteristics as a Function of Temperature............... 91
Figure 3.27 IXT12N120 CRM RDS(on) Model Data (+) and Parameters........................... 92
Figure 3.28 CRM MOSFET Functional Test Schematic.................................................. 95
Figure 3.29 MOSFET Turn-On Pulse with 18 nS VDS Fall Time .................................... 96
Figure 3.30 MOSFET Turn-Off Pulse with 33 nS VDS Rise Time................................... 97
Figure 3.31 IGBT Circuit Response Model – Subcircuit Diagram .................................. 98
Figure 3.32 IGBT Capacitance from Datasheet................................................................ 99
Figure 3.33 Calculated IGBT Gate Parameters .............................................................. 100
Figure 3.34 IGBT Input Admittance with Model Parameters ........................................ 101
Figure 3.35 IGBT Forward Conduction Voltage Drop 25ºC.......................................... 102
Figure 3.36 Dissipation Error of Model in Watts 25ºC .................................................. 102
Figure 3.37 IGBT Forward Conduction Voltage Drop 125ºC........................................ 103
Figure 3.38 Dissipation Error of Model in Watts 125ºC ................................................ 104
Figure 3.39 IXG12N120A2 Gate Charge Characteristics .............................................. 108
Figure 3.40 IXG12N120A2 CRM Turn-On Pulse.......................................................... 109
Figure 3.41 IXG12N120A2 Turn-Off Pulse................................................................... 110
Figure 4.1 Buck Converter with Waveforms and Current Paths .................................... 113
Figure 4.2 Buck Converter / CRM Model Test Schematic............................................. 116
Figure 4.3 Power MOSFET Turn-On Current................................................................ 119
Figure 4.4 MOSFET On VDS Comparison with Inductor Current 25ºC (1µS/div)......... 120
Figure 4.5 MOSFET On VDS Comparison with Inductor Current 60ºC (1µS/div)......... 120
xi
Figure 4.6 Diode On VAC Comparison with Inductor Current 25ºC (250nS/div) .......... 121
Figure 4.7 Diode On VAC Comparison with Inductor Current 60ºC (250nS/div) .......... 121
Figure 4.8 1µS Off Full Pulse With Overlaid Traces 60ºC (200nS/div) ........................ 122
Figure 4.9 1µS Off Pulse VDS Falling Edge 60ºC (25nS/div)......................................... 122
Figure 4.10 1µS Off Pulse VDS Rising Edge 60ºC (25nS/div) ....................................... 123
Figure 4.11 IGBT VCE(ON) with Inductor Current 25ºC Heatsink................................... 127
Figure 4.12 IGBT VCE(ON) with Inductor Current 60ºC Heatsink................................... 127
xii
Abstract High Power Switching Device SPICE Models
Based on Circuit Response Bryan A. Weaver
Chika O. Nwankpa Ph.D. Power electronics converter capabilities are expanding into power levels of 10 kW and
above with the support of steadily growing high power semiconductor device capabilities.
Computer aided design and circuit simulation tools are likewise growing, yet the supply
of available and accurate SPICE models for high power semiconductor devices isn’t
keeping pace with the expanding device capabilities. In an effort to improve model
availability and accuracy, user configurable high power switching device SPICE models
for the Schottky diode, Insulated Gate Bipolar and power MOSFET transistors will be
developed. In a departure from conventional physics based semiconductor modeling
techniques, circuit response models establish how the device responds to circuit
characteristics. These SPICE circuit response models will be user configurable by means
of data from either or both device measurements and datasheet figures. With access to
these models, the circuit designer / application engineer will minimize the need to search
for SPICE models of the selected component or need to investigate the overall accuracy
of the models that are available.
1
1. Introduction
Power electronics systems are ubiquitous in our daily lives and are becoming even more
essential in this age of “Green Engineering”. From the most basic linear voltage
regulators to complex systems that drive the motors of a Navy vessel, power electronic
systems charge our cell phones, power our hybrid cars and link alternative energy sources
(solar, wind, tidal) to the power grid. Today’s power electronics systems, no longer the
“power supply” of yesterday, will continue to support our ever growing hunger for
electrical power.
Though the demand for ever-increasing conversion and volumetric efficiency has fueled
the growth of power electronics systems, the success of this growth is supported by the
evolution of power semiconductor devices. From the earliest switching power supplies
using mechanical vibrators [1], to today’s power MOSFET, Insulated Gate Bipolar
Transistor (IGBT), and the long anticipated wide bandgap devices [2,3,4] at our door
step, the core components of power electronics systems have evolved in just a few
decades.
Totally unrelated to the field of power electronics, the Computer Aided Design (CAD)
industry is likewise growing. This growth is fueled by the availability of ever increasing
computing power, algorithm development and the complexity of today’s system designs.
Amongst the multitude of computer driven analysis programs, there are a number of
2
electrical circuit simulation programs available to the power electronics design engineer.
The well known and widely available application, Simulation Program with Integrated
Circuits Emphasis (SPICE) [5], is the de facto standard circuit simulation program for the
Personal Computer (PC) platform. This staple of the electrical design community has
been around for almost 40 years [6,7]. During these years there have been numerous
program enhancements, for example accessibility to PC users, with the introduction of
PSpice in 1984. Many companies have further enhanced the basic SPICE program by
adding additional proprietary features or enhancements most notably in regards to the
machine-operator interface [8,9]. In order for the power electronics application engineer
to accomplish his or her job, accurate semiconductor device models that are compatible
with the most widely used design simulation platforms must be readily available.
1.1. Background
A review of the numerous papers, books and articles on power electronics systems
reveals a common description, enabling technology. While the power electronics industry
is recognized for enabling many of today’s sophisticated systems, it is the power
semiconductor devices that are themselves the enabling technology of power electronics
systems. A successful power electronics design cannot occur with a haphazard selection
of either circuit topology, control circuitry [10] or power semiconductor devices. This
chapter provides background on power electronics systems, power semiconductor
devices, semiconductor device models, model availability / accuracy and circuit response
3
modeling. This work is directed towards the power electronics system, design and
development engineer (application engineer). The role of the application engineer is to
build complex systems using sub-assemblies and components, such as power
semiconductors. From the system level perspective, the application engineer is more
interested in a semiconductor device’s external steady state and transient responses to
circuit stimuli, as opposed to the semiconductor physics equations that power typical
semiconductor device models.
1.1.1. Power Electronic Systems
In broad terms, power electronics is the conversion of electrical energy from one form to
another. More descriptive examples of power electronics converters are DC-DC (direct
current-to-direct current), AC-DC, DC-AC and DC-RF (radio frequency). A
characteristic that is common in most power converter systems is the periodic storage and
release of electrical energy by capacitors and inductors. Depending on the configuration
of the switching and storage elements, power converters perform the following functions:
• Voltage Step-Down
• Voltage Step-Up
• Voltage / Current Regulation
• Power Factor Correction
• Galvanic Isolation
4
Though this list is not inclusive of all possible functions, these are the most commonly
performed functions of power electronics converters. Providing these functions are one or
more of the basic power electronics topologies:
• Buck
• Boost
• Forward
• Bridge
• Flyback
There are other topologies, as well as combinations of topologies, but these are the most
widely used converter topologies. The building blocks of most power converters are
power switches and diodes as the switching devices with capacitors and inductors as the
energy storage devices. There are a wide variety of switching devices available to the
power electronics application engineer, with many of these devices described in the
literature [11,12,13]. The most widely used switching devices in power electronics
systems are PIN and Schottky diodes as “uncontrolled switches”, the Thyristor as a
“semi-controlled switch” and the Gate Turn-Off Thyristor (GTO), power MOSFET and
Insulated Gate Bipolar Transistor (IGBT) as “controlled switches”. The diode is termed
uncontrolled since it is circuit conditions, not a control signal that dictates whether or not
the device is conducting. The Thyristor is semi-controlled since a control signal can turn
the device on, but only circuit conditions can turn it off. Controlled switches can be
5
commanded on and off by a control signal though ultimately it is the circuit that
determines if and how much current is flowing.
1.1.2. Power Semiconductor Devices
The voltage, current and switching frequency of a power electronics converter weighs
heavily on the power semiconductor device selection. Figure 1.1 [14], dated Mar. 2006, is
an illustration of the relationship between voltage current and frequency capabilities of
the Thyristor, GTO, IGBT and power MOSFET. According to figure 1.1, the Thyristor
and GTO are truly high power devices, but they are also restricted to relatively low
switching frequencies. The IGBT doesn’t have the power capability of either the
Thyristor or GTO, but the decades faster switching frequency makes it ideal for high
power non line-frequency applications. The power MOSFET is the clear leader in
switching frequency, but it lacks high voltage capability, an issue that will be discussed
later in further detail. A search for present day capabilities of these power semiconductor
devices indicates significant improvement in voltage capabilities of the IGBT. At the
time of this writing, the approximate voltage / current limits are.
• Thyristor: (8.5 kV / 2.7 kA)
• GTO: (6.0 kV / 6.0 kA)
• IGBT: (6.5 kV / 750 A)
• Power MOSFET: (1.2 kV / 100 A)
6
From these numbers it is clear that, except for the power MOSFET, all of the devices
have seen improvements in power capabilities since 2006. The most notable
improvement is indicated for the IGBT which is now pretty much on par with the GTO
and Thyristor in regards to voltage capabilities.
Figure 1.1 Summary of Switching Device Capabilities
When wide bandgap power MOSFET’s and IGBT’s become widely available, they are
expected to reach power levels equaling those of the Thyristor and GTO possibly at even
higher switching frequencies. This large scale control of electrical energy requires proper
selection and application of the power semiconductor devices. For the purpose of this
7
study and subsequent model development, and considering the current availability of 1.2
kV Schottky diodes, this study will focus on the following power semiconductor devices;
• Schottky Diode
• Power MOSFET
• Insulated Gate Bipolar Transistor (IGBT)
These devices were chosen because, not only are they widely available, but they can also
operate at suitable power converter switching frequencies. One of the pressures placed on
modern day power converters is size reduction, which can be accomplished by operating
at higher switching frequencies. Moving to higher switching frequencies allows a
reduction in the size of transformers, inductors and capacitors which are usually the
bulkiest of power converter components. With today’s size and performance demands,
these devices are most likely to be used in the design and development of 10 kW to 100
kW power electronics systems. Though there is also a market for power converters that
are rated for even greater power levels, they are often assembled using multiple lower
power assemblies [15].
The “promise” of wide bandgap power semiconductor devices has been around for many
years [3,16,17]. Early signs of this promise are upon us with the availability of 1.2 kV
Schottky diodes [18] and 1.2 kV power MOSFETs utilizing Silicon Carbide (SiC) [19]. It
is anticipated that when these devices become mainstream, they will operate at voltages
in the levels of 10 kV or more [20]. This could potentially put the IGBT into voltage
8
capabilities that exceed those of today’s GTO and Thyristors. It is not unlikely that the
GTO and Thyristor could themselves see a decade increase in voltage capability, though
some reports are indicating shortcomings for the wide bandgap bipolar devices due to the
large ratio of electron to hole mobility and large IGBT voltage drop due to the higher
bandgap energy [3,17].
1.1.2.1.Schottky Diode
The Schottky diode [11,21], first described by Walter H. Schottky in 1938, utilizes a
metal semiconductor junction as opposed to the traditional PN diode which utilizes two
semiconductor layers, one with an absence of electrons (holes), and the other with an
Figure 1.2 Schottky Diode
excess of electrons to form a junction [22]. A major advantage of the Schottky junction
over the PN and PIN junctions is the absence of reverse recovery [13]. This lack of
reverse recovery reduces EMI/EMC issues that are often the result of high current surges
that stress both the switching transistor and diode every time the transistor is commanded
on. A factor which limits widespread application of silicon based Schottky diodes is
9
reverse leakage current, which for a given voltage level, can be substantially greater than
that of the PN and PIN junction devices [11]. The higher leakage current levels have
typically limited silicon based Schottky diodes to a maximum reverse voltage rating of
200 V. This maximum voltage limit is being raised with the availability of wide bandgap
devices with 1.2 kV SiC devices presently available [18], 3 kV devices in development
[23] and 4.9 kV devices in the laboratory (1999) [20].
1.1.2.2.Power MOSFET
The power Metal Oxide Semiconductor Field Effect Transistor (MOSFET) was
developed in the mid 70’s as an alternative to the, then standard power device, bipolar
transistor [21]. The bipolar transistor suffers from two major shortcomings that directly
Figure 1.3 Enhancement Mode MOSFET Schematic Symbol
impacts its application in power circuits. The first being low current gain, which results
from the relatively large base width needed for high voltage hold off [12,13]. As a result
10
of the low gain, additional driver stages are necessary, increasing size cost and
complexity of the power converter. The second shortcoming is termed second breakdown
[13,24,25]. In this condition, the transistor can breakdown during periods of simultaneous
large amplitude VCE and IC, a condition that is common in switching converters and will
be discussed in following sections.
The power MOSFET will continue to dominate the world of high current, low to medium
voltage power systems. This high current capacity is due to the ability to fabricate
devices with thousands if not millions of parallel cells allowing for RDS(on) values, which
ultimately determines the forward conduction voltage drop, in the mΩ range. The power
MOSFET becomes limited in the area of moderate voltages from a few hundred volts and
upward. This limitation is due to the Specific Resistance of the device which is a function
of the semiconductor’s dielectric constant, carrier mobility and critical electrical field for
breakdown [21]. For a silicon device the equation simplifies to equation (1.1) where
9 2.5, 5.93*10 *on sp ideal PPR BV−
− = (1.1)
PPBV is the breakdown voltage of the drain channel, and relates the Specific On-
Resistance to the breakdown voltage raised to the power of 2.5. The Specific On-
Resistance is a component of the overall RDS(on) of the MOSFET and becomes the
predominant contributor to RDS(on) as the DSV rating approaches a few hundred volts.
With all other things being equal, a 500 V device will have 5.66 times the RDS(on) of a 250
V device.
11
1.1.2.3. Insulated Gate Bipolar Transistor (IGBT)
Widely used in medium and high power systems, the Insulated Gate Bipolar Transistor
(IGBT) was developed in the early 80’s as an alternative to both bipolar transistors and
power MOSFET’s [26]. Utilizing a MOS Gate, the MOSFET channel “component” of
Figure 1.4 Insulated Gate Bipolar Transistor Schematic Symbol
The IGBT supplies a portion of the collector current and the “base” current to the bipolar
“component” eliminating the low gain characteristic of the bipolar transistor. The second
breakdown issue is eliminated by the very same MOSFET channel which is supplying
sometimes as much as half of the collector current [11,13] supporting the IGBT’s square
Reverse Biased Safe Operating Area (RBSOA). A characteristic of the early generation
IGBTs, which is a P-N-P-N structure, was the possibility of an uncontrolled latching of
the parasitic thyristor [27] rendering loss of turn-off control. An understanding and
subsequent control of this unwanted characteristic makes today’s IGBT a very rugged
high power device [21,26]. Today, IGBT’s are available up to 6.5 kV and 750 Amps,
classifying them as a truly high power device.
12
1.1.3. Model Availability / Accuracy
At first look, the application engineer might think that the large selection of SPICE
models, which many vendors supply in support of their product, will include the power
semiconductor devices that have been chosen for their application. Further inspection
often reveals that this is not the case. In fact SPICE models are quite scarce for devices
with the capacity to be used in power converters of 10 kW and greater. An additional
problem that the application engineer will soon discover during a model search is that
there are some low and medium power IGBT device models available, but they are
proprietary to PSpice and non SPICE platforms making them incompatible with SPICE
and other SPICE derivative programs. In addition to problems with model availability,
there is also the possibility of significant errors in the modeled results in the few models
that are found. For example, most of the SPICE diode models that can be found for
systems of a few kW or more are missing parameters that are needed to properly reflect
the forward conduction voltage drop as a function of both current and temperature. Figure
1.5 is an example of the model error that results from these missing parameters. Figure
1.5(a) shows the datasheet’s forward conduction characteristics while figure 1.5(b) is the
SPICE model results for the same conditions. This is a shortcoming that will be
addressed in this work.
13
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 50
5
10
15
20C2D20120D Forward Characteristics
I FWD (A
)
(a) Specification Sheet Data
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 50
5
10
15
20
VFWD (V)
I FWD (A
)(b) SPICE Model Data
25oC
75oC
125oC
175oC
25oC
75oC
125oC
175oC
Figure 1.5 CREE C2D20120D Datasheet and SPICE Model Comparison
Power electronics design is multi-disciplinary requiring the application engineer to
consider more than electrical issues. Most important of the non-electrical issues is related
to the heat generated by even a highly efficient high power converter. The presence of
this heat is important, not only for the system as a whole, but also to the underlying
power semiconductor characteristics. As will be discussed later in further detail,
temperature is a variable that appears in most semiconductor equations with wide ranging
degrees of dependence. The proposed models will dynamically control the model’s
behavior as a function of temperature, a feature that is not available in SPICE.
1.1.4. Circuit Response Modeling
The availability and accuracy concerns of SPICE models for 10 kW and higher power
semiconductor devices have been discussed and the device types that would most likely
14
be used in those systems have been identified. In response to these concerns, a family of
SPICE models for the power MOSFET, IGBT and Schottky diode devices will be
introduced. These models will dynamically respond to temperature variations and can be
configured by the application engineer; using either or both measurement data and
datasheet input hereafter called “collected input data”.
Prior to developing these models, the concept of Circuit Response Modeling (CRM) is
introduced. Typical semiconductor device models calculate and control the current that is
flowing through the device from circuit variables, such as the junction voltage. The result
of this practice is that the simulator determines the voltage across the device, calculates
the current that would flow under that condition, and controls a current source to the
calculated value. If the calculated current doesn’t equal the circuit current, a number of
things could happen. If the current difference is small, the simulator could shorten the
simulation time steps. This could result is a reduction in the error between the calculated
and actual values, at the expense of lengthening the simulation time. If the difference is
large, the two competing currents (actual circuit current in series with a controlled current
source) could introduce large voltage errors resulting in a convergence error ending the
simulation. This simplistic example can be carried to other device models and
characteristics, and will be further discussed in following chapters.
It is standard practice in power electronics design to look upon a power semiconductor
device in an ideal fashion i.e. as a perfect switch when analyzing the design [13]. For
example when a power diode is viewed as an ideal device, it is understood that there is no
15
voltage drop in its forward biased condition, and it is the circuit’s configuration and
component values that determine the magnitude of the current flowing through the diode.
As the concept moves from the ideal device concept to the proposed models, the circuit
configuration and component values will continue to be the factors that determine the
magnitude of the current. Figure 1.6 is a voltage – current plot illustrating an example of
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 50
2
4
6
8
10
12
14
16
18
20
I FWD (A
)
VFWD (V)
Circuit Response Model of a Diode Forward Voltage Drop
Reference Diode Collected Input Data
ABM (25oC)
ABM (175oC)
25oC
75oC
125oC
175oC
Figure 1.6 Circuit Response Model of a Diode Forward Conduction Voltage Drop
Circuit Response Modeling the forward conduction voltage drop of a diode. The expected
voltage drop as a function of current and temperature is used as the collected input data.
This expected voltage drop is subtracted from the calculated forward drop of a
temperature independent reference diode for the same current. The difference voltage is
supplied by a Voltage Controlled Voltage Source (VCVS) Analog Behavioral Model
(ABM) with the sum of the two voltages (i.e. reference diode voltage drop and voltage
difference) equaling the collected input data value. With data collected at multiple
16
temperatures, the VCVS voltage contribution will be a function of both current and
temperature providing an electro-thermal capability to the model.
For a power electronics converter, where the diode voltage drop is very small compared
to the circuit voltage, the forward current through the diode changes little whether the
diode is ideally modeled or realistically exhibits a few volts of forward drop. The
difference between the proposed Circuit Response Models and the typical semiconductor
device model is that existing models observe the junction voltage and control a current
source based on the observed junction voltage. Approaching this from a systems
perspective, Circuit Response Models monitor the current that is flowing through the
device and control a series connected voltage source to model the corresponding voltage
drop that was determined by the collected input data. This concept of Circuit Response
Modeling is a true form of behavioral modeling which will be further explored in
following chapters.
1.2. Motivation
With the increasing availability of high power semiconductor devices, the concepts of all
electric cars and cycle-by-cycle control of the power grid are no longer science fiction.
Increasingly large systems are costly and the expense of start-up failures is to be avoided.
Even hardware prototypes, though very important, are themselves costly warranting some
form of design verification prior to assembly and test. A review of SPICE compatible
17
power semiconductor device models reveals sparse availability that becomes more
pronounced as the search extends to devices appropriate for 10 kW and greater power
converters. Even when models are found, many of these models barely utilize the limited
capabilities of SPICE especially in regards to temperature dependent effects. With these
significant shortcomings in device model availability and accuracy in mind, a set of
configurable models is being proposed. These models can be “characterized” by the
application engineer using collected input data. With the limited availability and accuracy
of high power semiconductor device SPICE models, these models will further encourage
the application engineer to include SPICE simulation as an indispensable step in the
design process.
1.3. Organization of Thesis
The remainder of the thesis is organized as follows. Chapter 2 describes circuit
simulation model types and platforms followed by a simulation speed vs. complexity
trade-off. The concept of Circuit Response Modeling will be further explored with
examples illustrated with the use of a current – voltage plane for hard switched power
electronic converters. Semiconductor behavioral characteristics as they pertain to power
electronics systems will be discussed and illustrated. Chapter 3 will contain the details of
the development of the SPICE subcircuits that will later be interconnected to complete
the device models. Upon completion of device model development, they will be
characterized and compared to the data that was used to characterize the models. Chapter
18
4 will be a review of the models used in the simulation of a high power buck converter
with comparison to expected results. Chapter 5 will conclude the study and provide
suggestions for further research.
19
2. High Power Semiconductor Device Models
Power electronics systems are playing increasingly important roles in today’s technology
driven world. The continuous demand to improve a power electronics system’s
performance and efficiency has been firmly planted in low power systems with power
factor correction [29,30] and power consumption / idle power draw requirements [31].
Similar performance pressures are moving into the world of medium and high power
systems that operate from 10 kW to 100 kW. In order for the design and development
(application) engineer to meet these requirements, careful design practices and circuit
analysis must be carried out well ahead of the hardware design phase. Computer aided
design (CAD) programs in the form of electrical circuit simulation packages can help the
application engineer meet design goals, provided that the appropriate component models
are available.
Key components of power electronics systems are the power semiconductor switching
devices Thyristor, Gate Turn-Off Thyristor (GTO), Schottky diode, power MOSFET, and
Insulated Gate Bipolar Transistor (IGBT). A review of power and switching frequency
characteristics of these key components reveals that the Thyristor and GTO are
appropriate for very high power applications that operate at frequencies of a few hundred
Hertz or lower. The IGBT is a faster switching device capable of operating up to 100
kHz, depending on the end users preference of the low saturation voltage vs. high
switching speed trade-off. Even faster power devices, the Schottky diode and power
20
MOSFET, are capable of switching at frequencies in the MHz, permitting compact sized
medium power systems. The power level of interest in this study is 10 kW to 100 kW
which is prime territory for the Schottky diode and IGBT devices, with 10 kW within
reach of power MOSFETs. A search of power semiconductor device manufacturer’s
technical data will reveal a large availability of computer simulation models for switching
devices that are appropriate for power converters up to 10 kW. However as power
electronic systems expand into levels of 10 kW and above, the availability of SPICE
models to support high power system development is sparse. Reasons for the sparse
availability aren’t totally clear, though one reason could be limited use of SPICE
modeling by power electronics application engineers. Other possibilities include the
application engineer having access to computer simulation platforms other than SPICE
such as Saber, or that the market size at these power levels is too limited to justify the
expense of model development.
This chapter will briefly review types of power semiconductor device models, computer
simulation programs; the role that model complexity vs. simulation speed plays in the use
of simulation models and proposes the concept of Circuit Response Modeling. High
power semiconductor device Schottky diode, power MOSFET and IGBT models will be
proposed and presented to help fill the void of model availability. Using these models, the
application engineer will be able to configure their own models from either or both
measurement data and datasheet input, collected input data.
21
2.1. Review of Available Models
A literature search on the topic of computer simulation models for the Schottky diode,
power MOSFET and IGBT, will result in a very large number of papers and books to
select from. These search results can be further sorted into topics including, but not
limited to, existing model reviews [32,33,34,35], recommendations for “unified modeling
methods” [34,36,37], model types [38,39,40,41] and model platforms [42,43,44]. In [32],
the authors provided a comprehensive review of IGBT model types and limitations at the
turn of the century. The models were categorized by their modeling method and
numerically scored for complexity. In [33], the authors reviewed the characteristics that
they felt were important to accurately model a power MOSFET for various power
converter topologies. The work was identified as being geared toward SPICE, but nothing
that was platform specific was presented. In [34], the authors described a “commercially
available” diode model that covers a wide range of diode technologies. The model was
developed with many of the SPICE diode model shortcomings in mind. Unfortunately
that model is proprietary to SYNOPSIS for use on Saber, hence it isn’t available to the
larger base of SPICE users.
The goal of this research and subsequent development is to produce a set of power
semiconductor device models that are user configurable and compatible across all SPICE,
or its derivatives, platforms. With these models in hand, the application engineer can
configure the models to a required level of complexity and not need to be concerned
about either the availability or accuracy of SPICE models for the chosen power devices.
22
As seen in figure 2.1, temperature has a strong influence on semiconductor performance
indicating the need for models that link performance with temperature. Unlike SPICE
which maintains a constant temperature profile throughout an analysis, electro-thermal
models provide a means to calculate the instantaneous junction temperature and feed that
result back to the model which adjusts the results accordingly. The proposed models will
have electro-thermal capabilities wherein they will be able to instantaneously vary their
response to changes in the calculated junction temperature. The proposed models will be
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 50
2
4
6
8
10
12
14
16
18
20CREE C2D20120D Forward Characteristics
I FWD (A
)
VFWD (V)
25oC
75oC
125oC
175oC
Figure 2.1 CREE C2D20120D Temperature Dependent Forward Characteristics
truely behavioral as a behavioral model derives its results from equations that describe
the outwardly visible response while having limited or no knowledge of the inner
workings of the device. Without concern as to the doping density, material type, device
area, etc. CRM models will provide the user with a circuit point of view on how the
device or devices will respond to circuit characteristics.
23
Semiconductor device models come in many different types with each type having
features that, depending on the end users goals, requirements and resources, makes it the
better choice. The type of model that will be used is also dependent on the computer
platform that is available to the application engineer. This work favors the SPICE
simulator because it is the most widely available simulator program for the personal
computer (PC) the most widely used platform. The model types that are most appropriate
for simulating high power semiconductor devices on the SPICE platform are Physics-
Based, Native, Macro-Model, Behavioral and Electro-Thermal.
2.1.1. Physics Based Models
The majority of semiconductor device models are physics based. That is the equations
within these semiconductor device models are derived from fundamental semiconductor
equations that describe the modeled device [21,22,44,45]. The actual derivation of these
models is beyond the scope of this work however an example [45] will be included in
order to better describe the difference between classic physics based models and the
proposed Circuit Response Models (CRM). The forward current of a diode is described
by equation (2.1) [22,45] where
exp 1DD S
qVI IkT
⎛ ⎞⎛ ⎞= −⎜ ⎟⎜ ⎟⎝ ⎠⎝ ⎠
(2.1)
24
SI = Saturation current
=q Electron charge
DV = Junction Voltage
=k Boltzman’s constant
=T Temperature (Kelvin).
Equation (2.1) is applicable for different levels of both forward and reverse bias, though
it doesn’t properly account for all bias conditions. To better account for carrier
generation-recombination while under small bias conditions [22] and reduce the
occurrence of convergence errors during simulation [45], the SPICE model of the diode
junction becomes
exp 1 5D
DS D D
qV nkTI I V GMIN for VnkT q
⎛ ⎞= − + ≥ −⎜ ⎟⎝ ⎠
(2.2)
where n is an emission coefficient, typically between 1 and 2, [22,45] which accounts for
the carrier generation-recombination rate and GMIN is added by SPICE across all
semiconductor junctions as a means to reduce convergence errors. For different reverse
biased operating regions, SPICE further expands equation (2.1) to account for different
reverse biased regions [45] resulting in equation (2.3).
25
( )
exp 1 5 0
5
exp 1
DS D D
S D D
D
D
DS D
qV nkTI V GMIN for VnkT q
nkTI V GMIN for BV Vq
I
IBV for V BV
q BV V qBVI for V BVkT kT
⎛ ⎞⎛ ⎞− + − ≤ ≤⎜ ⎟⎜ ⎟⎝ ⎠⎜ ⎟
⎜ ⎟⎜ ⎟
− + − < < −⎜ ⎟⎜ ⎟= ⎜ ⎟⎜ ⎟− = −⎜ ⎟⎜ ⎟⎜ ⎟⎛ ⎞⎛ ⎞− +
− − + < −⎜ ⎟⎜ ⎟⎜ ⎟⎜ ⎟⎜ ⎟⎝ ⎠⎝ ⎠⎝ ⎠
(2.3)
As previously discussed, SPICE uses either equation (2.2) or (2.3) to control a current
source internal to the diode model. The preceding discussion is a very high level example
of physics based equations, without even considering other characteristics such as reverse
bias leakage current, junction capacitance, breakdown voltage etc.
2.1.2. Native Models
Simply put, native models are typically defined as a compiled form of physics based
models. Examples of native models start with the simple one line description of passive
components like the resistor or capacitor. As simple as the resistor and capacitor models
appear to the casual SPICE user, they are fairly sophisticated including linear and
quadratic temperature coefficients for both linear and quadratic voltage coefficients for
the capacitor model [8,9]. On the other extreme of complexity, the Berkeley Short
Channel IGFET Model (BSIM) utilizes approximately eight pages worth of parameters to
model a MOSFET using the BSIM3 v3.2 model [8,9]. The advantage of a compiled
26
model is that the code knows exactly what to do with the model’s defined parameters and
contains the default values of the unspecified parameters. These models often employ the
previously discussed physics based equations. Since the models are specific to the
simulation program and computer platform, speed, accuracy and performance issues
should be resolved ensuring minimal convergence error problems. A down side to native
models is that they only work for that particular simulation program and computer
platform. The result of this downside is that models native to, for example, PSpice will
likely not work in other SPICE or SPICE derivative simulators. This appears to be the
case for the few PSpice IGBT models which are available from some device
manufacturers.
2.1.3. Macro-Models
A device can be modeled by combining two or more native models and is often called a
macro-model [6,40,42]. The construction of a macro-model often uses existing native
models which can include higher level as well as simple passive device models. This
approach works well for composite devices such as opto-couplers, and has been used for
the development of IGBT models [42,43,46]. In [40] a MOSFET macro-model was
developed by adding diodes capacitors and a controlled resistance to better model non-
linear gate capacitance, and the temperature dependence of RDS(on), which is the drain to
source resistance of a power MOSFET which has sufficient gate voltage to operate in the
ohmic region [13]. There can be a one-to-one correspondence between the “composite
27
device” components and those of the macro-model, although some functions may be
performed by using controlled voltage or current sources. The terms macro-model and
subcircuit are often used interchangeably in SPICE documentation and literature. Since
macro-models are often combinations of platform specific native models, they too can be
subject to platform specific availability.
2.1.4. Behavioral Models
A behavioral model can be described as providing a system’s response to outside forces
without having actual knowledge of what is contained within the system. This type of
modeling is often used in an attempt to reduce the model’s complexity or when it is not
known what actually exists within the system and is sometimes referred to as a “black
box”. A large number of the papers that were found during this research used the term
“behavioral model” in either the title or description of the paper. In virtually all instances,
the term was used to indicate the use of SPICE Analog Behavioral Models (ABM) that
were controlled by physics-based equations [47,481]. The models that are proposed in this
study are truly behavioral based and use SPICE Analog Behavioral Models to exhibit the
non-ideal response the modeled components exhibit to externally connected circuit
characteristics and not physics-based equations. True to the meaning, a behavioral model
is not platform specific as it is a means to define a system. The actual implementation of
1 The author of references [48] and [61], Dr. Adrian Maxim had a number of papers retracted in June 2008 by the IEEE for containing falsified information and subsequently has been indefinitely placed on the Prohibited Authors List. None of his papers on the use of Analog Behavioral Models in power semiconductor models are amongst the list of papers that were retracted.
28
a behavioral model will however become specific to the platform that it was written for
such as MAST for Saber, SPICE, or even MATLAB.
2.1.5. Electro-Thermal Models
The majority of all semiconductor device equations are either directly or indirectly
temperature dependent. As an example, equation (2.1) is the fundamental diode current
which is clearly dependent with temperature (T) in the equation. SI is also temperature
dependent as shown in equation (2.4) used by SPICE for modeling temperature effects
that are static during the simulation. Where 1T is the nominal (27ºC) temperature, 2T is
/
2 21
1 2 1
(300)( ) ( ) *exp * 1
XTI ng
S S
qET TI T I TT nkT T
⎛ ⎞−⎛ ⎞ ⎛ ⎞= −⎜ ⎟⎜ ⎟ ⎜ ⎟⎜ ⎟⎝ ⎠ ⎝ ⎠⎝ ⎠
(2.4)
the modified temperature XTI is the SPICE diode parameter “IS temperature exponent”
and gE is the semiconductor bandgap energy which is itself temperature dependent [46].
If the SPICE model does not supply model parameters such as XTI and n, the simulation
will run with the default values which could give incorrect results as was previously seen
in figure 1.5. For an Integrated Circuit (IC), the temperature is often constant within the
short term as well as consistent across the small area of the device. However with power
electronics devices, the junction temperature of each device will be different due to
instantaneous power dissipation, junction-to-case thermal impedance (RθJC) and location
on the heatsink. Power semiconductor devices are also subject to transient junction
temperature changes during every switching event and especially during a fault event
29
[49]. SPICE was written for the purpose of simulating integrated circuits which, with the
exception of power ICs, are small enough and low enough in power that the temperature
across the die and over the time of the simulation will be relatively constant. The SPICE
platform has the ability to set a temperature for a simulation, however during the entirety
of that simulation that set temperature value is fixed.
A review of the semiconductor device model literature surfaces a number of papers that
have brought forward the idea of linking the electrical and thermal characteristics of a
power device during circuit simulation. This technique is seen mostly for the Saber
platform [28,50], though there is also limited prior art for the SPICE platform [48,51].
The actual availability of electro-thermal SPICE models is very sparse and seems to be
limited to the proprietary PSpice platform.
2.2. Computer Simulation Platforms
There are a multitude of computer simulation platforms available to the power electronics
application engineer, but not all of them are appropriate for simulating power electronics
systems. Many of the more sophisticated numerically based platforms are briefly
discussed in 2.2.1, but the two platforms that are more appropriate for simulating power
electronics systems are Saber, SPICE and SPICE derivatives. Due to the probability that
the application engineer will have greater access to SPICE than Saber, greater attention
will be given to the SPICE simulation platforms.
30
2.2.1. Numerical
Semiconductor device models come in many different types with each type having
features that, depending on the end users goals, requirements and resources make it the
better choice for the task at hand. There are many semiconductor device model programs
with capabilities and requirements that far exceed the scope of this research and the
reader is referred to [44] as a starting point to learn more about these programs. A short
list of these programs includes SILVACO [52] and Taurus Medici [53], which are both
multi-dimensional, and Basic Analyzer of MOS and Bipolar devices (BAMBI) [44].
These powerful simulators are well suited for the semiconductor device manufacturer
who has access to and control of manufacturing characteristics such as mask dimensions,
impurity profiles and recombination data, not for the power electronics application
engineer who is most interested in circuit and system level details.
2.2.2. SABER
A large number of papers that were reviewed during this work described and developed
device models for use in simulations on the Saber platform. Historically Saber [54,55]
has been a Unix based, multi-physics simulation program that was and is often found in
academic, research and large system development programs. An important feature of
Saber which was introduced in 1986 is the MAST modeling language, which provides the
31
user with the capability of describing functions which govern the operation of the devices
[6]. Present day Saber is available for Unix, Linix and Windows platforms as a number of
system level analysis programs with far ranging capabilities. In 2010 Synopsis released
SaberRD [56] which is called a Desktop Environment for Power Electronic Design for
operation on the Windows© platform. Saber is advantageous for the user of high power
switching devices since it has received more attention in the creation of electro-thermal
models. Saber however has a disadvantage to the power electronics application engineer
because it is generally unavailable to small and medium sized businesses.
2.2.3. SPICE
SPICE “Simulation Program with Integrated Circuit Emphasis”, has been available for
nearly 40 years [5,6,7]. The first version of SPICE was Fortran based and went by the
name of CANCER. CANCER was written for use on a CDC 6400 using punch cards for
data input. In 1972 the program became SPICE1 and was for the first time distributed in
the public domain. Major improvements came in the form of an improved model for the
diode and new models for the JFET and MOSFET. SPICE2, finalized in 1975, continued
to be Fortran based and provided a new nodal analysis technique which added support for
voltage defined elements, and dynamic memory allocation techniques which was needed
to accommodate the growing sizes of integrated circuits. SPICE3 was first introduced in
1989, was written in C and added more sophisticated MOSFET and Berkeley Short
Channel IGFET Models (BSIM). Today SPICE is available from a number of third party
32
sources [8,9] which have supplied value added features such as schematic input, output
graphics and in some cases, proprietary device models [28,57].
Though SPICE has the capability of modeling temperature dependent component effects,
the temperature for the whole circuit is fixed for the duration of the simulation, though
individual parts can be assigned temperatures that are different from the simulation base
temperature. This is realistic for a low power integrated circuit that has an area no more
than a few millimeters square, but no so for a transistor that is switching 100 Amps at 1
kV. During a switching event, a 100 Amp, 1 kV switching device might instantaneously
dissipate the equivalent of 100 kW when used in an inductive hard switch circuit. The
transient thermal impedance of the junction will absorb much of that heat, but an
understanding of just how much is vital for a reliable system. There are relatively few
semiconductor models available for the SPICE platform with electro-thermal capabilities.
Not only are these models rare, the few that can be found are proprietary to only a few of
the SPICE derivative programs.
2.2.4. Analog Behavioral Modeling
An extremely powerful feature of SPICE is the Analog Behavior Model (ABM)
[39,58,59] which is functionally similar to MAST in Saber. This feature which is now
standard on SPICE and SPICE derivative platforms permits the user to build a descriptive
model ranging from simple to complex. Examples of ABM use in the literature range
33
from simple [51], which placed a controlled current source in parallel with a diode to
correct reverse current and temperature dependent forward voltage errors, to the
incredibly complex [48], which utilized as many as 26 ABM sources to assemble an
IGBT physics based model. ABM provides the application engineer a major advantage
through the ability to create high level description based models. This not only opens the
door to create models where none exist, it also provides the ability to describe a system in
ways that require reduced amounts of computer power, opening the possibility for shorter
simulation times.
2.3. Speed vs. Complexity Tradeoff
A theme that is often seen in the literature relates the trade-off between the precision and
accuracy of a model with how long it takes to complete the computer analysis. The
computer power that is available today is indeed quite impressive compared to what was
available in the early days of SPICE. Even though computational speed has been
continuously increasing, model sophistication and system complexity have also been
increasing. In order to define areas where either model sophistication or accuracy can be
traded for decreased simulation time, a review of characteristics that are modeled is
performed. Examples of trading complexity for speed might include
• Reduction in polynomial order to describe a parameter’s functional description.
• Eliminate leakage current modeling if its contribution to dissipation is minimal.
34
• Substitute exponential voltage drop characteristics with straight line model.
In many cases, model accuracy can be traded for a reduction in simulation time.
Many of the papers that can be found on the subject of power semiconductor device
modeling describe means to improve the accuracy of the models. Examples include
reverse biased breakdown / avalanche modeling [35,60,61], accuracy of the quasi-
saturation region [36,40] and so forth. A goal of this research is to look into areas where
the accuracy of the model is of lesser concern to the power electronics system.
Specifically characteristics where accuracy is important, and characteristics where
detailed internal modeling is unimportant will be discussed. Areas where some device
characteristics can be omitted from the model with minimal reduction in accuracy will
also be suggested.
2.3.1. Forward Biased Diode
As previously seen in equation (2.1), the physics based diode equation uses the
independent variable junction voltage, to calculate the dependent variable diode current.
From the perspective of circuit response modeling, where VFWD is a function of IFWD, the
diode’s response to forward current is found by taking the log of equation (2.1). Equation
(2.5) does model VFWD as a function of IFWD, but it doesn’t characterize large signal
35
ln 1DD
S
InkTVq I
⎛ ⎞= +⎜ ⎟
⎝ ⎠ (2.5)
conditions where the specific resistance [12,45] contributes a significant portion of the
forward voltage drop of a diode operating at or near rated current. This additional voltage
drop is summed to equation (2.5) where SR , called the specific resistance, is the total
ln 1DD D S
S
InkTV I Rq I
⎛ ⎞= + +⎜ ⎟
⎝ ⎠ (2.6)
equivalent internal series resistance and is the summation of Drift, Substrate and Contact
resistances. An example of the importance of the SR contribution to the diode forward
voltage drop can be seen in figure 2.2 where the basic diode equation (2.5) is
S Drift Substrate ContactR R R R= + + (2.7)
compared to the large signal diode equation (2.6), hereafter called the logarithmic model.
From figure 2.2 it is clear that for all but the smallest current levels, the parasitic
resistance contributes an important portion of the total diode voltage drop.
36
0 0.5 1 1.5 2 2.50
2
4
6
8
10
12
14
16
18
20Small Signal and Large Signal Diode Response
VFWD (V)
I FWD (A
)
JunctionContribution
ResistanceContribution
Small Signal ModelLarge Signal Model
Figure 2.2 Small Signal and Large Signal Model Contributions
As a means to simplify circuit analysis, the diode forward voltage drop is often
considered ideal with zero forward voltage drop, or as the simple summation of a fixed
forward voltage drop and the D SI R drop [13]. If any reasonable accuracy is expected
when calculating the diode’s forward conduction voltage drop’s contribution to
dissipation, the model must characterize some form of voltage drop plus
D SI R contribution to VFWD. When analyzing high power systems, the ideal diode concept
isn’t appropriate since efficiency and power dissipation are essential system
considerations. A more to realistic approximation such as a simple resistive voltage drop
plus offset is in order. For example equation (2.8) is a mathematically simpler yet
D OFFSET D SV V I R= + (2.8)
37
comparably accurate form of equation (2.6), where OFFSETV takes the place of
ln 1D
S
InkTq I
⎛ ⎞+⎜ ⎟
⎝ ⎠. Figure 2.3 is an illustration of VFWD Vs. IFWD for both a logarithmic and
straight line diode model with the ordinate expanded to 1 Amp. It is clear that for any
0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 10
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1Diode Forward Biased Modeling
VFWD (V)
I FWD (A
)
Logarithmic ModelStraight Line Model
Figure 2.3 Logarithmic and Straight Line Models at Low Forward Current
normal value of IFWD there is very little VFWD difference between the two models. With
the voltage levels that are typical of a high power system, the VFWD error that is seen in
figure 2.3 is of little consequence. The most important characteristic to model in a high
power system is dissipation. Figure 2.4a shows that the forward voltage drop of the
logarithmic and straight line models appear to be identical. Figure 2.4b confirms that the
dissipation of the two model types is nearly identical with the difference being much less
38
0 0.5 1 1.5 2 2.50
10
20Diode Forward Biased Modeling
I FWD (A
)
(a)
Logarithmic DiodeStraight Line Diode
0 0.5 1 1.5 2 2.50
20
40
60
Wat
ts
Power Dissipation (Both Diodes)
(b)
0 0.5 1 1.5 2 2.50
0.2
0.4
VFWD (V)
Wat
ts
Absolute Dissipation Error
(c)
Figure 2.4 Dissipation of Logarithmic and Straight Line Diode Models
than one Watt up to a forward current of 20 Amps as seen in figure 2.4c. It is clear that
the use of equation (2.8) to model the forward voltage drop, instead of equation (2.6),
results in a minimal loss of accuracy. The trade for reduced accuracy is shorter simulation
time, and it should be apparent that equation (2.8) will be easier to calculate than
equation (2.6). A SPICE simulation was performed on the very simple VFWD model that
is shown in figure 2.5. The purpose of this simulation was to determine how much
difference in the simulation time, if any, there would be between the logarithmic and
straight line diode equations that would be used to control the ABM that models the
voltage drop shown in figure 1.6. Figure 2.5 shows the simple schematic of the ABM
forward conduction model with straight line equation “a” and logarithmic equation “b”.
The SPICE simulation was setup with the following, conditions as the current source was
stepped from 0 to 20 Amps.
39
Run time = 1 mS
ton = 5µS
TS = 10µS
Tr = Tf = 100 nS
Step Time = 10 nS
Figure 2.5 Schematic Representation of Diode Forward Voltage ABM
The average simulation time for the straight line equation was 5.29 seconds and 9.48
seconds for the logarithmic model, indicating a clear advantage in simulation speed using
the straight line equation.
40
2.3.2. Reverse Biased Diode
The reverse biased characteristics of the Schottky diode, IGBT or power MOSFET
devices should not be ignored, but with proper circuit design and an initial calculation of
the reverse biased dissipation, modeling the reverse bias “leakage current” and even
breakdown voltage can be found unnecessary for the power semiconductor device model.
Figure 2.6 is from the 1.2 kV rated CREE C2D20120D datasheet [18] and plots the
800 1000 1200 1400 1600 1800 20000
20
40
60
80
100
120
140
160
180
200
C2D20120D Reverse Bias Leakage Current
Leak
age
Cur
rent
(uA
)
VREV (V)
X: 1200Y: 20.73
25oC
75oC
125oC
175oC
Figure 2.6 CREE C2D20120D Leakage Current Characteristics
leakage current vs. reverse voltage and temperature. Considering a truly worst case
situation of 1.2 kV at 175ºC, the expected leakage current of the C2D20120D would be
approximately 21 mA. From figure 2.1, the same diode will dissipate approximately 25
Watts with a 10 Amp IFWD at 175ºC. With a 1000:1 ratio between forward and reverse
bias dissipation, there really is little need to model the reverse biased leakage current let
41
alone see the effect of using the reverse dissipation value when calculating the junction
temperature.
Breakdown voltage has also been the subject of some of the reviewed modeling papers
[35,60,61]. Accurate modeling of a power device breakdown voltage involves many
factors, with many of them outside the fundamental physics equations domain or the
knowledge of the application engineer. Some of the factors that enter into breakdown
voltage calculations, in addition to the fundamental equations, include guard rings, defect
areas, doping profile and even temperature. With all of these factors making breakdown
voltage modeling difficult at best. This effort is better left to the power device designer
with access to multi-dimensional numerical simulation programs [44]. Good engineering
practice requires the stress values of all components to be less than their maximum rated
value. This is especially true of power devices which are typically derated to no more
than 60% to 70% of the maximum reverse voltage rating [62]. A properly derated power
device shouldn’t even approach maximum rated voltage let alone anything that
approaches breakdown. When considering the need to model the breakdown voltage of a
power device, the better choice is to properly derate the device and design the circuit to
not exceed the derated values. This also applies to the IGBT and power MOSFET device
models as long as initial calculations confirm that reverse bias dissipation is less than the
user’s defined threshold.
42
2.3.3. MOSFET
The forward characteristics of a well driven power MOSFET is very close to a simple IR
drop with no offset voltage as seen in figure 2.7. This characteristic makes the power
MOSFET ideal for low voltage systems. The nearly straight line characteristic of RDS(on)
makes the forward drop model a relatively simple first order equation.
0 2 4 6 8 10 12 14 16 180
2
4
6
8
10
12IXT12N120 25oC Output Characteristics
VDS (V)
I D (A)
VGS
6.0 V6.5 V7.0 V7.5 V8.0 V10 V
Figure 2.7 IXT12N120 MOSFET 25ºC Output Characteristics
Like the diode and IGBT the contribution that worst case leakage current provides to
overall dissipation, should first be calculated. The IXT12N120 datasheet is also without a
figure of the leakage current characteristic, but a worst case value of 3 mA, 1.2 kV at
125ºC is specified. That equates to 3.6 Watts clearly larger than the bipolar devices, but
still reasonable considering the forward dissipation could easily be 100 Watts or greater
as seen in figure 2.7. As with the previously discussed components, leakage current will
43
not be modeled since its contribution to overall dissipation is significantly below that of
the on-state losses.
2.3.4. IGBT
With sufficient gate drive, the forward characteristics of an IGBT are very similar to
those of a diode as seen in figure 2.8. The similarity can be understood in light of either
of the two ways that are often used to portray an IGBT [27,63], seen in figure 2.9. In
2.9(a), an equivalent circuit shows a MOSFET supplying base current to a PNP transistor
in a darlington configuration and 2.9(b) is another equivalent circuit of a an IGBT which
0.5 1 1.5 2 2.5 3 3.5 4 4.5 50
5
10
15
20
IXG12N120A2 25oC Output Characteristics
VCE (V)
I C (A)
VGE
5.0 V7.0 V9.0 V11 V13 V15 V
Figure 2.8 IXG12N120A2 25ºC Output Characteristics
44
depicts a MOSFET channel in series with a PIN diode. With the diode like forward
characteristics of an IGBT, replacing the logarithmic function of equation (2.6) with the
straight line plus offset equivalent of equation (2.8) applies to the IGBT as well. The
noticeable difference in the forward characteristics between a Schottky diode and a well
driven IGBT is the greater value knee voltage.
Figure 2.9 IGBT Equivalent Models
The leakage current of the IGBT and its impact on dissipation should be analyzed the
same as a diode before it can be omitted from the model. The IXG12N120A2 datasheet
does not have a leakage current vs. reverse voltage figure, but worst case data indicates a
maximum value of 275 µA at 1.2 kV and 125ºC. With a worst case reverse dissipation of
330 mW compared to a possible forward dissipation of 60 W (20 A, 25ºC) makes it
unnecessary to model leakage current for this device.
45
2.4. Circuit Response Modeling
It is the behavioral aspect of Circuit Response Modeling (CRM) that is proposed for use
in the development of SPICE models for the three basic power electronics switching
devices, Schottky diode, power MOSFET and IGBT. Using collected input data, models
that run on the SPICE platform for these power devices will be developed. These models
will be developed for the application engineer, who is more interested in the system as a
whole, not the underlying semiconductor physics and will display the power devices’
outwardly visible response to circuit forces. By providing a means to behaviorally
characterize devices using collected input data, the application engineer is no longer
restricted by the limited availability of device models for the 10 kW to 100 kW range.
This section will briefly describe the concept of circuit response modeling with the use of
some basic examples of inductive circuits as are typically seen in hard switched power
electronic converters. These models are not intended to be used for all possible power
electronics topologies; instead the models are intended for applications the use hard
switching topologies such as buck boost and some bridge topologies.
2.4.1. Load-Lines
It is important to note that equations (2.5-6) calculate the diode current as a function of
numerous variables, predominantly the junction voltage. The diode model in SPICE
46
controls a current source, within the model, to the value calculated from either equation
(2.5), or equation (2.3) values [45]. This calculation is redundant, since the diode current
has already been defined by the circuit itself. In fact, in [42] the authors said of an IGBT
model “since the current flowing through the device depends mainly on the load, an
(ideal) anti-parallel diode must be added to provide a path for balancing the current”.
That is, when the diode is forward biased, the current that flows through the diode is
controlled by the circuit’s configuration and components, not the forward voltage. As an
example, figure 2.10 shows a buck converter, operating in the continuous conduction
Figure 2.10 Basic Buck Converter Circuit with Current Flow
mode. As switch S1 opens, current IL1 that was flowing through SW1 must now flow
through D1. IL1 defines the diode current, not the D1 junction voltage (VD1). Without the
complexity of determining which region VD is in just to calculate the value of ID, all that
needs to be calculated is the diode’s VFWD, derived from collected input data. VFWD is not
only a function of current it is also a function of the junction temperature. If the diode’s
47
VFWD characteristics are known at multiple temperatures, these additional data points can
be used to parameterize the equation that defines VFWD as a function of both current and
temperature. It should be clear by now that SPICE goes through quite a process just to
calculate the value of ID considering that circuit conditions have already defined ID.
Figure 2.11 Voltage and Current Characteristics of an Inductive Switching Circuit
Paths Traveled by D1 and S1 While Traversing the Il1 - Vd Plane (c) A Circuit Response Model (CRM) approaches semiconductor device modeling from the
perspective of the circuit driven observable response. This philosophy is best understood
in view of the constant current characteristics of an inductive circuit. Figure 2.11a,b
illustrates the typical voltage – current relationship of an inductive circuit such as figure
2.10. When SW1 is commanded on, it must first support the entire amplitude of IL1
before D1 can become reverse biased which then allows the voltage across SW1 to
collapse from Vd to zero. Figure 2.11c is a current – voltage plane that illustrates the
paths traveled by SW1 and D1 during switching events. During SW1 turn-off, the voltage
48
across SW1 rises to the full value of Vd while traveling from corner 1 to 3, and then to
corner 4 as IL1 commutates from SW1 to D1. During that same interval, D1 traveled from
corner 4 to 2, and then 1. Conversely, during turn-on, SW1 travels from corner 4 to 3, and
then 1 while D1 concurrently travels from corner 1 to 2, and then 4. The CRM models
work on the principle that the switching devices follow these paths, which are
characteristic of an inductive circuit with the values of corners 1, 3 and 4 circuit defined.
The result of square load-line switching can be seen in figure 2.12 which is illustrating
that there is only a narrow range of interest in the diode forward voltage curve. That point
is the forward current point which is a relatively restricted portion of the curve as
determined by the inductor current. The importance of this point will become clear when
square load-line switching is discussed for the power MOSFET and IGBT.
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 50
2
4
6
8
10
12
14
16
18
20
Reference Diode Collected Input Data
10 Amp Load Current
ABM (25oC)
ABM (175oC)
X: 2.016Y: 9.878
Circuit Response Model of a Diode Forward Voltage Drop
I FWD (A
)
VFWD (V)
25oC
75oC
125oC
175oC
Figure 2.12 Square Load-Line Switching with Diode Voltage Drop
49
2.4.2. Diode Forward Voltage Drop
As has been previously discussed, conventional diode models are non-linearly controlled
current sources with the junction voltage being the predominant controlling variable.
Using the concept of Circuit Response Modeling, the forward voltage characteristic of a
diode can be simply modeled as a “voltage drop” that is a function of current and
temperature. The voltage drop can be modeled with either a logarithmic or straight line
calculation as discussed in section 2.3.1. The SPICE circuit that supplies the voltage as a
function of current and temperature is seen in figure 2.13. Further details of the
parameters’ nomenclature and how they are derived will be discussed in further detail in
Chapter 3 and defined in Appendix A.
Figure 2.13 Diode Voltage Drop Model Subcircuit
50
2.4.3. Power MOSFET / IGBT: Square Load-Line Switching
The output characteristics of both the power MOSFET and IGBT devices exhibit two
distinct regions which in this thesis will be called active and ohmic2. The following
description applies to a power MOSFET, however the description and impact of these
regions on Circuit Response Models is the same for both switching devices. During a
0 2 4 6 8 10 12 14 16 180
2
4
6
8
10
12IXT12N120 25oC Output Characteristics
VDS (V)
I D (A)
VGS
6.0 V6.5 V7.0 V7.5 V8.0 V10 V
Figure 2.14 IXT12N120 MOSFET 25ºC Output Characteristics
switching event, as the device transitions along the current – voltage plane (figure 2.11c)
from corners 4 to 3 to 1 (and back), the device is in the active region. This region exists
2 The actual terminology differs between the two devices and for power MOSFET’s, even different authors use different terminology for these regions. For this thesis, active will be used to define the “constant current” region and ohmic will be used to describe the “minimum voltage drop” region of the output characteristics curves. See section 3.3.2 for further explanation and details.
51
where the drain current as a function of gate voltage curves in figure 2.14 are horizontal.
During the transition from corner 3 to 1 of the current – voltage plane, the drain current is
defined by circuit characteristics and the gate voltage is defined by the input admittance
of the device3. As the switching device completes the last few volts of the transition to
corner 1, the crossover from the active to the ohmic regions is not absolute as seen by the
rounded corners of the drain current curves in figure 2.14. This transitional region is often
termed quasi-saturation and has been discussed and modeled in previous work [36,40].
During those final few volts of transition (according to figure 2.14), for a given value of
gate voltage, the current that the device can support will decrease. However according to
the concept of Circuit Response Modeling, the current is determined by the circuit and
will remain constant so according to the input admittance, the gate voltage will rise (if the
gate voltage supply is greater than what is needed to support the drain current). The
actual value of the gate supply voltage is very important when high efficiency is desired.
Modern power devices have gate voltage limits of 20 V or greater. As shown in figures
2.15-6, a gate voltage as low as 10 V can keep the device in the ohmic region for currents
in excess of rated values. With appropriate gate supply voltages of 12 V and greater, the
actual gate voltage will quickly transition the device through quasi-saturation into the
ohmic region. Many authors have gone through rigorous investigations, and efforts to get
their models to accurately depict the transition from linear through quasi-saturation to
saturation regions which for square load-line switching is unnecessary.
3 The effects and influence of admittance is discussed in further detail in section 3.3.1
52
The difference between the CRM straight line model and the actual transistor output
characteristics can be seen in figures 2.15-6 which compare the straight line
approximation to the output characteristics from the collected input data. It is true that
there are small errors between the two curves in the quasi-saturation, but due to the
constant current characteristics of the inductive load, the error will be in the gate voltage
not the drain current. By accounting for the constant current characteristics of an
inductive circuit, the complexity of the CRM model can be reduced with minimal impact
on the accuracy of the results.
0 2 4 6 8 10 12 14 160
2
4
6
8
10
12IXT12N120 Output Characteristics
VDS (V)
I D (A)
VGS (V) 8 A Square Load Line
6.0 V6.5 V7.0 V7.5 V8.0 V10 V
Figure 2.15 Power MOSFET Output Characteristics with 8 Amp Square Load Line
53
0.5 1 1.5 2 2.5 3 3.5 4 4.5 50
5
10
15
20
IXG12N120A2 Output Characteristics
VCE (V)
I C (A)
VGE (V)
10 A Square Load Line
5V7V9V11V13V15V
Figure 2.16 IGBT Output Characteristics with 10 Amp Square Load Line
54
3. Development of High Power Switching Device SPICE Models
Characteristics of high power switching devices were discussed in chapter 2 along with
issues related to availability and accuracy of device models for the SPICE platform.
Several types of models and simulation platforms were reviewed with discussions of
model applicability for the power electronics application engineer. This chapter will
detail the development of high power switching device SPICE Circuit Response Models
(CRM). Section 3.1 details the characteristics of the thermal model in addition to the
process of extracting the required SPICE parameter data, applicable to all model
characteristics, from either or both device measurements and datasheet figures hereafter
called collected input data. Section 3.2 covers the development of the model
characteristics for the Schottky diode. Sections 3.3 and 3.4 cover the same for the power
MOSFET and IGBT devices. In many cases, the three semiconductor device types share
common characteristics i.e. thermal modeling and leakage current for all three devices
and gate input characteristics for the power MOSFET and IGBT. In these cases, a full
discussion of the model derivation will occur at the first instance of the characteristic and
any device differences will be discussed in the appropriate section of subsequent devices.
The devices that will be used to characterize the three CRM model subcircuits are
• CREE C2D20120D 1.2 kV 17 A (avg. per leg 125ºC) Schottky diode
• IXYS IXT12N120, 1.2 kV, 12 A (avg. 25 ºC) power MOSFET
• IXYS IXG12N120A2, 1.2 kV, 24 A (avg. 25 ºC) IGBT
55
These components were chosen to further explore their high power capabilities and to
compare the results of the CRM model to the vendor supplied SPICE models if available.
3.1. Electro-Thermal Model
Electro-thermal modeling is not a new concept, but its availability to the SPICE platform
is very limited. The origins of SPICE which stands for Simulation Program with
Integrated Circuit Emphasis initiated this trend since integrated circuits as they existed in
the early days of SPICE were, by today’s standards, small and would have had small
temperature gradients across the die. With that in mind the ability to set a single
temperature that remained static for the entire simulation made sense. Even though the
availability of SPICE electro-thermal models is limited, means and discussions to
implement the technique are ever present. Guerra et al. [51] proposed a Schottky diode
SPICE model that corrected for some of the SPICE inadequacies. They indicated that the
series resistance does not change with temperature and proposed placing a temperature
dependent resistor model in series with the diode model. Inaccuracies in temperature
dependent leakage current were solved by placing a Voltage Controlled Current Source
(VCCS) in parallel with the diode model and using the temperature dependent resistor as
the controlling element. Additionally a thermal model with 4 RC sections was thoroughly
calculated and included in the circuit file, but no connection was shown to the thermal
model for either sourcing a dissipation defined current nor was there a link between the
“thermal voltage” and either the above mentioned resistor model or the leakage current
56
model. Finally no mention was made about the temperature dependency of the junction
voltage or its impact on the forward voltage drop. In [50] Hefner acknowledges the
SPICE limitation of temperature characteristics that “must remain constant at the
predetermined value during the simulation”, and proposed a physics based dynamic
electro-thermal model for the Saber platform. In [64] Mantooth proposed a SPICE diode
model that uses relationships to “adjust [the diode] model parameters and the physical
properties of silicon as a function of temperature”. This technique was intended for both
fixed temperature, which requires one update at the beginning of a simulation, and
dynamic thermal modeling which requires parameter updates for each time step of the
simulation. Jankovic et al. [37] used equivalent lossy transmission lines describing
“minority carrier transport through the arbitrarily doped silicon quasi-neutral regions”
with the characteristics of the transmission lines exhibiting temperature dependence.
When using any platform to simulate power electronics systems operating at significant
power levels, a means to calculate the junction temperature of a power device and the
corresponding temperature dependent characteristics is warranted. The concept of
thermal resistance is analogous to electrical resistance with heat flow being represented
by current flow; thereby temperature rise is represented by a voltage rise across the
thermal circuit. The number of thermal stages is a function of how many physical layers
exist between the power device junction and the model’s thermal reference point, which
for the CRM is the modeled device’s case. If the model is to provide an accurate
temperature rise measurement at each physical layer between the junction and the case,
the layer thickness, cross section area perpendicular to heat flow and material
57
characteristics needs to be known [51]. If the only purpose of the model is to provide the
temperature rise across the total thermal path, all that is needed is the instantaneous
power dissipation and the transient thermal impedance for the heat flow between the
device junction and case [65,66].
3.1.1. Transient Thermal Impedance
Transient thermal impedance (TTI) is a characteristic used to quantify the short term
junction temperature rise of a device as it experiences a short term high dissipation event
such as a short circuit or even the periodic high dissipation levels that occur during
switching events. This characteristic, which represents the junction-to-case thermal
impedance JCRθ as a function of time, is often given by the device manufacturer as a
10-6
10-4
10-2
100
10-3
10-2
10-1
100
Transient Thermal Impedance Characteristics
Ther
mal
Impe
danc
e o C
/W
Seconds
C2D20120DIXT12N120IXG12N120A2
Figure 3.1 Transient Thermal Impedance of Modeled Devices
58
datasheet figure [18,67,68] or in some cases actual values of RC pairs [66]. Figure 3.1 is
an example of the TTI for the Schottky diode, power MOSFET and IGBT devices that
will be characterized and modeled in this chapter. The impedance starts out orders of
magnitude lower than the final value, which is the specified steady-state JCRθ . The
differences between the three curves is due to differences in the size of the die, the
number and type of layers between the die and case such as heat spreaders and,
Figure 3.2 Typical Thermal Model Circuit Configurations
for some devices, electrical isolation materials. It is clear that the data in figure 3.1 have
different time ranges over which the data were taken. Even though they have different
time ranges, it is clear that they all exhibit similar characteristics “shape” indicating that
one equation can be scaled to model each part. The topology of the TTI model depends
on what level of detail is required of the model [65,69,70], figure 3.2 shows the three
most discussed RC network configurations for transient thermal modeling. The number
59
of RC networks determines how accurately very short term pulses can be modeled such
as short-circuit destructive modeling [71] which is beyond the scope of this work. The
three thermal network topologies in figure 3.2 are often debated as to which one properly
reflects the actual physical structure of the device and various layers between the junction
and the case. The need to properly reflect the physical structure exists only if the model is
intended to accurately predict the temperatures (node voltages) at the various layers
(nodes). When the only temperature of concern is the difference between the junction and
case nodes, all three models correctly describe the thermal behavior at the two terminals
of the “black box” [65,70].
The thermal model topology that is used in the CRM is that of figure 3.2a with the
number of RC pairs dependent on the length of the TTI time axis. The actual values of
the RC pairs in figure 3.2a are derived from collected input data which are copied onto
Excel worksheets as XY data columns. The information from a datasheet figure can be
converted into one or more sets of XY data using an application such as GETDATA [72].
With GETDATA, a TIF or JPG image of the figure, for example JCRθ vs. time, is viewed
within the application. By running the computer mouse along the image perimeter, the
axis limits are set, then after multiple steps of following the trace with periodic mouse
clicks, the XY data is collected and copied into an Excel worksheet. The parameter
values are calculated from the values of nR and nτ for each of n RC pairs using equation
(3.1) with the collected input (XY) data being ( )R tθ . A MATLAB script reads the XY
60
( )1
1 expn
nn
tR t Rθ τ⎛ ⎞⎛ ⎞−
= −⎜ ⎟⎜ ⎟⎜ ⎟⎝ ⎠⎝ ⎠∑ (3.1)
data from an Excel worksheet and determines the maximum (steady-state) value of JCRθ
and the approximate τ of the first pole by finding the time of the Rθ value that is
approximately 0.632* JCRθ . The remaining values of nR and nτ are initialized according
to equations (3.2) and (3.3). After initialization, the MATLAB script uses simulated
1 *0.5nnR R= (3.2)
annealing techniques to randomly perturb the values of the n Rτ pairs and compares the
( )11 .1nn n
ττ −= (3.3)
current iteration error to the “best so far” error. The error is calculated for each ( )i time
step from the XY data as in equation (3.4). If the current iteration provides a smaller
error , this error value and the Rτ pair values are stored as best so far, and subsequent
2
1
( ) ( )( )
i R i R i besterrorR i best
θ θ
θ
⎛ ⎞−= ⎜ ⎟
⎝ ⎠∑ (3.4)
iterations perturb the values of the Rτ pairs and use the stored error value as the new
goal to beat. This process is repeated until either the error goal is met, or the iteration
limit is reached. Figures 3.3-5 show the extracted model parameters where nn
n
CRτ
= and
the model error from the collected input data for the three modeled devices. In all three
cases, the error between the XY thermal data and the application of the model parameters
to equation (3.1) is less than 10% as shown in table 3.1. The MATLAB script also
produces a text output that contains one or more parameter statements [8,9] which are
61
used by SPICE for defining variables for models and/or controlled source equations.
These parameter values are uniquely named4 for their particular function and are copied
10-6
10-5
10-4
10-3
10-2
10-1
100
-100
10
Seconds
% E
rror
10-4
10-3
10-2
10-1
100
101C2D20120D Thermal Impedance
Ther
mal
Impe
danc
e o C
/W
--- Input DataOOO Model Results
Thermal Model ParametersTR1=1.979e-001 TC1=1.141e-001TR2=7.750e-002 TC2=7.395e-002TR3=1.591e-001 TC3=5.862e-003TR4=2.304e-002 TC4=1.093e-003TR5=5.195e-003 TC5=1.319e-004
Figure 3.3 C2D20120D Thermal Model Parameters and Accuracy
into the CRM subcircuit file for use by the simulator. During a simulation, the CRM
calculates the instantaneous power dissipation of a device and controls a current source,
scaled to one amp per Watt, as seen in figure 3.2. This current will flow into the thermal
model and the resulting voltage across the thermal model represents the instantaneous
junction-to-case temperature rise of the modeled device. The thermal model is referenced
to a voltage source that represents the heatsink temperature in Kelvin. That is if the
heatsink is at 27ºC, then the thermal model will be referenced to 300 Kelvin (Volts). Due
to the very long time constants of the thermal model, the CRM is initialized to the
4 The parameters’ naming convention can be found in Appendix A
62
expected average dissipation at the start of simulation according to equation (3.5). V(TA)
is set within the model to be zero at 0t while V(TB) is set to be one at 0t . V(TC) is
connected to a voltage source, external to the subcircuit, that the user sets to the expected
average dissipation at the scale of one volt per Watt. At 0t any forward dissipation is
( )( )* * ( )* ( )FWD FWDG V TA V I V TB V TC= + (3.5)
zeroed by V(TA) and the value of the expected average dissipation “current” flows into
the thermal network by ( )* ( )V TB V TC thus initializing the network at the beginning of
the simulation. At 1 µS into the simulation, V(TA) changes to 1 and V(TB) changes to 0
10-6
10-5
10-4
10-3
10-2
10-1
100
-100
10
Seconds
% E
rror
10-4
10-3
10-2
10-1
100
101IXT12N120 Thermal Impedance
Ther
mal
Impe
danc
e o C
/W
--- Input DataOOO Model Results
Thermal Model ParametersTR1=1.688e-001 TC1=1.700e-001TR2=6.017e-002 TC2=9.273e-002TR3=2.065e-002 TC3=3.572e-002
Figure 3.4 IXT12N120 Thermal Model Parameters and Accuracy
allowing the forward dissipation “current” to flow into the network for the remainder of
the simulation. The thermal models were verified by comparing SPICE simulation results
against the collected input data that was used to generate the models. The SPICE
63
verifying circuit was set to deliver a 1 amp pulse for one second and the output plot was
analyzed at specific time intervals from 10 µS to 1 S as listed in table 3.1. The voltage
across the thermal model at the specified time intervals was compared to the collected
input data with good agreement for all three models.
10-6
10-5
10-4
10-3
10-2
10-1
100
-100
10
Seconds
% E
rror
10-4
10-3
10-2
10-1
100
101IXG12N120A2 Thermal Impedance
Ther
mal
Impe
danc
e o C
/W
--- Input DataOOO Model Results
Thermal Model ParametersTR1=1.122e-001 TC1=2.388e+000TR2=9.023e-001 TC2=1.194e-002TR3=5.615e-001 TC3=3.075e-003TR4=1.482e-001 TC4=7.557e-004
Figure 3.5 IXG12N120A2 Thermal Model Parameters and Accuracy
Table 3.1 Transient Thermal Impedance Model Accuracy C2D20120D IXT12N120 IXG12N120A2
Pulse Width XY Data CRM % Error XY Data CRM % Error XY Data CRM % Error 1S 0.475 0.463 -2.53 0.251 0.250 -0.40 1.70 1.72 1.18 100mS 0.454 0.460 1.32 0.244 0.244 0.00 1.66 1.65 -0.60 10mS 0.327 0.322 -1.53 0.121 0.120 -0.83 1.26 1.26 0.00 1mS 0.151 0.154 1.99 0.033 0.031 -6.06 0.482 0.475 -1.45 100uS 0.047 0.046 -2.13 N/A 0.0043 N/A 0.134 0.127 -5.22 10uS 0.015 0.015 0.00 N/A 0.00044 N/A N/A 0.017 N/A
64
3.2. Schottky Diode Model
The Schottky diode has historically been type cast as a low voltage workhorse. Due not
only to its superior VFWD vs. IFWD characteristic in comparison to a PN junction, but also
due to the high reverse leakage current of silicon based devices which typically limits
their application to systems under 200 V [12]. With 1.2 kV SiC devices presently
available [18], 3 kV devices in development [23] and 4.9 kV devices in the laboratory
(1999) [20], The Schottky diode is becoming an ideal candidate for high power systems.
This section details the development and equations behind the CRM for a Schottky diode
which will model the following parameters.
• Forward Voltage Drop
• Reverse Bias Leakage Current
• Reverse Bias Charge
• Power Dissipation / Thermal Characteristics
A schematic representation of the complete Schottky diode model subcircuit can be seen
in figure 3.6. This subcircuit can be used within the users SPICE program the same as
any other subcircuit model. The various components of the model will be described
within the sections that describe the specific device characteristic.
65
Figure 3.6 Schottky Diode Circuit Response Model – Subcircuit Diagram
3.2.1. Forward Voltage Drop
There are many ways that VFWD can be modeled. In Guerra et al., [51] forward voltage
drop characteristics were improved by the addition of a series resistor that was modeled
using temperature coefficients to more accurately reflect the measured device
characteristics. The model was still limited by the fixed temperature characteristic of
SPICE. In Apeldorn et al. [73], a Boolean controlled voltage source in series with a fixed
resistor was utilized. If the diode was forward biased, the voltage source was zero. When
reverse biased, the voltage source was set negative to a value that was 107 times the
voltage drop across the resistor. The result was a nearly ideal diode that had no
temperature dependent characteristics. One of the simplest ways is to model the diode’s
forward voltage characteristic (VFWD) is to use an Analog Behavioral Model (ABM)
66
controlled voltage source with an appropriate equation. The ABM is a very important
feature in SPICE which provides the SPICE user an opportunity to describe a system
response or component that is not already a part in the model library [39,58,59]. In order
to properly differentiate between forward and reverse bias conditions, the CRM forward
voltage drop model includes a fixed parameter “reference diode” in series with an ABM
controlled voltage source. Two of the reference diode’s model parameters are set to
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 50
2
4
6
8
10
12
14
16
18
20
Reference Diode Collected Input Data
ABM (25oC)
ABM (175oC)
X: 2.016Y: 9.878
I FWD (A
)
VFWD (V)
Circuit Response Model of a Diode Forward Voltage Drop
25oC
75oC
125oC
175oC
Figure 3.7 CRM Voltage Drop Contributions with Current-Voltage Plane Excursion
specific values such that it has nearly ideal characteristics. These parameters are “N”
which is set to 0.5 and “TEMP” which is set to 27ºC [8,9,45]. By setting the parameters
inside the CRM subcircuit, the reference diode is immune to circuit level changes to these
parameters. The remaining diode model parameters are unchanged from their default
values. The forward voltage drop of the reference diode is seen in figure 3.7 exhibiting an
almost constant, low voltage drop as a function of current. The remainder of the forward
67
voltage drop is provided by E4, a SPICE (ABM) Voltage Controlled Voltage Source
(VCVS), in series with the reference diode. The VCVS is controlled by an equation such
that it produces the voltage difference between the reference diode voltage drop and the
collected input data as seen in figure 3.7. A MATLAB script reads the XY data and
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 50
2
4
6
8
10
12
14
16
18
20C2D20120D Straight Line VFWD Model
VFWD (V)
I FWD (A
)
25oC 75oC 125oC 175oC
Input DataCRM Model
Figure 3.8 VFWD(IFWD,T) Input Data(-) and Model Data(+)
closely matches the data for each temperature profile. As previously discussed in section
2.3.1, the forward voltage drop of a diode can be modeled as a logarithmic function of the
forward current plus the D SI R voltage drop or alternatively the logarithmic function can
be replaced with a DC offset. The user of CRM models has the ability to choose one over
the other as an opportunity to trade accuracy for speed, however figures 3.8-10 show that
the loss in accuracy of the straight line model is negligible. Equation (3.6) represents the
diode junction drop component of the logarithmic model which is changing the value of
68
N as a function of temperature. Equation (3.7) represents the diode junction drop
component of the straight line model which is nothing more than a temperature
dependent voltage drop. In either case, the majority of the forward voltage drop is due to
( ) ( ) ( ) ( )214
2log 1 * 20 21* 22* *.0257
10I V
V Log DFL DFL V T DFL V T−
⎛ ⎞= + + +⎜ ⎟
⎝ ⎠(3.6)
the temperature dependent specific resistance of the diode which is the sum of Drift
Substrate and Contact resistances [74]. The D SI R equation is the same for either model
and is shown with the straight line model parameter names in equation (3.8) where the
voltage at the top of the thermal model is ( )V T and represents the junction temperature
as discussed in section 3.1.1. The output of E4 is the combination of equations (3.7) and
( ) 2 10 11* ( ) 12* ( )V SL DFS DFS V T DFS V T= + + (3.7)
2( ) ( 2)*( 20 21* ( ) 22* ( ) )V SR I V DFS DFS V T DFS V T= + + (3.8)
(3.8) for the straight line model and the combination of equations (3.6) and (3.8) using
“DFL3x” parameters for the logarithmic model. The straight line model representation of
VFWD vs. IFWD vs. temperature can be seen in figure 3.8 with the collected input data as
solid traces and the CRM results as the ++ traces. Figure 3.9 shows the percentage error
between the input data and logarithmic model data indicating very good model accuracy
for all currents down to 1 amp. The error between the input data and straight line model
data can be seen in figure 3.10 which looks nearly identical to the logarithmic model
error in figure 3.9.
69
0 2 4 6 8 10 12 14 16 18 20-5
0
5C2D20120D Logarithmic VFWD Model
25o C
0 2 4 6 8 10 12 14 16 18 20-5
0
5
75o C
0 2 4 6 8 10 12 14 16 18 20-5
0
512
5o C
0 2 4 6 8 10 12 14 16 18 20-5
0
5
175o C
IFWD (A) Figure 3.9 Percentage Error Between Input Data and Logarithmic VFWD Model
0 2 4 6 8 10 12 14 16 18 20-5
0
5C2D20120D Straight Line VFWD Model
25o C
0 2 4 6 8 10 12 14 16 18 20-5
0
5
75o C
0 2 4 6 8 10 12 14 16 18 20-5
0
5
125o C
0 2 4 6 8 10 12 14 16 18 20-5
0
5
175o C
IFWD (A) Figure 3.10 Percentage Error Between Input Data and Straight Line VFWD Model
70
3.2.2. Reverse Bias Leakage Current / Breakdown Voltage
Modeling the reverse bias leakage current and breakdown voltage receives a lot of
attention in the literature including Mantooth et al. [34] where five additional reverse bias
effects were added to saturation current for a Saber platform diode model. In Maxim et
al. [61], semiconductor physics based models implemented with SPICE ABM blocks
were proposed including reverse bias leakage current and avalanche breakdown effects.
In [33] the authors categorized modeling requirements, by level, and included non-
destructive avalanche breakdown for level 2 which was characterized as “accurate for all
operating states within the rated current and voltage (within SOA)”. If the device is
operating within rated values and the SOA, does it need breakdown modeling?
Depending on the power converter voltage and power level, the effects of leakage current
and even breakdown voltage can be either important, or insignificant. Clearly, if any one
of these characteristics is insignificant the model can be simplified with a resulting
reduction in complexity and simulation time. Before the application engineer drops this
characteristic from the model, a quick calculation can help determine the leakage
current’s contribution to dissipation. For example, figure 3.11 shows that the worst case
IREV of the C2D20120D is 21 µA at 1.2 kV and 175ºC producing a maximum dissipation
of 25 mW. Referring back to figure 3.8, a worst case continuously forward biased
condition of 10 A at 175ºC results in a dissipation of about 25 W. This 1000:1 ratio of
forward bias to reverse bias dissipation suggests that the reverse bias dissipation is clearly
71
low enough to justify omitting the leakage current section of the model. When leakage
current is included in the model, an ABM current source G2 is controlled using the
800 1000 1200 1400 1600 1800 20000
20
40
60
80
100
120
140
160
180
200
C2D20120D Reverse Bias Leakage Current
Leak
age
Cur
rent
(uA
)
VREV (V)
X: 1200Y: 20.73
25oC
75oC
125oC
175oC
Figure 3.11 Leakage Current Input Data
parameters shown on figure 3.12 to replicate the IREV curves shown on that figure.
Since the device should never be operated at potentials greater than 1.2 kV, the model’s
parameters were calculated from input data that was limited to potentials of no more than
1.4 kV as shown in figure 3.12.
Avalanche multiplication is an important mechanism which could lead to junction
breakdown [22,34] imposing an upper limit on the reverse bias of all semiconductor
devices. Once this limit has been reached, avalanche breakdown can occur with the
expectation that the device will be destroyed. There are formulae available for estimating
the voltage at which breakdown occurs however there are many manufacturing
72
400 500 600 700 800 900 1000 1100 1200 1300 14000
10
20
30
40
50
60
70
80C2D20120D Reverse Bias Leakage Current
Leak
age
Cur
rent
(uA
)
VREV (V)
DRI10=4.442e+000
DRI11=-1.894e-002DRI12=2.642e-005
DRI20=2.737e+003DRI21=-8.793e+000
DRI22=9.985e-003
DRI30=4.064e+001
DRI31=-1.616e-001DRI32=1.922e-004
Input DataModel Data
Figure 3.12 Leakage Current with Model Parameter Data
techniques, unknown to the modeler, that impact the ultimate breakdown voltage
potential. Device manufacturers specify maximum stress levels for all devices, and power
semiconductors are no exception. For the C2D20120D, the absolute maximum values of
reverse voltage and junction temperature are 1.2 kV and 175ºC respectively. If the
application engineer has properly derated the device to, for example, 900 V and 125ºC,
the device will be reliable [62]. When considering the need to model the breakdown
voltage of a power device, the better choice is to properly derate the device and design
the circuit not to exceed the derated values.
73
3.2.3. Reverse Bias Charge
The high frequency advantage that the Schottky has over the PN junction doesn’t mean
there aren’t switching characteristics to consider or model. The Schottky switching
characteristic is associated with reverse charge, which is typically characterized and
described as reverse capacitance. This capacitance must be charged and discharged by
circuit currents in order for the diode to transition from forward bias to reverse and back.
0 50 100 150 200 250 300 350 4000
200
400
600
800C2D20120D Reverse Bias Capacitance
pF
(a)
0 50 100 150 200 250 300 350 4000
1
2
3
4x 10
-4
1/pF
2
VREV (V)
(b)
Figure 3.13 Reverse Bias Capacitance in pF (a), and 1/pF2 (b)
Figure 3.13a is a plot of the reverse bias capacitance as a function of voltage from the
collected input data. The collected input data, from a datasheet figure, is limited to under
400 V so a means to extend the data to at least 1.2 kV is needed. The voltage scale of
figure 3.13 is linear so the data of figure 3.13a is clearly not a linear function of voltage.
The reverse capacitance of a diode is however a fairly linear function of voltage when
74
presented in the form of 21/ C [22] and figure 3.13b shows that 21/ C does indeed appear
linear with respect to voltage. The 21/ C data of figure 3.13b can easily be extended by
applying the corresponding equation to the maximum reverse voltage of 1.2 kV. Figure
3.14 is the result of extending the data with the solid trace representing the collected input
data, and the “O” trace representing the extended data, converted back to C, over the
range of 1.2 V to 1.2 kV. The discrepancy at very low voltages is characteristic of a non-
abrupt junction [22] and will have negligible effect on the model accuracy since charge
Q CV= , the parameter of interest for the CRM is very low in figure 3.15a.
100 101 102 103 1040
100
200
300
400
500
600
700
800C2D20120D Reverse Bias Capacitance
Cap
acita
nce
pF
VREV (V)
Input DataExtended Data
Figure 3.14 Reverse Bias Capacitance – Input and Extended Data
The CRM models diode switching behavior as a function of charge, using the
relationships Q CV= and Q it= . The model integrates the charge that is applied to, or
extracted from, the device by injecting a replica of the charge/discharge current into a
75
fixed value capacitor with the resulting voltage proportional to charge. The Reverse
Charge Monitor components S1, G1, R1 and C1 in figure 3.6 provide the integration
function, while E2 and E3 translate the instantaneous calculated value of charge, V(D) in
0 200 400 600 800 1000 12000
10
20
30
40
50C2D20120D Reverse Bias Charge
Cha
rge
nC
(a)
Input DataModel Data
0 200 400 600 800 1000 1200-5
0
5
10
15
Per
cent
Erro
r
VREV (V)
(b)
Figure 3.15 Comparison of Charge Input Data and Model Results
Volts/nC, to the corresponding value of reverse voltage across E3. The rate at which the
reverse voltage can slew is a function of how quickly the circuit currents can charge or
discharge the reverse bias capacitance seen in figure 3.14. When viewed in the
perspective of charge, the diode’s reverse bias characteristic is seen in figure 3.15a where
the solid trace is ( )REVQ V calculated from collected input data, and the ‘o’ trace is the
model’s ( )REVQ V relationship. The error between those two traces is presented in figure
3.15b exhibiting good accuracy to low voltages with 1% error occurring at approximately
10 V.
76
3.2.4. Power Dissipation
Forward power dissipation is calculated as the product of the diode’s forward junction
voltage and current. Referring to figure 3.6 for reference designators, the forward
dissipation is calculated according to equation (3.9) where V(TA), V(TB) and V(TC)
were previously discussed in section 3.1.1. In order to eliminate forward power errors,
3 ( )* ( )* ( , )* ( 2) ( ( )* ( ))G V P V TA V H G I V V TB V TC= + (3.9)
when the device is reverse biased, the forward voltage detector output V(P) is included to
zero the output of equation (3.9) when the device is reverse biased. The forward and
reverse polarity detectors are mathematical voltage comparators that produce one volt if
true and zero volts if false. The product of equation (3.9) is the controlling function for
current source G3, which injects current into the thermal model at one amp per Watt.
Since reverse bias dissipation has a negligible impact on the overall dissipation, current
4 ( )* ( , )* ( 3)G V N V G H I V= (3.10)
source G4 is disabled in the final Schottky diode model. The reverse bias dissipation, if
used, is calculated as shown in equation (3.10) which is the controlling function of
current source G4. The two current sources could be combined into one, but were kept
separate for ease in separately observing the effects of reverse and forward dissipation
during model development.
77
3.2.5. Model Results
A comparison between the Schottky diode Circuit Response Model and vendor supplied
SPICE model is presented. Both models were identically driven to
• IFWD = 20 Amps
• VREV = 1.2 kV
• ton = 5 µS (effective 0.48 IFWD duty cycle)
• T = 10 µS
• trise = tfall = 100 nS
• 100°C Heatsink
Where no direct SPICE model results are available, the value was calculated from
available data and is labeled with an asterisk. VFWD was iteratively calculated to
determine the junction temperature rise and its affect on VFWD. Though the part should
never be operated at 1.2 kV, VREV was set to 1.2 kV in order to get readable IREV data
from the datasheet figure even then the calculated value is estimated as this is a crowded
region of the IREV datasheet figure. The CRM VFWD and PDIS (avg) results, shown in table
Table 3.2 Schottky Diode CRM Static Test Results 100ºC Heatsink Calculated CRM Model SPICE Model
VFWD 3.15 V 3.23 V 1.96 V PDIS (avg) 30.3 W 30.9 W 18.8 W* Tj rise 14.5ºC 14.3ºC 9.0ºC* IREV (uA) <15 8.4 18
VFWD = 1.96 V with SPICE model at 100ºC, it is 2.19 V at 27ºC *calculated
78
3.2, are 2.5% and 2.0% higher respectively. The Tj rise result is 1.3% lower than
calculated, most of this error is attributable to the -2.5% error of the thermal model as
seen in table 3.1.
The IREV results are reasonable for both models since even at 1.2 kV, the input data IREV
value is subject to interpolation error due to crowding on the datasheet figure.
Nonetheless, as previously discussed, all of these values are simply too low to be of
concern for a circuit that has more than 30 Watts of average dissipation. A comparison of
simulation time with and without the IREV modeling reveals a striking improvement in
simulation time. The comparison simulation covered a span of 1 mS thus 100 cycles at
100 kHz. The average simulation time of five runs with the IREV model in circuit was 14.3
seconds, while the average simulation time without the IREV model was 8.2 seconds. At
first look the size of the IREV model is a small percentage of the overall model, but the
equation involves an exponential and four power functions, the most complex equation of
the entire model. All of the following simulation results will be with the IREV portion of
the CRM disabled.
The CRM dynamic characteristics were determined by injecting a current pulse that was
polarized to reverse bias the device. The accuracy of the reverse charge portion of the
model can be seen in figure 3.16. A 390 mA, 100 nS pulse produces the 39 nC charge
that was injected into each model. Extrapolating the datasheet capacitance figure out to
79
C2D20120D Circuit Response ModelDynamic Characteristics
-1.0K-0.8K-0.6K-0.4K-0.2K-0.0K0.2K
Rev
erse
Vol
tage
0
10
20
30
40
Cha
rge
nC
-400m-300m
-200m
-100m
0100m
Cha
rgin
g C
urre
nt (A
)
0.9u 1.0u 1.1u 1.2u
TIME (s)
371.9 V SPICE Model
898.5 V CRM Model
390 mA
39 nC
Figure 3.16 CRM and SPICE Model’s Response to 39 nC Reverse Charge
900 V returns an estimated capacitance of 43 pF resulting in a charge of 39 nC. The 39
nC charge produced a reverse voltage of 899 V on the CRM model, but only 372 V on
the CREE model.
The Schottky diode Circuit Response Model shows good modeling accuracy of the CREE
C2D20120D diode with more features than the available SPICE model. With this model
and collected input data, the application engineer will be able to configure a Schottky
diode SPICE model with electro-thermal characteristics without the need of one provided
by the device manufacturer. Furthermore Circuit Response Models offer the application
engineer a choice between model complexity and simulation time as they provide the
option of choosing which characteristics are modeled.
80
3.3. Power MOSFET Model
The power MOSFET is most often used for low to medium voltage power electronics
applications and is particularly attractive in high speed circuits where switching losses
can dominate. Though the inherently high RDS(on) values of high voltage MOSFET
devices restrict their use in high power systems, a CRM model has been developed to
show its application with these devices. Many MOSFET and IGBT characteristics are
strikingly similar with the only outwardly visible differences being the on-state voltage
drop and turn-off characteristics; accordingly there will be many similarities between the
two models. Figure 3.17 is the MOSFET Circuit Response Model subcircuit diagram.
The subcircuit file that fully defines the model can be found in Appendix D2. Where
portions of this model are similar to those previously described, the reader is referred to
the section(s) where they were first introduced.
Figure 3.17 Power MOSFET Circuit Response Model – Subcircuit Diagram
81
3.3.1. Gate Model: Capacitance and Input Admittance
The power MOSFET behaves as a voltage controlled current source with the gate-to-
source voltage (VGS) controlling the drain current (ID) as defined by input admittance,
shown in figure 3.18. This is modeled in the CRM by E3 (figure 3.17) which, with the
parameters on figure 3.18, produces the CRM Model results shown. The error of the
4.5 5 5.5 6 6.5 7 7.50
2
4
6
8
10
12
14
16IXT12N120 Input Admittance Straight Line Model
VGS (V)
I D (A)
-40oC25oC125oC
MAD10=-7.119e+001MAD11=-2.878e-001MAD12=8.209e-004
MAD20=8.821e+000MAD21=5.493e-002MAD22=-1.309e-004
Input DataModel Data
Figure 3.18 Input Data and Straight Line Model Input Admittance
straight line model might seem excessive to low values of ID however the difference is
only a few tenths of a volt between the input data and the straight line input admittance
model VGS values. The error that results from this approximation is turn-on delay. If the
model has a VTH that is greater than the actual device, it will take more time for VGE to
82
reach VTH and then to a lesser degree ID. This timing error would impact feedback loop
analysis, the domain of average modeling [75], but have little impact on dissipation.
IXT12N120 Input AdmittanceStraight Line Model SPICE Results
0
4
8
12
16Id
(A)
4.5 5.0 5.5 6.0 6.5 7.0 7.5
Vgs (V)
125C25C
-40C
Figure 3.19 IXT12N120 CRM Input Admittance Characteristics
The parameters on figure 3.18 that define the straight line equation as a function of both
VGS and temperature control E3 in figure 3.17, with the SPICE model result seen in
figure 3.19 which is the E3 voltage V(K) (labeled as current) as a function of gate voltage
V(A1,J). The rounded edges towards the bottom of figure 3.19 are the result of a “SPICE
feature” and not part of the controlling equation. E3 is defined as a Table Source [8,9]
which like a Value Source provides an output that is a function of the controlling
equation and input variables, however the Table Source also allows the user to set
boundaries on the output. In the case of E3, the output is limited to the range of zero to
100 V therefore bounding the current of this particular model from zero to 100 Amps.
Placing boundaries on the output of a controlled source could result in sharp changes at
83
the boundary edges, increasing the possibilities of convergence errors. In order to
minimize the possibility of a convergence error, SPICE adds a smoothing function
(GSMOOTH) to the Table Source which rounds boundary edges to minimize possible
convergence problems caused by discontinuities in the derivatives. In this particular
instance, the smoothing function partially corrects for the errors that were introduced by
using a straight line model. No attempts will be made to define the GSMOOTH
parameter as a means to help the straight line model more accurately model the
measurement data as this could defeat the purpose of GSMOOTH and increase the
possibility of convergence errors.
The gate capacitance of a power MOSFET can be significant, especially for large area,
high current devices. The Ciss and Crss capacitances are dynamic with respect to the
voltage between the drain and source terminals (VDS) as shown in figure 3.20. The Ciss,
Coss and Crss capacitance values in figure 3.20 are related to gate, drain and source
terminal pairs by equation (3.11) [76] and shown in figure 3.21. For high voltage devices,
essentially the full VDS potential is across the gate to drain capacitance (CGD) and gate
current is required to charge or discharge CGD during VDS excursions, making VDS rise
and fall times highly dependent on how much gate current is available. Due to the
constant current characteristics of an inductive load, ID remains essentially constant
during a switching event which holds VGS constant following the previously discussed
84
0 5 10 15 20 25 30 35 40101
102
103
104IXT12N120 Gate Characteristics - Capacitance
VDS (V)
Cap
acita
nce
pF
Ciss
Coss
Crss
Input DataSpline Data
Figure 3.20 IXT12N120 Terminal Capacitance
GD rss
DS oss rss
GS iss rss
C CC C CC C C
== −= −
(3.11)
input admittance relationship between ID and VGS. During a switching event the
amplitude of VGS in figure 3.22 can be divided into three distinct regions, each specific to
unique phases of the switching event [13,76]. The turn-on delay and drain current rise
from zero to ID occur during the first phase (0 to 35 nC) with the second phase exhibiting
constant VGS taking place as VDS is changing. The gate voltage is held constant during
this phase due to CGD and the Miller effect. As VDS is falling and with VGS remaining
constant, all of the current from the gate drive circuit is flowing into (discharging) CGD.
The third region (65 nC and above) occurs when VDS has settled into the ohmic region,
and drive current can once again charge CGS and CGD, which is now in parallel to the full
gate drive voltage. Often, the slope of region three is less than that of region one owing to
85
0 5 10 15 20 25 30 35 4010
1
102
103
104IXT12N120 Gate Characteristics - Parameters
VDS (V)
Cap
acita
nce
pF
MIC1 =1.767e+003MIC2 =8.280e+001MIC3 =3.507e+003MIC4 =1.398e+002MIC5 =4.000e+001
Ciss
CGSCGD
Figure 3.21 Calculated MOSFET Gate Parameters
the fact that the gate current is charging CGS and CGD which according to figure 3.19 is
much larger than when VDS was 40 V or greater. In the case of the IXT12N120, CGS
becomes smaller as CDS increases with this nearly perfect cancelation indicated by the flat
line Ciss which from equation (3.11) is the sum of CGS and CGD hence the similar slope of
regions one and three for this transistor.
The CRM models the MOSFET dynamic capacitance characteristics with three capacitors
and two controlled voltage sources. Referring to figure 3.17, C2 is CGD assigned the value
MIC2 which is CGD at the highest voltage of the capacitance figure (40 V). C3 is CGS
86
0 10 20 30 40 50 60 70 80 90 1000
1
2
3
4
5
6
7
8
9
10
Gate Charge-nC
VG
S-Vol
ts
IXT12N120 Gate Charge
Q CGS Q CGD Q CGS+CGD
Figure 3.22 MOSFET Gate Charge Curve with Region Boundaries
assigned the value MIC3 which is CGS at the same potential as CGD. C1 is assigned the
value MIC1 which is CGD when VDS is zero. E1, controlled by E2, tracks VGS when
VDS is greater than MIC5 which places zero volts across C1. As VDS falls below the
value of MIC5, the value of E1 is lowered towards zero volts which charges C1
diverting gate current from discharging C2 when VDS has fully collapsed. The value of
CDS is modeled as the value of oss rssC C− at the highest value of VDS in figure 3.17 using
the MIC4 parameter.
3.3.2. Forward Conduction (Drain-Source) Voltage Drop
The MOSFET exhibits distinct forward conduction regions called saturation and
linear/non-linear by some authors [22] and active and ohmic by others [13]. Bipolar
transistors and IGBT devices use the term saturation to describe when the device is
87
conducting with a minimum VCE drop. For the MOSFET, saturation is often used to
describe when VGS is greater than the threshold voltage (VTH), but is insufficient for the
amount of ID available from the circuit resulting in the device operating in a current
limiting mode. In order to avoid confusion with the different interpretations of the term
saturation, active and ohmic will be used in the following discussions of MOSFET
characteristics.
When VGS is at some value greater than VTH, the device is capable of supporting a value
of ID defined by equation (3.12), the previously discussed ( )D GSi f v input admittance
relationship, where K is a constant that depends on device geometry [13]. If the amount
of ID that is available from the circuit is greater than or equal to the value of equation
2( )( )D GS GS thi K v V= − (3.12)
(3.12), the device is in the active region. However when VGS is a value that can support
more current than the value of ID, the device is in the ohmic region. The ohmic region is
the preferred operating region for a switch mode converter and is characterized by a
minimum VDS voltage drop which in the ohmic region, is the product of ID and RDS(on).
RDS(on) is the summation of several resistance sources with the most significant
contribution coming from the epitaxial region for devices with VDS values of 500 V and
88
0 2 4 6 8 10 12 14 16 180
2
4
6
8
10
12IXT12N120 25oC Output Characteristics
VDS (V)
I D (A)
VGS
6.0 V6.5 V7.0 V7.5 V8.0 V10 V
Figure 3.23 IXT12N120 25ºC Output Characteristics
greater [76]. Minimum RDS(on) values only exist when VGS is much greater than what is
required to support ID. Both the ohmic and active regions can be seen in figures 3.23-24
with the active region indicated where the ( )D GSi f v curves are horizontal. The ohmic
region exists where the ( )D GSi f v curves are mostly straight with the slope indicating the
value of RDS(on) by equation (3.13). The drain-source voltage drop portion of the
( )DS
DS onDS
VRI
∆=
∆ (3.13)
MOSFET CRM model is divided into two sections with the first section modeling the
active region’s response to insufficient VGS and the second section modeling the ohmic
region’s response to ample values of VGS.
89
0 5 10 15 20 25 30 35 400
2
4
6
8
10
12IXT12N120 125oC Output Characteristics
VDS (V)
I D (A)
VGS
5.0 V5.5 V6.0 V6.5 V7.0 V8.0 V10 V
Figure 3.24 IXT12N120 125ºC Output Characteristics
The schematic representation of the MOSFET CRM model is seen in figure 3.17 with E4
and E5 providing the response to the ohmic and active regions respectively under the
control of the VGS and input admittance controlled output of E3 (node K), E5 is an error
amplifier that produces a drain to source voltage drop which limits ID to the value
determined by the input admittance model E3 as shown in equation (3.14), where Iadm is
3 ( )E D admV Gain I I= − (3.14)
the VGS and temperature dependent value of maximum drain current that the device can
support. E5 is also a Table Source with its output bounded between zero and 20% more
than the maximum rated VDS (1.44 kV). This simple current limiter circuit produces fairly
sharp corners (limited by GSMOOTH) thereby omitting what is often called the quasi-
saturation or non-linear region [22,40]. For hard switched inductive applications, for
which the CRM was developed, the MOSFET follows the current-voltage plane traveling
to and from corner (3) in figure 3.25c, with the supply voltage Vd and the circuit defined
90
current Il1 from L1 in figure 2.10. At MOSFET turn-on, when VGS exceeds VTH, the drain
current will rise from zero to the circuit defined level IL1 (corner 4 to 3) and then VDS will
fall from Vd to the ohmic region parallel to the constant current lines of
Figure 3.25 Voltage and Current Characteristics of an Inductive Switching Circuit
Paths taken by D1 and SW1 while Traversing the Vd Il1 Plane (c) figures 3.23-24, VDS will have traveled several hundred volts from Vd to the ohmic region
along the ID constant current line only to approach the quasi-saturation discrepancy for
the last five to ten volts of the VDS travel along the current-voltage plane. During those
last few volts as VDS approaches the ohmic region, the CRM will exhibit a constant value
of VGS where a quasi-saturation enabled model will exhibit a slight increase in VGS to
compensate for the reduced gain in this region. Hard switched MOSFETs should have a
VGE source that is greater than 12 V that will quickly transition the device from the active
region well into the ohmic region, making attempts to model the quasi-saturation regions
add more complexity than value.
91
0 5 10 15 20 25 30 35 400
2
4
6
8
10
12IXT12N120 RDS(on) Temperature Characteristics
VDS (V)
I D (A)
25oC 125oC
VGS=7.0 V8.0 V10.0 VVGS=7.5 V
8.0 V10.0 V
Figure 3.26 IXT12N120 Output Characteristics as a Function of Temperature
The ohmic region of a MOSFET is characterized by increasingly smaller reductions in
the value of RDS(on) with increasingly larger values of VGS as seen in figures 3.23-24.
Figure 3.26 shows the upper three RDS(on) ( )GSf V curves from figure 3.23 (25ºC) and
figure 3.24 (125ºC) where it is clear that with sufficient gate drive, preferably 12 V or
more, temperature has a far greater impact on the value of RDS(on) than does VGS. As a
means to reduce complexity with minimal effect on accuracy, the CRM models RDS(on) as
a function of only temperature. The RDS(on) temperature dependency is modeled by E2
using the VGS=10 V at 25ºC and 125ºC gate drive curves shown in figure 3.27 to control
the ohmic region voltage drop as a function of both current and temperature. In a hard
switched application, the device should always be driven with VGS values greater than 10
V, but the available VGS data of the IXT12N120 goes no higher than 10 V, additional
data would show a slight, but not appreciable reduction in the value of RDS(on).
92
0 5 10 15 20 25 30 35 400
2
4
6
8
10
12IXT12N120 RDS(on) Temperature Characterisitcs
25oC 125oC
VDS (V)
I D (A)
MRD10=1.074e-001MRD11=-6.248e-005
MRD20=-2.932e+000MRD21=1.338e-002
MRD30=-6.894e-002MRD31=3.060e-004
Figure 3.27 IXT12N120 CRM RDS(on) Model Data (+) and Parameters
3.3.3. Forward Blocking Leakage Current
The IXT12N120 datasheet (rev. Apr. 2004) does not have a figure that illustrates the off-
state leakage current characteristics. There is however an absolute maximum value of 3
mA specified for 125ºC and 1.2 kV which results in a maximum dissipation of 3.6 W.
There is a second, lower temperature specification of 25 µA @ 25ºC, 1.2 kV which adds
only 30 mW to the overall device dissipation. From the model results section, forward
conduction dissipation values of 100 W are recorded, suggesting that the inclusion of a
forward blocking leakage current section to the model would, like the Schottky diode
model, add more complexity than value. If a situation should arise where there is a need
to model the forward blocking leakage current, the methods and limitations that were first
introduced for the Schottky diode leakage current model would be applicable.
93
During system testing, a characteristic of the power MOSFET model was found that
results in what appears to be a leakage current in the tens of mA. The source of this error
is E5 which models the active region characteristics should the device have a value of
VGS that is greater than VTH, yet not great enough to assure operation in the ohmic region.
Equation (3.14) which is used for controlling E5 is that of a feedback amplifier which
always requires some error in order to provide correction. When VGS is below the value
of VTH, the equation in E5 is commanded that ID should be limited to zero, if ID is in fact
zero, there will be no output of E5 to drive ID to zero. Increased gain will of course drive
the error closer to zero, but it also brings the potential for convergence errors. In the
system connected devices section 4.1, this error will be accounted for in the overall
system calculations. A solution to this problem should be the subject of future work. A
possible solution would include a generic “reference MOSFET”, in series with E4 and
E5, similar to the reference diode in the Schottky diode model. This was the original
intent of the model, but a tangent to model the active region of the MOSFET took the
model to where it is today.
3.3.4. Power Dissipation
Calculating the forward conduction power dissipation is similar to the Schottky diode
using equation (3.15) and the applicable reference designators from figure 3.17 with IG3,
94
which represents the instantaneous dissipation, sourcing current to the thermal network at
the scale of 1 Amp/Watt. The thermal characteristics of the IXT12N120 were previously
3 ( )* ( )* ( ) ( ( )* ( ))GI V P V TA V Y V TB V TC= + (3.15)
discussed in section 3.1.1 but as a reminder, the steady state thermal impedance is
0.25ºC/W. The previously discussed initialization of the thermal network in section 3.1.1
is carried out by voltages TA, TB and TC in figure 3.17, and V(Y) is a 2nS lowpass
filtered version of the instantaneous forward dissipation. No attempt is made to calculate
forward biased leakage current due to the lack of sufficient data and low worst case
dissipation.
3.3.5. Model Results
The CRM power MOSFET model was tested with a diode clamped inductor in series
with the drain and VD as in figure 3.28. This circuit, with a current source in place of an
inductor is often used to illustrate how a power transistor responds to an inductive circuit.
With the voltages and currents that are typical of a high power converter, dissipation is of
prime concern to the application engineer. To that end, the areas of interest to validate the
capabilities of the CRM power MOSFET model relate to dissipation which will be
broken down into static and dynamic losses. The model validation test was configured to
obtain combined static and dynamic losses under the following conditions:
• I1 = 8 Amps
• Vd = 900 V
95
• ton = 5 µS
• T = 10 µS
• trise = tfall = 10 nS (driver output)
• 100°C Heatsink
Figure 3.28 CRM MOSFET Functional Test Schematic
A SPICE model of the IXYS IXT12N120 is available and is used to compare both the
static and dynamic characteristics. Table 3.3 shows the VFWD drop when the device is on
and the average power dissipation, which is the combination of switching and
conduction. Where no direct SPICE model results are available, the value was calculated
from available data and is labeled with an asterisk.
96
Table 3.3 Power MOSFET CRM Switching Test Results 100ºC Heatsink Calculated CRM Model SPICE Model
VFWD 22.2 V 22.8 V 10.5 V PDIS (avg) 104 W 104 W 57 W* Tj rise 26ºC 25.5ºC 14.3ºC*
The simulation results of the CRM are very close to the calculated values with a VFWD
error of +2.7% and Tj rise error of -1.9%. The SPICE model indicates a forward
conduction voltage drop of 10.5 V regardless of the simulation temperature. This forward
CRM MOSFET ModelTurn-On Pulse - 100C Heatsink
-40
4
8
1216
V(G
,S)
-202468
10
I Dra
in
00.2K
0.4K
0.6K
0.8K1.0K
V(D
,S)
24.9u 25.0u 25.1u 25.2u
TIME (s)
18 nS
Figure 3.29 MOSFET Turn-On Pulse with 18 nS VDS Fall Time
Solid-Trace CRM Model Dotted Trace SPICE Model drop corresponds to an RDS(ON) of 1.31Ω as compared to the datasheet specification of
1.4Ω maximum. Figure 3.29 illustrates the turn-on waveforms of both the CRM and
SPICE models which are almost indistinguishable given the resolution of figure 3.29.
97
Figure 3.30 illustrates the turn-off waveforms where the CRM model appears a little
slower than the SPICE model with 4 nS of additional delay and 6 nS of additional VDS
rise.
The power MOSFET Circuit Response Model shows good modeling accuracy with more
features and better conduction loss accuracy than the available SPICE model. With this
model and collected input data, the application engineer will be able to configure a power
MOSFET SPICE model with electro-thermal characteristics without the need of one
provided by the device manufacturer.
CRM MOSFET ModelTurn-Off Pulse - 100C Heatsink
-40
4
8
1216
V(G
,S)
-202468
10
I Dra
in
00.2K
0.4K
0.6K
0.8K1.0K
V(D
,S)
19.9u 20.0u 20.1u 20.2u
TIME (s)
33 nS
Figure 3.30 MOSFET Turn-Off Pulse with 33 nS VDS Rise Time
Solid-Trace CRM Model Dotted Trace SPICE Model
98
3.4. Insulated Gate Bipolar Transistor Model
Many of the IGBT’s outwardly visible characteristics are similar to those of the
MOSFET, allowing similar modeling philosophies to be shared between the two device
models. These similarities correspond to the gate input, thermal and leakage current
characteristics. The forward conduction voltage drop exhibits an offset plus ohmic drop
characteristic resembling that of the Schottky diode, therefore the IGBT forward voltage
drop will be similarly modeled. Unique to the IGBT is the turn-off characteristic which
will be discussed in detail in section 3.4.4 “Turn-Off Current Tail”. Figure 3.31 is the
subcircuit diagram of the IGBT Circuit Response model, which along with the
corresponding circuit file located in Appendix E2, provide a complete technical
description of the model.
Figure 3.31 IGBT Circuit Response Model – Subcircuit Diagram
99
3.4.1. Gate Model: Capacitance and Input Admittance
The IGBT input circuitry is MOSFET based so the terminal capacitances are
characteristically the same between the two devices. Since the IGBT can have current
densities 20 times that of a MOSFET [11], fewer cells are required for a given current
rating resulting in different capacitance value ranges between comparably rated devices.
Evidence of this difference can be seen comparing the capacitance figures 3.20 and 3.32
of the two comparably rated devices used in this research. This 6.4:1 ratio of the
MOSFET 3400 pF Ciss and the IGBT 530 pF Cies is an example of the difference.
Components C1, C2, C3, E1 and E2 in figure 3.31 are used in the same configuration as
0 5 10 15 20 25 30 35 4010
0
101
102
103IXG12N120A2 Gate Characteristics - Capacitance
VCE (V)
Cap
acita
nce
pF
Cies
Coes
Cres
Input DataSpline Data
Figure 3.32 IGBT Capacitance from Datasheet
100
the MOSFET gate input. Further details of how the components are valued and used can
be reviewed in section 3.3.1. The IGBT gate capacitance terminology is somewhat
different from that of the MOSFET due to the different terminal names. Equation 3.11 is
repeated below with the different element names for reference.
GC res
CE oes res
GE ies res
C CC C CC C C
== −= −
(3.16)
0 5 10 15 20 25 30 35 4010
0
101
102
103IXG12N120A2 Gate Characteristics - Parameters
VCE (V)
Cap
acita
nce
pF
IIC1 =8.756e+001IIC2 =2.311e+000IIC3 =5.371e+002IIC4 =2.108e+001IIC5 =4.000e+001
Cies
CGECGC
Figure 3.33 Calculated IGBT Gate Parameters
The input admittance of the IGBT is modeled similar to that of the MOSFET. Figure 3.34
compares the input data with the model results and shows the resulting parameters that
are used by E3 to determine the instantaneous value of current that the device can support
as a function of VGE and temperature. During model testing, errors between the CRM
model results and input data were observed. Of particular concern were contradictions
101
between the gate charge, gate capacitance input data in addition to the rise – fall time
input data and corresponding model results. Possible explanations of these contradictions
and their impact on the model’s results are discussed in section 3.4.6.
4 4.5 5 5.5 6 6.5 7 7.5 8 8.5 90
5
10
15
20
IXG12N120A2 Input Admittance Straight Line Model
VGE (V)
I C (A)
-40oC25oC
125oC
IAD10=-1.068e+002IAD11=2.856e-001IAD12=-2.667e-004
IAD20=1.623e+001IAD21=-3.777e-002IAD22=3.436e-005
Input DataModel Data
Figure 3.34 IGBT Input Admittance with Model Parameters
3.4.2. Forward Conduction (Collector-Emitter) Voltage Drop
As previously discussed, the IGBT forward conduction voltage drop has characteristics
similar to that of the Schottky diode. Dissipation is of prime importance to the power
electronics system engineer, accordingly errors in the models will be related to power
since a volt error at 20 Amps has a far greater impact than a volt error at one amp. The
forward voltage characteristics of the CRM are straight line approximations as discussed
in section 2.3.1 for the forward biased diode, and can be seen in figures 3.35-36 for a
102
0.5 1 1.5 2 2.5 3 3.5 40
5
10
15
20
25IXG12N120A2 Forward Conduction Voltage Drop Model
VCE (V)
I C (A)
VGE=15V13V11V
IVFD110=3.703e-001IVFD111=1.384e-001IVFD112=-4.845e-003
IVFD120=3.207e-001IVFD121=-2.995e-002IVFD122=9.250e-004
Input DataModel Data
Figure 3.35 IGBT Forward Conduction Voltage Drop 25ºC
junction temperature of 25ºC and figures 3.37-38 for a junction temperature of 125ºC.
Accuracy of the model for currents that are within the input data range is shown in figure
3.36 for 25ºC and again in figure 3.38 for 125ºC. These figures show the difference in the
0 5 10 15 20-1
0
1
VGE=11
Wat
ts
IXG12N120A2 Forward Conduction Dissipation Error Vs. Collector Current
0 5 10 15 20-1
0
1
VGE=13
Wat
ts
0 5 10 15 20-1
0
1
VGE=15
Wat
ts
IC (A) Figure 3.36 Dissipation Error of Model in Watts 25ºC
103
calculated dissipation, as a function of collector current, between the input data and the
model data. Unlike the MOSFET, VGE is equally as important as temperature when
modeling the forward conduction voltage drop requiring the model to take on the
function ( ), ,CE C GEV f I V T . The CRM calculates this multidimensional function with E5A
0.5 1 1.5 2 2.5 3 3.5 4 4.5 50
5
10
15
20
25IXG12N120A2 Forward Conduction Voltage Drop Model
VCE (V)
I C (A)
VGE=15V13V11V
IVFD210=4.492e-001IVFD211=9.723e-002IVFD212=-2.784e-003
IVFD220=4.107e-001IVFD221=-3.572e-002IVFD222=1.036e-003
Input DataModel Data
Figure 3.37 IGBT Forward Conduction Voltage Drop 125ºC
calculating the voltage drop as a function of VGE and IC at 25ºC and E5B providing the
same for 125ºC. These two voltages are linearly interpolated as a function of temperature
by E5 which supplies the three dimensional voltage drop (minus the PNP drop). Since the
104
0 5 10 15 20-1
0
1
VGE=11
Wat
ts
IXG12N120A2 Forward Conduction Dissipation Error Vs. Collector Current
0 5 10 15 20-1
0
1
VGE=13W
atts
0 5 10 15 20-1
0
1
VGE=15
Wat
ts
IC (A) Figure 3.38 Dissipation Error of Model in Watts 125ºC
input data consists of only two points, 25ºC and 125ºC, linear interpolation is appropriate.
If additional data points are available a more complex interpolation could be used if the
additional accuracy offsets the complexity.
3.4.3. Forward Blocking Leakage Current
Similar to the IXT12N120 power MOSFET, as described in section 3.2.2, the datasheet
for the IXG12N120A2 gives limited data for leakage current by specifying a maximum
of 275 µA at a junction temperature of 125ºC. This minimal impact on the overall device
dissipation implies that modeling leakage current would add unnecessary complexity to
the model.
105
3.4.4. Turn-off Current Tail
A very important characteristic of the IGBT relates to its turn-off characteristic, often
referred to as a “current tail”. A quick explanation of the underlying cause of this effect is
described while referring back to the IGBT equivalent circuit in figure 2.9a which shows
the concept of a MOSFET supplying the base current to a PNP transistor. In order for the
PNP transistor to hold off the full value of VCE, it must have a large base width [27]
which results in a very low beta [11,13]. In this configuration a significant portion,
sometimes as much as half, of the total collector current must flow through the MOSFET
channel. When the IGBT is turned off, the current that flows through the MOSFET
channel abruptly stops, at MOSFET speeds, shutting off not only a portion of the
collector current but the PNP base current as well. The initial fall of the collector current
is attributed to the cessation of the MOSFET channel current and the following
exponential fall is due to the recombination time of the PNP base stored charge [27]. The
CRM models this characteristic by controlling the base current source G1 control voltage
decay using S1 to mimic a two-valued voltage controlled resistor. When VGE has fallen
below the level needed to support the flow of collector current, the resistance of S1
increases to a value such that the time constant with C5 sets the exponential decay of the
collector current. Figure 3.41 (section 3.4.6 Model Results) shows the IGBT turn-off
sequence which starts with the slew of VCE where the collector current remains at the
steady state value of 12 Amps, then dropping to 8 Amps when the value of VGE drops
below the value that supports the full collector current at the end of the VGE plateau.
106
Following this event, the collector current exponentially falls to 10% of the initial
collector current value in 1.7 µS.
3.4.5. Power Dissipation
Calculation of the IGBT forward conduction power dissipation is similar to both the
Schottky diode and power MOSFET using equation (3.17), with the applicable reference
designators from figure 3.31, and IG3 sourcing current to the thermal network at the scale
3 ( )* ( )* ( ) ( ( )* ( ))GI V P V TA V Y V TB V TC= + (3.17)
of 1 Amp/Watt. The thermal network initialization and lowpass filtering are similar to
that of the MOSFET model as described in section 3.3.4. The thermal characteristics of
the IXG12N120A2 were previously discussed in section 3.1 but as a reminder, the steady
state thermal impedance is 1.66ºC/W. No attempt is made to calculate forward
conduction leakage current due to the lack of sufficient data and minimal impact on the
total device dissipation.
3.4.6. Model Results
The CRM IGBT model was tested with a diode clamped inductor in series with the
collector and Vd similar to the MOSFET configuration seen in figure 3.28. The circuit
values were set to the following values with the heatsink limited to 50ºC to keep the
junction temperature within the temperature range of the available data (125ºC).
107
• I1 = 12 Amps
• Vd = 960 V
• ton = 200 µS
• T = 400 µS
• trise = tfall = 10 nS (driver output)
• 50°C Heatsink
Initial test results showed good agreement between the input data and model results for
steady-state characteristics (VCE drop, dissipation, etc,) but not for switching behavior.
The switching times, and therefore the turn-on and turn-off energy loss results, were less
than the datasheet values by more than one half. A review of the input capacitance and
gate charge input data revealed a discrepancy that can account for the incorrect dynamic
behavior, which now provides results that are more inline with the datasheet values.
According to figure 3.39, the 12 Amp, gate charge plateau occurs at a VGE of 8 V and
exists for a “period” of about 7 nC, for a VCE of 600 V. According to the input admittance
data, the value of VGE that will support 12 Amps at 25ºC is 7.16 V (first discrepancy) and
according to figure 3.33, the value of CGC for values of VCE greater than 40 V is 2.3 pF.
Since this plateau region signifies when VCE is changing, and with VGE constant, all of
the gate current will flow through CGC to either charge or discharge CGC. Hence gate
current and the value of CGC determine the dynamic behavior of VCE. The charge of 560
V and 2.3 pF is 1.29 nC well below the value of 7 nC from the gate charge data
108
0 5 10 15 200
2
4
6
8
10
12
14
16
Gate Charge (nC)
VG
E (V)
IXG12N120A2 Gate Charge
7 nC
Figure 3.39 IXG12N120A2 Gate Charge Characteristics
(second discrepancy). Even if the VCE sat value of CGC (~20 pF) is assumed for the
entirety of the additional 37 V, the total charge would only be raised to 2.03 nC. Clearly
the gate charge data doesn’t agree with the capacitance data. Based on this apparent
3.45:1 discrepancy in the charge of CGC between the two sets of data and the faster than
datasheet values of rise and fall times, a common multiplier (the final value is 3.0) was
added to the subcircuit statements for C1, C2, C3 and C7 increasing the value of all four
capacitor parameters in figure 3.31 by the amount of the multiplier. Table 3.4 shows the
results of VCE saturation and switching loss as compared with the calculated data. There
are no SPICE models of the IXG12N120A2 available for comparison with the CRM
leaving only sparse datasheet information available to compare with the CRM results.
109
Table 3.4 IGBT CRM Switching Test Results 50ºC Heatsink
Calculated CRM Model SPICE Model
VFWD 2.63 V 2.65 V N/A PDIS (avg) 35.6 W 38.3 W N/A Tj rise 59.1ºC 64.2ºC N/A
The simulation results of the CRM, shown in table 3.4, are very close to the calculated
values with a VFWD error of +0.7%, PDIS error of 6.2%, and Tj rise error of 8.6%. The PDIS
error can be contributed to higher than specified switching losses. The application
engineer could fine tune the model by adjusting (downward) the parameters GMUX for
turn-on losses and TAU for turn-off losses. Figure 3.40 illustrates the turn-on waveforms
of the CRM model with figure 3.41 illustrating the turn-off waveforms.
IXG12N120A2 CRM Turn-On Pulse
00.2K0.4K0.6K0.8K1.0K
VCE
(V)
-30369
1215
Ic (A
)
-4048
1216
Vgat
e (V
)
04K8K
12K16K
Wat
ts
4.95u 5.05u 5.15u 5.25u 5.35u 5.45u
TIME (s)
Instantaneous Dissipation
Collector Voltage
Collector Current
Gate DriveGate Voltage
70 nS
0.9 mJ
4 nS
Figure 3.40 IXG12N120A2 CRM Turn-On Pulse
110
IXG12N120A2 CRM Turn-Off Pulse
00.2K0.4K0.6K0.8K1.0K
VCE
(V)
-30369
1215
Ic (
A)
-4048
1216
V G
ate
(V)
04K8K
12K16K
Dis
sipa
tion
(W)
204.0u 204.5u 205.0u 205.5u 206.0u 206.5u 207.0u 207.5u 208.0u 208.5u 209.0u 209.5u 210.0u
TIME (s)
Gate DriveGate Voltage
Instantaneous Dissipation8.17 mJ
1.7 uS
190 nSCollector Voltage
Collector Current
Figure 3.41 IXG12N120A2 Turn-Off Pulse
3.5. Summary of Model Development
In this chapter, the circuit response models for the Schottky diode, power MOSFET and
IGBT along with their corresponding thermal networks were developed and tested.
Model testing shows good agreement between the input data and CRM model results of
all three devices for the static response as a function of junction temperature. For the
cases where a vendor supplied SPICE model was available, side-by-side testing of the
CRM and SPICE models provides clear evidence of the thermal shortcomings typical of
SPICE models.
In at least one case, the IXG12N120A2 IGBT, there appears to be conflicting data within
the vendor’s datasheet. The first indication of possible discrepancies was the turn-on and
111
turn-off times of the CRM IGBT model was faster than published data by more than a
factor of two. Theoretically speaking, the VCE rise / fall times of the IGBT are functions
of the CGC which though dynamic, is essentially constant for 95% of the 900 V transition
signifying that the rapid increase in CGC during the last 5% of the transition does not
influence the rise / fall time which is specified for the 10% to 90% interval. Region II of
the gate charge curve (figure 3.22) is related to CGC, does not agree with the CV product
of Cres. A solution to this problem adds a parameter defined multiplier to the calculated
capacitance parameters IIC1-4. This solution adds an extra degree of freedom to the
application engineer by allowing the turn-on and turn-off times to be “fine tuned” to
further match the model output to observed data.
The results of the individual device tests indicate that power semiconductor devices can
be modeled based solely on observed data, a major advance for the system engineer that
is unable to find vendor supplied SPICE models for his selected devices. Chapter 4 will
continue the test and characterization of the CRM models by operating a switching
device alongside the Schottky diode in a buck converter that is operating in the
continuous conduction mode, a very common topology in voltage regulator systems.
112
4. Model Results of System Connected Devices
Power MOSFET, IGBT and Schottky diode CRM models will undergo system level
testing to demonstrate their ability to properly model the switching devices’ response to
circuit characteristics. CRM model results will be compared to calculated values and, if
available, vendor supplied SPICE model results. A continuous conduction mode5 (CCM)
buck converter is chosen for these tests, based not only on its widespread utilization, but
additionally the waveforms and component stresses of this topology are typical of many
power electronics converters.
4.1. Buck Converter
Power electronics converters process electrical power by transferring energy from a
source to a load by periodically storing and releasing energy in (ideally) lossless
components such as inductors and capacitors. Typically this periodic transfer of energy
requires two or more switching components acting in unison. There are many power
electronic converter topologies that can process this energy transfer, with each one
having its own set of application dependent advantages and disadvantages. A commonly
5 Continuous conduction mode exists when the inductor current does not reach zero during any portion of the switching period. If the inductor current does reach zero, the converter is in the discontinuous conduction mode [13].
113
used and simple to implement power converter topology is the buck converter [13],
illustrated in figure 4.1. The buck converter, as its name implies, produces an output
SW1
D1
L1
I SW
1
I D1
IL1
I SW
1
I D1C
urre
nt
Vin
t on t off
VD1
Volta
ge
T
t on t off
VD1
T
Vout
Figure 4.1 Buck Converter with Waveforms and Current Paths
voltage that is less than the input voltage. The input to output voltage ratio of a buck
converter that is operating in the continuous conduction mode is determined by the duty
cycle (D) as shown in equation (4.1) with D being a function of on and off times as in
equation (4.2). Voltage regulation is a common application of the buck converter
topology where outV is compared to a reference voltage with the resulting error signal
controlling the value of D to maintain a constant outV amongst changing values of load
*out inV D V= (4.1)
on on
on off
t tDt t T
= =+
(4.2)
114
and inV . The waveforms of a buck converter are shown in figure 4.1 which illustrates the
voltage / current waveforms and simplified circuit schematic.
A very important requirement of any power electronics converter is to operate as
efficiently as possible, not only for energy conservation, but also to minimize heat that is
generated within the converter. This lost energy requires additional volume and resources
to transfer the heat away from the converter. In its simplest form, efficiency is the ratio
between the converter’s output power and input power as in equation (4.3). Prior to
building a power electronics converter, the expected efficiency needs to be calculated in
order to properly allocate additional resources needed to extract the heat from the system.
In a power electronics converter, the switching device conduction and switching losses
out out
out loss in
P PP P P
η = =+
(4.3)
are major sources of the overall losses. In addition to the switching device losses, other
losses need to be considered at the system level such as the non-ideal inductor and
capacitor which have both DC and AC loss components. For the purpose of evaluating
the CRM models, only the switching device losses will be considered. The power
dissipation of both the switch or diode elements can be approximated by equation (4.4)
where lossP is the total device dissipation. onP in equation (4.5) is the forward conduction
loss, where onV is the voltage drop, oI is the load current and ont represents the time that
loss on swP P P= + (4.4)
115
onon on o
tP V IT
= (4.5)
( ) ( )0.5* on offsw in o
t tP V I
T+
= (4.6)
the device is conducting. swP in equation (4.6) is the switching loss with t(on) and t(off)
representing the turn-on and turn-off times respectively [13], where inV is the supply rail
voltage and oI is the output current. Equation (4.6) is an approximation since the current
flowing through the switching elements (figure 4.1 IL1) contains ripple components
superimposed across the average value Io. It is assumed that the inductance of L1 is large
enough that the peak ripple of the current is less than 10% allowing the use of Io.
Equation (4.6) is also based on the assumption that the switching waveform’s rise and fall
times have constant slope giving the instantaneous dissipation waveform a triangular
shape during the switching event. The IGBT turn-off current tail does not have a constant
slope which would introduce an error to equation (4.6). In order to adequately specify
IGBT switching losses, turn-on and turn-off energy loss [21,63] are often specified by the
manufacturer. Using energy to calculate IGBT switching loss, equation (4.7) is used in
( )sw on off swP e e f= + (4.7)
place of equation (4.6). These formulae will be used in the following sections to calculate
the expected switching device losses for comparison with the CRM model’s power
dissipation results.
116
4.2. Power MOSFET / Schottky Diode
In order to incorporate the CRM subcircuits into a schematic based SPICE simulation
platform, symbols which identify the input and output pins as well as the subcircuit file
name need to be created. Each schematic based SPICE platform is unique so the user will
need to create the three symbols conforming to their particular platform’s requirements.
The symbol creation is a one time event for each of the CRM models, as the subcircuit
Figure 4.2 Buck Converter / CRM Model Test Schematic
name is what uniquely identifies that symbol to a part. Figure 4.2 is the simplified test
circuit schematic for both the MOSFET and IGBT / Schottky diode model tests. The
device subcircuit symbols have the usual three or two connection nodes for the MOSFET
117
and Schottky diode respectively. The three additional connection pins are used to
initialize the thermal network, set the heatsink temperature and monitor the junction
temperature as was discussed in section 3.1.1. A circuit similar to figure 4.2 was
simultaneously simulated using vendor supplied SPICE models of the IXT12N120
MOSFET and C2D20120D Schottky devices as a means to compare model results. This
makes it possible to provide the overlaid switching waveform comparisons seen later in
this section. The MOSFET / Schottky diode model combination was tested to the
following operating conditions.
• Io = 10 Amps
• Vd = 900 V
• ton = 9 µS
• T = 10 µS
• trise = tfall = 10 nS (gate drive source)
• 60°C Heatsink
The modeled heatsink temperature was set to 60ºC to keep the MOSFET junction
temperature below 125°C which is the highest temperature of input data available. If the
application engineer has access to temperature data greater than 125ºC, that additional
data can be used with the MATLAB script to calculate parameters that cover the
extended temperature range. The biggest difference between the SPICE and CRM model
results is the temperature dependent forward conduction voltage drop. This difference is
due to the previously discussed non-thermal characteristics of SPICE models for both the
MOSFET and Schottky parts that are being evaluated. Evidence of this difference can be
seen by comparing figures 4.4-5 which show that the SPICE model forward conduction
118
voltage drop (dashed line) is the same with a SPICE .TEMP statement of both 25ºC and
60ºC. In order to ease the comparison of switching waveforms, the Vd values of both
modeling circuits were individually set to obtain identical 800 VDC outputs. The reason
for the otherwise different output voltages is due largely to the different forward
conduction voltage drop of the CRM and SPICE models.
Table 4.1 lists the calculations that were used to estimate the switching device power
losses based on equations (4.4-6). The calculated results indicate that the MOSFET will
clearly dissipate more power than the Schottky diode. This is due not only to the large
Table 4.1 MOSFET / Schottky Test: Initial Power Calculations 25ºC MOSFET Diode 60ºC MOSFET Diode System D 0.90 System D 0.90 Component D 0.90 0.10 Component D 0.90 0.10 Vd 900 900 Vd 900 900 Von 21.5 1.55 Von 30.6 1.69 Io 10 10 Io 10 10 Ton (µS) 9 1 Ton (µS) 9 1 Tper (µS) 10 10 Tper (µS) 10 10 t(on) (µS) 0.025 0.025 t(on) (µS) 0.025 0.025 t(off) (µS) 0.017 0.017 t(off) (µS) 0.017 0.017 Pon 193 1.55 Pon 275 1.69 Psw 19 0 Psw 19 0 Ptotal 212 1.55 Ptotal 294 1.69
forward conduction voltage drop that is characteristic of a high voltage power MOSFET,
but also since the duty cycle is 90% with the MOSFET conducting IO 90% of the time.
The 60°C simulation results are shown in table 4.2 and show good agreement between
119
the CRM model and calculated values with the exception of the MOSFET switching loss.
The calculated switching loss does not take into consideration the current that is charging
and discharging the reverse bias capacitance of the Schottky diode which as revealed by
the CRM model (figure 4.3) is significant.
Table 4.2 MOSFET / Schottky Test: Simulation Results 60ºC MOSFET Diode CALC CRM SPICE CALC CRM SPICE Von 30.6 30.7 13.0 Von 1.69 1.68 1.46 Pon 275 274 NA Pon 1.69 1.68 NA Psw 19 41 NA Psw 0 0 NA Ptotal 294 315 NA Ptotal 1.69 1.68 NA Tj Rise 73.5 73.4 NA Tj Rise 0.81 0.72 NA
Schottky Diode Reverse Bias Charging Current
-4
0
4
8
12
16
20
Id (A
)
39.60u 39.85u 40.10u 40.35u 40.60u
TIME (s)
Figure 4.3 Power MOSFET Turn-On Current
120
Model ComparisonCRM - Solid SPICE - Dashed
05
10
15
20
25
30
3540
V(D
,S)
9.4
9.6
9.8
10.0
10.2
10.4In
duct
or C
urre
nt
39u 40u 41u 42u 43u 44u 45u 46u 47u 48u 49u 50u
TIME (s)
21.2
12.5
23.3
13.5
Figure 4.4 MOSFET On VDS Comparison with Inductor Current 25ºC (1µS/div)
Figures 4.4-5 show the MOSFET forward conduction voltage drop waveforms of the
CRM (solid) and SPICE (dashed) models. Note the voltage drop of the CRM model
increases with temperature while the SPICE model results remain unchanged.
Model Comparison - 60C HeatsinkCRM - Solid SPICE - Dashed
05
10
15
20
25
30
3540
V(D
,S)
9.4
9.6
9.8
10.0
10.2
10.4
Indu
ctor
Cur
rent
39u 40u 41u 42u 43u 44u 45u 46u 47u 48u 49u 50u
TIME (s)
12.5 13.5
29.2 32.0
Figure 4.5 MOSFET On VDS Comparison with Inductor Current 60ºC (1µS/div)
121
Model ComparisonCRM - Solid SPICE - Dashed
-5
-3
-1
1
3
5
V(A
,C)
9.4
9.6
9.8
10.0
10.2
10.4In
duct
or C
urre
nt
38.75u 39.00u 39.25u 39.50u 39.75u 40.00u 40.25u 40.50u
TIME (s)
1.59 1.57
Figure 4.6 Diode On VAC Comparison with Inductor Current 25ºC (250nS/div)
The junction temperature rise of the CRM Schottky diode model is less than one degree
thus requiring an elevated heatsink temperature in order to see the different forward
conduction voltage drops.
Model Comparison - 60C HeatsinkCRM - Solid SPICE - Dashed
-5
-3
-1
1
3
5
V(A
,C)
9.4
9.6
9.8
10.0
10.2
10.4
I(R
LA)
38.75u 39.00u 39.25u 39.50u 39.75u 40.00u 40.25u 40.50u
TIME (s)
1.71 1.641.48 1.44
Figure 4.7 Diode On VAC Comparison with Inductor Current 60ºC (250nS/div)
122
Model Comparison - 60C HeatsinkCRM - Solid SPICE - Dashed
-0.2K0
0.2K0.4K0.6K0.8K1.0K
V(D
,S)
-4048
121620
I Dra
in
-40
4
8
1216
V(G
,S)
39.0u 39.2u 39.4u 39.6u 39.8u 40.0u 40.2u
TIME (s)
Figure 4.8 1µS Off Full Pulse With Overlaid Traces 60ºC (200nS/div)
Model Comparison - 60C HeatsinkCRM - Solid SPICE - Dashed
-0.2K0
0.2K0.4K0.6K0.8K1.0K
V(D
,S)
-4048
121620
I Dra
in
-40
4
8
1216
V(G
,S)
39.1u 39.125u 39.15u 39.175u 39.2u
TIME (s)
Figure 4.9 1µS Off Pulse VDS Falling Edge 60ºC (25nS/div)
123
Model Comparison - 60C HeatsinkCRM - Solid SPICE - Dashed
-0.2K0
0.2K0.4K0.6K0.8K1.0K
V(D
,S)
-4048
121620
I Dra
in
-40
4
8
1216
V(G
,S)
40.075u 40.1u 40.125u 40.15u 40.175u
TIME (s)
Figure 4.10 1µS Off Pulse VDS Rising Edge 60ºC (25nS/div)
Table 4.3 Power MOSFET Performance vs. Switching Frequency
Freq
uenc
y (k
Hz)
Hea
t Sin
k T
Tem
pera
ture
Ris
e
Junc
tion
Tem
pera
ture
On
Ene
rgy
(mJ)
Off
Ene
rgy
(mJ)
Per
iod
Ene
rgy
(mJ)
On-
Sta
te E
nerg
y (m
J)
Switc
hing
Los
s (W
)
Con
duct
ion
Loss
(W)
Tota
l Los
s (W
)
50 25 56.5 81.5 0.265 0.061 4.56 4.23 16.3 211.7 228.0 100 25 60.3 85.3 0.265 0.062 2.48 2.15 32.7 215.3 248.0 200 25 74.4 99.4 0.267 0.064 1.50 1.17 66.2 233.8 300.0 500 25 112.6 137.6 0.267 0.065 0.907 0.58 166.0 287.5 453.5
50 60 74.1 134.1 0.264 0.066 5.98 5.65 16.5 282.5 299.0 100 60 80.3 140.3 0.265 0.066 3.24 2.91 33.1 290.9 324.0
An analysis of performance vs. frequency for the power MOSFET, shown in table 4.3,
verifies constant values of turn-on and turn-off energy confirming that switching loss is
124
proportional to frequency. The conduction loss is shown to increases with frequency.
This is due to the increased switching loss raising the junction temperature and
consequently RDS(ON). The elevated junction temperatures at 500 kHz / 25°C and all of
the 60°C runs indicate that the IXT12N120 should not be subjected to these operating
conditions. Since conduction is the majority of the overall loss, either a lower value of
output current or duty cycle would quickly lower the junction temperature.
The CRM modeling concept is shown to accurately represent the response that a power
MOSFET transistor and Schottky diode would exhibit to circuit characteristics while
connected in a buck converter configuration. The rise and fall times are comparable to the
SPICE model results; actual hardware tests would reveal which model is closest to
reality. The forward conduction voltage drop of the CRM is slightly higher than the
calculated value at 25ºC and accurate to the calculated value at 60ºC. The calculated
junction temperature rise of the MOSFET at 60ºC is 8% less than the calculated value
where the thermal model itself was calculated to be 1.6% low in section 3.1.1. The reason
for this discrepancy is not known at this time, though it is likely an initialization error
since the calculated and CRM model dissipation results agree.
4.3. Insulated Gate Bipolar Transistor / Schottky Diode
The IGBT CRM model is tested in a buck converter topology along side the Schottky
diode CRM model in a fashion similar to the power MOSFET / Schottky diode test. The
125
test schematic is identical to that of figure 4.2 with the exception of the part name of the
switching device (IXG12N120A2) and the three device terminal designators are C, G and
E corresponding to those of the IGBT. The IGBT is initially tested at 2.5 kHz as opposed
to 100 kHz for the power MOSFET, therefore the value of the lowpass filter L1 and C1
will be increased in value 40 times from that of the MOSFET test circuit.
• Io = 10 Amps
• Vd = 900 V
• ton = 360 µS
• T = 400 µS
• trise = tfall = 10 nS (gate drive source)
• 60°C Heatsink
A SPICE model of the IXG12N120A2 is not available for comparison with the CRM
model. Therefore a simultaneous SPICE simulation output comparison both numerical
and waveforms are not available. The metric for accuracy of the IGBT CRM model will
be dissipation as this is a most important characteristic to the high power application
engineer. The initial power calculations in table 4.4 are similar in methodology to the
power MOSFET with the exception of using turn-on and turn-off energy in place of rise
and fall times to calculate switching losses as in equation (4.6).
126
Table 4.4 IGBT / Schottky Test: Initial Power Calculations 25ºC IGBT Diode 60ºC IGBT Diode System D 0.50 System D 0.50 Component D 0.50 0.50 0.50 0.50 0.50 Vd 900 900 Vd 900 900 Von 2.36 1.55 Von 2.46 1.69 Io 10 10 Io 10 10 Ton µS 360 40 Ton µS 360 40 Tper µS 400 10 Tper µS 400 400 E(on) t(on) 0.5 0.025 E(on) t(on) 0.5 0.025 E(off) t(off) 5.4 0.017 E(off) t(off) 7.7 0.017 Pon 21.2 1.55 Pon 22.1 1.69 Psw 14.8 0 Psw 20.5 0.0 Ptotal 36 1.55 Ptotal 42.6 1.69
The 60°C simulation results are shown in table 4.5 and show good agreement between
the CRM model and calculated values.
Table 4.5 IGBT / Schottky Test: Numerical Results 60ºC Heatsink IGBT Diode CALC CRM SPICE CALC CRM SPICE Von 2.46 2.46 NA Von 1.69 1.68 NA Pon 22.1 21.8 NA Pon 1.69 1.67 NA Psw 20.5 17.7 NA Psw 0.0 0.0 NA Ptotal 42.6 39.5 NA Ptotal 1.69 1.67 NA Tj Rise 59.8 66.4 NA Tj Rise 0.81 0.75 NA
Figures 4.11-12 show the MOSFET forward conduction voltage drop waveform of the
CRM IGBT model. Note in figure 4.12 that the voltage drop of the CRM model increases
with temperature though not nearly as much as was seen in the power MOSFET model.
127
Waveforms of the Schottky diode forward voltage drop have been omitted as they are,
except for the time base, the same as seen in figures 4.6-7.
IGBT / Schottky Diode Buck ConverterCircuit Response Model
0
1
2
3
4
5V(
C,E
)
9.4
9.6
9.8
10.0
10.2
10.4
10.6
Indu
ctor
Cur
rent
3.525m 3.775m 4.025m
TIME (s)
2.34 2.41
Figure 4.11 IGBT VCE(ON) with Inductor Current 25ºC Heatsink
IGBT / Schottky Diode Buck ConverterCircuit Response Model
0
1
2
3
4
5
V(C
,E)
9.4
9.6
9.8
10.0
10.2
10.4
10.6
Indu
ctor
Cur
rent
3.525m 3.775m 4.025m
TIME (s)
2.41 2.49
Figure 4.12 IGBT VCE(ON) with Inductor Current 60ºC Heatsink
128
Table 4.6 IGBT Performance vs. Switching Frequency
Freq
uenc
y (k
Hz)
Hea
t Sin
k T
Tem
pera
ture
Ris
e
Junc
tion
Tem
pera
ture
On
Ene
rgy
(mJ)
Off
Ene
rgy
(mJ)
Per
iod
Ene
rgy
(mJ)
On-
Sta
te E
nerg
y (m
J)
Switc
hing
Los
s (W
)
Con
duct
ion
Loss
(W)
Tota
l Los
s (W
)
2.5 25 61.8 86.8 0.599 5.91 15.04 8.53 16.3 21.3 37.6 1.25 25 48.5 73.5 0.643 6.01 23.28 16.63 8.3 20.8 29.1 0.625 25 42.1 67.1 0.654 5.75 39.48 33.08 4.0 20.7 24.7 0.313 25 39.7 64.7 0.661 5.97 72.94 66.31 2.1 20.7 22.8
2.5 60 62.8 122.8 0.641 5.97 15.33 8.72 16.5 21.8 38.3 1.25 60 49.4 109.4 0.645 5.96 23.77 17.17 8.3 21.5 29.7 0.625 60 43.5 103.5 0.650 5.94 40.99 34.40 4.1 21.5 25.6 0.313 60 40.9 100.9 0.650 6.02 75.21 68.54 2.1 21.4 23.5
An analysis of performance vs. frequency for the IGBT verifies constant values of turn-
on and turn-off energy confirming that switching loss is proportional to frequency. The
switching loss however does not increase with temperature which requires further study.
Unlike the power MOSFET, junction temperatures indicate that the IXG12N120A2 is
fully capable of the selected operating conditions.
The CRM modeling concept is shown to accurately represent the response that a power
IGBT and Schottky diode would exhibit to circuit characteristics while connected in a
buck converter configuration. Without a SPICE model to compare the rise and fall times,
turn-on and turn-off energy losses are comparable to the datasheet values. The forward
conduction voltage drop of the CRM is slightly higher than the calculated value at 25ºC
and accurate to the calculated value at 60ºC. The calculated junction temperature rise of
129
the MOSFET at 60ºC is 8% less than the calculated value where the thermal model itself
was calculated to be 1.6% low in section 3.1.1. The reason for this discrepancy is not
known at this time, though it is likely an initialization error since the calculated and CRM
model dissipation results agree.
130
5. Conclusions and Future Work
5.1. Conclusions
In this work, the concept of modeling a power semiconductor device based strictly on
observable and or measured behavior was presented. Circuit Response Models were
developed and tested for the Schottky diode, power MOSFET and IGBT devices. The
results of individual and system level tests of these behavioral models show that key
power semiconductor characteristics such as power loss caused by forward conduction
voltage drop and state switching can be modeled based on observable behavior and
measurable characteristics. These models provide the application engineer an opportunity
to model power electronic converters even when SPICE models for the chosen
components are unavailable. In the cases where SPICE models are available, this work
has shown that the CRM models more accurately predict temperature dependent forward
voltage drop and the resulting device dissipation, both being important characteristics of
high power systems.
5.2. Future Work
The Schottky diode, power MOSFET and IGBT switching devices that were selected for
this study, are high power devices, however truly high power conversion is often the
131
domain of thyristors and gate turn off thyristors (GTO). The thyristor, classified as semi-
controllable because its turn-off mechanism is strictly under the control of circuit
conditions, is a prime candidate for Circuit Response Modeling. Like the high power
IGBT devices, the thyristor and GTO are prime candidates for CRM models due to
limited SPICE model availability. Adapting CRM model concepts to the thyristor and
GTO is a natural direction for the continuation of this work.
Testing of the power MOSFET model revealed a “characteristic” that produces an
inappropriately large quantity of off-state leakage current by the subcircuit that functions
to limit the drain current as a function of gate voltage and temperature when the device is
in the active region. As was discussed in section 3.3.3, a solution to this problem would
be the placement of a generic MOSFET model in series with ABM’s E4 and E5, which in
combination replicate the power MOSFET output characteristics as defined by the
collected input data. Follow on work to determine a replacement to the feedback stage E5
that is currently in use in the model could improve the model’s performance and possibly
even improve the simulation time by eliminating a portion of the existing model circuitry.
The construction of a power MOSFET results in an inherent diode that will be forward
biased whenever the polarity of VDS is reversed. This is an unlikely situation in a buck
converter that is operating in CCM, which along with very limited data on the
characteristics of this diode resulted in the decision to omit characterizing this effect in
the CRM models. As an aid to reduce the possibilities of convergence errors, a SPICE
model diode with the default parameters is in place in the models. Expansion of this
132
modeling concept into resonant and bridge topologies will require additional
characterization of this diode. Many of the techniques that were used to characterize the
Schottky diode could be used in this effort.
Depending on the construction of the device, IGBT devices are inherently capable of
holding off large values or reverse voltage. In many cases, a diode is packaged along side
the IGBT as a means to provide reverse VCE clamping. Therefore the IGBT is also a
candidate for expansion of the model to include characterization of this clamping diode
within the model.
The MATLAB scripts were written to process the XY “collected” input data as stand
alone processes even though they operate within the same directory and read data from
the same Excel file. As a means to partially automate the process of data processing, a
Graphical User Interface (GUI) can be written to simplify data entry such as part number,
profile temperatures and data limits (i.e. the reverse leakage current of the Schottky diode
that was limited to 1.4 kV even though the available data went as high as 1.8 kV). The
addition of a GUI would ease the task of data processing, but not the collection of input
data. The data collection phase is without a doubt the most time consuming step of the
model characterization process. A means to automate the process of accessing the XY
input data from datasheet figures into the Excel worksheets would be helpful if a number
of different parts are being modeled.
133
A reoccurring goal through out this project has been to trade-off model accuracy for
simulation speed. These trade-offs were made with the consideration of power dissipation
being of paramount concern to the system engineer. Clearly there are cases where these
trade-offs are not appropriate, examples of such cases may include but are not limited to,
turn-on and turn-off delay times which are affected by the straight line approximations of
the Input Admittance section of the power MOSFET and IGBT models. By increasing the
complexity of the Input Admittance equation, a more accurate portrayal of the input data
can be realized. Persons considering changes to this portion of the device models will
need to account for the changes that the SPICE GSMOOTH parameter would bring to the
output of the controlled source that executes the Input Admittance function. Once the
effects of GSMOOTH are understood, they can be subtracted out of the ABM goal
similar to the way the native diode voltage drop contribution was subtracted from the
input data response as previously seen in figure 3.7.
A significant way to simplify the CRM models, as discussed in sections 2 and 3, was to
completely omit one or more device characteristics from the model, for example reverse
leakage currents and breakdown voltage. Though the argument was made that a properly
designed system will not operate in regions that would warrant modeling these
characteristics, they can be added if the user so chooses. Since the models are constructed
in a modular fashion, the addition of sections to model these and other device
characteristics can be added to the model’s SPICE subcircuit with minimal impact on the
existing model sections. Future work to add these or other device characteristics to the
134
existing model subcircuits would allow the application engineer to control model
complexity by choosing what to model and what to omit.
A desired outcome of any device model is the ability to predict the outcome of an event
within a desired level of accuracy. The CRM concept is capable of providing predictive
modeling if the application engineer is knowledgeable of the data profiles that
characterize the device and how the models interpret this data. As an example, for both
25ºC and 125ºC, the amount of input data to determine the power MOSFET RDS(ON)
(figure 3.27) is clearly sufficient to capture the non-linear characteristics of this function.
What isn’t certain is how accurately the model will predict RDS(ON) for temperatures
between and even outside the range of these two temperatures. With only two sets of
temperature data, the only way of predicting what will occur between these two data
points is linear interpolation. There are at least two ways to reduce this uncertainty; the
first is to dive into semiconductor physics equations to determine the RDS(ON) vs.
temperature transfer function and apply it to the models. The second way, which follows
the philosophy of CRM modeling, is to provide input data at additional temperatures.
With these additional data points, possibly over a wider range of temperatures, the model
can more accurately predict the results of a simulation that lies between any two
temperature data points.
135
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40 W. El Manhawy, W. Fikry, “Power MOSFET Macromodel Accounting for Saturation and Quasi Saturation Effect,” Canadian Conference on Electrical and Computer Engineering, vol. 4, May 2004, pp. 1839-1843. 41 H.P. Yee, P.O. Lauritzen, “SPICE Models for Power MOSFETs: An Update,” IEEE Applied Power Electronics Conference and Exposition, Feb. 1988, pp. 281-289. 42 Y.Y. Tzou, and L.J. Hsu, “A Practical SPICE Macro Model for the IGBT,” International Conference on Industrial Electronics, Control, and Instrumentation, vol. 2, Nov. 1993, pp. 762-766. 43 A.F. Petrie, C. Hymowitz, “A SPICE model for IGBTs,” IEEE Applied Power Electronics Conference, vol. 1, Mar. 1995, pp. 147-152. 44 J.S. Yuan, J.J. Liou Semiconductor Device Physics and Simulation Plenum Press, 1998. 45 G. Massobrio, P. Antognetti, Semiconductor Device Modeling with SPICE, 2nd edition, McGraw Hill, 1993. 46 K. Sheng, S.J. Finney, B.W. Williams, “Fast and Accurate IGBT Model for PSpice,” IET Electronics Letters, vol. 32, issue 25, Dec. 1996, pp. 2294-2295. 47 K. Asparuhova, T. Grigorova, “IGBT Behavioral PSPICE Model,” 25th International Conference of Microelectronics, July 2006, pp. 203-206. 48 A. Maxim, G. Maxim, “A Novel Analog Behavioral IGBT SPICE Macromodel,” IEEE Power Electronics Specialists Conference, vol. 1, Aug. 1999, pp. 364-369. 49 H.J. Boenig, J.W. Schwartzenberg, L.J. Willinger, et al., “Design and Testing of High Power Repetitively Pulsed, Solid-State Closing Switches,” Conference Record of the 1997 IEEE Industry Applications Conference, vol. 2, Oct. 1997, pp. 1022-1028. 50 A.R. Hefner, D.L. Blackburn, “Simulating the Dynamic Electrothermal Behavior of Power Electronic Circuits and Systems,” IEEE Transactions on Power Electronics, vol. 8, issue 4, Oct. 1993, pp. 376-385. 51 A. Guerra, F. Vallone, “Electro-Thermal SPICE Schottky Diode Model Suitable Both at Room Temperature and at High Temperature,” International Rectifier, Dec. 1999. 52 www.silvaco.com. 53 www.synopsys.com/TOOLS/TCAD/DEVICESIMULATION.
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54 B. Sheng, H. Wallace, J. Ignowski, “Analog Behavioral Modeling and Mixed-Mode Simulation with SABER and Verilog,” Hewlett Packard Journal, Apr. 1997. 55 www.synopsys.com/Systems/Saber/Pages/MAST.aspx. 56 www.synopsys.com/Systems/Saber/Pages/default.aspx 57 G. T. Oziemkiewicz, “Implementation and Development of the NIST IGBT Model in a SPICE Based Commercial Circuit Simulator,” Masters Thesis, University of Florida, 1996 58 I.M. Wilson, “Analog Behavioral Modeling Using PSpice,” Proceedings of the 32nd Midwest Symposium on Circuits and Systems, vol. 2, Aug. 1989, pp. 981-984. 59 K.F. McDonald, “Dependent Source Modeling for SPICE,” IEEE International Pulsed Power Conference, June 1991, pp. 365-368. 60 I. Budihardjo, P.O. Lauritzen, K.Y. Wong, et al., “Defining Standard Performance Levels for Power Semiconductor Devices,” Conference Record of the 1995 IEEE Industry Applications Conference, vol. 2, Oct. 1995, pp. 1084-1090. 61 A. Maxim, D. Andreu, J. Boucher, “A Unified High Accuracy SPICE Library for the Power Semiconductor Devices Built with the Analog Behavioral Macromodeling Technique,” 12th International Symposium on Power Semiconductor Devices and IC’s, May 2000, pp. 189-192. 62 RADC Reliability Engineer’s Toolkit, Rome Air Development Center, July 1988. 63 V.K. Khanna, The Insulated Gate Bipolar Transistor - IGBT Theory and Design, Wiley-Interscience, 2003. 64 H.A. Mantooth, “A Unified Diode Model with Self-Heating Effects,” Proceedings of the 1995 IEEE Bipolar/BiCMOS Circuits and Technology Meeting, Oct. 1995, pp. 62-65. 65 “Basic Thermal Properties of Semiconductors,” On Semiconductor, HBD856/D, June 2009. 66 K.L. Pandya, W. McDaniel, “A Simplified Method of Generating Thermal Models for Power MOSFETs,” 18th Annual IEEE Symposium on Semiconductor Thermal Measurement and Management, Mar. 2002, pp. 83-87. 67 IXG12N120A2, IGBT Datasheet, Apr. 2008, IXYS 68 IXT12N120 MOSFET Datasheet, Apr. 2004, IXYS
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69 T. Schutze “Thermal Equivalent Circuit Models,” Infineon Application Note, AN2008-03, June 2008. 70 M. Marz, P. Nance, “Thermal Modeling of Power Electronic Systems,” Fraunhofer Institute, Apr. 2000. 71 A. Ammous, B. Allard, H. Morel, “Transient Temperature Measurements and Modeling of IGBT’s Under Short Circuit,” IEEE Transactions on Power Electronics, vol. 13, issue 1, Jan. 1998, pp. 12-25. 72 www.getdata-graph-digitizer.com 73 O. Apeldoorn, S. Schroder, R.W. DeDoncker, “A New Method for Power Electronics System Simulation with PSpice,” Proceedings of the IEEE International Symposium on Industrial Electronics, vol. 2, July 1997, pp. 217-222. 74 J. Lou, et al. “Temperature Dependence of Ronsp in Silicon Carbide and GaAs Schottky Diode,” Reliability Physics Symposium, Apr. 2002. 75 V. Vorperian, “Simplified Analysis of PWM Converters Using Model of PWM Switch,” IEEE Transactions on Aerospace & Electronic Systems, vol. 26 issue 3, May 1990 76 V. Barkhordarian, “Power MOSFET Basics,” International Rectifier, Application Note AN-1084.
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Appendix A: Parameter Naming Convention
Thermal Model TR1: Thermal Model R1* (*the number of thermal pole pairs is device dependent) TC1: Thermal Model C1* Schottky Diode Model DRQ10: Diode Reverse Charge: a0 DRQ11: Diode Reverse Charge: a1*(Charge) DRQ12: Diode Reverse Charge: a2*(Charge2) DFS10: Diode Forward Straight Line: a0 DFS11: Diode Forward Straight Line: a1*(T) DFS12: Diode Forward Straight Line: a2*(T2) DFS20: Diode Forward Straight Line: b0*(IFWD) DFS21: Diode Forward Straight Line: b1*(T)*(IFWD) DFS22: Diode Forward Straight Line: b2*(T2)*(IFWD) DFL20: Diode Forward Logarithmic: a0 DFL21: Diode Forward Logarithmic: a1*(T) DFL22: Diode Forward Logarithmic: a2*(T2) DFL30: Diode Forward Logarithmic: b0*(IFWD) DFL31: Diode Forward Logarithmic: b1*(T)*(IFWD) DFL32: Diode Forward Logarithmic: b2*(T2)*(IFWD) DRI10: Diode Reverse Current: a0 DRI11: Diode Reverse Current: a1*(T) DRI12: Diode Reverse Current: a2*(T2) DRI20: Diode Reverse Current: b0 DRI21: Diode Reverse Current: b1*(T) DRI22: Diode Reverse Current: b2*(T2) DRI30: Diode Reverse Current: c0 DRI31: Diode Reverse Current: c1*(T) DRI32: Diode Reverse Current: c2*(T2)
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Power MOSFET Model GMUX: Gate Capacitance Scale Factor MIC1: MOSFET Input Capacitance 1 (C) MIC2: MOSFET Input Capacitance 2 (C) MIC3: MOSFET Input Capacitance 3 (C) MIC4: MOSFET Input Capacitance 4 (C) MIC5: MOSFET Input Capacitance 5 (C) MAD10: MOSFET Input Admittance: a0 MAD11: MOSFET Input Admittance: a1*(T) MAD12: MOSFET Input Admittance: a2*(T2) MAD20: MOSFET Input Admittance: b0*(VGS) MAD21: MOSFET Input Admittance: b1*(T)*(VGS) MAD22: MOSFET Input Admittance: b2*(T2)*(VGS) MRD10: MOSFET RDS(ON): a0 MRD11: MOSFET RDS(ON): a1*(T) MRD20: MOSFET RDS(ON): b0*(ID) MRD21: MOSFET RDS(ON): b1*(T)*(ID) MRD30: MOSFET RDS(ON): c0*(ID
2) MRD31: MOSFET RDS(ON): c1*(T)*(ID
2)
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IGBT Model GMUX: Gate Capacitance Scale Factor IIC1: IGBT Input Capacitance 1 (C) IIC2: IGBT Input Capacitance 2 (C) IIC3: IGBT Input Capacitance 3 (C) IIC4: IGBT Input Capacitance 4 (C) IIC5: IGBT Input Capacitance 5 (C) IAD10: IGBT Input Admittance: a0 IAD11: IGBT Input Admittance: a1*(T) IAD12: IGBT Input Admittance: a2*(T2) IAD20: IGBT Input Admittance: b0*(VGE) IAD21: IGBT Input Admittance: b1*(T)*(VGE) IAD22: IGBT Input Admittance: b2*(T2)*(VGE) IVFD110: IGBT Forward Voltage Drop 25ºC: a0 IVFD111: IGBT Forward Voltage Drop 25ºC: a1*(VGE) IVFD112: IGBT Forward Voltage Drop 25ºC: a2*(VGE
2) IVFD120: IGBT Forward Voltage Drop 25ºC: b0*(IC) IVFD121: IGBT Forward Voltage Drop 25ºC: b1*(VGE)*(IC) IVFD122: IGBT Forward Voltage Drop 25ºC: b2*(VGE
2)*(IC) IVFD210: IGBT Forward Voltage Drop 125ºC: a0 IVFD211: IGBT Forward Voltage Drop 125ºC: a1*(VGE) IVFD212: IGBT Forward Voltage Drop 125ºC: a2*(VGE
2) IVFD220: IGBT Forward Voltage Drop 125ºC: b0*(IC) IVFD221: IGBT Forward Voltage Drop 125ºC: b1*(VGE)*(IC) IVFD222: IGBT Forward Voltage Drop 125ºC: b2*(VGE
2)*(IC)
144
Appendix B1: Thermal Model – Parameter Extraction Script
%Thermal_B.m %An M-File to read Transient Thermal Impedance XY Data %and calculate RC pairs using Simulated Annealing clc clear all close all %%% %Part Number and name of Excel file that contains the input data %PN='C2D20120D'; PN='IXG12N120A2'; %PN='IXT12N120'; n='4'; % Number of thermal time constants (user entry) N=str2double(n); hold=xlsread('ThrmData' , (PN)); % read input data from 'ThrmData' sheet len=length(hold(:,1)); %number of rows in column 1 A=zeros(len,6); %creating the working matrix A(:,1)=hold(:,1);% X (time) input data A(:,2)=hold(:,2);% Y (thermal impedance) input data %A(:,3) current iteration thermal impedance %A(:,4) error between current and best iteration %A(:,5) best iteration thermal impedance %A(:,6) error between input data and best iteration thermal impedance Res=A(len,2); %steady state thermal impedance (last row, column 2) tau=.001; %sets initial guess of first pole time constant count=1; %sets register err1=0; %sets register err2=0; %sets register scale=0.1; %maximum deviation of RES TAU pairs during simulated annealing scale2=0; %initializes variable scale value WGT=1; %emphasizes accuracy of DC/long pulse thermal impedance (zero to disable) for i=1:len; %calculating the appx location of first pole if A(i,2) <(.632*Res); count=count+1; else tau=A(count,2); end end %calculating appx RC values of the N poles B=zeros(N,4); for i=1:N; B(i,1)=Res*(0.5^(i)); B(i,2)=(tau/N)*(.1^(i-1)); end
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for i=1:len; %calculates TTI of initial RES TAU pairs A(i,3)=0; for k=1:N; A(i,3)=A(i,3)+(B(k,1)*(1-exp(-A(i,1)/B(k,2)))); end end for i=1:len %calculating initial error value A(i,4)=((A(i,3)-A(i,2))/A(i,2))^2; %square of normalized difference err1=err1+(A(i,4)*(1+(WGT*i/len))); end err1=err1*(100/len); %gives all plots equal weighting regardless of data length iter=6000; for j=1:iter; if err1<0.025 break else end scale1=scale*((iter-j)/iter);% linear from 100% towards zero if err1>2 %all N*2 variables are randomly perturbed rand=random('uniform',-1,1,N,2); else % progressively fewer variables are randomly perturbed scale2=(1+((N)*(j/iter))); rand=random('uniform',-(scale2),(scale2),N,2); for i=1:N; if abs(rand(i,1))>1 rand(i,1)=0; else end if abs(rand(i,2))>1 rand(i,2)=0; else end end end for i=1:N; B(i,3)=B(i,1)+(B(i,1)*rand(i,1)*scale1); %modifies RES B(i,4)=B(i,2)+(B(i,2)*rand(i,2)*scale1); %modifies TAU end for i=1:len; %calculates TTI from modified RES TAU pairs A(i,3)=0; for k=1:N; A(i,3)=A(i,3)+(B(k,3)*(1-exp(-A(i,1)/B(k,4)))); end end err2=0; for i=1:len; %calculating error of the current iteration A(i,4)=(((A(i,3)-A(i,2))/A(i,2))^2); %A(i,2) err2=err2+(A(i,4)*(1+(WGT*i/len))); end err2=err2*(100/len); %gives all plots equal weighting regardless of data length if err2<err1; err1=err2; for i=1:len;
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A(i,5)=A(i,3); end for i=1:N; B(i,1)=B(i,3); B(i,2)=B(i,4); end else end figure(1) %plots calculation results in real time loglog(A(:,1),A(:,2),A(:,1),A(:,3),'+',A(:,1),A(:,5),'o') axis([10^-7 1 10^-4 10]) str1=num2str(err1,3); str2=num2str(err2,3); str3=num2str(j); str4=num2str(scale1,3); text(10^-6,3.16,(strcat('Err1= ',str1))); text(10^-6,1,(strcat('Err2= ',str2))); text(10^-6,3.16e-1,(strcat('iter= ',str3))); text(10^-6,1e-1,(strcat('Scale= ',str4))); drawnow; %pause(.1); end A(:,6)=100*((A(:,5)-A(:,2))./A(:,2)); %pct error of input data to final results %%%%%%%%%%%%%%% figure(2) subplot(6,1,6) semilogx(A(:,1),A(:,6),'k+'),axis([10^-6 1 -10 10]) xlabel('Seconds') ylabel('% Error') subplot(6,1,1:5) loglog(A(:,1),A(:,2),'k',A(:,1),A(:,5),'ko') axis([10^-6 1 10^-4 10]) set(gca,'XTicklabel',[]) title(strcat((PN),' Thermal Impedance')) %xlabel('Seconds') ylabel('Thermal Impedance ^oC/W') text(3e-6,1,'--- Input Data') text(3e-6,.5,'OOO Model Results') text(.5e-3,.02,'Thermal Model Parameters') %%%%%%%%%%%%%%%%%%%% C=zeros(N,2); %Calculating the "C" values from RES and TAU for i=1:N C(i,1)=B(i,1); C(i,2)=B(i,2)/B(i,1); end %Places the calculated R and C values on the figure for i=1:N RD=strcat('TR', num2str(i)); CD=strcat('TC', num2str(i)); RVAL=sprintf('%0.3e',C(i,1)); CVAL=sprintf('%0.3e',C(i,2)); strcat((RD),'=',(RVAL));
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strcat((CD),'=',(CVAL)); text(2*10^-4,10^-(1.75+(0.25*(i))),strcat((RD),'=',(RVAL))); text(2*10^-2,10^-(1.75+(0.25*(i))),strcat((CD),'=',(CVAL))); end subplot(6,1,6) xlabel('Seconds') ylabel('% Error') %Writes the model parameter data to a text file fid = fopen(strcat((PN),'_thermal.txt'), 'w'); fprintf(fid,'\r\n%s','*Thermal Model Parameter Data'); fprintf(fid,'\r\n%s',strcat('*',(PN))); for i=1:N %Formats the .param statement for each (N) pole pair RD=strcat(' TR', num2str(i)); CD=strcat(' TC', num2str(i)); RVAL=sprintf('%0.3e',C(i,1)); CVAL=sprintf('%0.3e',C(i,2)); param=strcat('.param',(RD),'=',(RVAL),(CD),'=',(CVAL)); disp(param) fprintf(fid, '\r\n%s',param); end fclose(fid);
148
Appendix B2: Thermal Model – Collected Input Data
C2D20120D Schottky Diode Transient Thermal Impedance
149
IXT12N120 Power MOSFET Transient Thermal Impedance
IXG12N120A2 IGBT Transient Thermal Impedance
150
Appendix C1: Schottky Diode Model – Subcircuit Diagram
151
Appendix C2: Schottky Diode Model – SPICE Subcircuit File
****************************************************************** *CRM C2D20120D 1200V 10A Schottky Diode *Schottky Diode Circuit Response Model *5-Time Constant Thermal Model * (A) Anode * | (C) Cathode * | | (Qrev) Reverse Charge Monitor * | | | (Ttop) Thermal Top (Junction Temp) * | | | | (Ths) Thermal Bottom (Heatsink Temp) * | | | | | (Pavg) Average Dissipation Input .SUBCKT CRM20D120 A C E T T5 TC * **Schottky Diode Circuit Response Model **Reverse Charge** S1 D 0 N 0 Reset G1 0 D Table V(N)*I(V1) (-8,-8) (8,8) R1 D E 1 R2 I J .1 C1 E 0 1n E2 F 0 Table V(E) (-1,-1) (60,60) V1 G I 0 ; zero volt current monitor C2 J K 10n E3 K H Value V(F)*(DRQ10+(DRQ11*V(F))+(DRQ12*V(F)^2)) C3 G H 10p * **Forward Voltage and Parasitics** R3 G C .001 V2 L G 0 *Straight Line Forward Voltage Drop* *E4 M L Value (DFS10+(DFS11*V(T))+(DFS12*V(T)^2)) *+ +((DFS20+(DFS21*V(T))+(DFS22*V(T)^2))*I(V2)) *Logarithmic Forward Voltage Drop* E4 M L Value (14*log(I(V2)+1) + *(DFL20+(DFL21*V(T))+(DFL22*V(T)^2))*.0257) + +((DFL30+(DFL31*V(T))+(DFL32*V(T)^2))*I(V2)) D1 H M Reference TEMP=27 L1 A H .015n
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* **Reverse Current** *V3 G Q 0 *G2 Q H Value 1e-6*V(N)*(DRI10+(DRI11*V(T))+(DRI12*V(T)^2)) *+ *exp((V(A)^2.1/(DRI20+(DRI21*V(T))+(DRI22*V(T)^2))) *+ ^(DRI30+(DRI31*V(T))+(DRI32*V(T)^2))) * **Polarity Detectors** E5 P 0 Table V(H,G) (0,0) (.2,1) GSMOOTH=.05 ;Forward Bias E6 N 0 Table V(G,H) (0,0) (.2,1) GSMOOTH=.05 ;Reverse Bias * **Dissipation** VTA TA 0 pwl (0,0) (1e-6,1) VTB TB 0 pwl (0,1) (1e-6,0) ;(2e-6,0) G3 0 T Value (V(TA)*V(P)*V(H,G)*I(V2))+(V(TB)*V(TC)) ;Forward *G4 0 T Value V(N)*V(G,H)*I(V3) ;Reverse * **Thermal Circuit** RT1 T T1 TR1 CT1 T T1 TC1 RT2 T1 T2 TR2 CT2 T1 T2 TC2 RT3 T2 T3 TR3 CT3 T2 T3 TC3 RT4 T3 T4 TR4 CT4 T3 T4 TC4 RT5 T4 T5 TR5 CT5 T4 T5 TC5 * **Models and Parameters** .model Reference D (IS=1E-14 RS=0 N=0.5) .model Reset Vswitch (Ron=.1 Roff=1e6 Voff=1 Von=0) * **Reverse Charge Parameters .param DRQ10=-6.658e-002 DRQ11=8.592e-001 DRQ12=-6.884e-003 * **Straight Line Forward Voltage Parameters .param DFS10=4.811e-001 DFS11=9.732e-004 DFS12=-3.104e-006 .param DFS20=2.333e-001 DFS21=-1.463e-003 DFS22=2.982e-006 **Logaritmic Forward Voltage Parameters .param DFL10=1.000e-014 DFL11=1.603e-031 DFL12=-2.230e-034 .param DFL20=8.415e-001 DFL21=-5.510e-004 DFL22=-1.095e-006 .param DFL30=2.103e-001 DFL31=-1.337e-003 DFL32=2.799e-006 *
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**Reverse Current Parameters .param DRI10=4.442e+000 DRI11=-1.894e-002 DRI12=2.642e-005 .param DRI20=2.737e+003 DRI21=-8.793e+000 DRI22=9.985e-003 .param DRI30=4.064e+001 DRI31=-1.616e-001 DRI32=1.922e-004 * **Thermal Model Parameters .param TR1=1.979e-001 TC1=1.141e-001 .param TR2=7.750e-002 TC2=7.395e-002 .param TR3=1.591e-001 TC3=5.862e-003 .param TR4=2.304e-002 TC4=1.093e-003 .param TR5=5.195e-003 TC5=1.319e-004 * .ENDS CRM20D120 ******************************************************************
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Appendix C3: Schottky Diode Model – Parameter Extraction Scripts
Diode Forward Voltage Drop; Logarithmic Model %DFWD_LOG_A.m %An M-File to read and process datasheet values from Excel files %Each Excel worksheet will contain 2 columns of XY data %This particular application will calculate the SPICE parameters %for the equation that describes the temperature dependent %forward voltage drop of a Schottky junction %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% %This model is Logarithmic Drop plus Specific Resistance Slope %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% clc clear all close all %%% PN='C2D20120D'; %part number and name of Excel file that contains the input data file=('C2D20120D'); %name of xls file (in same directory) n=4; %number of temperature profiles T=[25 75 125 175]; %Data temperature in Celsius S1='VF25'; S2='VF75'; S3='VF125'; S4='VF175'; S=S1; S2; S3; S4; dep=1; %column that contains the voltage "dependent" data ind=2; %column that contains the current "independent" data B=zeros(3,2); %contains current and best equation values C=zeros(3,n); %contains final equation values for each temperature profile %%SPICE model parameters of reference diode Is=1E-14;%Ref diode Is value N=.5; %Ref diode N value Rs=0; %Ref diode Rs value B(1,1)=1E-14; %initial Is value of ABM equation B(2,1)=.5; %initial N value of ABM equation B(3,1)=.06; %initial Rs value of ABM equation err1=0; %initialize error value err2=0; %initialize error value %A1 = Independent input data %A2 = Dependent input data %A3 = Dependent data minus reference diode (VCVS Goal) %A4 = Current random guess of goal %A5 = Current run error value %A6 = Current best approximation of goal
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%read data values from Excel sheets for i=1:n data=xlsread(file, char(S(i))); %reads data x=(data(:,ind)); %extracts the independent column y=(data(:,dep)); %extracts the dependent column x(isnan(x))=[]; %removes NAN from the x column y(isnan(y))=[]; %removes NAN from the y column lenx=length(x); %determine length of vector x A=zeros(lenx,6); %Working vectors %From this point on, the first column will be the (x)independent variable A(:,1)=x; %Independent input data (forward current) A(:,2)=y; %Dependent input data (forward voltage) %Dependent data minus reference diode (VCVS Goal) A(:,3)=A(:,2)-(log(A(:,1)/Is)*N*.0257); %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% %Calculate SPICE Parameters using Simulated Annealing for k=1:lenx A(k,4)=(log(A(k,1)/B(1,1))*B(2,1)*.0257)+(A(k,1)*B(3,1));%first/best A(k,5)=((A(k,4)-A(k,3))/A(k,3))^2; %square of normalized difference if A(k,1)>0.5; %ignores error values of low current data points A(k,5)=A(k,5); else A(k,5)=0; end err1=err1+A(k,5); end %equal error value weight regardless of number of data points err1=err1*(100/lenx); iter=500; %iteration limit for j=1:iter if err1<0.02 %sets minimum error goal break else end scale=(iter-j)/iter; if err1<10; scale=.125*scale; else end rand=random('uniform',-0.5,0.5,3,1); B(1,2)=B(1,1)+(B(1,1)*rand(1,1)*0*scale); %modifies Is (not used) B(2,2)=B(2,1)+(B(2,1)*rand(2,1)*1*scale); %modifies N B(3,2)=B(3,1)+(B(3,1)*rand(3,1)*1*scale); %modifies Rs err2=0; for k=1:lenx %Calculate current random guess of goal A(k,4)=log(A(k,1)/B(1,2))*B(2,2)*.0257+(A(k,1)*B(3,2)); A(k,5)=((A(k,4)-A(k,3))/A(k,3))^2; %square of normalized difference if A(k,1)>0.5; %ignores error values of low current data points A(k,5)=A(k,5);
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else A(k,5)=0; end err2=err2+A(k,5); end %equal error value weight regardless of number of data points err2=err2*(100/lenx); if err2<err1; err1=err2; for l=1:lenx; A(l,6)=A(l,4); %Current best approximation of goal end for m=1:3; B(m,1)=B(m,2); %transfer current result to best result end else end %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% figure(i) plot(A(:,3),A(:,1),A(:,4),A(:,1),A(:,6),A(:,1)) axis([0, 5, 0, 20]) text(3.5,16,'Is') text(4,16,num2str(B(1,1))); text(3.5,14,'N') text(4,14,num2str(B(2,1))); text(3.5,12,'Rs') text(4,12,num2str(B(3,1))); text(3.5,10,'err1') text(4,10,num2str(err1)); text(3.5,8,'err2') text(4,8,num2str(err2)); text(3.2,6,'iteration') text(4,6,num2str(j)); drawnow; %pause(.01); %hold on end C(1,i)=B(1,1); %move final Is value to temp column C(2,i)=B(2,1); %move final N value to temp column C(3,i)=B(3,1); %move final Rs value to temp column end %%% %Calculate temperature dependency of Is, N and Rs deg=2; %degree of polynomial that describes temperature dependancy D=zeros(3,(deg+1)); %row vectors for polyfit results E=zeros(3,(length(T))); for o=1:3; D(o,:)=polyfit((T+273),C(o,:),deg);%row vectors containing polyfit results E(o,:)=polyval(D(o,:),(T+273));%row vectors containing polyval results end %%%%%%%%%%%%%%%%%%%%%%%%% figure(n+1) subplot(3,1,1) plot(T,C(1,:),'o',T,E(1,:),'+')%H = SUBPLOT(m,n,p)
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subplot(3,1,2) plot(T,C(2,:),'o',T,E(2,:),'+')%H = SUBPLOT(m,n,p) subplot(3,1,3) plot(T,C(3,:),'o',T,E(3,:),'+') %%%Compare model equations to input data%%% for i=1:n %number of temperature profiles data=xlsread(file, char(S(i))); %reads data x=(data(:,ind)); %extracts the independent column y=(data(:,dep)); %extracts the dependent column x(isnan(x))=[]; %removes NAN from the x column y(isnan(y))=[]; %removes NAN from the y column lenx=length(x); %determine length of vector x F=zeros(lenx,4); %Working row vectors %From this point on, the first column will be the (x)independent variable F(:,1)=x; %Independent input data (forward current) F(:,2)=y; %Dependent input data (forward voltage) F(:,3)=(log(F(:,1)/Is)*N*.0257)... +(log(F(:,1)/B(1,1))*polyval(D(2,:),(T(1,i)+273))*.0257)... +F(:,1)*polyval(D(3,:),(T(1,i)+273)); %pct error of difference between equation and input data F(:,4)=100*((F(:,3)-F(:,2))./F(:,2)); %%%%%%%%%%%%%%%%%%%%%%% figure(n+2) plot(F(:,2),F(:,1),'k',F(:,3),F(:,1),'k+'); axis([0, 5, 0, 20]) hold on %%%%%%%%%%%%%%%%%%%%%%% figure (n+3) subplot (4,1,(i)) plot(F(:,1),F(:,4),'k+') axis([0, 20, -5, 5]) %legend('Logarithmic Diode','Straight Line Diode') %text(.1,40,'Power Dissipation (Both Diodes)'); end %%%%%%%%%%%adding labels to existing figure figure (n+2) title 'C2D20120D Logarithmic V_FWD Model' xlabel 'V_FWD (V)' ylabel 'I_FWD (A)' text (1.6,18, '25^oC') text (2.6,18, '75^oC') text (3.2,18, '125^oC') text (4.1,18, '175^oC') %%%%%%%%%%adding labels to existing figure figure (n+3) subplot(4,1,1) title 'C2D20120D Logarithmic V_FWD Model' ylabel '25^oC' subplot(4,1,2) ylabel '75^oC' subplot (4,1,3) ylabel '125^oC' subplot(4,1,4) ylabel '175^oC'
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xlabel 'I_FWD (A)' %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% %print SPICE parameter data to text file p=fliplr(D); %Places Polyval constant values in the first column fid = fopen(strcat((PN),' DFV_LOG.txt'), 'w'); fprintf(fid, '\r\n%s',strcat('*',(PN))); fprintf(fid, '\r\n%s','*Diode Forward Voltage Drop Model Parameters'); fprintf(fid, '\r\n%s',''); m=3; %number of calculated parameters C=cell(m,(deg+2)); for i=1:m for j=1:(deg+1); Ci,j=strcat(' DFL',num2str(i),num2str(j-1),... '=', sprintf('%0.3e',p(i,j))); end Ci,(deg+2)=strcat(Ci,1:(deg+1)); end for k=1:m fprintf(fid, '\r\n%s',strcat('.param',Ck,(deg+2))); end fclose(fid);
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Diode Forward Voltage Drop; Straight Line Model %DFWD_SL_C.m %An M-File to read and process input data from Excel worksheet columns %There will be multiple data columns %This particular application will calculate the SPICE parameters %of the temperature dependent diode forward voltage drop %of a Schottky junction %%%%%%%% %This model is Voltage Drop plus Specific Resistance Slope %%%%%%%% clc clear all close all %%%%%%%% PN='C2D20120D'; %part number and name of Excel file that contains the input data file=('C2D20120D'); %name of xls file (in same directory) n=4; %number of temperature profiles T=[25 75 125 175]; %data temperature in Celsius S1='VF25'; S2='VF75'; S3='VF125'; S4='VF175'; S=S1; S2; S3; S4; dep=1; %column that contains the voltage "dependent" data ind=2; %column that contains the current "independent" data B=zeros(3,2); %contains current and best equation values C=zeros(3,n); %contains final equation values for each temperature profile %SPICE model parameters of reference diode Is=1E-14;%ref diode Is value N=.5; %ref diode N value Rs=0; %ref diode Rs value B(1,1)=0.75; %initial V knee value of ABM equation B(2,1)=.1; %initial R value of ABM equation B(3,1)=0; %not used err1=0; %initialize error value err2=0; %initialize error value %A1 = Independent input data %A2 = Dependent input data %A3 = Dependent data minus reference diode (VCVS Goal) %A4 = Current random guess of goal %A5 = Current run error value %A6 = Current best approximation of goal for i=1:n %read input data from Excel worksheets data=xlsread(file, char(S(i))); %reads data x=(data(:,ind)); %extracts the independent column y=(data(:,dep)); %extracts the dependent column x(isnan(x))=[]; %removes NAN from the x column y(isnan(y))=[]; %removes NAN from the y column lenx=length(x); %determine length of vector x A=zeros(lenx,6); %working vectors %From this point on, the odd column will be the (x)independent variable
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A(:,1)=x; %independent input data (forward current) A(:,2)=y; %dependent input data (forward voltage) A(:,3)=A(:,2)-(log(A(:,1)/Is)*N*.0257); %dependent minus reference diode (VCVS Goal) %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% %Calculate SPICE Parameters using Simulated Annealing %Initial error value %B(1,1)=0.75; %initial V knee value of ABM equation %B(2,1)=.1; %initial R value of ABM equation %B(3,1)=0; %not used for k=1:lenx A(k,4)=B(1,1)+(A(k,1)*B(2,1));%first/best A(k,5)=((A(k,4)-A(k,3))/A(k,3))^2; %difference squared error if A(k,1)>0.5; %ignores low current error values A(k,5)=A(k,5); else A(k,5)=0; end err1=err1+A(k,5); end %equal error value weight regardless of the number of data points err1=err1*(100/lenx); iter=500; %iteration limit for j=1:iter if err1<0.001 %sets minimum error goal break else end scale=(iter-j)/iter; if err1<10; scale=.125*scale; else end rand=random('uniform',-1,1,3,1); B(1,2)=B(1,1)+(B(1,1)*rand(1,1)*.5*scale); %modifies V knee B(2,2)=B(2,1)+(B(2,1)*rand(2,1)*.5*scale); %modifies Rs B(3,2)=B(3,1)+(B(3,1)*rand(3,1)*0*scale); %not used err2=0; for k=1:lenx A(k,4)=B(1,2)+(A(k,1)*B(2,2));%current random guess of goal A(k,5)=((A(k,4)-A(k,3))/A(k,3))^2; %current run error value if A(k,3)>1; %ignores low current results A(k,5)=A(k,5); else A(k,5)=0; end err2=err2+A(k,5); end %equal error value weight regardless of the number of data points err2=err2*(100/lenx); if err2<err1; err1=err2; for l=1:lenx; A(l,6)=A(l,4); %current best approximation of goal end for m=1:3; B(m,1)=B(m,2); %transfer current result to best result end
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else end %%%%%%%% figure(i) plot(A(:,3),A(:,1),A(:,4),A(:,1),A(:,6),A(:,1)) axis([0, 5, 0, 20]) text(4,14,num2str(B(2,1))); text(4,12,num2str(B(3,1))); text(4,10,num2str(err1)); text(4,8,num2str(err2)); text(4,6,num2str(j)); drawnow; %pause(.01); %hold on end C(1,i)=B(1,1); %move final V knee(T) value to temperature column C(2,i)=B(2,1); %move final Rs(T) value to temperature column C(3,i)=B(3,1); %Not used end %Calculate temperature dependency of V knee and Rs deg=2; %degree of polynomial to be calculated for temperature dependancy D=zeros(3,(deg+1)); %row vectors for polyfit results E=zeros(3,(length(T))); for o=1:3; D(o,:)=polyfit((T+273),C(o,:),deg);%row vectors containing polyfit results E(o,:)=polyval(D(o,:),(T+273));%row vectors containing polyval results end %%%%%%%% figure(n+1) subplot(3,1,1) plot(T,C(1,:),'o',T,E(1,:),'+')%H = SUBPLOT(m,n,p) subplot(3,1,2) plot(T,C(2,:),'o',T,E(2,:),'+')%H = SUBPLOT(m,n,p) subplot(3,1,3) plot(T,C(3,:),'o',T,E(3,:),'+') for i=1:n %number of temperature profiles data=xlsread(file, char(S(i))); %reads data x=(data(:,ind)); %extracts the independent column y=(data(:,dep)); %extracts the dependent column x(isnan(x))=[]; %removes NAN from the x column y(isnan(y))=[]; %removes NAN from the y column lenx=length(x); %determine length of vector x F=zeros(lenx,4); %working row vectors %From this point on, the odd column will be the (x)independent variable F(:,1)=x; %independent input data F(:,2)=y; %dependent input data F(:,3)=(log(F(:,1)/Is)*N*.0257)... +polyval(D(1,:),(T(1,i)+273))... +F(:,1)*polyval(D(2,:),(T(1,i)+273)); %CRM model result %pct error of difference between equation and input data F(:,4)=100*(F(:,3)-F(:,2))./F(:,2);
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%%%%%%%% figure(n+2) plot(F(:,2),F(:,1),'k',F(:,3),F(:,1),'k+'); axis([0, 5, 0, 20]) hold on %%%%%%%% figure (n+3) subplot (4,1,(i)) plot(F(:,1),F(:,4),'k+') axis([0, 20, -5, 5]) %legend('Logarithmic Diode','Straight Line Diode') %text(.1,40,'Power Dissipation (Both Diodes)'); end %%adding labels to existing figures figure (n+2) title 'C2D20120D Straight Line V_FWD Model' xlabel 'V_FWD (V)' ylabel 'I_FWD (A)' legend('Input Data', 'CRM Model',4) text (1.6,18, '25^oC') text (2.6,18, '75^oC') text (3.2,18, '125^oC') text (4.1,18, '175^oC') %%%%%%%% figure (n+3) subplot(4,1,1) title 'C2D20120D Straight Line V_FWD Model' ylabel '25^oC' subplot(4,1,2) ylabel '75^oC' subplot (4,1,3) ylabel '125^oC' subplot(4,1,4) ylabel '175^oC' xlabel 'I_FWD (A)' %place SPICE parameter data on figure d=fliplr(D); %places polyval constant values in the first column figure(2) for i=1:length(d) text(.7,(.9-(i*.1)),(strcat('IIC',num2str(i),' = ',... sprintf('%0.3e',d(i,1)))),'units','normalized'); end %print SPICE parameter data to text file fid = fopen(strcat((PN),' DFV_SL.txt'), 'w'); fprintf(fid, '\r\n%s',strcat('*',(PN))); fprintf(fid, '\r\n%s','*Diode Forward Voltage Drop Model Parameters'); fprintf(fid, '\r\n%s',''); m=3; %number of calculated parameters C=cell(m,(deg+2)); for i=1:m for j=1:(deg+1); Ci,j=strcat(' DFS',num2str(i),num2str(j-1),'=',... sprintf('%0.3e',d(i,j))); end Ci,(deg+2)=strcat(Ci,1:(deg+1));
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end for k=1:m fprintf(fid, '\r\n%s',strcat('.param',Ck,(deg+2))); end fclose(fid);
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Diode Reverse Current; Limited Reverse Voltage Range Model %DrevI_D.m %An M-File to read and process input datas from Excel worksheet columns %There will be multiple temperature dependent data columns %This particular application calculates the SPICE parameters %of the temperature dependent diode reverse biased leakage current %of a Schottky junction %%%%%%%% %Limited reverse voltage range (line 61) %%%%%%%% clc clear all close all %%%%%%%% PN=('C2D20120D'); %part number and name of Excel file that contains the input data n=4; %number of temperature profiles T=[25 75 125 175; 298 348 398 448]; %data temperatures in C and K S1='IR25'; %Sheet name of T(1,1) data S2='IR75'; %Sheet name of T(1,2) data S3='IR125'; %Sheet name of T(1,3) data S4='IR175'; %Sheet name of T(1,4) data S=S1; S2; S3; S4; dep=2; %column that contains the dependent (current) data ind=1; %column that contains the independent (voltage) data B=zeros(3,2); %contains current and best equation values C=zeros(3,n); %contains final equation values for each temperature B(1,1)=1; %initial scale value of equation B(2,1)=1000; %initial divisor value of equation B(3,1)=5; %initial power value of equation err0=0; %initialize error value err1=0; %initialize error value err2=0; %initialize error value %A1 = Independent input data %A2 = Dependent input data %A3 = Dependent data minus reference diode (goal) %A4 = Current random guess of goal %A5 = Current run error value %A6 = Current best approximation of goal for i=1:n data=xlsread(PN, char(S(i))); %reads data x=(data(:,ind)); %extracts the independent column y=(data(:,dep)); %extracts the dependent column x(isnan(x))=[]; %removes NAN from the x column y(isnan(y))=[]; %removes NAN from the y column lenx=length(x); %determine length of vector x A=zeros(lenx,6); %working vectors %From this point on, the odd column will be the (x)independent variable A(:,1)=x; %independent input data A(:,2)=y; %dependent input data A(:,3)=y; %dependent input data duplicate %%%%%%%% %Calculate SPICE Parameters using Simulated Annealing
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err1=0; %reset error value for k=1:lenx A(k,4)=B(1,1)*(A(k,1)/B(2,1))^B(3,1); A(k,6)=A(k,4); A(k,5)=((A(k,4)-A(k,3))/A(k,3))^2; %normalized difference squared error if A(k,1)<1500; %ignores Vreverse above this value A(k,5)=A(k,5); else A(k,5)=0; end err1=err1+A(k,5); end %equal error value weighting regardless of the number of data points err1=err1*(100/lenx); iter=3000; %iteration limit for j=1:iter if err1<.5 %sets minimum error goal break else end %scale=1*(err1/100)^.67; scale=.1*(iter-j)/iter; if scale>.99; scale=1; else end rand=random('uniform',-1,1,3,1); B(1,2)=B(1,1)+(B(1,1)*rand(1,1)*.5*scale); %modifies scale B(2,2)=B(2,1)+(B(2,1)*rand(2,1)*.25*scale); %modifies divisor B(3,2)=B(3,1)+(B(3,1)*rand(3,1)*.5*scale); %modifies power err2=0; for k=1:lenx A(k,4)=B(1,2)*(A(k,1)/B(2,2))^B(3,2); A(k,5)=((A(k,4)-A(k,3))/A(k,3))^2; %current run error value if A(k,1)<1500; %ignores Vrev greater than value A(k,5)=A(k,5); else A(k,5)=0; end err2=err2+A(k,5); end %equal error value weighting regardless of the number of data points err2=err2*(100/lenx); if err2<err1; err1=err2; for l=1:lenx; A(l,6)=A(l,4); %current best approximation of goal end for m=1:3; B(m,1)=B(m,2); end else end %%%%%%%% figure(i) plot(A(:,1),A(:,3),A(:,1),A(:,4),'+',A(:,1),A(:,6))
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axis([0, 1400, 0, 100]) text(400,80,strcat('iter= ',num2str(j))); text(400,70,strcat('err1= ',num2str(err1))); text(400,60,strcat('err2= ',num2str(err2))); text(400,50,strcat('Scale= ',num2str(B(1,1)))); text(400,40,strcat('Div= ',num2str(B(2,1)))); text(400,30,strcat('Pwr= ',num2str(B(3,1)))); text(400,20,strcat('scale= ',num2str(scale))); drawnow; %pause(.01); end C(1,i)=B(1,1); %move final scale value for T(i) to temperature column C(2,i)=B(2,1); %move final divisor value for T(i) to temperature column C(3,i)=B(3,1); %move final power value for T(i) to temperature column disp(C) end %Calculate the temperature dependency of scale, divisor and power deg=2; %degree of polynomial to be calculated for temperature dependancy D=zeros(3,(deg+1)); %row vectors for polyfit results E=zeros(3,(length(T))); %row vectors for polyval results for o=1:3; D(o,:)=polyfit(T(2,:),C(o,:),deg); %POLYFIT<X,Y,N> %Row vectors containing polyfit results (Kelvin) E(o,:)=polyval(D(o,:),T(2,:)); %POLYVAL<P,X) %Row vectors containing polyval results (Kelvin) end figure(n+1) subplot(3,1,1) plot(T(1,:),C(1,:),'o',T(1,:),E(1,:),'+')%H = SUBPLOT(m,n,p) subplot(3,1,2) plot(T(1,:),C(2,:),'o',T(1,:),E(2,:),'+') subplot(3,1,3) plot(T(1,:),C(3,:),'o',T(1,:),E(3,:),'+') for i=1:n %number of temperature profiles data=xlsread(PN, char(S(i))); %reads data x=(data(:,ind)); %extracts the independent column y=(data(:,dep)); %extracts the dependent column x(isnan(x))=[]; %removes NAN from the x column y(isnan(y))=[]; %removes NAN from the y column lenx=length(x); %determine length of vector x F=zeros(lenx,4); %working row vectors %From this point on, the odd column will be the (x) independent variable F(:,1)=x; %independent input data F(:,2)=y; %dependent input data F(:,3)=polyval(D(1,:),T(2,i))*(F(:,1)/polyval(D(2,:),T(2,i)))... .^polyval(D(3,:),T(2,i)); F(:,4)=100*(F(:,3)-F(:,2))./F(:,2); %%%%%%%% figure(n+2) plot(F(:,1),F(:,2),'k-',F(:,1),F(:,3),'k+');
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axis([400, 1400, 0, 80]) hold on %%%%%%%% figure(n+3) subplot(4,1,i) plot(F(:,1),F(:,4),'k'); axis([0, 1400, -50, 50]) hold on end %%%%%%%% %Routine that writes .param to figure, and creates .param statements d=fliplr(D); m=3; %number of model variables figure(n+2) title('C2D20120D Reverse Bias Leakage Current') ylabel('Leakage Current (uA)') xlabel('V_REV (V)') legend('Input Data', 'Model Data', 1) for i=1:m; for j=1:(deg+1); text(500,(95-(20*i)-(5*j)),strcat('DRI',num2str(i),num2str(j-1),... '=',sprintf('%0.3e',d(i,j)))); end end P=cell(m,(deg+2)); fid = fopen(strcat((PN),' DRI.txt'), 'w'); fprintf(fid, '\r\n%s','*Diode Reverse Leakage Current Model'); fprintf(fid, '\r\n%s',strcat('*',(PN))); fprintf(fid, '\r\n%s',''); for i=1:m for j=1:(deg+1); Pi,j=strcat(' DRI',num2str(i),num2str(j-1),'=',... sprintf('%0.3e',d(i,j))); end Pi,(deg+2)=strcat(Pi,1:(deg+1)); end for k=1:m fprintf(fid, '\r\n%s',strcat('.param',Pk,(deg+2))); end fclose(fid);
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Diode Reverse Bias Charge Model %DrevI_D.m %An M-File to read and process input datas from Excel worksheet columns %There will be multiple temperature dependent data columns %This particular application calculates the SPICE parameters %of the temperature dependent diode reverse biased leakage current %of a Schottky junction %%%%%%%% %Limited reverse voltage range (line 61) %%%%%%%% clc clear all close all %%%%%%%% PN=('C2D20120D'); %part number and name of Excel file that contains the input data n=4; %number of temperature profiles T=[25 75 125 175; 298 348 398 448]; %data temperatures in C and K S1='IR25'; %Sheet name of T(1,1) data S2='IR75'; %Sheet name of T(1,2) data S3='IR125'; %Sheet name of T(1,3) data S4='IR175'; %Sheet name of T(1,4) data S=S1; S2; S3; S4; dep=2; %column that contains the dependent (current) data ind=1; %column that contains the independent (voltage) data B=zeros(3,2); %contains current and best equation values C=zeros(3,n); %contains final equation values for each temperature B(1,1)=1; %initial scale value of equation B(2,1)=1000; %initial divisor value of equation B(3,1)=5; %initial power value of equation err0=0; %initialize error value err1=0; %initialize error value err2=0; %initialize error value %A1 = Independent input data %A2 = Dependent input data %A3 = Dependent data minus reference diode (goal) %A4 = Current random guess of goal %A5 = Current run error value %A6 = Current best approximation of goal for i=1:n data=xlsread(PN, char(S(i))); %reads data x=(data(:,ind)); %extracts the independent column y=(data(:,dep)); %extracts the dependent column x(isnan(x))=[]; %removes NAN from the x column y(isnan(y))=[]; %removes NAN from the y column lenx=length(x); %determine length of vector x A=zeros(lenx,6); %working vectors %From this point on, the odd column will be the (x)independent variable A(:,1)=x; %independent input data A(:,2)=y; %dependent input data A(:,3)=y; %dependent input data duplicate %%%%%%%% %Calculate SPICE Parameters using Simulated Annealing
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err1=0; %reset error value for k=1:lenx A(k,4)=B(1,1)*(A(k,1)/B(2,1))^B(3,1); A(k,6)=A(k,4); A(k,5)=((A(k,4)-A(k,3))/A(k,3))^2; %normalized difference squared error if A(k,1)<1500; %ignores Vreverse above this value A(k,5)=A(k,5); else A(k,5)=0; end err1=err1+A(k,5); end %equal error value weighting regardless of the number of data points err1=err1*(100/lenx); iter=3000; %iteration limit for j=1:iter if err1<.5 %sets minimum error goal break else end %scale=1*(err1/100)^.67; scale=.1*(iter-j)/iter; if scale>.99; scale=1; else end rand=random('uniform',-1,1,3,1); B(1,2)=B(1,1)+(B(1,1)*rand(1,1)*.5*scale); %modifies scale B(2,2)=B(2,1)+(B(2,1)*rand(2,1)*.25*scale); %modifies divisor B(3,2)=B(3,1)+(B(3,1)*rand(3,1)*.5*scale); %modifies power err2=0; for k=1:lenx A(k,4)=B(1,2)*(A(k,1)/B(2,2))^B(3,2); A(k,5)=((A(k,4)-A(k,3))/A(k,3))^2; %current run error value if A(k,1)<1500; %ignores Vrev greater than value A(k,5)=A(k,5); else A(k,5)=0; end err2=err2+A(k,5); end %equal error value weighting regardless of the number of data points err2=err2*(100/lenx); if err2<err1; err1=err2; for l=1:lenx; A(l,6)=A(l,4); %current best approximation of goal end for m=1:3; B(m,1)=B(m,2); end else end %%%%%%%% figure(i) plot(A(:,1),A(:,3),A(:,1),A(:,4),'+',A(:,1),A(:,6))
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axis([0, 1400, 0, 100]) text(400,80,strcat('iter= ',num2str(j))); text(400,70,strcat('err1= ',num2str(err1))); text(400,60,strcat('err2= ',num2str(err2))); text(400,50,strcat('Scale= ',num2str(B(1,1)))); text(400,40,strcat('Div= ',num2str(B(2,1)))); text(400,30,strcat('Pwr= ',num2str(B(3,1)))); text(400,20,strcat('scale= ',num2str(scale))); drawnow; %pause(.01); end C(1,i)=B(1,1); %move final scale value for T(i) to temperature column C(2,i)=B(2,1); %move final divisor value for T(i) to temperature column C(3,i)=B(3,1); %move final power value for T(i) to temperature column disp(C) end %Calculate the temperature dependency of scale, divisor and power deg=2; %degree of polynomial to be calculated for temperature dependancy D=zeros(3,(deg+1)); %row vectors for polyfit results E=zeros(3,(length(T))); %row vectors for polyval results for o=1:3; D(o,:)=polyfit(T(2,:),C(o,:),deg); %POLYFIT<X,Y,N> %Row vectors containing polyfit results (Kelvin) E(o,:)=polyval(D(o,:),T(2,:)); %POLYVAL<P,X) %Row vectors containing polyval results (Kelvin) end figure(n+1) subplot(3,1,1) plot(T(1,:),C(1,:),'o',T(1,:),E(1,:),'+')%H = SUBPLOT(m,n,p) subplot(3,1,2) plot(T(1,:),C(2,:),'o',T(1,:),E(2,:),'+') subplot(3,1,3) plot(T(1,:),C(3,:),'o',T(1,:),E(3,:),'+') for i=1:n %number of temperature profiles data=xlsread(PN, char(S(i))); %reads data x=(data(:,ind)); %extracts the independent column y=(data(:,dep)); %extracts the dependent column x(isnan(x))=[]; %removes NAN from the x column y(isnan(y))=[]; %removes NAN from the y column lenx=length(x); %determine length of vector x F=zeros(lenx,4); %working row vectors %From this point on, the odd column will be the (x) independent variable F(:,1)=x; %independent input data F(:,2)=y; %dependent input data F(:,3)=polyval(D(1,:),T(2,i))*(F(:,1)/polyval(D(2,:),T(2,i)))... .^polyval(D(3,:),T(2,i)); F(:,4)=100*(F(:,3)-F(:,2))./F(:,2); %%%%%%%% figure(n+2) plot(F(:,1),F(:,2),'k-',F(:,1),F(:,3),'k+');
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axis([400, 1400, 0, 80]) hold on %%%%%%%% figure(n+3) subplot(4,1,i) plot(F(:,1),F(:,4),'k'); axis([0, 1400, -50, 50]) hold on end %%%%%%%% %Routine that writes .param to figure, and creates .param statements d=fliplr(D); m=3; %number of model variables figure(n+2) title('C2D20120D Reverse Bias Leakage Current') ylabel('Leakage Current (uA)') xlabel('V_REV (V)') legend('Input Data', 'Model Data', 1) for i=1:m; for j=1:(deg+1); text(500,(95-(20*i)-(5*j)),strcat('DRI',num2str(i),num2str(j-1),... '=',sprintf('%0.3e',d(i,j)))); end end P=cell(m,(deg+2)); fid = fopen(strcat((PN),' DRI.txt'), 'w'); fprintf(fid, '\r\n%s','*Diode Reverse Leakage Current Model'); fprintf(fid, '\r\n%s',strcat('*',(PN))); fprintf(fid, '\r\n%s',''); for i=1:m for j=1:(deg+1); Pi,j=strcat(' DRI',num2str(i),num2str(j-1),'=',... sprintf('%0.3e',d(i,j))); end Pi,(deg+2)=strcat(Pi,1:(deg+1)); end for k=1:m fprintf(fid, '\r\n%s',strcat('.param',Pk,(deg+2))); end fclose(fid);
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Appendix C4: Schottky Diode Model – Collected Input Data
C2D20120D Schottky Diode Forward Characteristics
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C2D20120D Schottky Diode Reverse Leakage Current
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C2D20120D Schottky Diode Capacitance vs. Reverse Voltage
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Appendix D1: Power MOSFET Model – Subcircuit Diagram
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Appendix D2: Power MOSFET Model – SPICE Subcircuit File
****************************************************************** *IXT12N120 1200V 12A Power MOSFET * ********************************** *Power MOSFET Circuit Response Model *3-Time Constant Thermal Model * (G) Gate * | (D) Drain * | | (S) Source * | | | (Ttop) Thermal Top (Junction Temp) * | | | | (Ths) Thermal Bottom (Heatsink Temp) * | | | | | (Pavg) Average Dissipation Input .SUBCKT CRM12N120 G D S T T3 TC **Power MOSFET Circuit Response Model **Gate Input Characteristics** R1 G A 1 ; internal gate resistance C1 A B GMUX*MIC1*10^-12 C2 E A GMUX*MIC2*10^-12 C3 A J GMUX*MIC3*10^-12 E1 B J Value=V(A1,J)*V(C,J) E2 C J Table=V(F1,J) 0,0 MIC5,1 GSMOOTH=.05 R2 A J 1e6 ; DC path to internal source R4 E F 1 R3 A A1 1k ; Vge lowpass filter C4 A1 J 2p ; Vge lowpass filter ; changed from 1p * **Input Admittance** E3 K J Table=(MAD10+(MAD11*V(T))+(MAD12*V(T)^2)) + +((MAD20+(MAD21*V(T))+(MAD22*V(T)^2))*V(A1,J)) + 0,0 100,100 GSMOOTH=.2 * **Drain Source Channel and Parasitics** R5 D F .001 V1 F H 0 ; 0 volt current monitor E4 H I Table=V(P)*((MRD10+(MRD11*V(T))) + +((MRD20+(MRD21*V(T)))*I(V1)) + +((MRD30+(MRD31*V(T)))*I(V1)^2))
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+ 0,0 40,40 E5 I J Table=10k*(I(V1)-V(K,J)) 0,0 1400,1400 GSMOOTH=.02 ;Active region R7 F J1 1 ; Cds ESR C6 J1 J MIC4*10^-12 ; Cds R6 F F1 1k ; Vds lowpass filter C5 F1 J 2p ; Vds lowpass filter changed from 1p L1 J S .15n RL1 J S .001 * **Clamp Diode** D1 J F Rclamp * **Reverse Current** **Not Used - Pdiss worst case = 3.3W *G2 E J Value=0 *RFJ F J 1e6 * **State Detectors** E7 P 0 Table V(F1,J) (.1,0) (.2,1) ;On-State * **Dissipation** VTA TA 0 pwl (0,0) (1e-6,0) (2e-6,1) VTB TB 0 pwl (0,1) (1e-6,1) (2e-6,0) E6 Z 0 Value=V(F1,J)*I(V1) ; filtered Pdiss R8 Z Y 2k ; Pdiss lowpass filter C7 Y 0 2p ; Pdiss lowpass filter ; changed from 1p G3 0 T Value=V(P)*V(TA)*V(Y)+(V(TB)*V(TC)) ; forward dissipation * **Thermal Circuit** RT1 T T1 TR1 CT1 T T1 TC1 RT2 T1 T2 TR2 CT2 T1 T2 TC2 RT3 T2 T3 TR3 CT3 T2 T3 TC3 * **Models and Parameters** .model RClamp D RS=1.4 * **Gate Input Parameters** .param MIC1=1.757e+003 MIC2=8.280e+001 MIC3=3.507e+003 MIC4=120 MIC5=40 .param GMUX=1 * **Forward Volage Parameters RDS(on)** .param MRD10=1.074e-001 MRD11=-6.248e-005
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.param MRD20=-2.932e+000 MRD21=1.338e-002
.param MRD30=-6.894e-002 MRD31=3.060e-004 * **Input Admittance** .param MAD10=-1.935e+002 MAD11=5.994e-001 MAD12=-6.613e-004 .param MAD20=2.677e+001 MAD21=-7.508e-002 MAD22=8.652e-005 * **Reverse Current Parameters** * Not Used * **Thermal Model Parameters** .param TR1=1.688e-001 TC1=1.700e-001 .param TR2=6.017e-002 TC2=9.273e-002 .param TR3=2.065e-002 TC3=3.572e-002 * .ENDS CRM12N120 ******************************************************************
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Appendix D3: Power MOSFET Model – Parameter Extraction Scripts
Input Capacitance %MOSFET_CAP_B.m %An M-File to read and process input data from Excel worksheet columns %There will be a pair of XY columns across multiple worksheets %This particular application will calculate the %MOSFET interelectrode capacitance %%%%%%%% % %%%%%%%% clc clear all close all %%%%%%%% PN='IXT12N120'; %part number and name of Excel file that contains the input data n=3; %number of profiles S1='CISS'; %worksheet name S2='COSS'; %worksheet name S3='CRSS'; %worksheet name S=S1; S2; S3; %profile vector ind=1; %column that contains the "independent" data dep=2; %column that contains the "dependent" data xx=linspace(.1,40,49); %x-axis for spline interpolation of input data C=zeros(length(xx),10); %x-axis for spline interpolation of input data C(:,1)=xx; %x-axis for spline interpolation of input data for i=1:n data=xlsread(PN, char(S(i))); %reads data x=(data(:,ind)); %extracts the independent column y=(data(:,dep)); %extracts the dependent column lenx=length(x); %determine length of vector x A=zeros(lenx,2); %working vectors A(:,1)=x; %independent input data A(:,2)=y; %dependent input data C(:,(i+1))=spline(A(:,1),A(:,2),C(:,1)); figure(1) semilogy(A(:,1),A(:,2),'k',C(:,1),C(:,(i+1)),'ko') hold on end %%%working vectors %C1=VDS (X-axis) %C2=CISS %C3=COSS %C4=CRSS C(:,5)=C(:,2)-C(:,4); %CGS (CISS-CRSS)
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C(:,6)=C(:,4); %CGD (CRSS) C(:,7)=C(:,3)-C(:,4); %CCS (COSS-CRSS) C(:,8)=C(:,1).*C(:,6)*10^-12; D(1,1)=C(1,6); %model's C1 in parallel with C3 during low Vce conditions D(2,1)=C(length(xx),6); %model's C2 Cgd D(3,1)=C(length(xx),5); %model's C3 Cgs D(4,1)=C(length(xx),3)-C(length(xx),4); D(5,1)=C(length(xx),1); C(:,9)=C(:,1).*D(2,1)*10^-12; C(:,10)=C(:,8)-C(:,9); %%%ploting results%%% figure(1) axis([0,40,10,10000]) title(strcat(PN,' Gate Characteristics - Capacitance')) xlabel('V_DS (V)') ylabel('Capacitance pF') legend('Input Data','Spline Data',3) gtext('C_iss') gtext('C_oss') gtext('C_rss') %%% figure(2) semilogy(C(:,1),C(:,2),'k-',C(:,1),C(:,5),'ko',C(:,1),C(:,6),'k+') axis([0,40,10,10000]) title(strcat(PN,' Gate Characteristics - Parameters')) xlabel('V_DS (V)') ylabel('Capacitance pF') legend('C_iss','C_GS','C_GD',3) %%% figure (3) semilogy(C(:,1),C(:,8),C(:,1),C(:,9),C(:,1),C(:,10)) %%%place SPICE parameter data on existing figure figure(2) for i=1:length(D) text(.7,(.80-(i*.05)),(strcat('MIC',num2str(i),' = ',... sprintf('%0.3e',D(i,1)))),'units','normalized'); end %%%print SPICE parameter data to text file%%% fid = fopen(strcat((PN),' MOSFET_CAP.txt'), 'w'); fprintf(fid, '\r\n%s',strcat('*',(PN))); fprintf(fid, '\r\n%s','*MOSFET Input Capacitance - Model Parameters'); fprintf(fid, '\r\n%s',''); m=length(D); %number of calculated parameters C=cell(m,1); for i=1:m for j=1:1; Ci,j=strcat(' MIC',num2str(i),'=', sprintf('%0.3e',D(i,j))); end %Ci,(deg+2)=strcat(Ci,1:(deg+1)); end for k=1:m fprintf(fid, '\r\n%s',strcat('.param',Ck,1)); end fclose(fid);
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Input Admittance Straight Line Model %MOSFET_ADM_SL_B.m %An M-File to read and process input data from Excel worksheet columns %There will be a pair of XY columns across multiple worksheets %This particular application will calculate the IGBT junction, %Vge and temperature dependent input admittance SPICE parameters %%%%%%%% %This model is y=mx+b as determined by polyfit %%%%%%%% clc clear all close all %%%%%%%% PN='IXT12N120'; %part number and name of Excel file that contains the input data n=3; %number of temperature profiles T=[-40 25 125]; %temperaature S1='ADMN40'; %worksheet name S2='ADM25'; %worksheet name S3='ADM125'; %worksheet name S=S1; S2; S3; %%%input admittance as a function of Vge and temp%%% dep=2; %column that contains the "dependent" data ind=1; %column that contains the "independent" data poly1=1; %order of polynomial that will characterize input admittance vge=[6.9, 7.4; 6.8, 7.3; 6.3, 6.8]; %sets boundaries for polyfit lenb=30; %size of vge vector for spline interpolation of input data B=zeros(lenb,(2*n)); %spline interpolation of input data C=zeros(n,(poly1+1)); %input admittance polyfit results for i=1:n B(:,i)=linspace(vge(i,1),vge(i,2),lenb); data=xlsread(PN, char(S(i))); %reads data x=(data(:,ind)); %extracts the independent column y=(data(:,dep)); %extracts the dependent column A=zeros(length(x),5); %working vectors A(:,1)=x; %independent input data A(:,2)=y; %dependent input data B(:,(i+n))=spline(A(:,1),A(:,2),B(:,i)); C(i,:)=polyfit(B(:,i),B(:,(i+n)),poly1); A(:,3)=polyval(C(i,:),A(:,1)); %polynomial replica of input data A(:,4)=100*((A(:,3)-A(:,2))./A(:,2)); %pct error between model and input data A(:,5)=A(:,3)-A(:,2); %Vge error between model and input data %%%%%%%% figure(1) plot(A(:,1),A(:,2),'k',A(:,1),A(:,3),'k+') hold on %%%%%%%% figure(2) subplot(n,1,i) plot(A(:,2),A(:,5),'k+') axis([0,36,-5,5])
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end %%%add labels etc to existing figure%%% figure(1) title (strcat(PN,' Input Admittance Straight Line Model')) xlabel 'V_GS (V)' ylabel 'I_D (A)' legend('Input Data', 'Model Data',2) axis([4.5,7.5,0,16]) gtext('-40^oC') gtext('25^oC') gtext('125^oC') %%%add labels etc to existing figure%%% figure(2) subplot(3,1,1) title (strcat(PN,' Input Admittance Straight Line Model')) ylabel 'Volts' legend('-40^oC',2) axis([0, 16, -5, 5]) subplot(3,1,2) ylabel 'Volts' legend('25^oC',2) axis([0, 16, -5, 5]) subplot(3,1,3) xlabel 'I_C (A)' ylabel 'Volts' legend('125^oC',2) axis([0, 16, -5, 5]) %Calculate temperature dependency of input admittance curves poly2=2; %degree of temperature dependency polynomial D=zeros((poly1+1),(poly2+1)); %row vectors for polyfit results E=zeros((poly1+1),(length(T))); c=transpose(C); for o=1:(poly1+1); D(o,:)=polyfit((T+273),c(o,:),poly2);%row vectors containing polyfit results E(o,:)=polyval(D(o,:),(T+273));%row vectors containing polyval results end figure(3) for i=1:(poly1+1) subplot((poly1+1),1,i) plot(T,c(i,:),'o',T,E(i,:),'+') end subplot((poly1+1),1,1) title (strcat(PN,' Input Admittance Straight Line Model')) subplot((poly1+1),1,(poly1+1)) xlabel 'V_GE Volts' %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% %Routine that writes .param to figure and .param statements to text file p=flipud(fliplr(D)); %Polyval constants in the first column and top row m=(poly1+1); %number of model variables figure(1) for i=1:m; for j=1:(poly2+1);
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text(0.02,(1-(0.2*i)-(0.05*j)),strcat('MAD',num2str(i),num2str(j-1),... '=',sprintf('%0.3e',p(i,j))),'units', 'normalized'); end end fid = fopen(strcat((PN),' MOSFETADM_SL.txt'), 'w'); fprintf(fid, '\r\n%s',strcat('*',(PN))); fprintf(fid, '\r\n%s','*MOSFET Input Admittance Model Parameters'); fprintf(fid, '\r\n%s',''); m=poly1+1; %number of calculated parameters C=cell(m,(poly2+2)); for i=1:m for j=1:(poly2+1); Ci,j=strcat(' MAD',num2str(i),num2str(j-1),'=', sprintf('%0.3e',p(i,j))); end Ci,(poly2+2)=strcat(Ci,1:(poly2+1)); end for k=1:m fprintf(fid, '\r\n%s',strcat('.param',Ck,(poly2+2))); end fclose(fid);
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Power MOSFET RDSON Polynomial %MOS_RDS_POLY_A.m %An M-File to read and process input data from Excel worksheet columns %There will be multiple data columns %This particular application will calculate the SPICE parameters %of the MOSFET RDS(on) as a function of temperature for Vgs=10V %%%%%%%% %This model is a first order polynomial function of temperature %%%%%%%% clc clear all close all %%%%%%%% PN='IXT12N120'; %part number and name of Excel file that contains the input data n=2; %number of Temperature profiles that are used to calculate RDS(on) T=[25 125]; %temperature profiles in celsius S1='25FWD100'; %worksheet name S2='125FWD100'; %worksheet name S=S1; S2; %%%RDS(on) as a function of temperature%%% dep=1; %column that contains the "dependent" data ind=2; %column that contains the "independent" data deg=2; %polynomial that will calculate RDS(on) as a function of current B=zeros(n,(deg+1)); %%%Read and display the input data, find the equations%%% for i=1:n data=xlsread(PN, char(S(i))); %reads data x=(data(:,ind)); %extracts the independent column y=(data(:,dep)); %extracts the dependent column lenx=length(x); %determine length of vector x A=zeros(lenx,2); %working vectors %From this point on, the first column will be the (x) independent variable A(:,1)=x; %independent input data A(:,2)=y; %dependent input data B(i,:)=polyfit(A(:,1),A(:,2),deg); figure(1) plot(A(:,2),A(:,1),'k') %plot input data hold on end %compare the polyfit results to the input data c=linspace(.5, 12, 23); C=zeros(length(c),3); C(:,1)=c; C(:,2)=polyval(B(1,:),C(:,1)); C(:,3)=polyval(B(2,:),C(:,1)); %%%add polyfit data to input data figure%%% figure(1) plot(C(:,2),C(:,1),'k+') %plot temperature profile 1 plot(C(:,3),C(:,1),'k+') %plot temperature profile 2 title(strcat((PN), ' R_DS(on) Temperature Characterisitcs')) text(9, 10, '25^oC') text(24, 10, '125^oC')
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xlabel('V_DS (V)') ylabel('I_D (A)') %%%calculate temperature dependence of RDS(on)%%% deg2=1; D=zeros(2,(deg2+1)); E=zeros(2,length(T)); b=transpose(B); for j=1:(deg+1) D(j,:)=polyfit((T+273),b(j,:),deg2);%row vectors containing polyfit results E(j,:)=polyval(D(j,:),(T+273));%row vectors containing polyval results end %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% %Routine that writes .param to figure and creates .param statements p=flipud(fliplr(D)); %Polyval constants in the first column and top row m=3; %number of model variables figure(1) for i=1:m; for j=1:(deg2+1); text(25,(8-(1.5*i)-(.5*j)),strcat('MRD',num2str(i),num2str(j-1),... '=',sprintf('%0.3e',p(i,j)))); end end fid = fopen(strcat((PN),' RDSon.txt'), 'w'); fprintf(fid, '\r\n%s',strcat('*',(PN))); fprintf(fid, '\r\n%s','*MOSFET RDS(on) Model Parameters'); fprintf(fid, '\r\n%s',''); m=3; %number of calculated parameters C=cell(m,(deg2+2)); for i=1:m for j=1:(deg2+1); Ci,j=strcat(' MRD',num2str(i),num2str(j-1),'=', sprintf('%0.3e',p(i,j))); end Ci,(deg+2)=strcat(Ci,1:(deg+1)); end for k=1:m fprintf(fid, '\r\n%s',strcat('.param',Ck,(deg+2))); end fclose(fid);
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Appendix D4: Power MOSFET Model – Collected Input Data
IXT12N120 Power MOSFET Capacitance
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IXT12N120 Power MOSFET Input Admittance
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IXT12N120 Power MOSFET Output Characteristics @ 25ºC
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IXT12N120 Power MOSFET Output Characteristics @ 125ºC
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Appendix E1: IGBT Model – Subcircuit Diagram
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Appendix E2: IGBT Model – SPICE Subcircuit File
****************************************************************** *IXG12N120A2 1200V 12A IGBT *Circuit Response Model ********************************** *IGBT Circuit Response Model *4-Time Constant Thermal Model * (G) Gate * | (C) Collector * | | (E) Emitter * | | | (Ttop) Thermal Top (Junction Temp) * | | | | (Ths) Thermal Bottom (Heatsink Temp) * | | | | | (Pavg) Average Dissipation Input .SUBCKT CRG12N120A2 G C E T T4 TC **IGBT Circuit Response Model **Gate Input Characteristics** R1 G A 1 ; internal gate resistance C1 A B GMUX*IIC1*10^-12 C2 F A GMUX*IIC2*10^-12 C3 A D GMUX*IIC3*10^-12 E1 B D Value=V(A1,D)*V(H,D) E2 H D Table=V(K1,D) 0,0 IIC5,1 GSMOOTH 0.01 R2 A D 1e6 ; DC path to ground R3 A A1 1000 C4 A1 D 1p R4 F K 1 * **Input Admittance and Base Current** E3 IA D Table=((IAD10+(IAD11*V(T))+(IAD12*V(T)^2)) + +((IAD20+(IAD21*V(T))+(IAD22*V(T)^2))*V(A1,D))) + 0,0 100,100 GSMOOTH=.2 S1 IA I P D Tail C5 I D 1n G1 J D Value=0.01*V(I,D) R5 J L 1 * **Forward Voltage and Parasitics** R6 C K .001
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Q1 N L M QIGBT Temp=27 V1 K M 0 ; zero volt current sensor **25C Characterisitcs E5A 5A D Table=(IVFD110+(IVFD111*V(A1,D))+(IVFD112*V(A1,D)^2)) + +(IVFD120+(IVFD121*V(A1,D))+(IVFD122*V(A1,D)^2))*I(V1) + 0,0 10,10 **125C Characteristics E5B 5B D Table=(IVFD210+(IVFD211*V(A1,D))+(IVFD212*V(A1,D)^2)) + +(IVFD220+(IVFD221*V(A1,D))+(IVFD222*V(A1,D)^2))*I(V1) + 0,0 10,10 **Temperature Dependent Characteristics E5 N D Table=V(5A,D)+(V(5B,D)-V(5A,D))*((V(T)-298)/100) + 0,0 10,10 *L1 D E 1.5n RDE D E .001 R7 K K1 1k C6 K1 D 1p R8 K D1 1 C7 D1 D GMUX*IIC4*10^-12 * **Clamp Diode** *D1 D K Rclamp * **Reverse Current** *Not Used - Pdiss worst case = 3.3W *V2 K Q 0 ; Reverse current sense *G2 Q D Value=0 ;Reverse current source * **Tail Detector** E4 P D Table=10*(V(A1,D)-(6)) (0,0) (1,1) * **Dissipation** V3 TA 0 PWL (0,0) (1e-6,0) (1.2e-6,1) V4 TB 0 PWL (0,1) (1e-6,1) (1.2e-6,0) E6 Z 0 Value=V(K1,D)*I(V1) R9 Z Y 2k C8 Y 0 1p G3 0 T Value (V(TA)*V(Y))+(V(TB)*V(TC)) ;Forward * **Thermal Circuit** RT1 T T1 TR1 CT1 T T1 TC1 RT2 T1 T2 TR2 CT2 T1 T2 TC2 RT3 T2 T3 TR3
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CT3 T2 T3 TC3 RT4 T3 T4 TR4 CT4 T3 T4 TC4 * **Models and Parameters** .model QIGBT PNP BF=100 .model RClamp D RS=1.4 .model Tail VSWITCH (RON=1 ROFF=800 VON=1 VOFF=0) * **Gate Parameters** .param IIC1=8.756e+001 .param IIC2=2.311e+000 .param IIC3=5.371e+002 .param IIC4=1.371e+002 .param IIC5=40 .param GMUX=3 * **Forward Voltage Parameters** *25 .param IVFD110=3.703e-001 IVFD111=1.384e-001 IVFD112=-4.845e-003 .param IVFD120=3.207e-001 IVFD121=-2.995e-002 IVFD122=9.250e-004 *125 .param IVFD210=4.492e-001 IVFD211=9.723e-002 IVFD212=-2.784e-003 .param IVFD220=4.107e-001 IVFD221=-3.572e-002 IVFD222=1.036e-003 * **Input Admittance** .param IAD10=-1.020e+002 IAD11=2.518e-001 IAD12=-2.264e-004 .param IAD20=1.737e+001 IAD21=-3.892e-002 IAD22=3.616e-005 * **Reverse Current Parameters** * Not Used * **Thermal Model Parameters** .param TR1=1.122e-001 TC1=2.388e+000 .param TR2=9.023e-001 TC2=1.194e-002 .param TR3=5.615e-001 TC3=3.075e-003 .param TR4=1.482e-001 TC4=7.557e-004 * .ENDS CRG12N120A2 ******************************************************************
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Appendix E3: IGBT Model – Parameter Extraction Scripts
IGBT Input Capacitance %IGBT_CAP_B.m %An M-File to read and process input data from Excel worksheet columns %There will be a pair of XY columns across multiple worksheets %This particular application will calculate the %IGBT interelectrode capacitance %%%%%%%% clc clear all close all %%%%%%%% PN='IXG12N120A2'; %part number and name of Excel file that contains the input data n=3; %number of profiles S1='CIES'; %worksheet name S2='COES'; %worksheet name S3='CRES'; %worksheet name S=S1; S2; S3; %profile vector ind=1; %column that contains the "independent" data dep=2; %column that contains the "dependent" data xx=linspace(.1,40,49); %x-axis for spline interpolation of input data C=zeros(length(xx),10); %x-axis for spline interpolation of input data C(:,1)=xx; %x-axis for spline interpolation of input data %%%read and process input data%%% for i=1:n data=xlsread(PN, char(S(i))); %reads data x=(data(:,ind)); %extracts the independent column y=(data(:,dep)); %extracts the dependent column lenx=length(x); %determine length of vector x A=zeros(lenx,2); %working vectors A(:,1)=x; %independent input data A(:,2)=y; %dependent input data C(:,(i+1))=spline(A(:,1),A(:,2),C(:,1)); figure(1) semilogy(A(:,1),A(:,2),'k',C(:,1),C(:,(i+1)),'ko') hold on end %%%working vectors%%% %C1=Vce (X-axis) %C2=CIES %C3=COES %C4=CRES C(:,5)=C(:,2)-C(:,4); %CGE (CIES-CRES) C(:,6)=C(:,4); %CGC (CRES)
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C(:,7)=C(:,3)-C(:,4); %CCE (COES-CRES) C(:,8)=C(:,1).*C(:,6)*10^-12; D(1,1)=C(1,6); %model's CA in parallel with CC during low Vce conditions D(2,1)=C(length(xx),6); %model's CB Cgc D(3,1)=C(length(xx),5); %model's CC Cge D(4,1)=C(length(xx),3)-C(length(xx),4); D(5,1)=C(length(xx),1); C(:,9)=C(:,1).*D(2,1)*10^-12; C(:,10)=C(:,8)-C(:,9); C(:,11)=C(:,1).*C(:,4); %%%add labels etc to existing figure%%% figure(1) axis([0,40,1,1000]) title(strcat(PN,' Gate Characteristics - Capacitance')) xlabel('V_CE (V)') ylabel('Capacitance pF') legend('Input Data','Spline Data',3) gtext('C_ies') gtext('C_oes') gtext('C_res') %%%add labels etc to existing figure%%% figure(2) semilogy(C(:,1),C(:,2),'k-',C(:,1),C(:,5),'ko',C(:,1),C(:,6),'k+') axis([0,40,1,1000]) title(strcat(PN,' Gate Characteristics - Parameters')) xlabel('V_CE (V)') ylabel('Capacitance pF') legend('C_ies','C_GE','C_GC',3) %%%add labels etc to existing figure%%% figure (3) semilogy(C(:,1),C(:,11)) %%%routine that writes .param data to figures and creates .param statement figure(2) for i=1:length(D) text(.7,(.9-(i*.05)),(strcat('IIC',num2str(i),' = ',... sprintf('%0.3e',D(i,1)))),'units','normalized'); end fid = fopen(strcat((PN),' IGBTINPUT.txt'), 'w'); fprintf(fid, '\r\n%s',strcat('*',(PN))); fprintf(fid, '\r\n%s','*IGBT Input Characteristics Model Parameters'); fprintf(fid, '\r\n%s',''); m=length(D); %number of calculated parameters C=cell(m,1); for i=1:m for j=1:1; Ci,j=strcat(' IIC',num2str(i),'=', sprintf('%0.3e',D(i,j))); end %Ci,(deg+2)=strcat(Ci,1:(deg+1)); end for k=1:m fprintf(fid, '\r\n%s',strcat('.param',Ck,1)); end fclose(fid);
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IGBT Input Admittance %IGBT_ADM_SL_B.m %An M-File to read and process input data from Excel worksheet columns %There will be a pair of XY columns across multiple worksheets %This particular application will calculate the IGBT junction, %Vge and temperature dependent input admittance SPICE parameters %%%%%%%% %This model is y=mx+b as determined by polyfit %%%%%%%% clc clear all close all %%%%%%%% PN='IXG12N120A2'; %part number and name of Excel file that contains the input data n=3; %number of temperature profiles T=[-40 25 125]; %temperature S1='ADMN40'; %worksheet name S2='ADM25'; %worksheet name S3='ADM125'; %worksheet name S=S1; S2; S3; %%%input admittance as a function of Vge and temp dep=2; %column that contains the "dependent" data ind=1; %column that contains the "independent" data lowVge=6.5;% lowest value of Vge used for polyfit highVge=8.3;% highest value of Vge used for polyfit poly1=1; %order of polynomial that will characterize input admittance xx=linspace(lowVge,highVge,30); B=zeros(length(xx),(n+1)); %spline results B(:,1)=xx; % Vge for spline interpolation C=zeros(n,(poly1+1)); %input admittance polyfit results for i=1:n data=xlsread(PN, char(S(i))); %reads data x=(data(:,ind)); %extracts the independent column (Vge) y=(data(:,dep)); %extracts the dependent column (Id) A=zeros(length(x),5); %working vectors A(:,1)=x; %independent input data A(:,2)=y; %dependent input data B(:,(i+1))=spline(A(:,1),A(:,2),B(:,1)); C(i,:)=polyfit(B(:,1),B(:,(i+1)),poly1); A(:,3)=polyval(C(i,:),A(:,1)); %polynomial replica of input data A(:,4)=100*((A(:,3)-A(:,2))./A(:,2)); %pct error between model and input data A(:,5)=A(:,3)-A(:,2); %Vge error between input data and model figure(1) plot(A(:,1),A(:,2),'k',A(:,1),A(:,3),'k+') hold on figure(2) subplot(n,1,i) plot(A(:,1),A(:,5),'k+') axis([4,9,-5,5]) end %%%add labels etc to existing figure%%% figure(1)
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title (strcat(PN,' Input Admittance Straight Line Model')) xlabel 'V_GE (V)' ylabel 'I_C (A)' legend('Input Data', 'Model Data',4) axis([4,9,0,24]) gtext('-40^oC') gtext('25^oC') gtext('125^oC') %%%add labels etc to existing figure%%% figure(2) subplot(3,1,1) title (strcat(PN,' Input Admittance Straight Line Model')) ylabel 'Error (A)' legend('-40^oC',2) subplot(3,1,2) ylabel 'Error (A)' legend('25^oC',2) subplot(3,1,3) xlabel 'V_GS (V)' ylabel 'Error (V)' legend('125^oC',2) %Calculate temperature dependency of input admittance curves poly2=2; %degree of temperature dependency polynomial D=zeros((poly1+1),(poly2+1)); %row vectors for polyfit results E=zeros((poly1+1),(length(T))); c=transpose(C); for o=1:(poly1+1); D(o,:)=polyfit((T+273),c(o,:),poly2);%row vectors containing polyfit results E(o,:)=polyval(D(o,:),(T+273));%row vectors containing polyval results end figure(3) for i=1:(poly1+1) subplot((poly1+1),1,i) plot(T,c(i,:),'o',T,E(i,:),'+') end subplot((poly1+1),1,1) title (strcat(PN,' Input Admittance Straight Line Model')) subplot((poly1+1),1,(poly1+1)) xlabel 'V_GE (V)' %Routine that writes .param to figure and creates .param statements p=flipud(fliplr(D)); %Polyval constants in the first column and top row m=(poly1+1); %number of model variables figure(1) for i=1:m; for j=1:(poly2+1); text(.1,(.9-((i-1)*.2)-(.05*j)),strcat('IAD',num2str(i),num2str(j-1),... '=',sprintf('%0.3e',p(i,j))),'units','normalized'); end end fid = fopen(strcat((PN),' IGBTADM_SL.txt'), 'w'); fprintf(fid, '\r\n%s',strcat('*',(PN))); fprintf(fid, '\r\n%s','*IGBT Input Admittance Model Parameters');
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fprintf(fid, '\r\n%s',''); m=poly1+1; %number of calculated parameters C=cell(m,(poly2+2)); for i=1:m for j=1:(poly2+1); Ci,j=strcat(' IAD',num2str(i),num2str(j-1),'=', sprintf('%0.3e',p(i,j))); end Ci,(poly2+2)=strcat(Ci,1:(poly2+1)); end for k=1:m fprintf(fid, '\r\n%s',strcat('.param',Ck,(poly2+2))); end fclose(fid);
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IGBT Forward Voltage Drop %IGBTFWD_PLY_E.m %An M-File to read and process input data from Excel worksheet columns %There will be multiple XY columns on multiple worksheets %This particular application calculates the IGBT juntion %Vge, Ic and temperature dependent forward voltage drop SPICE parameters %%%%%%%% %This model is y=mx+b as determined by polyfit %This model calculates parameters for two temperature profiles %Subcircuit component E5A provides interpolation between the two temperatures %%%%%%%% clc clear all close all %%%%%%%% PN='IXG12N120A2'; %part number and name of Excel file that contains the input data n=3; %number of Vge profiles tp=2; %working temperature profile, 1 for 25C 2 for 125C vge=[11 13 15; 11 13 15]; %Vge S11='25FWD110'; S21='125FWD110'; S12='25FWD130'; S22='125FWD130'; S13='25FWD150'; S23='125FWD150'; S=S11 S21; S12 S22; S13 S23; %%%voltage drop is a function of Ic and Vge%%% dep=1; %column that contains the voltage "dependent" data ind=2; %column that contains the current "independent" data lowlimit=5; %minimum current for polyfit, set this based on input data highlimit=24; %maximum current for polyfit, set this based on input data poly1=1; %degree of polynomial for Vce f(Ic) xx=linspace(lowlimit,highlimit,40); %independent variable for spline interpolation B=zeros(length(xx),5); %working matrix for spline interpolation B(:,1)=xx; %independent variable for spline interpolation C=zeros(n,poly1+1); %working matrix for polyfit of interpolated input data %%%read input data, spline interpolate, calculate offset and slope, plot%%% for i=1:n data=xlsread(PN, char(S(i,tp))); %reads data x=(data(:,ind)); %extracts the independent column y=(data(:,dep)); %extracts the dependent column x(isnan(x))=[]; %removes NAN from the x column y(isnan(y))=[]; %removes NAN from the y column lenx=length(x); %determine length of vector x A=zeros(lenx,6); %working vectors A(:,1)=x; %independent input data (Ic) A(:,2)=y; %dependent input data (Vce) A(:,3)=(-.00012*A(:,1).^2)+(.0066*A(:,1))+.024; %PNP drop A(:,4)=A(:,2)-A(:,3); %dependent data minus PNP drop (ABM goal)
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B(:,(i+1))=spline(A(:,1),A(:,4),B(:,1)); %spline interpolation of ABM goal C(i,:)=polyfit(B(:,1),B(:,(i+1)),poly1);%polyfit of ABM goal A(:,5)=polyval(C(i,:),A(:,1)); %ABM goal from polyfit coefficiencts A(:,6)=A(:,5)+A(:,3); %model output (ABM goal plus PNP drop) A(:,7)=((A(:,6)-A(:,2)).*A(:,1)); %dissipation error of model output vs. input data %%%model output vs. input data%% figure(1) plot(A(:,2),A(:,1),'k',A(:,6),A(:,1),'k+') hold on %%%%dissipation error of model output vs. input data figure(2) subplot(n,1,i) plot(A(:,1),A(:,7),'k') axis([0,24,-1,1]) tf2=strcat('V_GE=',(num2str(vge(i)))); %"tf2" = "text figure 2" text(.025,.15,(tf2),'units','normalized') ylabel 'Watts' hold on end %%%Calculate Vge dependency of polynomial coefficients%%% poly2=2; %degree of vge dependency polynomial D=zeros((poly1+1),(poly2+1)); %row vectors for polyfit results E=zeros((poly1+1),(length(vge(tp,:)))); %row vectors for polyval check c=transpose(C); for o=1:(poly1+1); D(o,:)=polyfit((vge(tp,:)),c(o,:),poly2);%row vectors of polyfit results E(o,:)=polyval(D(o,:),(vge(tp,:)));%row vectors containing polyval results end figure(3) %a comparison of (polyfit of ABM goal) for i=1:(poly1+1) %to (Vge dependency of polynomial coefficients) subplot((poly1+1),1,i) plot(vge(1,:),c(i,:),'o',vge(tp,:),E(i,:),'+') end %%%add labels etc to existing figure%%% figure(1) title (strcat(PN,' Forward Conduction Voltage Drop Model')) xlabel 'V_CE (V)' ylabel 'I_C (A)' legend ('Input Data', 'Model Data',4) text(.8,.6,'V_GE=15V','units', 'normalized') text(.87,.55,'13V','units', 'normalized') text(.87,.5,'11V','units', 'normalized') %%%add labels etc to figure(2)%%% figure(2) subplot(n,1,1) title (strcat(PN,' Forward Conduction Dissipation Error Vs. Collector Current')) subplot(n,1,n) xlabel 'I_C (A)' %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% %Routine that writes .param to figure and creates .param statements
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p=flipud(fliplr(D)); %Polyval constants in the first column and top row m=(poly1+1); %number of model variables figure(1) for i=1:m; for j=1:(poly2+1); text(.05,(1.2-(i*.2)-(.05*j)),strcat('IVFD',num2str(tp),num2str(i),... num2str(j-1),'=',sprintf('%0.3e',p(i,j))),'units', 'normalized'); end end fid = fopen(strcat((PN),' IGBTVFD',num2str(tp),'_PLY.txt'), 'w'); fprintf(fid, '\r\n%s',strcat('*',(PN))); fprintf(fid, '\r\n%s','*IGBT Forward Conduction Voltage Drop Model Parameters'); fprintf(fid, '\r\n%s',''); m=poly1+1; %number of calculated parameters C=cell(m,(poly2+2)); for i=1:m for j=1:(poly2+1); Ci,j=strcat(' IVFD',num2str(tp),num2str(i),num2str(j-1),'=',... sprintf('%0.3e',p(i,j))); end Ci,(poly2+2)=strcat(Ci,1:(poly2+1)); end for k=1:m fprintf(fid, '\r\n%s',strcat('.param',Ck,(poly2+2))); end fclose(fid);
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Appendix E4: IGBT Model – Collected Input Data
IXG12N120A2 IGBT Capacitance
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IXG12N120A2 IGBT Input Admittance
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IXG12N120A2 IGBT Output Characteristics @ 25ºC
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IXG12N120A2 IGBT Output Characteristics @ 125ºC
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Vita
Bryan A. Weaver, born and raised in Indianapolis, Indiana, USA, has been working with
high power electronics and RF power amplifier systems for more than 35 years. Having
received the Advanced Class amateur and FCC First Class Radio Telephone licenses in
1974 he started working at local radio stations prior to graduating from high school in
1976. His interest in broadcast transmitters progressed to the development of modulated
power supplies for high power AM broadcast transmitters, solidifying his interest in
power electronics systems. He is currently president of High Power Solutions LLC, a
consulting service that specializes in power electronics, analog design and RF power
systems. In this capacity he supports the wide ranged needs of military, scientific,
industrial and commercial clients. He is a Senior Member of IEEE and member of the
Beta Alpha Chapter of Eta Kappa Nu.
BS Electrical Engineering Technology, Purdue University
MS Electrical Engineering – Electrophysics, Drexel University
Ph.D. Electrical and Computer Engineering – Drexel University (expected completion in September 2011) B.A. Weaver, “A New, High Efficiency, Digital, Modulation Technique for AM or SSB Sound Broadcasting Applications,” IEEE Transactions on Broadcasting, vol. 38, issue 1, Mar. 1992, pp. 38-42.
