30
High Speed Wired Data Collection Honeywell Bob Dearth Michael Retzler Brad Lucht ISU Prof. Zhengdao Wang Zachary Coffin, Cpr E Radell Young, E E Mazdee Masud, E E

High Speed Wired Data Collection

Embed Size (px)

DESCRIPTION

High Speed Wired Data Collection. Honeywell Bob Dearth Michael Retzler Brad Lucht ISU Prof. Zhengdao Wang Zachary Coffin, Cpr E Radell Young, E E Mazdee Masud , E E. Problem and Need Statements. - PowerPoint PPT Presentation

Citation preview

Page 1: High Speed Wired Data Collection

High Speed Wired Data Collection

HoneywellBob Dearth

Michael RetzlerBrad Lucht

ISU

Prof. Zhengdao Wang

Zachary Coffin, Cpr E

Radell Young, E EMazdee Masud, E

E

Page 2: High Speed Wired Data Collection

Problem and Need StatementsHoneywell’s Kansas City Plant

needs a method to collect experimental data very quickly over a distance of 300 feet.

All previous designs are now too slow and error-prone to collect useful data.

Page 3: High Speed Wired Data Collection

Conceptual DescriptionA remote device will acquire,

encode, and transmit digital data samples.

A local device will receive the communication, decode, and send data via USB to simple acquisition software on a Windows PC.

Page 4: High Speed Wired Data Collection

System Block Diagram

Page 5: High Speed Wired Data Collection

Operating EnvironmentThe tests shall be run in a

controlled facility. Remote device will be destroyed

at the conclusion of every test, however local receiver may be reused.

Page 6: High Speed Wired Data Collection

Functional requirementsSample two analog voltage signals (5 Vpk)Sample two analog current signals (20

mApk)Sample resolution: 8-bit per channel

(minimum)Sample frequency: 2 million

samples/second (minimum)Wired distance of 300 ft Latency as low as 0.5 μs, (5 μs

maximum)Volume no greater than 3 x 3 x ½ inches

Page 7: High Speed Wired Data Collection

Market/literature survey

Pre-existing devices and protocols have limitations which inhibit their use in this application. The combination of 300 feet of distance, 64Mbit/sec minimum transfer rate, and latency on the order of 0.5 microseconds makes this project challenging.

Page 8: High Speed Wired Data Collection

DeliverablesPrototypes of the transmitting

and receiving devices shall be constructed and brought to Kansas City for verification.

Page 9: High Speed Wired Data Collection

Project Plan – Work Breakdown

Name Define Select Design Implement Test Document Demo Report Total Hours

Zachary Coffin 10% 25% 40% 40% 20% 20% 25% 50% 200.25

Radell Young 25% 50% 30% 30% 40% 30% 40% 20% 200.25

Mazdee Masud 65% 25% 30% 30% 40% 50% 35% 30% 199.5

Total Hours 25 75 150 115 70 20 70 75 600

Page 10: High Speed Wired Data Collection

Project Plan – Resource Requirements

Item W/O Labor With LaborParts and Materials:a. ADC $20 $800a. Modulator $20 $600a. Demodulator $20 $800a. Clock Generator $10 $200a. Error Correction Coder $15 $500a. Error Correction Decoder $15 $700

Subtotal $100 $3600Labor at $19 per hour:a. Coffin, Zach $3,420a. Young, Radell $3,420a. Masud, Mazdee $3,420

Subtotal $10,260Total $10,360 $13,860

Page 11: High Speed Wired Data Collection

Project Plan – RisksTransmission scheme may not work over

the 300 ft distance◦Modular design will allow for

interchangeable modulation/demodulation schemes.

Bit error rate may be too high to collect usable data.◦Header and footer to each sample may be

modified, cable may be more sophisticated.Large time commitment to research

leaves little time for design and implementation.

Page 12: High Speed Wired Data Collection

Cost EstimateItem W/O Labor With LaborParts and Materials:a. ADC $20 $800b. Modulator $20 $600c. Demodulator $20 $800d. Clock Generation $10 $200e. Error Correction Coder $15 $500f. USB $15 $700

Subtotal $100 $3600Labor at $19 per hour:a) Coffin, Zach $3,420b) Young, Radell $3,420c) Masud, Mazdee $3,420

Subtotal $10,260Total $10,360 $13,860

Page 13: High Speed Wired Data Collection

Project Plan – Schedule

Page 14: High Speed Wired Data Collection

System Design – Functional DecompositionAnalog to Digital ConversionError Detection/CorrectionModulationTransmission and SynchronizationDemodulationData to Windows XP

Page 15: High Speed Wired Data Collection

System DesignCurrent signals converted to voltage signals

with shunt resistancesAtoD – Texas Instruments TLC5510Parity – Texas Instruments HC280Modulation – Serialization to Differential

Voltage through a series of MUX translations◦ Analog Devices ADG732 32to1 MUX (data channels)◦ Analog Devices ADG1608 8to1 MUX (data vs parity)◦ Analog Devices AD8180 2to1 MUX (x2 for LVDS)

Transmission and SynchronizationDemodulationData to Windows XP

Page 16: High Speed Wired Data Collection

Detailed Design – System I/O SpecificationRemote inputs include two voltage

signals at 5Vpk and two current signals at 20mApk.

Local inputs include a signal to start recording data, a signal to stop recording data, and a path and file name to save the sample data.

Local output consists of a single .CSV file per experimental trial.

Page 17: High Speed Wired Data Collection

Detailed Design – Module I/O SpecificationRemote device shall output a

modulated signal representing experimental data and timing information.

This signal shall be received by the local device, which shall demodulate and push data to a USB transceiver.

A USB transceiver shall then transmit data to a Windows XP PC with proper drivers and data acquisition program.

Page 18: High Speed Wired Data Collection

Detailed Design – User Interface SpecificationThe remote device shall

continuously transmit sample data until device destruction or termination of power supply.

The local device shall continuously collect data until remote termination.

A command-line Windows XP program will read data from the local device and save output in .CSV format.

Page 19: High Speed Wired Data Collection

Detailed Design – Hardware SpecificationADC:Texas Instruments TLC5510Parity error detection encoding and

decoding: Texas Instruments HC280Modulation – multiplexers from Analog

Devices: ADG732, ADG1608, and AD8180.

Cable – one of: Cat-3 UTP, Cat-5e UTP, Cat-6 UTP, RG-59 coaxial, RG-6 coaxial. Clock signal shall be generated by Texas Instruments CDCE913

USB Transceiver: SMSC USB3317

Page 20: High Speed Wired Data Collection

Detailed Design – Software SpecificationDriver for USB device written in C

using Microsoft Driver Kit 7.1.0Command-line data acquisition

program to read data from USB device and export to .CSV

Page 21: High Speed Wired Data Collection

Testing Plan – Unit TestingIn this phase we will be making

sure that all components (e.g. sensors, ADCs, transceivers, etc) are behaving according to individual specifications.

This will be accomplished by providing various input voltages while monitoring output(s).

Page 22: High Speed Wired Data Collection

Testing Plan – Integration TestingIn this phase we will put each

individual component together and see if they can interface with one another without problems.

Hardware from a single manufacturer may interface more smoothly than from multiple sources.

Page 23: High Speed Wired Data Collection

Testing Plan – System TestingIn this phase we will test the

entire system simulating the crash at the end by either disconnecting the cable or shorting all transmitting conductors together.

Page 24: High Speed Wired Data Collection

Testing Plan – Sample Test Cases300 foot spool of cable Prototype transmitting and

receiving boards at either endInput voltages and currents are

stepped Output verified on Windows PC

Page 25: High Speed Wired Data Collection

Evaluation Plan – Simulation, Modeling, PrototypingPerformance Metrics

Success will be determined initially at testing if the prototype system meets the speed and accuracy requirements. Moreover, at the Demonstration the device must work and the production cost of future modules must be within the budget of $100ea.

Page 26: High Speed Wired Data Collection

Evaluation Plan – Simulation, Modeling, PrototypingValidation Means

There will be a demonstration on site in Kansas City Honeywell Plan to exhibit the functionality of our system. The collected/transferred data will be displayed via spreadsheet program on PC in .CSV format for verification.

Page 27: High Speed Wired Data Collection

Conclusion – Current StatusDifferent modulation schemes

were considered and, consequently we are behind schedule.

Parts will be ordered this summer and assembled for the beginning of Fall semester.

Page 28: High Speed Wired Data Collection

Conclusion – Task Responsibility / Contributions

Planned ContributionsName Define Select Design Implement Test Document Demo Report Total Hours

Zachary Coffin 10% 25% 40% 40% 20% 20% 25% 50% 200.25Radell Young 25% 50% 30% 30% 40% 30% 40% 20% 200.25Mazdee Masud 65% 25% 30% 30% 40% 50% 35% 30% 199.5Total Hours 25 75 150 115 70 20 70 75 600

Page 29: High Speed Wired Data Collection

Conclusion – Plan for Next SemesterModules will be assembled and

tested throughout the semester. New sets of modulation chips

may be necessary to implement an alternative transmission scheme.

Page 30: High Speed Wired Data Collection

Questions / Answers