HMC463LP5 463LP5E - Analog Devices · 2019. 6. 5. · 5 mm × 5 mm Body and 0.90 mm Package Height (HCP-32-1) Dimensions shown in millimeters. Fo rice elivery n lac rders nalo evices

For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106Phone: 781-329-4700 • Order online at www.analog.com

Application Support: Phone: 1-800-ANALOG-D

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HMC463LP5 / 463LP5EGaAs pHEMT MMIC LOW NOISE

AGC AMPLIFIER, 2 - 20 GHz

v09.0717

General Description

Features

Functional Diagram

The HMC463LP5(E) is a GaAs MMIC pHEMT Low Noise AGC Distributed Amplifier packaged in a lead-less 5x5 mm surface mount package which oper-ates between 2 and 20 GHz. The amplifier provides 13 dB of gain, 2.8 dB noise figure and 18 dBm of output power at 1 dB gain compression while requiring only 60mA from a +5V supply. An optional gate bias (Vgg2) is provided to allow Adjustable Gain Control (AGC) of 8 dB typical. Gain flatness is excellent at ±0.5 dB from 6 - 18 GHz making the HMC463LP5(E) ideal for EW, ECM RADAR and test equipment appli-cations. The HMC463LP5(E) LNA I/Os are internally matched to 50 Ohms and are internally DC blocked.

Gain: 13 dB

Noise Figure: 2.8 dB @ 10 GHz

P1dB Output Power: +18 dBm @ 10 GHz

Supply Voltage: +5V @ 60mA

50 Ohm Matched Input/Output

32 Lead 5x5mm SMT Package: 25mm²

Typical ApplicationsThe HMC463LP5(E) is ideal for:

• Telecom Infrastructure

• Microwave Radio & VSAT

• Military EW, ECM & C3I

• Test Instrumentation

• Fiber Optics

Electrical Specifications, TA = +25 °C, Vdd = 5V, Idd = 60 mA*

Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Units

Frequency Range 2 - 6 6 - 18 18 - 20 GHz

Gain 10 13 9 12 8 11 dB

Gain Flatness ±0.5 ±0.5 ±0.5 dB

Gain Variation Over Temperature 0.010 0.015 0.010 0.015 0.010 0.015 dB/ °C

Noise Figure 3 4 3 5 5.5 6.5 dB

Input Return Loss 15 13 12 dB

Output Return Loss 13 10 10 dB

Output Power for 1 dB Compression (P1dB)

16 19 11 16 10 12 dBm

Saturated Output Power (Psat) 21 19 19 dBm

Output Third Order Intercept (IP3) 30 24 22 dBm

Supply Current(Idd) (Vdd = 5V, Vgg1 = -0.9V Typ.)

60 80 60 80 60 80 mA

* Adjust Vgg1 between -2 to -0V to achieve Idd = 60 mA typical.

For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106Phone: 781-329-4700 • Order online at www.analog.comApplication Support: Phone: 1-800-ANALOG-D

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.



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Output Return Loss vs. Temperature

Gain & Return Loss Gain vs. Temperature

Reverse Isolation vs. Temperature

Input Return Loss vs. Temperature

Noise Figure vs. Temperature

-30

-25

-20

-15

-10

-5

0

5

10

15

20

0 2 4 6 8 10 12 14 16 18 20 22

S21S11S22

RE

SP

ON

SE

(dB

)

FREQUENCY (GHz)

0

4

8

12

16

20

0 2 4 6 8 10 12 14 16 18 20 22

+25C+85C -40C

GA

IN (

dB)

FREQUENCY (GHz)

-30

-25

-20

-15

-10

-5

0

0 2 4 6 8 10 12 14 16 18 20 22

+25C+85C -40C

RE

TU

RN

LO

SS

(dB

)

FREQUENCY (GHz)

-20

-15

-10

-5

0

0 2 4 6 8 10 12 14 16 18 20 22

+25C+85C -40C

RE

TU

RN

LO

SS

(dB

)

FREQUENCY (GHz)

-60

-50

-40

-30

-20

-10

0

0 2 4 6 8 10 12 14 16 18 20 22

+25C+85C -40C

ISO

LAT

ION

(dB

)

FREQUENCY (GHz)

0

2

4

6

8

10

0 2 4 6 8 10 12 14 16 18 20 22

+25C+85C -40C

NO

ISE

FIG

UR

E (

dB)

FREQUENCY (GHz)

HMC463LP5 / 463LP5Ev09.0717

GaAs pHEMT MMIC LOW NOISEAGC AMPLIFIER, 2 - 20 GHz



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P1dB vs. Temperature Psat vs. Temperature

Output IP3 vs. TemperatureGain, Power & Noise Figurevs. Supply Voltage @ 10 GHz, Fixed Vgg1

Gain, P1dB & Output IP3vs. Control Voltage @ 10 GHz

Noise Figure & Supply Currentvs. Control Voltage @ 10 GHz

6

10

14

18

22

26

0 2 4 6 8 10 12 14 16 18 20 22

+25C+85C -40C

P1d

B (

dBm

)

FREQUENCY (GHz)

6

10

14

18

22

26

0 2 4 6 8 10 12 14 16 18 20 22

+25C+85C -40C

Psa

t (dB

m)

FREQUENCY (GHz)

14

17

20

23

26

29

32

0 2 4 6 8 10 12 14 16 18 20 22

+25C+85C -40C

IP3

(dB

m)

FREQUENCY (GHz)

6

8

10

12

14

16

18

20

22

24

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

4.5 5 5.5

GainP1dBPsatNOISE FIGUREG

AIN

(dB

), P

1dB

(dB

m),

Psa

t (dB

m)

NO

ISE

FIG

UR

E (dB

)

Vdd (V)

20

25

30

35

40

45

50

55

60

65

70

75

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

5.5

-1.4 -1.2 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1

Idd NOISE FIGURE

Idd

(mA

)

NO

ISE

FIG

UR

E (dB

)

Vgg2 (V)

-4

0

4

8

12

16

20

24

28

32

-1.4 -1.2 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1

GainP1dBIP3G

AIN

(dB

), P

1dB

(dB

m),

IP3

(dB

m)

Vgg2 (V)

HMC463LP5 / 463LP5Ev09.0717




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Absolute Maximum RatingsDrain Bias Voltage (Vdd) +9V

Gate Bias Voltage (Vgg1) -2 to 0V

Gate Bias Current (Igg1) 2.5 mA

Gate Bias Voltage (Vgg2)(AGC) (Vdd -9) Vdc to +2V

RF Input Power (RFIN)(Vdd = +5V) +18 dBm

Channel Temperature 150 °C

Continuous Pdiss (T= 85 °C)(derate 19.1 mW/°C above 85 °C)

1.24 W

Thermal Resistance(channel to ground paddle)

52.3 °C/W

Storage Temperature -65 to +150 °C

Operating Temperature -40 to +85 °C

ESD Sensitivity (HBM)Class 0B - Passed 150V

Vdd (V) Idd (mA)

+4.5 58

+5.0 60

+5.5 62

Typical Supply Current vs. Vdd

Gain @ Several Control Voltages (Vgg2)

-12

-7

-2

3

8

13

18

0 2 4 6 8 10 12 14 16 18 20 22

Vgg2 = -1.3VVgg2 = -1.2VVgg2 = -1.1VVgg2 = -1.0VVgg2 = -0.9V

Vgg2 = -0.8VVgg2 = -0.6VVgg2 = -0.4VVgg2 = -0.2VVgg2 = 0V

GA

IN (

dB)

FREQUENCY (GHz)

ELECTROSTATIC SENSITIVE DEVICEOBSERVE HANDLING PRECAUTIONS

HMC463LP5 / 463LP5Ev09.0717




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Part Number Package Body Material Lead Finish MSL Rating Package Marking [3]

HMC463LP5 Low Stress Injection Molded Plastic Sn/Pb Solder MSL1 [1]H463XXXX

HMC463LP5E RoHS-compliant Low Stress Injection Molded Plastic 100% matte Sn MSL1 [2]H463XXXX

[1] Max peak reflow temperature of 235 °C[2] Max peak reflow temperature of 260 °C[3] 4-Digit lot number XXXX

Package Information

HMC463LP5 / 463LP5Ev09.0717


Outline Drawing32-Lead Lead Frame Chip Scale Package [LFCSP]

5 x 5 mm Body and 0.90 mm Package Height(HCP-32-1)

Dimensions shown in millimeters

03-0

9-20

17-B

1

0.50BSC

BOTTOM VIEWTOP VIEW

PIN 1INDICATOR

32

916

17

2425

8

EXPOSEDPAD

SEATINGPLANE

0.05 MAX0.02 NOM

0.20 REF

COPLANARITY0.08

0.300.250.18

5.105.00 SQ4.90

0.900.850.80

0.450.400.35

0.20 MIN

3.803.70 SQ3.60

COMPLIANT TO JEDEC STANDARDS MO-220-VHHD-4.PKG-0

0489

8

3.50 REF

PIN 1INDICATOR AREA OPTIONS(SEE DETAIL A)

DETAIL A(JEDEC 95)

FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET.

32-Lead Lead Frame Chip Scale Package [LFCSP]5 mm × 5 mm Body and 0.90 mm Package Height

(HCP-32-1)Dimensions shown in millimeters



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Pin Number Function Description Interface Schematic

1, 3, 4, 6-14, 16-20, 22-29,

31, 32N/C

The pins are not connected internally; however, all data shown herein was measured with these pins connected to

RF/DC ground externally.

2 Vgg2Optional gate control if AGC is required.

Leave Vgg2 open circuited if AGC is not required.Typical Vgg2 = -1.5V to 0V

5 RFIN This pad is AC coupled and matched to 50 Ohms

15 Vgg1 Gate control for amplifier. Adjust to achieve Idd = 60mA.

21 RFOUT This pad is AC coupled and matched to 50 Ohms

30 VddPower supply voltage for the amplifier.

External bypass capacitors are required

Ground Paddle

GND Ground paddle must be connected to RF/DC ground.

Pin Descriptions

HMC463LP5 / 463LP5Ev09.0717




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HMC463LP5 / 463LP5Ev09.0717


Application Circuit



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HMC463LP5 / 463LP5Ev09.0717


Evaluation PCB

The circuit board used in the application should use RF circuit design techniques. Signal lines should have 50 Ohm impedance while the package ground leads and package bottom should be connected directly to the ground plane similar to that shown. A sufficient number of via holes should be used to connect the top and bottom ground planes. The evaluation board should be mounted to an appropriate heat sink. The evaluation circuit board shown is available from Analog Devices upon request.

List of Materials for Evaluation PCB 108341 [1]

Item Description

J1 - J2 SRI K Connector

J3 - J4 2 mm Molex Header

C1 - C3 100 pF Capacitor, 0402 Pkg.

C4 - C6 1000 pF Capacitor, 0603 Pkg.

C7 - C8 4.7 µF Capacitor, Tantalum

U1 HMC463LP5(E) Amplifier

PCB [2] 109949 Evaluation PCB

[1] Reference this number when ordering complete evaluation PCB

[2] Circuit Board Material: Rogers 4350 or Arlon 25FR

Documents

HMC463LP5 463LP5E - Analog Devices · 2019. 6. 5. · 5 mm × 5 mm Body and 0.90 mm Package Height (HCP-32-1) Dimensions shown in millimeters. Fo rice elivery n lac rders nalo evices