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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
Cover Sheet
Custom
1 58Friday, April 15, 2005
2005/03/11 2006/03/11
2005-04-15
EPW00 Schematics Document
Mobile AMD Athlon 64 with ATI RS480M+ATI SB400
REV:0.5
Compal confidential
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B
C
C
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D
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1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
Block Diagram
Custom
2 58Friday, April 15, 2005
2005/03/01 2006/03/11
PCI BUS
LPC BUS
USB conn X3
754-pin
CardBus & 1394Controller
ATI-RS480M
Compal confidential
page 33
File Name : LA-2541
Mobile AMD Athlon 64
Power Circuit DC/DC
DC/DC Interface CKT.
HDDConnector
Power On/Off CKT.
TI 7611Mini PCIsocket
705 BGA
Thermal SensorADM1032
Fan Control
IDSEL:AD20(PIRQE#/F#,GNT#2,REQ#2)
AC-LINK
CDROM Connector
USB2.0
Primary IDE
Secondary IDE
SPR Conn.
page 39
*RJ11 Conn*RJ45 Conn*Line IN Jack*Line OUT Jack*PS/2x2*Parallel Port *Serial Port *CRT *TV-OUT*PCI Express*USB x2
3.3V 33 MHz
Power OK CKT.
RTC CKT.
ATA-100
ATA-100
Audio CKT
page 33BT Conn
AMP & Audio Jackpage 31page 18,19,20,21
page 27
BCM5788M
RJ45 CONN
LAN
page 26
Int.KBD
EC SMSCLPC47N250
Touch PadCONN
HT 16x16 1000MHZ
page 4, 5, 6, 7
page 34
page 34page 23,24
page 29
page 28
page 37
page 4
page 4
page 40
page 38
page 41
page 33
page 40~47
IDSEL:AD18(PIRQH#,GNT#1,REQ#1)
IDSEL:AD17(PIRQG#,GNT#3,REQ#3)
A-Link Express2 x PCIE
ATI-SB400
page 11, 12, 13, 14
564 BGA
Clock GeneratorICS 951418
page 15
CRT & TV OUT
LVDS PanelInterface
page 16
page 17
page 24
Slot 0
page 23
Card reader
page 18
page 30
MODEM
New CardConnector
page 251 x PCIE
RJ11 CONN
BANK 0, 1, 2, 3DDR-SO-DIMM X2DDR1 -333
page 8,9,10
Single Channel
page 23
1394CONN
page 38
SUPER I/OLPC47N217
page 36
page 30,39
Finger printpage 33
Memory BUS(DDR)
BIOSpage 38
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
Notes List
Custom
3 58Friday, April 15, 2005
2005/03/01 2006/03/11
PCI Devices
Voltage Rails
X
AC97 MODEM
INTERNAL
EXTERNAL IDSEL #
PIRQ
REQ/GNT #
DEVICE
+1.2V_HT
State
S0
+5VALW
+3VALW
O
S1
+5VS
S5 S4/AC
S5 S4/AC don't exist
+5V
+3VSpowerplane
+1.25V+1.5VS
S3
+2.5V
IDE
AC97 AUDIO
CARD BUS & 1394L AN
+2.5VDDA
Mini-PCI
+2.5VS
O MEANS ON
X MEANS OFF
X X
XX
AD20
O O
AD17
O
O
O
O
O O
1
23
E, FH
+1.8VALW
+1.8VS
+CPU_CORE
SMBUS
LPC I/FPCI to PCI
OHCI#1 USBOHCI#1 USBEHCI USBSATA#1SATA#2
BB
A
DDD
GAD18
AA
Symbol note:
:means digital ground.
:means analog ground.
:means reserved(un-mount).@
Only +3VL ON
:means populate for BCM4401 only.4401@
5788@ :means populate for BCM5788M only.
:means populate for PCI7611 only.7611@
4510@ :means populate for PCI4510 only.
+RS480_Core
Normal operation
KBC Internal ROM flashPJ1PJ3PJ4PJ5PJ6PJ7PJ8PJ9
PJ11PJ12PJ14
J1J2J3J4J5J6J7J8J9
Comment
+3VALW+3VL
+1.8VALW+5VALW
+1.5VS+2.5V
+1.25V+1.2V_HT
For ATEFor ATE
Clear CMOSFor ATEFor ATEFor ATEFor ATEFor ATE
Short PadShort Pad
No Short Pad
Short PadShort PadShort Pad
Short PadShort PadShort PadShort PadShort PadShort PadShort PadShort Pad
Short PadShort PadShort PadShort PadShort PadShort PadShort PadShort PadShort PadShort PadShort Pad
No Short PadNo Short PadNo Short Pad
No Short Pad No Short PadShort PadNo Short Pad
No Short Pad Short PadNo Short Pad Short Pad
Short Pad No Short PadNo Short Pad Short Pad
Jump
+RS480_Core
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
H_CADOP6H_CADON7
H_CLKIN0
H_CADOP14
H_CADOP9
H_CADOP3
H_CADON13
H_CADON8H_CADOP7
H_CADON9
H_CADON10
H_CADON3
H_CADON0
H_CLKIP0
H_CADOP8
H_CADOP0
H_CADON6
H_CLKIN1
H_CTLON0
H_CADOP10
H_CADON4
H_CTLOP0
H_CADOP13
H_CADOP4
H_CADON2
H_CTLIN0
H_CADOP15
H_CADOP5
H_CADON1
H_CADON15
H_CLKIP1
H_CADON11
H_CADOP2
H_CADON14
H_CADON5
H_CADIP15H_CADIN15
H_CADIN14
H_CADIN13
H_CADIP14
H_CADIP13
H_CADIN12
H_CADIN11
H_CADIN10
H_CADIP11
H_CADIP10
H_CADIP12
H_CADIN9
H_CADIN8
H_CADIN7
H_CADIP8
H_CADIP7
H_CADIP9
H_CADIN6
H_CADIN5
H_CADIN4
H_CADIP5
H_CADIP4
H_CADIP6
H_CADIN3
H_CADIN2
H_CADIN1
H_CADIP2
H_CADIP1
H_CADIP3
H_CADIN0H_CADIP0
H_CADIP[0..15]H_CADIN[0..15]
H_CADOP11
H_CADOP12H_CADON12
H_CADOP1
H_CADOP[0..15]H_CADON[0..15]
LDTSTOP#
LVREF1
H_CLKON1H_CLKOP1
H_CLKOP0H_CLKON0
H_CTLIP0H_CTLIN1H_CTLIP1
THERM#
FAN
LVR
EF0
THERM#
THERMDA_CPU
THERMDC_CPU
THERMDC_CPU
THERMDA_CPU
THERM_SCI#
H_CADIP[0..15]<11>
H_CTLOP0 <11>
H_CLKOP1 <11>H_CLKIN1<11>
H_CLKON0 <11>
H_CLKON1 <11>
H_CLKIN0<11>H_CLKIP0<11>
H_CTLIN0<11>
H_CLKIP1<11>
H_CADON[0..15] <11>H_CADIN[0..15]<11>
H_CTLON0 <11>
H_CLKOP0 <11>
H_CADOP[0..15] <11>
LDTSTOP# <13,18>
H_CTLIP0<11>
FAN_PWM<38>
THERMDA_CPU <6>
THERMDC_CPU <6>
SB_SDAT <8,9,15,19>
SB_SCLK <8,9,15,19>
THERM_SCI# <19>
+1.2V_HT
+1.2V_HT
+2.5VS
+5VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
Claw Harmmer CPU (Host Bus)
Custom
4 58Friday, April 15, 2005
2005/03/01 2006/03/11
PWM Fan Control circuit
W=15mil
Thermal SensorADM1032
R347 44.2_0603_1%12
R350
44.2_0603_1%
12
HTT Interface
Claw Hammer-DTR
U10A
FOX_PZ75403-2941-42
L0_CADOUT_L0 F29
L0_CADOUT_L1 F27
L0_CADOUT_L2 H29
L0_CADOUT_L3 H27
L0_CADOUT_L4 K27
L0_CADOUT_L5 M29
L0_CADOUT_L6 M27
L0_CADOUT_L7 P29
L0_CADOUT_L8 E27
L0_CADOUT_L9 F25
L0_CADOUT_L10 G27
L0_CADOUT_L11 H25
L0_CADOUT_L12 K25
L0_CADOUT_L13 L27
L0_CADOUT_L14 M25
L0_CADOUT_L15 N27
L0_CADOUT_H0 E29
L0_CADOUT_H1 F28
L0_CADOUT_H2 G29
L0_CADOUT_H3 H28
L0_CADOUT_H4 K28
L0_CADOUT_H5 L29
L0_CADOUT_H6 M28
L0_CADOUT_H7 N29
L0_CADOUT_H8 E26
L0_CADOUT_H9 E25
L0_CADOUT_H10 G26
L0_CADOUT_H11 G25
L0_CADOUT_H12 J25
L0_CADOUT_H13 L26
L0_CADOUT_H14 L25
L0_CADOUT_H15 N26
L0_CLKOUT_L0 K29
L0_CLKOUT_L1 J27L0_CLKOUT_H0 J29
L0_CLKOUT_H1 J26
L0_CTLOUT_L0 P27
L0_CTLOUT_L1 P25L0_CTLOUT_H0 P28
L0_CTLOUT_H1 N25
L0_CADIN_L0AD28
L0_CADIN_L1AC29
L0_CADIN_L2AB28
L0_CADIN_L3AA29
L0_CADIN_L4W29
L0_CADIN_L5V28
L0_CADIN_L6U29
L0_CADIN_L7T28
L0_CADIN_L8AC25
L0_CADIN_L9AC26
L0_CADIN_L10AA25
L0_CADIN_L11AA26
L0_CADIN_L12W26
L0_CADIN_L13U25
L0_CADIN_L14U26
L0_CADIN_L15R25
L0_CADIN_H0AD27
L0_CADIN_H1AD29
L0_CADIN_H2AB27
L0_CADIN_H3AB29
L0_CADIN_H4Y29
L0_CADIN_H5V27
L0_CADIN_H6V29
L0_CADIN_H7T27
L0_CADIN_H8AD25
L0_CADIN_H9AC27
L0_CADIN_H10AB25
L0_CADIN_H11AA27
L0_CADIN_H12W27
L0_CADIN_H13V25
L0_CADIN_H14U27
L0_CADIN_H15T25
L0_CLKIN_L0Y28
L0_CLKIN_L1W25L0_CLKIN_H0Y27
L0_CLKIN_H1Y25
L0_CTLIN_L0R29
L0_CTLIN_L1R26L0_CTLIN_H0T29
L0_CTLIN_H1R27
L0_REF1AF27L0_REF0AE26 LDTSTOP_L AJ27
R354 49.9_0402_1%1 2
C202
2200P_0402_50V7K
R353 49.9_0402_1%1 2
C199
0.1U_0402_16V4Z1
2
R336 1.2K_0402_5%1 2
R124
10K_0402_5%
12
JP7
ACES_85205-0200
12
U28
TC7SH00FU_SSOP5
INB1
INA2 O 4
G3
P5
S
GD Q28
SI3456DV-T1_TSOP63
624
51
C400
0.1U_0402_16V4Z
1
2
U11
ADM1032AR_SOP8
VDD1
ALERT# 6
THERM#4 GND 5
D+2
D-3
SCLK 8
SDATA 7
C399
4.7U_0805_10V4Z
1
2
D21
RB751V_SOD323
21
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDR_SDM6DDR_SDM5DDR_SDM4
DDR_SDM7
DDR_SDM3DDR_SDM2DDR_SDM1DDR_SDM0
DDR_SDQS7DDR_SDQS6DDR_SDQS5DDR_SDQS4DDR_SDQS3
DDR_SDQS1DDR_SDQS2
DDR_SDQS0
DDR_SDQ63DDR_SDQ62DDR_SDQ61DDR_SDQ60DDR_SDQ59DDR_SDQ58DDR_SDQ57DDR_SDQ56DDR_SDQ55DDR_SDQ54
DDR_SDQ51DDR_SDQ52DDR_SDQ53
DDR_SDQ50
DDR_SDQ47DDR_SDQ46
DDR_SDQ49DDR_SDQ48
DDR_SDQ45
DDR_SDQ43DDR_SDQ44
DDR_SDQ39DDR_SDQ38
DDR_SDQ42DDR_SDQ41
DDR_SDQ37
DDR_SDQ40
DDR_SDQ36
DDR_SDQ33DDR_SDQ32DDR_SDQ31DDR_SDQ30
DDR_SDQ35
DDR_SDQ29
DDR_SDQ34
DDR_SDQ28DDR_SDQ27
DDR_SDQ24
DDR_SDQ22
DDR_SDQ26
DDR_SDQ23
DDR_SDQ25
DDR_SDQ21DDR_SDQ20DDR_SDQ19DDR_SDQ18
DDR_SDQ16DDR_SDQ17
DDR_SDQ12
DDR_SDQ15
DDR_SDQ11DDR_SDQ10
DDR_SDQ14DDR_SDQ13
DDR_SDQ9
DDR_SDQ2
DDR_SDQ8
DDR_SDQ1
DDR_SDQ7DDR_SDQ6DDR_SDQ5DDR_SDQ4DDR_SDQ3
DDR_SDQ0
MEMZNMEMZP
DDR_CLK4#DDR_CLK4DDR_CLK5#DDR_CLK5
DDR_SCS#3DDR_SCS#2DDR_SCS#1DDR_SCS#0
DDR_SMAA12
DDR_SMAA0DDR_SMAA1DDR_SMAA2DDR_SMAA3DDR_SMAA4DDR_SMAA5DDR_SMAA6DDR_SMAA7DDR_SMAA8DDR_SMAA9DDR_SMAA10DDR_SMAA11
DDR_SMAA13
DDR_CLK6#DDR_CLK6DDR_CLK7#DDR_CLK7
DDR_CKE0DDR_CKE1
DDR_CLK4DDR_CLK5#
DDR_CLK6
DDR_CLK4#
DDR_CLK6#DDR_CLK7#DDR_CLK7
DDR_CLK5
DDR_SMAB12
DDR_SMAB0DDR_SMAB1DDR_SMAB2DDR_SMAB3DDR_SMAB4DDR_SMAB5DDR_SMAB6DDR_SMAB7DDR_SMAB8DDR_SMAB9DDR_SMAB10DDR_SMAB11
DDR_SMAB13
DDR_SDQS[0..7]<8>
DDR_SDM[0..7]<8>
DDR_SDQ[0..63]<8>
DDR_CLK5 <8>DDR_CLK5# <8>DDR_CLK4 <9>DDR_CLK4# <9>
DDR_SRASA# <8>DDR_SCASA# <8>DDR_SWEA# <8>
DDR_SBSA1 <8>DDR_SBSA0 <8>
DDR_SMAA[0..13] <8>
DDR_CLK7 <8>DDR_CLK7# <8>DDR_CLK6 <9>DDR_CLK6# <9>
DDR_CKE0 <8>DDR_CKE1 <9>
DDR_SCS#0 <8>DDR_SCS#1 <8>DDR_SCS#2 <9>DDR_SCS#3 <9>
DDR_SRASB# <9>DDR_SCASB# <9>DDR_SWEB# <9>
DDR_SBSB1 <9>DDR_SBSB0 <9>DDR_SMAB[0..13] <9>
+2.5V
+1.25VREF_CPU
+2.5V+1.25VREF_CPU
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
Claw Harmmer (Memory Bus)
Custom
5 58Friday, April 15, 2005
2005/03/01 2006/03/11
DDR_CLK5/5# & DDR_CLK7/7# route to nearest DIMMDDR_CLK4/4# & DDR_CLK6/6#route to farthest DIMM
within 1.00"
50 mil width
R92 120_0402_5%
1 2
C418
0.1U_0402_16V4Z
1
2
R83 120_0402_5%
1 2
R326
1K_0402_1%
12DDR Memory
A CH
ANGE
L AD
DRES
SB
CHAN
GEL
ADDR
ESS
Claw Hammer-DTR
U10B
FOX_PZ75403-2941-42
MEMCKEA AE8MEMCKEB AE7
MEMCLK_L0 P4
MEMCLK_L1 P5
MEMCLK_L2 K4
MEMCLK_L3 V4
MEMCLK_L4 AE10
MEMCLK_L5 AG8
MEMCLK_L6 E11
MEMCLK_L7 C10
MEMCLK_H0 P3
MEMCLK_H1 R5
MEMCLK_H2 K5
MEMCLK_H3 V3
MEMCLK_H4 AF10
MEMCLK_H5 AF8
MEMCLK_H6 E12
MEMCLK_H7 D10
MEMCS_L0 E5MEMCS_L1 C4MEMCS_L2 E6MEMCS_L3 D6MEMCS_L4 E7MEMCS_L5 E8MEMCS_L6 C8MEMCS_L7 D8
MEMRASA_L H5
MEMWEA_L G5MEMCASA_L D4
MEMBANKA0 H3MEMBANKA1 K3
MEMDATA0AJ16 MEMDATA1AJ14 MEMDATA2AJ12 MEMDATA3AG11 MEMDATA4AJ15 MEMDATA5AH15 MEMDATA6AJ11 MEMDATA7AH11 MEMDATA8AJ10 MEMDATA9AJ9 MEMDATA10AH5 MEMDATA11AG5 MEMDATA12AH9 MEMDATA13AJ7 MEMDATA14AJ6 MEMDATA15AJ5 MEMDATA16AJ3 MEMDATA17AH3 MEMDATA18AF1 MEMDATA19AE2 MEMDATA20AJ4 MEMDATA21AG3 MEMDATA22AE3 MEMDATA23AE1 MEMDATA24AD1 MEMDATA25AC2 MEMDATA26Y1 MEMDATA27W2 MEMDATA28AC3 MEMDATA29AC1 MEMDATA30W3 MEMDATA31W1 MEMDATA32M1 MEMDATA33L2 MEMDATA34J2 MEMDATA35G3 MEMDATA36L1 MEMDATA37L3 MEMDATA38G1 MEMDATA39G2 MEMDATA40F1 MEMDATA41E3 MEMDATA42B3 MEMDATA43A3 MEMDATA44E1 MEMDATA45E2 MEMDATA46A4 MEMDATA47C5 MEMDATA48B5 MEMDATA49A5 MEMDATA50A9 MEMDATA51C11 MEMDATA52A6 MEMDATA53C7 MEMDATA54B9 MEMDATA55A10 MEMDATA56A11 MEMDATA57C13 MEMDATA58A15 MEMDATA59A17 MEMDATA60B11 MEMDATA61A12 MEMDATA62B15 MEMDATA63A16
MEMDQS0AJ13 MEMDQS1AJ8 MEMDQS2AJ2 MEMDQS3AB1 MEMDQS4J1 MEMDQS5D1 MEMDQS6A8 MEMDQS7A14 MEMDQS8T1 MEMDQS9AH13 MEMDQS10AH7 MEMDQS11AG1 MEMDQS12AA1 MEMDQS13H1 MEMDQS14C2 MEMDQS15A7 MEMDQS16A13 MEMDQS17R1
MEMZND14MEMZPC14
MEMVREF1AG12
MEMADDA13 E10MEMADDA12 AE6MEMADDA11 AF3MEMADDA10 M5MEMADDA9 AE5MEMADDA8 AB5MEMADDA7 AD3MEMADDA6 Y5MEMADDA5 AB4MEMADDA4 Y3MEMADDA3 V5MEMADDA2 T5MEMADDA1 T3MEMADDA0 N5
MEMRASB_L H4MEMCASB_L F5MEMWEB_L F4
MEMBANKB1 L5MEMBANKB0 J5
MEMADDB_B13 E9MEMADDB_B12 AF6MEMADDB_B11 AF4MEMADDB_B10 M4MEMADDB_B9 AD5MEMADDB_B8 AC5MEMADDB_B7 AD4MEMADDB_B6 AA5MEMADDB_B5 AB3MEMADDB_B4 Y4MEMADDB_B3 W5MEMADDB_B2 U5MEMADDB_B1 T4MEMADDB_B0 M3
MEMCHECK7 N3MEMCHECK6 N1MEMCHECK5 U3MEMCHECK4 V1MEMCHECK3 N2MEMCHECK2 P1MEMCHECK1 U1MEMCHECK0 U2
R130 120_0402_5%
1 2
C413
1000P_0402_50V7K
1
2
R129 120_0402_5%
1 2
R36934.8_0603_1% 12
R320
1K_0402_1%
12
R37034.8_0603_1% 12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
H_RST#
H_PWRGD
VID0
SCANSHENB
BPSCLK
FBCLKOUT
TP_CPU_BP2
CLKIN
VDDIO_SENSE
TDI
TMS
CLAW_ANALOG2
+VDDA
TP_K8_AJ28
TDO
VID1
FBCLKOUT#
DBREQ#
H_PWRGD
CPU_COREFB#
TRST# SCANCLK2
TP_K8_C15
VTT_SENSETP_K8_A28
VID2
CLKIN#
SCANCLK1
CLAW_ANALOG3
H_RST_CPU#
VID4
TCK
SCANSHENA
BP0
TP_K8_C22
BRN#SINCHN
BPSCLK#
VID3
CLAW_ANALOG1
H_THERMTRIP_S#
SCANEN
BP1
TP_K8_AE24
D BRDY
CLAW_ANALOG0
TP_K8_D22
TP_CPU_BP3
TP_K8_AF24
CPU_COREFB
TRST#TDI
TCKD BRDY
TDO
DBREQ#
TMS
SCANSHENBSCANENSCANCLK1SCANCLK2
H_RST#
H_PWRGD
H_THERMTRIP_S# H_THERMTRIP#
H_RST_CPU#
VDDIOFB_LVDDIOFB_H
TP_M_RESET#
VID4<49>VID3<49>VID2<49>VID1<49>VID0<49>
CPUCLK0_H<15>
CPUCLK0_L<15>
CPU_COREFB<49>CPU_COREFB#<49>
THERMDC_CPU<4>
H_PWRGD<18>
THERMDA_CPU<4>
H_RST#<18>
H_THERMTRIP# <19>
MAINPWON <44,45,50>
+2.5V
+2.5VDDA
+2.5VS
+2.5VS
+1.2V_HT
+1.25V
+1.25V
+1.25V
+1.25V +1.25V
+1.2V_HT
+2.5VS
+2.5VS
+3VS +2.5VDDA
+2.5VS
+2.5VS
+3VALW
+3VALW
+2.5V+2.5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
Claw Harmmer (MISC)
Custom
6 58Friday, April 15, 2005
2005/03/01 2006/03/11
Place 169 Ohm within 0.5" from CPURoute as DIF 5/5/5/20
Place within 0.5" from CPURoute as 80 Ohm DIFF impedence 8/5/20
Route as DIFF pair 10/5/10
50 mils width
Near Power Supply
250 mil
T3PAD
T8 PAD
C90
4.7U_0805_6.3V6K
1
2
C4081U_0603_10V4Z1
2
C532
4.7U_0805_6.3V6K
1
2
C201
4.7U_0805_6.3V6K
1
2
C4170.001U_0402_50V7M@
1
2
+ C85
220U_D2_2.5VM
1
2
C58
4.7U_0805_6.3V6K
1
2
R368 680_0402_5%
1 2
C424
0.22U_0603_10V7K
1
2
R438560_0402_5%
@
12
R323 820_0402_5%1 2
R1321K_0402_5%
12
R322 820_0402_5%1 2
R445560_0402_5%@
12
T7 PAD
+ C222
220U_D2_2.5VM
1
2
C51
0.22U_0603_10V7K
1
2
C423
0.22U_0603_10V7K
1
2
R324 680_0402_5%
1 2
C425
0.22U_0603_10V7K
1
2
U29
G914E_SOT23-5@
IN1
GND2
SHDN3 BYP 4
OUT 5
L8LQG21F4R7N00_0805
1 2
C223
0.22U_0603_10V7K
1
2
T17 PAD
R127 680_0402_5%
1 2
C534
0.22U_0603_10V7K
1
2
C92
3300P_0402_50V7K
1
2
C434
0.22U_0603_10V7K
1
2
R444560_0402_5%
@
12
C88
0.22U_0603_10V7K
1
2
C91
4.7U_0805_6.3V6K
1
2
T18PAD
T5PAD
R435560_0402_5%
@
12
C55
4.7U_0805_6.3V6K
1
2
C230
4.7U_0805_6.3V6K
1
2
T16 PAD
R318
0_0805_5%
1 2
C535
0.22U_0603_10V7K
1
2
+ C436
100U_D2_10VM
1
2
R436560_0402_5%
@
12
T13 PAD
C415 3900P_0402_50V7K
12
R12610K_0402_5%
12
C231
4.7U_0805_6.3V6K
1
2
C225
4.7U_0805_6.3V6K
1
2R334 80.6_0402_1%
12
R319
100_0402_5%@
C224
0.22U_0603_10V7K
1
2
T12 PAD
R443560_0402_5%
@
12 Q8
MMBT3904_SOT23@
2
3 1
C53
4.7U_0805_6.3V6K
1
2
J3
JOPEN 12
Q9
MMBT3904_SOT23
2
3 1
T1PAD
JTAG
Miscellaneous
Clock
Debug
Claw Hammer-DTR
U10C
FOX_PZ75403-2941-42
NC B13NC B7NC C3NC K1NC R2NC AA3NC F3NC C23NC AG7NC AE22NC C24NC A25NC C9NC AE23NC AF23NC AF22NC AF21NC C1NC J3NC R3NC AA2NC D3NC AG2NC B18NC AH1NC AE21NC C20NC AG4NC C6NC AG6NC AE9NC AG9NC AF18NC AJ23NC AH23NC AE24NC AF24NC C15NC AG18NC AH18NC AG17NC AJ18NC C18NC A19NC D20NC C21NC D18NC C19NC B19
NC D22NC C22
TMSE20TCKE17TRST_LB21TDIA21
TDOA22
COREFB_HA23COREFB_LA24CORE_SENSEB23
THERMDAA26THERMDCA27
KEY1A28KEY0AJ28
RESET_LAF20
PWROKAE18
VLDT0_AD29VLDT0_AD27VLDT0_AD25VLDT0_AC28VLDT0_AC26VLDT0_AB29VLDT0_AB27
VLDT0_B AH29VLDT0_B AH27VLDT0_B AG28VLDT0_B AG26VLDT0_B AF29VLDT0_B AE28VLDT0_B AF25
VTT_AD17VTT_AA18VTT_AB17VTT_AC17VTT_AC16
VTT_B AG15VTT_B AF16VTT_B AG16VTT_B AH16VTT_B AJ17
VTT_SENSE AE13
THERMTRIP_LA20NC E13NC C12
NC E14NC D12
NC AG10
CLKIN_HAJ21CLKIN_LAH21FBCLKOUT_HAH19FBCLKOUT_LAJ19
VDDIOFB_HAE12VDDIOFB_LAF12VDDIO_SENSEAE11
VDDA1AH25VDDA2AJ25
VID4AG13VID3AF14VID2AG14VID1AF15VID0AE15
DBRDYAH17DBREQ_LAE19
T11 PAD
C406
0.01U_0402_16V7K@
1
2
C50
0.22U_0603_10V7K
1
2
C229
0.22U_0603_10V7K
1
2
T6 PAD
C416
470P_0402_50V7K@
1
2
R1251K_0402_5%@
12
C207
0.22U_0603_10V7K
1
2
C52
0.22U_0603_10V7K
1
2
T14 PAD
C89
0.22U_0603_10V7K
1
2T4PAD
C426
0.22U_0603_10V7K
1
2
C407
1U_0603_10V4Z@1
2
C226
4.7U_0805_6.3V6K
1
2
T10 PAD
R333 680_0402_5%
1 2
+ C84
100U_D2_10VM
1
2
R157 680_0402_5%
1 2
C433
0.22U_0603_10V7K
1
2
RP52
680_1206_8P4R_5%
1 82 73 64 5
T15 PAD
R441560_0402_5%@
12
C4143900P_0402_50V7K
12
R128 680_0402_5%
1 2
T9 PAD
C232
0.22U_0603_10V7K
1
2
R328 680_0402_5%
1 2
SAMTEC_ASP-68200-07
JP29
@
2468
101214161820222423
21191715131197531
26
R131
680_0402_5%
12
R335169_0402_1%
12
T2 PAD
R3250_0402_5% 1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+CPU_CORE
+CPU_CORE +2.5V
+2.5V+2.5V
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
Claw Harmmer (Power & Ground)
Custom
7 58Friday, April 15, 2005
2005/03/01 2006/03/11
Near Socket
CPU Decouping Capacitor
Bulk Cappacitance uF
Loop Bandwidth KHz
900023000
0.9m ohm50
2.5m ohm (AMD)
Total ESR
20
In Socket CavityClose to Socket
4 in Socket Cavity, 2 on backside under Socket
* 300 3300 1.5m ohm
C138
10U_0805_10V4Z
1
2
C544
4.7U_0805_6.3V6K
1
2
C479
0.22U_0603_10V7K
1
2
C148
0.22U_0603_10V7K
1
2
C154
10U_0805_10V4Z
1
2
C452
4.7U_0805_6.3V6K
1
2
C203
4.7U_0805_6.3V6K
1
2
C194
0.22U_0603_10V7K
1
2
C517
4.7U_0805_6.3V6K
1
2
C476
0.1U_0402_16V4Z
1
2
C136
0.22U_0603_10V7K
1
2
C126
10U_0805_10V4Z
1
2
POWER
U10E
FOX_PZ75403-2941-42
VSSB2VSSAH20VSSAB21VSSW22VSSM23VSSL24VSSAG25VSSAG27VSSD2VSSAF2VSSW6VSSY7VSSAA8VSSAB9VSSAA10VSSJ12VSSB14VSSY15VSSAE16VSSJ18VSSG20VSSR20VSSU20VSSW20VSSAA20VSSAC20VSSAE20VSSAG20VSSAJ20VSSD21VSSF21VSSH21VSSK21VSSM21VSSP21VSST21VSSV21VSSY21VSSAD21VSSAG21VSSB22VSSE22VSSG22VSSJ22VSSL22VSSN22VSSR22VSSU22VSSAG29VSSAA22VSSAC22VSSAG22VSSAH22VSSAJ22VSSD23VSSF23VSSH23VSSK23VSSP23VSST23VSSV23VSSY23VSSAB23VSSAD23VSSAG23VSSE24VSSG24VSSJ24VSSN24VSSR24VSSU24VSSW24VSSAA24VSSAC24VSSAG24VSSAJ24VSSB25VSSC25VSSB26VSSD26VSSH26VSSM26VSST26VSSY26VSSAD26VSSAF26VSSAH26VSSC27VSSB28VSSD28VSSG28
VSS L28VSS R28VSS W28VSS AC28VSS AF28VSS AH28VSS C29VSS F2VSS H2VSS K2VSS M2VSS P2VSS T2VSS V2VSS Y2VSS AB2VSS AD2VSS AH2VSS B4VSS AH4VSS B6VSS G6VSS J6VSS L6VSS N6VSS R6VSS U6VSS AA6VSS AC6VSS AH6VSS F7VSS H7VSS K7VSS M7VSS P7VSS T7VSS V7VSS AB7VSS AD7VSS B8VSS G8VSS J8VSS L8VSS N8VSS R8VSS U8VSS W8VSS AC8VSS AH8VSS F9VSS H9VSS K9VSS M9VSS P9VSS T9VSS V9VSS Y9VSS AD9VSS B10VSS G10VSS J10VSS L10VSS N10VSS R10VSS U10VSS W10VSS AC10VSS AH10VSS F11VSS H11VSS K11VSS Y11VSS AB11VSS AD11VSS B12VSS G12VSS AA12VSS AC12VSS AH12VSS F13VSS H13VSS K13VSS Y13VSS AB13VSS AD13VSS AF17VSS G14VSS J14VSS AA14VSS AC14VSS AE14VSS D16VSS E15VSSF15
VSSH15VSS K15VSS AB15VSS AD15VSS AH14VSS E16VSS G16VSS J16VSS AA16VSS AC16VSS AE29
VSS E18VSS F17VSS H17VSS K17VSS Y17
VSSAB17VSSAD17VSSB16VSSG18VSSAA18VSSAC18VSSD19VSSF19VSSH19VSSK19VSSY19VSSAB19VSSAD19VSSAF19VSSJ20VSSL20VSSN20
VSS AJ26
C487
0.22U_0603_10V7K
1
2
POWER
U10D
FOX_PZ75403-2941-42
VDDIO E4VDDIO G4VDDIO J4VDDIO L4VDDIO N4
VDDIO R4
VDDIO U4VDDIO W4VDDIO AA4VDDIO AC4VDDIO AE4VDDIO D5VDDIO AF5VDDIO F6VDDIO H6VDDIO K6VDDIO M6VDDIO P6VDDIO T6VDDIO V6VDDIO Y6VDDIO AB6VDDIO AD6VDDIO D7VDDIO G7VDDIO J7VDDIO AA7VDDIO AC7VDDIO AF7VDDIO F8VDDIO H8VDDIO AB8VDDIO AD8VDDIO D9VDDIO G9VDDIO AC9VDDIO AF9VDDIO F10VDDIO AD10VDDIO D11VDDIO AF11VDDIO F12VDDIO AD12VDDIO D13VDDIO AF13VDDIO F14VDDIO AD14VDDIO F16VDDIO AD16VDDIO D15
VDDL7VDDAC15VDDH18VDDB20VDDE21VDDH22VDDJ23VDDH24VDDF26VDDN7VDDL9VDDV10VDDG13VDDK14VDDY14VDDAB14VDDG15VDDJ15VDDAA15VDDH16VDDK16VDDY16VDDAB16VDDG17VDDJ17VDDAA17VDDAC17VDDAE17VDDF18VDDK18VDDY18VDDAB18VDDAD18VDDAG19VDDE19VDDG19VDDAC19VDDAA19VDDJ19VDDF20VDDH20VDDK20VDDM20VDDP20VDDT20VDDV20VDDY20VDDAB20VDDAD20VDDG21VDDJ21VDDL21VDDN21VDDR21VDDU21VDDW21VDDAA21VDDAC21VDDF22VDDK22VDDM22VDDP22VDDT22VDDV22VDDY22VDDAB22VDDAD22VDDE23VDDG23VDDL23VDDN23VDDR23VDDU23VDDW23VDDAA23VDDAC23VDDB24VDDD24VDDF24VDDK24VDDM24VDDP24VDDT24VDDV24VDDY24VDDAB24VDDAD24VDDAH24VDDAE25VDDK26VDDP26VDDV26
VDD U28VDD AA28VDD AE27VDD R7VDD U7VDD W7VDD K8VDD M8VDD P8VDD T8VDD V8VDD Y8VDD J9VDD N9VDD R9VDD U9VDD W9VDD AA9VDD H10VDD K10VDD M10VDD P10VDD T10VDD Y10VDD AB10VDD G11VDD J11VDD AA11VDD AC11VDD H12VDD K12VDD Y12VDD AB12VDD J13VDD AA13VDD AC13VDD H14
VDD N28
VDD AB26VDD E28VDD J28
C499
0.22U_0603_10V7K
1
2
C486
0.22U_0603_10V7K
1
2
C521
4.7U_0805_6.3V6K
1
2
C545
4.7U_0805_6.3V6K
1
2
+ C228
330U_D_2VM_R151
2
C498
0.22U_0603_10V7K
1
2
+ C217
820U_E9_2_5V_M_R71
2
C460
4.7U_0805_6.3V6K
1
2
C511
4.7U_0805_6.3V6K
1
2
C477
1000P_0402_50V7K
1
2
+ C227
330U_D_2VM_R15
1
2
C155
10U_0805_10V4Z1
2
C164
0.22U_0603_10V7K
1
2
C121
4.7U_0805_6.3V6K
1
2
C127
10U_0805_10V4Z1
2
+ C76
820U_E9_2_5V_M_R7
1
2
C137
10U_0805_10V4Z1
2
C200
0.22U_0603_10V7K
1
2
C124
0.22U_0603_10V7K
1
2
C478
0.22U_0603_10V7K
1
2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
DDR_SDQ[0..63]
DDR_SDQS[0..7]
DDR_SMAA[0..13]
DDR_SDM[0..7]
DDR_SCASA#
DDR_DQ43
DDR_DQ58
DDR_DQ44
DDR_SCS#1
DDR_DQ4
DDR_DQ55
DDR_SMAA2DDR_SMAA4
DDR_SMAA8
DDR_DQ8
DDR_DQS0
DDR_SBSA0
DDR_DQ1
DDR_DQ34
DDR_SMAA1DDR_SMAA3
DDR_DQ14
DDR_SMAA3
DDR_CKE0
DDR_SMAA5
DDR_DQS7
DDR_DQ50
DDR_SMAA11
DDR_SMAA13
DDR_SMAA7
DDR_DQ7
DDR_DQ46
DDR_DQ37
DDR_DM3
DDR_SWEA#
DDR_DQ12
DDR_SMAA2
DDR_SMAA8
DDR_DQ52
DDR_SRASA#
DDR_DQ16
DDR_DQ40
DDR_DQ32
DDR_SCS#0
DDR_SMAA7
DDR_DQ45
DDR_DQ61
DDR_DQ11
DDR_DM0
DDR_DQ9
DDR_SBSA1
DDR_DQ60
DDR_DQ39
DDR_DM2
DDR_DQS4
DDR_SMAA5
DDR_DQ26
DDR_DQ5
DDR_SMAA13
DDR_SWEA#
DDR_SMAA12
DDR_DQ62
DDR_DM6
DDR_DQS5
DDR_SMAA6
DDR_DQ23
DDR_DQ13
DDR_DQS2
DDR_DQS1
DDR_SMAA6
DDR_DQ57
DDR_DQ49DDR_DQ48
DDR_DQ30
DDR_DQ2
DDR_DQS3
DDR_SRASA#
DDR_SMAA0
DDR_SMAA1
DDR_SMAA11
DDR_DQ56
DDR_DQS6
DDR_DQ33
DDR_SMAA0
DDR_DQ3
DDR_SCS#1
DDR_DQ54
DDR_DQ35
DDR_SCASA#
DDR_CKE0
DDR_SCS#0
DDR_SBSA0
DDR_CKE0
DDR_DQ28
DDR_DQ18
DDR_DQ20
DDR_DM7
DDR_DQ51
DDR_DQ47
DDR_DQ29
DDR_DQ19
DDR_DQ17
DDR_DQ[0..63]
DDR_SMAA9
DDR_SMAA4
DDR_DQ53
DDR_DM5
DDR_DQ59
DDR_DQ31
DDR_DQ36
DDR_DQ15
DDR_DQ41
DDR_DM4
DDR_SBSA1
DDR_DQ21
DDR_SMAA10
DDR_DQ24
DDR_DQ0
DDR_DM[0..7]
DDR_SMAA10
DDR_DQ25
DDR_DQ22
DDR_DQ10
DDR_DQ6
DDR_DQ38
DDR_SMAA9DDR_SMAA12
DDR_DQS[0..7]
DDR_DQ63
DDR_DQ42
DDR_DM1
DDR_DQ27
DDR_SDQ18DDR_DQ22DDR_SDQ22DDR_DQ18
DDR_DQ23DDR_SDQ23DDR_DQ19DDR_SDQ19
DDR_SDQ28DDR_DQ25DDR_DQ28
DDR_SDQ25
DDR_DQ24DDR_DQ29
DDR_SDQ24DDR_SDQ29
DDR_DQS3DDR_DM3
DDR_DM0DDR_DQS0
DDR_SDQS3DDR_SDM3
DDR_DQ3DDR_DQ2
DDR_DQ7
DDR_SDQ14
DDR_DQ6
DDR_DQ11
DDR_DQ10DDR_SDQ10
DDR_SDQ11
DDR_SDQ7
DDR_DQ15DDR_SDQ15
DDR_DQ14
DDR_SDQ6
DDR_SDQ17DDR_SDQ21 DDR_DQ21
DDR_DQ20DDR_SDQ20
DDR_DQ17
DDR_SDQ30
DDR_DQ31
DDR_SDQ26
DDR_SDQ16 DDR_DQ16
DDR_DQ30DDR_SDQ27DDR_SDQ31
DDR_DQ27
DDR_SDQ8
DDR_DQ26
DDR_SDQ9DDR_DQ8DDR_DQ9
DDR_SDQ4DDR_SDQ5
DDR_SDQ0 DDR_DQ0DDR_DQ4
DDR_SDQ1
DDR_SDQ12
DDR_DQ1DDR_DQ5
DDR_DQ12DDR_DQ13DDR_SDQ13
DDR_SDQS1DDR_SDM1 DDR_DM1
DDR_DQS1
DDR_SDM2 DDR_DM2DDR_DQS2DDR_SDQS2
DDR_SDQ3
DDR_SDQS0DDR_SDQ2
DDR_SDM0
DDR_DQS6DDR_SDQS6DDR_DM6DDR_SDM6
DDR_SDQ50DDR_SDQ54
DDR_DQ50DDR_DQ54
DDR_DQ55DDR_DQ51
DDR_SDQ55DDR_SDQ51
DDR_DQ56DDR_SDQ56DDR_DQ60DDR_SDQ60
DDR_SDQ57DDR_SDQ61
DDR_DQ57DDR_DQ61
DDR_SDM7DDR_SDQS7 DDR_DQS7
DDR_DM7
DDR_DQS4DDR_SDM4 DDR_DM4DDR_SDQS4
DDR_DQ35DDR_SDQ34DDR_SDQ35
DDR_DQ34
DDR_SDQ39DDR_DQ38DDR_DQ39
DDR_SDQ38
DDR_DQ40DDR_SDQ40DDR_DQ41DDR_SDQ41
DDR_SDQ37
DDR_DQ33DDR_SDQ36 DDR_DQ36
DDR_DQ37DDR_SDQ32 DDR_DQ32
DDR_SDQ33
DDR_DM5DDR_DQS5
DDR_SDQ46DDR_SDQ42
DDR_SDM5
DDR_DQ47DDR_DQ42DDR_DQ46DDR_DQ43
DDR_SDQ44
DDR_SDQS5
DDR_SDQ43
DDR_SDQ47
DDR_DQ45
DDR_SDQ53
DDR_DQ52
DDR_SDQ45
DDR_SDQ49
DDR_DQ44
DDR_DQ49
DDR_SDQ48DDR_DQ53DDR_DQ48
DDR_SDQ52
DDR_SDQ58DDR_DQ62
DDR_SDQ63 DDR_DQ63DDR_DQ59
DDR_DQ58
DDR_SDQ59
DDR_SDQ62
DDR_SDM[0..7]<5>
DDR_SMAA[0..13]<5>
DDR_SDQS[0..7]<5>
DDR_SDQ[0..63]<5>
DDR_SWEA#<5>
DDR_CLK5<5>
SB_SCLK<4,9,15,19>
DDR_SRASA# <5>
DDR_CLK7# <5>
DDR_DM[0..7] <9>
DDR_SCS#0<5>
DDR_DQS[0..7] <9>
SB_SDAT<4,9,15,19>
DDR_SCASA# <5>
DDR_SBSA1 <5>DDR_SBSA0<5>
DDR_CLK7 <5>
DDR_DQ[0..63] <9>
DDR_CLK5#<5>
DDR_SCS#1 <5>
DDR_CKE0<5>
+3VS
+2.5V
+1.25V
+2.5V
+1.25VREF_MEM
+1.25VREF_MEM
+2.5V
+1.25VREF_MEM
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
DDR-SODIMM SLOT0
Custom
8 58Friday, April 15, 2005
2005/03/01 2006/03/11SO-DIMM0STANDARD
Layout note
Place these resistorsclose to DIMM0,all trace length<500 mil
Note: DDR_SMAA13 Recommend for AMD
40mil
BOM change
R113 68_0402_5%1 2
R110 47_0402_5%1 2
RP53
10_0804_8P4R_5%
1 82 73 64 5
RP8
10_0804_8P4R_5%
1 82 73 64 5
RP17
10_0804_8P4R_5%
1 82 73 64 5
RP14
10_0804_8P4R_5%
1 82 73 64 5
RP15
10_0804_8P4R_5%
1 82 73 64 5
R60
1K_0402_1%
12
RP36
10_0804_8P4R_5%
1 82 73 64 5
RP40
10_0804_8P4R_5%
1 82 73 64 5
R109 47_0402_5%1 2
RP56
10_0804_8P4R_5%
1 82 73 64 5
R101 68_0402_5%1 2
RP28
47_0804_8P4R_5%
18273645
C64
0.1U_0402_16V4Z
1
2
RP27
10_0804_8P4R_5%
1 82 73 64 5
R116 47_0402_5%1 2
RP24
10_0804_8P4R_5%
1 82 73 64 5
RP11
10_0804_8P4R_5%
1 82 73 64 5
RP33
47_0804_8P4R_5%
18273645
RP29
47_0804_8P4R_5%
18273645
RP44
10_0804_8P4R_5%
1 82 73 64 5
RP47
10_0804_8P4R_5%
1 82 73 64 5
RP51
10_0804_8P4R_5%
1 82 73 64 5
RP20
10_0804_8P4R_5%
1 82 73 64 5
C63
0.1U_0402_16V4Z
1
2
RP23
10_0804_8P4R_5%
1 82 73 64 5
RP16
10_0804_8P4R_5%
1 82 73 64 5
RP32
47_0804_8P4R_5%
18273645
R108 68_0402_5%1 2
R51
1K_0402_1%
12
RP37
10_0804_8P4R_5%
1 82 73 64 5
C62
1000P_0402_50V7K
1
2
RP43
10_0804_8P4R_5%
1 82 73 64 5
RP48
10_0804_8P4R_5%
1 82 73 64 5
JP27
QTC_C106A-040SP11
VREF1VSS3DQ05DQ17VDD9DQS011DQ213VSS15DQ317DQ819VDD21DQ923DQS125VSS27DQ1029DQ1131VDD33CK035CK0#37VSS39
DQ1641DQ1743VDD45DQS247DQ1849VSS51DQ1953DQ2455VDD57DQ2559DQS361VSS63DQ2665DQ2767VDD69CB071CB173VSS75DQS877CB279VDD81CB383DU85VSS87CK289CK2#91VDD93CKE195DU/A1397A1299A9101VSS103A7105A5107A3109A1111VDD113A10/AP115BA0117WE#119S0#121DU123VSS125DQ32127DQ33129VDD131DQS4133DQ34135VSS137DQ35139DQ40141VDD143
VREF 2VSS 4DQ4 6DQ5 8VDD 10DM0 12DQ6 14VSS 16DQ7 18
DQ12 20VDD 22
DQ13 24DM1 26VSS 28
DQ14 30DQ15 32VDD 34VDD 36VSS 38VSS 40
DQ20 42DQ21 44VDD 46DM2 48
DQ22 50VSS 52
DQ23 54DQ28 56VDD 58
DQ29 60DM3 62VSS 64
DQ30 66DQ31 68VDD 70CB4 72CB5 74VSS 76DM8 78CB6 80VDD 82CB7 84
DU/RESET# 86VSS 88VSS 90VDD 92VDD 94
CKE0 96DU/BA2 98
A11 100A8 102
VSS 104A6 106A4 108A2 110A0 112
VDD 114BA1 116
RAS# 118CAS# 120
S1# 122DU 124
VSS 126DQ36 128DQ37 130VDD 132DM4 134
DQ38 136VSS 138
DQ39 140DQ44 142VDD 144
DQ41145DQS5147VSS149DQ42151DQ43153VDD155VDD157VSS159VSS161DQ48163DQ49165VDD167DQS6169DQ50171VSS173DQ51175DQ56177VDD179DQ57181DQS7183VSS185DQ58187DQ59189VDD191SDA193SCL195VDD_SPD197VDD_ID199
DQ45 146DM5 148VSS 150
DQ46 152DQ47 154VDD 156
CK1# 158CK1 160VSS 162
DQ52 164DQ53 166VDD 168DM6 170
DQ54 172VSS 174
DQ55 176DQ60 178VDD 180
DQ61 182DM7 184VSS 186
DQ62 188DQ63 190VDD 192SA0 194SA1 196SA2 198DU 200
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDR_CKE1 DDR_CKE1
DDR_SCS#2 DDR_SCS#3
DDR_SMAB12DDR_SMAB9
DDR_SMAB7DDR_SMAB5DDR_SMAB3DDR_SMAB1
DDR_SMAB10
DDR_SMAB11DDR_SMAB8
DDR_SMAB6DDR_SMAB4DDR_SMAB2DDR_SMAB0
DDR_SBSB0DDR_SBSB1DDR_SRASB#DDR_SCASB#
DDR_DQ[0..63]
DDR_DQS[0..7]
DDR_SWEB#
DDR_DM[0..7]
DDR_SMAB[0..13]
DDR_SMAB13
DDR_CKE1
DDR_SCS#2
DDR_SCS#3
DDR_SCASB#
DDR_SWEB#
DDR_SMAB1
DDR_SMAB8
DDR_SMAB7DDR_SMAB9DDR_SMAB12
DDR_SMAB3
DDR_SMAB10
DDR_SMAB11
DDR_SMAB2
DDR_SMAB4
DDR_SRASB#
DDR_SMAB13
DDR_SMAB6
DDR_SBSB0
DDR_SMAB5
DDR_SBSB1DDR_SMAB0
DDR_DQ15DDR_DQ14
DDR_DQ9
DDR_DQ12DDR_DQS1
DDR_DQS0DDR_DQ3
DDR_DQ5
DDR_DQ7
DDR_DQ0
DDR_DM1DDR_DQ13
DDR_DQ10DDR_DQ11
DDR_DQ8
DDR_DQ1
DDR_DM0DDR_DQ2
DDR_DQ4
DDR_DQ6
DDR_DQ20
DDR_DQ18
DDR_DQ17
DDR_DQS2
DDR_DQ19
DDR_DQ27DDR_DQ26
DDR_DQS3DDR_DQ24
DDR_DQ28
DDR_DM2
DDR_DQ23
DDR_DQ16DDR_DQ21
DDR_DQ22
DDR_DQ29
DDR_DQ30
DDR_DQ25
DDR_DQ31
DDR_DM3
DDR_DQ60
DDR_DQ54
DDR_DQ51
DDR_DQ53DDR_DQ52
DDR_DM6
DDR_DQ42
DDR_DQ41
DDR_DQ45
DDR_DQ43
DDR_DM5
DDR_DQ37
DDR_DQ62
DDR_DQ57
DDR_DQ33
DDR_DQ35
DDR_DQ39
DDR_DM4
DDR_DM7
DDR_DQ63
DDR_DQS6
DDR_DQ49
DDR_DQ55
DDR_DQ50
DDR_DQ48
DDR_DQ46
DDR_DQ44
DDR_DQ40
DDR_DQS5
DDR_DQ47
DDR_DQS4
DDR_DQ32
DDR_DQ34
DDR_DQ38
DDR_DQS7
DDR_DQ58
DDR_DQ36
DDR_DQ56
DDR_DQ59
DDR_DQ61
DDR_DQ61DDR_DQS7DDR_DQ58DDR_DQ59
DDR_DQ13DDR_DM1
DDR_DQ10
DDR_DQ4
DDR_DQ11
DDR_DQ1DDR_DM0
DDR_DQ6
DDR_DQ2
DDR_DQ8
DDR_DQ29DDR_DM3DDR_DQ30DDR_DQ31
DDR_DQ37DDR_DQ33DDR_DM4
DDR_DQ39
DDR_DQ35
DDR_DQ41
DDR_DQ0DDR_DQ5DDR_DQS0DDR_DQ3
DDR_DQ16DDR_DQ21
DDR_DQ7DDR_DQ9DDR_DQ12DDR_DQS1
DDR_DQ14DDR_DQ15DDR_DQ20DDR_DQ17
DDR_DQS2DDR_DQ18DDR_DQ19DDR_DQ28
DDR_DM2DDR_DQ22
DDR_DQ42DDR_DQ43DDR_DQ53DDR_DQ52
DDR_DQ23DDR_DQ25
DDR_DQ24DDR_DQS3DDR_DQ26DDR_DQ27
DDR_DQ32DDR_DQ36DDR_DQS4DDR_DQ34
DDR_DM6DDR_DQ54DDR_DQ51DDR_DQ60
DDR_DQ38DDR_DQ40DDR_DQ44DDR_DQS5
DDR_DQ49
DDR_DQ47DDR_DQ46DDR_DQ48
DDR_DQS6DDR_DQ50DDR_DQ55DDR_DQ56
DDR_DQ57DDR_DM7DDR_DQ62DDR_DQ63
DDR_DQ45DDR_DM5
DDR_CLK4<5>DDR_CLK4#<5>
DDR_CKE1<5>
DDR_SCS#2<5>DDR_SCASB# <5>DDR_SRASB# <5>DDR_SBSB1 <5>
DDR_SBSB0<5>DDR_SWEB#<5>
DDR_SCS#3 <5>
DDR_CLK6# <5>DDR_CLK6 <5>
DDR_SMAB[0..13]<5>
DDR_DQS[0..7]<8>
DDR_DM[0..7]<8>
DDR_DQ[0..63]<8>
SB_SDAT<4,8,15,19>SB_SCLK<4,8,15,19>
+2.5V +2.5V+1.25VREF_MEM
+3VS
+3VS
+1.25V+1.25V
+1.25V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
DDR-SODIMM SLOT1
Custom
9 58Friday, April 15, 2005
2005/03/01 2006/03/11
DIMM1REVERSE
Place these resistorclosely DIMM1,all tracelength<=800mil
Layout note
Place these resistorclose by DIMM1,all trace lengthMax=0.8"
Layout note
20 mil width
Note: DDR_SMAB13 Recommendfor AMD.
RP26
68_0804_8P4R_5%
1 82 73 64 5
RP19
68_0804_8P4R_5%
1 82 73 64 5
RP54
68_0804_8P4R_5%
1 82 73 64 5
RP12
68_0804_8P4R_5%
1 82 73 64 5
RP34
47_0804_8P4R_5%
1 82 73 64 5
RP55
68_0804_8P4R_5%
1 82 73 64 5
RP9
68_0804_8P4R_5%
1 82 73 64 5
RP25
68_0804_8P4R_5%
1 82 73 64 5
RP41
68_0804_8P4R_5%
1 82 73 64 5
RP21
68_0804_8P4R_5%
1 82 73 64 5
R117 47_0402_5%1 2
RP18
68_0804_8P4R_5%
1 82 73 64 5
RP10
68_0804_8P4R_5%
1 82 73 64 5
R111 47_0402_5%1 2
RP31
47_0804_8P4R_5%
1 82 73 64 5
RP42
68_0804_8P4R_5%
1 82 73 64 5
RP13
68_0804_8P4R_5%
1 82 73 64 5
RP46
68_0804_8P4R_5%
1 82 73 64 5
RP39
68_0804_8P4R_5%
1 82 73 64 5
R102 68_0402_5%1 2
RP35
47_0804_8P4R_5%
1 82 73 64 5
RP38
68_0804_8P4R_5%
1 82 73 64 5
RP30
47_0804_8P4R_5%
1 82 73 64 5
C65
0.1U_0402_16V4Z
1
2
RP45
68_0804_8P4R_5%
1 82 73 64 5
RP49
68_0804_8P4R_5%
1 82 73 64 5
R112 47_0402_5%1 2
RP50
68_0804_8P4R_5%
1 82 73 64 5
JP28
TYCO_1612560-1
VREF1VSS3DQ05DQ17VDD9DQS011DQ213VSS15DQ317DQ819VDD21DQ923DQS125VSS27DQ1029DQ1131VDD33CK035CK0#37VSS39
DQ1641DQ1743VDD45DQS247DQ1849VSS51DQ1953DQ2455VDD57DQ2559DQS361VSS63DQ2665DQ2767VDD69CB071CB173VSS75DQS877CB279VDD81CB383DU85VSS87CK289CK2#91VDD93CKE195DU97A1299A9101VSS103A7105A5107A3109A1111VDD113A10/AP115BA0117WE#119S0#121DU/A13123VSS125DQ32127DQ33129VDD131DQS4133DQ34135VSS137DQ35139DQ40141VDD143
VREF 2VSS 4DQ4 6DQ5 8VDD 10DM0 12DQ6 14VSS 16DQ7 18
DQ12 20VDD 22
DQ13 24DM1 26VSS 28
DQ14 30DQ15 32VDD 34VDD 36VSS 38VSS 40
DQ20 42DQ21 44VDD 46DM2 48
DQ22 50VSS 52
DQ23 54DQ28 56VDD 58
DQ29 60DM3 62VSS 64
DQ30 66DQ31 68VDD 70CB4 72CB5 74VSS 76DM8 78CB6 80VDD 82CB7 84
DU/RESET# 86VSS 88VSS 90VDD 92VDD 94
CKE0 96DU 98
A11 100A8 102
VSS 104A6 106A4 108A2 110A0 112
VDD 114BA1 116
RAS# 118CAS# 120
S1# 122DU 124
VSS 126DQ36 128DQ37 130VDD 132DM4 134
DQ38 136VSS 138
DQ39 140DQ44 142VDD 144
DQ41145DQS5147VSS149DQ42151DQ43153VDD155VDD157VSS159VSS161DQ48163DQ49165VDD167DQS6169DQ50171VSS173DQ51175DQ56177VDD179DQ57181DQS7183VSS185DQ58187DQ59189VDD191SDA193SCL195VDD_SPD197VDD_ID199
DQ45 146DM5 148VSS 150
DQ46 152DQ47 154VDD 156
CK1# 158CK1 160VSS 162
DQ52 164DQ53 166VDD 168DM6 170
DQ54 172VSS 174
DQ55 176DQ60 178VDD 180
DQ61 182DM7 184VSS 186
DQ62 188DQ63 190VDD 192SA0 194SA1 196SA2 198DU 200
R114 68_0402_5%1 2
RP22
68_0804_8P4R_5%
1 82 73 64 5
R115 68_0402_5%1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+1.25V
+1.25V
+1.25V
+1.25V
+1.25V
+1.25V
+2.5V
+2.5V
+2.5V
+1.25V
+2.5V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
DDR SODIMM Decoupling
Custom
10 58Friday, April 15, 2005
2005/03/01 2006/03/11
Layout note :Place one cap close to every 2 pull up resistors termination to+1.25V
Near DIMMs
C115
0.1U_0402_16V4Z
1
2
C152
0.1U_0402_16V4Z
1
2
C123
0.1U_0402_16V4Z
1
2
C169
0.1U_0402_16V4Z
1
2
C80
0.1U_0402_16V4Z
1
2
C153
0.1U_0402_16V4Z
1
2
C214
0.1U_0402_16V4Z
1
2
C139
0.1U_0402_16V4Z
1
2
C192
0.1U_0402_16V4Z
1
2
C133
0.1U_0402_16V4Z
1
2
C182
0.1U_0402_16V4Z
1
2
C181
0.1U_0402_16V4Z
1
2
C75
0.1U_0402_16V4Z
1
2
C114
0.1U_0402_16V4Z
1
2
C66
0.1U_0402_16V4Z
1
2
C21810U_0805_10V4Z
1
2
C78
0.1U_0402_16V4Z
1
2
C113
0.1U_0402_16V4Z
1
2
C193
0.1U_0402_16V4Z
1
2
C81
0.1U_0402_16V4Z
1
2
C161
0.1U_0402_16V4Z
1
2
C77
0.1U_0402_16V4Z
1
2
C20910U_0805_10V4Z
1
2
C122
0.1U_0402_16V4Z
1
2
C151
0.1U_0402_16V4Z
1
2
C116
0.1U_0402_16V4Z
1
2
C160
0.1U_0402_16V4Z
1
2
C166
0.1U_0402_16V4Z
1
2
C215
0.1U_0402_16V4Z
1
2
C204
0.1U_0402_16V4Z
1
2
C131
0.1U_0402_16V4Z
1
2
C135
0.1U_0402_16V4Z
1
2
C184
0.1U_0402_16V4Z
1
2
C147
0.1U_0402_16V4Z
1
2
C221
0.1U_0402_16V4Z
1
2
C205
0.1U_0402_16V4Z
1
2
C95
4.7U_0805_6.3V6K
1
2
C73
0.1U_0402_16V4Z
1
2
C175
0.1U_0402_16V4Z
1
2
C174
0.1U_0402_16V4Z
1
2
C106
0.1U_0402_16V4Z
1
2
C211
0.1U_0402_16V4Z
1
2
C132
0.1U_0402_16V4Z
1
2
C129
0.1U_0402_16V4Z
1
2
C144
0.1U_0402_16V4Z
1
2
C111
0.1U_0402_16V4Z
1
2
C178
0.1U_0402_16V4Z
1
2
C130
0.1U_0402_16V4Z
1
2
C110
0.1U_0402_16V4Z
1
2
C170
0.1U_0402_16V4Z
1
2
+ C180
330U_6.3V_M
1
2
C165
0.1U_0402_16V4Z
1
2
C107
0.1U_0402_16V4Z
1
2
C168
0.1U_0402_16V4Z
1
2
C179
0.1U_0402_16V4Z
1
2
C67
0.1U_0402_16V4Z
1
2
C159
0.1U_0402_16V4Z
1
2
C186
0.1U_0402_16V4Z
1
2
C189
0.1U_0402_16V4Z
1
2
C210
0.1U_0402_16V4Z
1
2
C145
0.1U_0402_16V4Z
1
2
C120
0.1U_0402_16V4Z
1
2
C220
0.1U_0402_16V4Z
1
2
C119
0.1U_0402_16V4Z
1
2
C146
0.1U_0402_16V4Z
1
2
C150
0.1U_0402_16V4Z
1
2
+ C213330U_6.3V_M
1
2
C140
0.1U_0402_16V4Z
1
2
C183
0.1U_0402_16V4Z
1
2
C128
0.1U_0402_16V4Z
1
2
C158
0.1U_0402_16V4Z
1
2
C172
0.1U_0402_16V4Z
1
2
C125
4.7U_0805_6.3V6K
1
2
C141
0.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_CLKIP0H_CLKIN0
H_CTLIN0H_CTLIP0
H_CADIN[0..15]
H_CADIP[0..15]
H_CADOP[0..15]
H_CADON[0..15]
H_CADOP15
H_CADOP14
H_CADOP12
H_CADOP11
H_CADON15
H_CADON14
H_CADON12
H_CADON11
H_CADON13H_CADOP13
H_CADON10H_CADOP10
H_CADON9H_CADOP9
H_CADOP8H_CADON8
H_CADOP7H_CADON7H_CADOP6H_CADON6H_CADOP5H_CADON5H_CADOP4H_CADON4
H_CADON3H_CADOP3
H_CADOP2H_CADON2
H_CADON0H_CADOP0H_CADON1H_CADOP1
H_CADIN15H_CADIP15
H_CADIN14H_CADIP14
H_CADIN13H_CADIP13
H_CADIN12H_CADIP12
H_CADIP11H_CADIN11
H_CADIN10H_CADIP10
H_CADIN9H_CADIP9
H_CADIN8H_CADIP8
H_CADIN7H_CADIP7
H_CADIN6H_CADIP6
H_CADIN5H_CADIP5
H_CADIN4H_CADIP4
H_CADIN3H_CADIP3
H_CADIN2H_CADIP2
H_CADIP1H_CADIN1H_CADIP0H_CADIN0
H_CLKOP0H_CLKON0
H_CLKON1H_CLKOP1
H_CTLOP0H_CTLON0
H_CLKIN1H_CLKIP1
MEM_VREF
H_CADIP[0..15]<4>
H_CADON[0..15]<4>
H_CADIN[0..15]<4>
H_CADOP[0..15]<4>
H_CLKIN0 <4>H_CLKIP0 <4>
H_CTLIN0 <4>H_CTLIP0 <4>
H_CLKON0<4>H_CLKOP0<4>
H_CLKOP1<4>H_CLKON1<4>
H_CTLOP0<4>H_CTLON0<4>
H_CLKIN1 <4>H_CLKIP1 <4>
+1.2V_HT
+1.8VS
+2.5VS
+2.5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
RS480M HT/MEM
Custom
11 58Friday, April 15, 2005
2005/03/01 2006/03/11
R363 49.9_0402_1%@1 2R355 49.9_0402_1%@1 2
R345 100_0402_5%
1 2
C188 0.47U_0603_16V7K1 2
R346 49.9_0402_1% 1 2
C191
1U_0603_10V4Z
1 2
R1230_0805_5%
1 2
R3570_0402_5%
1 2
MEM
_A I/
F
U9B
216MPA4AKA22HK RS480M BGA 706P
MEM_A0AF17MEM_A1AK17MEM_A2AH16MEM_A3AF16MEM_A4AJ22MEM_A5AJ21MEM_A6AH20MEM_A7AH21MEM_A8AK19MEM_A9AH19MEM_A10AJ17MEM_A11AG16MEM_A12AG17MEM_A13AH17MEM_A14AJ18
MEM_DM0AG26MEM_DM1AJ29MEM_DM2AE21MEM_DM3AH24MEM_DM4AH12MEM_DM5AG13MEM_DM6AH8MEM_DM7AE8
MEM_DQS1PAH30MEM_DQS2PAG20MEM_DQS3PAJ25MEM_DQS4PAH13MEM_DQS5PAF14MEM_DQS6PAJ7MEM_DQS7PAG8
MEM_DQS0NAG25MEM_DQS1NAH29MEM_DQS2NAF21MEM_DQS3NAK25MEM_DQS4NAJ12MEM_DQS5NAF13MEM_DQS6NAK7MEM_DQS7NAF9
MEM_RAS#AE17MEM_CAS#AH18MEM_WE#AE18MEM_CS#AJ19MEM_CKEAF18
MEM_CKPAK16MEM_CKNAJ16
MEM_CAP1AE28MEM_CAP2AJ4
MEM_VMODEAJ20
MEM_VREFAK20
MPVDDAJ15MPVSSAJ14
MEM_DQ0 AF28MEM_DQ1 AF27MEM_DQ2 AG28MEM_DQ3 AF26MEM_DQ4 AE25MEM_DQ5 AE24MEM_DQ6 AF24MEM_DQ7 AG23MEM_DQ8 AE29MEM_DQ9 AF29
MEM_DQ10 AG30MEM_DQ11 AG29MEM_DQ12 AH28MEM_DQ13 AJ28MEM_DQ14 AH27MEM_DQ15 AJ27MEM_DQ16 AE23MEM_DQ17 AG22MEM_DQ18 AF23MEM_DQ19 AF22MEM_DQ20 AE20MEM_DQ21 AG19MEM_DQ22 AF20MEM_DQ23 AF19MEM_DQ24 AH26MEM_DQ25 AJ26MEM_DQ26 AK26MEM_DQ27 AH25MEM_DQ28 AJ24MEM_DQ29 AH23MEM_DQ30 AJ23MEM_DQ31 AH22MEM_DQ32 AK14MEM_DQ33 AH14MEM_DQ34 AK13MEM_DQ35 AJ13MEM_DQ36 AJ11MEM_DQ37 AH11MEM_DQ38 AJ10MEM_DQ39 AH10MEM_DQ40 AE15MEM_DQ41 AF15MEM_DQ42 AG14MEM_DQ43 AE14MEM_DQ44 AE12MEM_DQ45 AF12MEM_DQ46 AG11MEM_DQ47 AE11MEM_DQ48 AJ9MEM_DQ49 AH9MEM_DQ50 AJ8MEM_DQ51 AK8MEM_DQ52 AH7MEM_DQ53 AJ6MEM_DQ54 AH6MEM_DQ55 AJ5MEM_DQ56 AG10MEM_DQ57 AF11MEM_DQ58 AF10MEM_DQ59 AE9MEM_DQ60 AG7MEM_DQ61 AF8MEM_DQ62 AF7MEM_DQ63 AE7
MEM_COMPP AH5MEM_COMPN AD30
MEM_DQS0PAF25
R348 49.9_0402_1% 1 2
C5240.1U_0402_16V4Z
1
2
C529
0.1U_0402_16V4Z
1
2
R359
1K_0402_1%
12
R358
1K_0402_1%
12
HYP
ER T
RA
NSP
OR
T C
PUI/F
U9A
216MPA4AKA22HK RS480M BGA 706P
HT_RXCAD15PT26HT_RXCAD15NR26HT_RXCAD14PU25HT_RXCAD14NU24HT_RXCAD13PV26HT_RXCAD13NU26HT_RXCAD12PW25HT_RXCAD12NW24HT_RXCAD11PAA25HT_RXCAD11NAA24HT_RXCAD10PAB26HT_RXCAD10NAA26HT_RXCAD9PAC25HT_RXCAD9NAC24HT_RXCAD8PAD26HT_RXCAD8NAC26
HT_RXCAD7PR29HT_RXCAD7NR28HT_RXCAD6PT30HT_RXCAD6NR30HT_RXCAD5PT28HT_RXCAD5NT29HT_RXCAD4PV29HT_RXCAD4NU29HT_RXCAD3PY30HT_RXCAD3NW30HT_RXCAD2PY28HT_RXCAD2NY29HT_RXCAD1PAB29HT_RXCAD1NAA29HT_RXCAD0PAC29HT_RXCAD0NAC28
HT_RXCLK1PY26HT_RXCLK1NW26
HT_RXCLK0PW29HT_RXCLK0NW28
HT_RXCTLPP29HT_RXCTLNN29
HT_RXCALND27HT_RXCALPE27
HT_TXCAD15P R24HT_TXCAD15N R25HT_TXCAD14P N26HT_TXCAD14N P26HT_TXCAD13P N24HT_TXCAD13N N25HT_TXCAD12P L26HT_TXCAD12N M26HT_TXCAD11P J26HT_TXCAD11N K26HT_TXCAD10P J24HT_TXCAD10N J25
HT_TXCAD9P G26HT_TXCAD9N H26HT_TXCAD8P G24HT_TXCAD8N G25
HT_TXCAD7P L30HT_TXCAD7N M30HT_TXCAD6P L28HT_TXCAD6N L29HT_TXCAD5P J29HT_TXCAD5N K29HT_TXCAD4P H30HT_TXCAD4N H29HT_TXCAD3P E29HT_TXCAD3N E28HT_TXCAD2P D30HT_TXCAD2N E30HT_TXCAD1P D28HT_TXCAD1N D29HT_TXCAD0P B29HT_TXCAD0N C29
HT_TXCLK1P L24HT_TXCLK1N L25
HT_TXCLK0P F29HT_TXCLK0N G29
HT_TXCTLP M29HT_TXCTLN M28
HT_TXCALP B28HT_TXCALN A28
C520 0.47U_0603_16V7K1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SB_TX0PSB_TX0N
SB_TX1PSB_TX1N
PCIE_MTX_C_PRX_P0PCIE_MTX_C_PRX_N0
SB_TX1N_C
SB_RX0NSB_RX0P
SB_TX1P_C
PCIE_MRX_C_PTX_N0
SB_TX0P_C
PCIE_MTX_PRX_N0
SB_TX0N_C
SB_RX1N
PCIE_MRX_C_PTX_P0
SB_RX1P
PCIE_MTX_PRX_P0
PCIE_MTX_C_PRX_P1PCIE_MTX_C_PRX_N1PCIE_MTX_PRX_N1
PCIE_MTX_PRX_P1PCIE_MRX_C_PTX_P1PCIE_MRX_C_PTX_N1
SB_TX0P <18>SB_TX0N <18>
SB_TX1P <18>SB_TX1N <18>
SB_RX0P<18>SB_RX0N<18>
SB_RX1P<18>SB_RX1N<18>
PCIE_MRX_C_PTX_P0<26>PCIE_MRX_C_PTX_N0<26>
PCIE_MTX_C_PRX_P0 <26>PCIE_MTX_C_PRX_N0 <26>
PCIE_MTX_C_PRX_P1 <40>PCIE_MTX_C_PRX_N1 <40>
PCIE_MRX_C_PTX_P1<40>PCIE_MRX_C_PTX_N1<40>
+1.2V_HT
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
RS480M PCIE/DVI Controller
Custom
12 58Friday, April 15, 2005
2005/03/01 2006/03/11
C176 0.1U_0402_16V4Z 1 2
C167 0.1U_0402_16V4Z 1 2
PCIE
I/F
TO V
IDEO
PCIE I/F TO SB
PCIE I/F TO SLOT
U9C
216MPA4AKA22HK RS480M BGA 706P
GFX_RX0PD8GFX_RX0ND7GFX_RX1PD5GFX_RX1ND4GFX_RX2PE4GFX_RX2NF4GFX_RX3PG5GFX_RX3NG4GFX_RX4PH4GFX_RX4NJ4GFX_RX5PH5GFX_RX5NH6GFX_RX6PG1GFX_RX6NG2GFX_RX7PK5GFX_RX7NK4GFX_RX8PL4GFX_RX8NM4GFX_RX9PN5GFX_RX9NN4GFX_RX10PP4GFX_RX10NR4GFX_RX11PP5GFX_RX11NP6GFX_RX12PP2GFX_RX12NR2GFX_RX13PT5GFX_RX13NT4GFX_RX14PU4GFX_RX14NV4GFX_RX15PW1GFX_RX15NW2
GPP_RX0PAE1GPP_RX0NAE2
GPP_RX1PAB2GPP_RX1NAC2
GPP_RX2PAB5GPP_RX2NAB4
GPP_RX3PY4GPP_RX3NAA4
SB_RX0PAG1SB_RX0NAH1
SB_RX1PAC5SB_RX1NAC6
PCE_ISETAH3PCE_TXISETAJ3
GFX_TX0P A7GFX_TX0N B7GFX_TX1P B6GFX_TX1N B5GFX_TX2P A5GFX_TX2N A4GFX_TX3P B3GFX_TX3N B2GFX_TX4P C1GFX_TX4N D1GFX_TX5P D2GFX_TX5N E2GFX_TX6P F2GFX_TX6N F1GFX_TX7P H2GFX_TX7N J2GFX_TX8P J1GFX_TX8N K1GFX_TX9P K2GFX_TX9N L2
GFX_TX10P M2GFX_TX10N M1GFX_TX11P N1GFX_TX11N N2GFX_TX12P R1GFX_TX12N T1GFX_TX13P T2GFX_TX13N U2GFX_TX14P V2GFX_TX14N V1GFX_TX15P Y2GFX_TX15N AA2
GPP_TX0P AD2GPP_TX0N AD1
GPP_TX1P AA1GPP_TX1N AB1
GPP_TX2P Y5GPP_TX2N Y6
GPP_TX3P W5GPP_TX3N W4
SB_TX0P AF2SB_TX0N AG2
SB_TX1P AC4SB_TX1N AD4
PCE_PCAL AH2PCE_NCAL AJ2
C157 0.1U_0402_16V4Z 1 2
R120 82.5_0402_1%
1 2
C171 0.1U_0402_16V4Z 1 2
C143 0.1U_0402_16V4Z 1 2
C162 0.1U_0402_16V4Z 1 2
C149 0.1U_0402_16V4Z 1 2
C173 0.1U_0402_16V4Z 1 2
R356 10K_0402_5% 1 2R119 150_0402_1%1 2
R121 8.25K_0402_1%1 2
LVDSA1-
LVDSA0+
LVDSA1+LVDSA0-
LVDSA2-LVDSA2+
LVDSB0+LVDSB0-
LVDSB1+LVDSB1-LVDSB2+LVDSB2-
LVDSBC+LVDSBC-
LVDSAC-LVDSAC+
REDGREENBLUE
+AVDDQ
+NB_PLLVDD
+NB_HTPVDD
SUS_STAT#
HTREFCLK
+LPVDD
+LVDDR18D
EDID_CLK_LCDEDID_CLK_LCDEDID_DAT_LCD
+NB_VDDR3
+LVDDR18A
GREEN
EDID_DAT_LCD
+AVDD
STRP_DATA
D_LUMALUMA
CRMA D_CRMA
D_COMPS
CRMALUMA
HTREFCLK
COMPS
COMPS
ENVDD
CRT_BLUE
CRT_RED
CRT_GREENGREEN
RED
BLUE
RED
BLUE
BLUE_L
GREEN_L
RED_L
LVDSA0+ <16>LVDSA0- <16>LVDSA1+ <16>LVDSA1- <16>LVDSA2+ <16>LVDSA2- <16>
LVDSB0+ <16>LVDSB0- <16>LVDSB1+ <16>LVDSB1- <16>LVDSB2+ <16>LVDSB2- <16>
LVDSBC+ <16>LVDSBC- <16>LVDSAC+ <16>LVDSAC- <16>
HSYNC<17>VSYNC<17>
3VDDCDA<17>3VDDCCL<17>
NB_RST#<18,26,35,37,38,39>NB_PWRGD<18,38,41>
LDTSTOP#<4,18>ALLOW_LDTSTOP<18>
LOAD_ROM#<22>SPMEM_EN#<22>
NB_REFCLK<15>
BMREQ#<18>
HTREFCLK <15>
SBLINKCLK <15>SBLINKCLK# <15>
ENVDD <16>ENABLT <16>
EDID_CLK_LCD<16>EDID_DAT_LCD<16>
NBSRCCLK <15>NBSRCCLK# <15>
D_LUMA <17,40>
D_CRMA <17,40>
D_COMPS <17,40>
STRP_DATA <48>
INV_PWM <16>
CRT_BLUE <17,40>
CRT_GREEN <17,40>
CRT_RED <17,40>
+3VS
+1.8VS
+1.8VS
+1.8VS+1.8VS
+3VS
+1.8VS
+1.8VS
+1.8VS
+3VS
+1.8VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
RS480M VIDEO_IF/CLOCK GEN
Custom
13 58Friday, April 15, 2005
2005/03/01 2006/03/11
C461
1U_0603_10V4Z
1
2
C4470.1U_0402_16V4Z
1
2
C439
1U_0603_10V4Z
1
2
C410
18P_0402_50V8J
1
2
L28
HLC0603CSCC39NJT_06031 2
PM
CLOCKs
LVD
SCR
T/TV
OU
TPL
L PW
RMIS.
U9D
216MPA4AKA22HK RS480M BGA 706P
AVDD1B27AVDD2C27AVSSN1D26AVSSN2D25AVDDDIC24AVSSDIB24
AVDDQE24AVSSQD24
CB25YA25COMPA24
REDC25GREENA26BLUEB26
DAC_VSYNCA11DAC_HSYNCB11RSETC26DAC_SCLE11DAC_SDAF11
PLLVDDA14PLLVSSB14
HTPVDDM23HTPVSSL23
SYSRESET#D14POWERGOODB15LDTSTOP#B12ALLOW_LDTSTOPC12SUS_STAT#AH4
VDDR3_1H13VDDR3_2H12
OSCINA13OSCOUTB13
TVCLKINB9
DFT_GPIO0/RSVF12DFT_GPIO1/RSVE13DFT_GPIO2/RSVD13
BMREQbF10I2C_CLKC10I2C_DATAC11THERMALDIODE_PAF4THERMALDIODE_NAE4
TXOUT_U0P D18TXOUT_U0N C18TXOUT_U1P B19TXOUT_U1N A19TXOUT_U2P D19TXOUT_U2N C19TXOUT_U3P D20TXOUT_U3N C20
TXOUT_L0P B16TXOUT_L0N A16TXOUT_L1P D16TXOUT_L1N C16TXOUT_L2P B17TXOUT_L2N A17TXOUT_L3P E17TXOUT_L3N D17
TXCLK_UP B20TXCLK_UN A20TXCLK_LP B18TXCLK_LN C17
LPVDD E18LPVSS F17
LVDDR18D E19LVDDR18A_1 G20LVDDR18A_2 H20
LVSSR1 G19LVSSR2 E20LVSSR3 F20LVSSR4 H18LVSSR5 G18LVSSR6 F19LVSSR7 H19LVSSR8 F18
LVDS_DIGON E14LVDS_BLON F14LVDS_BLEN F13
GFX_CLKP B8GFX_CLKN A8
HTTSTCLK P23HTREFCLK N23
SB_CLKP E8SB_CLKN E7
DFT_GPIO3/RSV C13DFT_GPIO4/RSV C14DFT_GPIO5/RSV C15
TMDS_HPD A10
STRP_DATA E10
DDC_DATA B10
TESTMODE E12
C4380.1U_0402_16V4Z
1
2
R704.7K_0402_5%
12
R498 0_0402_5%12
R327 2.2K_0402_5%1 2
L12
CHB1608B121_0603SVIDEO@
1 2
R352 10K_0402_5%1 2
R3604.7K_0402_5%
12
R73
75_0
402_
1%
12
C412
18P_0402_50V8J
1
2
R33
875
_040
2_1%
12
C4430.1U_0402_16V4Z
1
2
L11
CHB1608B121_0603SVIDEO@
1 2
C86
270P_0402_50V7KSVIDEO@
C430
10U_0805_10V4Z
1
2
C99
1U_0603_10V4Z1
2
L24
HLC0603CSCCR11JT_06031 2
C4571U_0603_10V4Z
1 2
L29
FBML10160808121LMT_06031 2
R74
75_0
402_
1%
12
R33
975
_040
2_1%
12
C94
270P_0402_50V7KSVIDEO@
C83
270P_0402_50V7KSVIDEO@
C4370.1U_0402_16V4Z
1
2
C93
270P_0402_50V7KSVIDEO@
R67 715_0402_1%
1 2
C459
10U_0805_10V4Z
1
2
R364470K_0402_5%
12
C411
18P_0402_50V8J
1
2
C1001U_0603_10V4Z
1
2
R69 4.7K_0402_5%
1 2
L10
CHB1608B121_0603SVIDEO@
1 2
R75
75_0
402_
1%
12
R34
075
_040
2_1%
12
C87270P_0402_50V7KSVIDEO@
L34
150_0603_1%
R343 4.7K_0402_5%1 2
L23
HLC0603CSCCR11JT_06031 2
R68 10K_0402_5% 12
C98
1U_0603_10V4Z
1
2
R52110K_0402_5%
12
C4201U_0603_10V4Z
1
2
R499 0_0402_5%@12
R46
10_0402_5%@
12
R714.7K_0402_5%
12
L35
FBML10160808121LMT_06031 2
L15
FBML10160808121LMT_06031 2
C56
10P_0402_25V8K@
1
2
C103
270P_0402_50V7KSVIDEO@
L14
FBML10160808121LMT_06031 2
C101
10U_0805_10V4Z
1
2
R500 0_0402_5%12
L13
FBML10160808121LMT_06031 2
L27
HLC0603CSCC39NJT_06031 2
R5152K_0402_5%
12
C4560.1U_0402_16V4Z
1
2
L31
FBML10160808121LMT_06031 2
C4191U_0603_10V4Z
1
2
L25
HLC0603CSCCR11JT_06031 2
L30
FBML10160808121LMT_06031 2
L26
HLC0603CSCC39NJT_06031 2
R329 2.2K_0402_5%@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSS30
VSS89
VSSA22
VSSA59
+VDDHT31+VDDHT30
+VDD18
+VDDA18_13
+VDDA12_13
+VDDA18
+VDDA12_13
+VDDA18_13
VSSA59
+VDDHT30
+VDDHT31
VSS30
VSSA22
VSS89
+1.2V_HT
+1.8VS
+RS480_Core
+2.5VS
+1.8VS
+1.2V_HT
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
RS480M Power/GND
Custom
14 58Friday, April 15, 2005
2005/03/01 2006/03/11
C5000.1U_0402_16V4Z 12
C5280.1U_0402_16V4Z 12
C491 0.1U_0402_16V4Z1 2
C471 0.1U_0402_16V4Z1 2
C453 0.1U_0402_16V4Z1 2
C442 0.1U_0402_16V4Z1 2
C470 0.1U_0402_16V4Z1 2
C467 0.1U_0402_16V4Z1 2
C5130.1U_0402_16V4Z 12
C4960.1U_0402_16V4Z 12
C4500.1U_0402_16V4Z 12
C5180.1U_0402_16V4Z 12
C53122U_1206_10V4Z 12
C427 0.1U_0402_16V4Z1 2
C492 0.1U_0402_16V4Z1 2
C4950.1U_0402_16V4Z 12
C5250.1U_0402_16V4Z 12
C494 0.1U_0402_16V4Z1 2
C510 0.1U_0402_16V4Z1 2
R3650_0805_5%
12
C429
4.7U_0805_6.3V6K
1
2
C5070.1U_0402_16V4Z 12
C458 22U_1206_10V4Z1 2
C4320.1U_0402_16V4Z 12
C463 0.1U_0402_16V4Z1 2
C469 0.1U_0402_16V4Z1 2
C5140.1U_0402_16V4Z 12
C519 0.1U_0402_16V4Z1 2
C42122U_1206_10V4Z 12
C454 0.1U_0402_16V4Z1 2
C462 0.1U_0402_16V4Z1 2
C4680.1U_0402_16V4Z 12
C473 0.1U_0402_16V4Z1 2
C5260.1U_0402_16V4Z 12
C497 0.1U_0402_16V4Z1 2
C5120.1U_0402_16V4Z 12
POW
ER
U9E
216MPA4AKA22HK RS480M BGA 706P
VDD_HT1N27VDD_HT2U27VDD_HT3V27VDD_HT4G27VDD_HT5V24VDD_HT6H27VDD_HT7K24VDD_HT8AB24VDD_HT9P27VDD_HT10J27VDD_HT11AA27VDD_HT12K27VDD_HT13P24VDD_HT14AB27VDD_HT15AB23VDD_HT16V23VDD_HT17G23VDD_HT18E23VDD_HT19W23VDD_HT20K23VDD_HT21J23VDD_HT22H23VDD_HT23U23VDD_HT24AA23VDD_HT25D23VDD_HT26F23VDD_HT27C23VDD_HT28B23VDD_HT29A23VDD_HT30A29VDD_HT31AC30
VDD_MEM1AK23VDD_MEM2AK28VDD_MEM3AK11VDD_MEM4AK4VDD_MEM5AE30VDD_MEM6AC14VDD_MEM7AD12VDD_MEM8AC18VDD_MEM9AC20VDD_MEM10AD10VDD_MEM11AD14VDD_MEM12AD15VDD_MEM13AD20VDD_MEM14AC10VDD_MEM15AD18VDD_MEM16AC12VDD_MEM17AD22VDD_MEM18AC22VDD_MEMCKAH15
VDD18_1H15VDD18_2AC17VDD18_3AC15
VDD_CORE47B21VDD_CORE46C21VDD_CORE45A22VDD_CORE44B22VDD_CORE43C22VDD_CORE42F21VDD_CORE41F22VDD_CORE40E21VDD_CORE39G21
VDDA12_14 H9VDDA12_1 AA7VDDA12_2 G9VDDA12_3 U8VDDA12_4 N7VDDA12_5 N8VDDA12_6 U7VDDA12_7 F9VDDA12_8 AA8VDDA12_9 G8
VDDA12_10 G7VDDA12_11 J8VDDA12_12 J7VDDA12_13 B1
VDDA18_1 AG4VDDA18_2 R8VDDA18_3 AC8VDDA18_4 AC7VDDA18_5 AF6VDDA18_6 AE6VDDA18_7 L8VDDA18_8 W8VDDA18_9 W7
VDDA18_10 L7VDDA18_11 R7VDDA18_12 AF5VDDA18_13 AK2
VDD_CORE1 N16VDD_CORE2 M13VDD_CORE3 M15VDD_CORE4 W16VDD_CORE5 N18VDD_CORE6 P19VDD_CORE7 N12VDD_CORE8 P15VDD_CORE9 N14
VDD_CORE10 M17VDD_CORE11 T19VDD_CORE12 G22VDD_CORE13 R12VDD_CORE14 P13VDD_CORE15 R14VDD_CORE16 V19VDD_CORE17 R18VDD_CORE18 U16VDD_CORE19 U12VDD_CORE20 T13VDD_CORE21 U14VDD_CORE22 T17VDD_CORE23 U18VDD_CORE24 E22VDD_CORE25 R16VDD_CORE26 V13VDD_CORE27 T15VDD_CORE28 P17VDD_CORE29 W18VDD_CORE30 D22VDD_CORE31 W12VDD_CORE32 V15VDD_CORE33 W14VDD_CORE34 V17VDD_CORE35 M19VDD_CORE36 H22VDD_CORE37 H21VDD_CORE38 D21
C489 0.1U_0402_16V4Z1 2
C493 0.1U_0402_16V4Z1 2
C490 0.1U_0402_16V4Z1 2
C5040.1U_0402_16V4Z 12
C464 0.1U_0402_16V4Z1 2
C449 0.1U_0402_16V4Z1 2
C4810.1U_0402_16V4Z 12
C5160.1U_0402_16V4Z 12
C4310.1U_0402_16V4Z 12
C472 0.1U_0402_16V4Z1 2
C5270.1U_0402_16V4Z 12
C5080.1U_0402_16V4Z 12
C4510.1U_0402_16V4Z 12
C5030.1U_0402_16V4Z 12
C4440.1U_0402_16V4Z 12
C5150.1U_0402_16V4Z 12
C475 22U_1206_10V4Z1 2
C1870.1U_0402_16V4Z 12
C4820.1U_0402_16V4Z 12
C5050.1U_0402_16V4Z 12
C5220.1U_0402_16V4Z 12
C488 0.1U_0402_16V4Z1 2
C5010.1U_0402_16V4Z 12
C445 0.1U_0402_16V4Z1 2L16
FBML10160808121LMT_06031 2
C484 0.1U_0402_16V4Z1 2
C455 0.1U_0402_16V4Z1 2
C533 1U_0603_10V4Z1 2
C4460.1U_0402_16V4Z 12
C4850.1U_0402_16V4Z 12
C102
4.7U_0805_6.3V6K
1
2
C474 0.1U_0402_16V4Z1 2
C483 22U_1206_10V4Z1 2
C5060.1U_0402_16V4Z 12
C480 1U_0603_10V4Z1 2
C4660.1U_0402_16V4Z 12
C530
4.7U_0805_6.3V6K
1
2
C1901U_0603_10V4Z 12
C4650.1U_0402_16V4Z 12
C509
4.7U_0805_6.3V6K
1
2
GR
OU
ND
U9F
216MPA4AKA22HK RS480M BGA 706P
VSS1G10VSS2G12VSS3AD29VSS4AD27VSS5AC27VSS6G15VSS7G14VSS8Y24VSS9G13VSS10E9VSS11D15VSS12D9VSS13AD9VSS14G11VSS15F16VSS16G30VSS17AB28VSS18AB25VSS19D12VSS20AD24VSS21AA28VSS22G17VSS23Y23VSS24AC9VSS25R19VSS26Y27VSS27C28VSS28G16VSS29F25VSS30B30VSS31T24VSS32F26VSS33W27VSS34D11VSS35H11VSS36AD25VSS37H17VSS38H10VSS39H16VSS40H14VSS41E16VSS42D10VSS43E15VSS44F15
VSS45U15VSS46V14VSS47R15VSS48T14VSS49N15VSS50V12VSS51N13VSS52P14VSS53U17VSS54T16VSS55R17VSS56P12VSS57T12VSS58R13VSS59W13VSS60W17VSS61P18VSS62V18VSS63M18VSS64U13VSS65N17VSS66W15VSS67V16VSS68T18VSS69M14VSS70M12VSS71M16VSS72P16
VSS73U19VSS74AC16VSS75AG18VSS76AC23VSS77AD8VSS78AD11VSS79AD13VSS80AD16VSS81AD19VSS82AD23VSS83AG5VSS84AG6VSS85AG21VSS86AD17VSS87AG15VSS88AG12VSS89AF30VSS90AG24VSS91AG9VSS92AC19VSS93AG27VSS94AC11VSS95AD7VSS96AJ30VSS97AC21VSS98AK5VSS99AK10VSS100AC13VSS101AD21VSS102AK22VSS103AK29VSS104W19VSS105AE26VSS106AE27
VSS107T27VSS108R27VSS109AD28VSS110F24VSS111F27VSS112G28
VSSA1 R5VSSA2 AE5VSSA3 V5VSSA4 N3VSSA5 F7VSSA6 F5VSSA7 R3VSSA8 AA6VSSA9 T3
VSSA10 M6VSSA11 C5VSSA12 F8VSSA13 M8VSSA14 Y8VSSA15 V3VSSA16 C3VSSA17 W3VSSA18 K8VSSA19 D3VSSA20 C6VSSA21 AA3VSSA22 A2VSSA23 AB3VSSA24 P8VSSA25 J6VSSA26 C8VSSA27 AD3VSSA28 V8VSSA29 F3VSSA30 AE3VSSA31 AF3VSSA32 M5VSSA33 AB7VSSA34 G3VSSA35 B4VSSA36 P7VSSA37 AA5VSSA38 C9VSSA39 C7VSSA40 J5VSSA41 R6VSSA42 J3VSSA43 AD5VSSA44 D6VSSA45 C4VSSA46 K3VSSA47 AB8VSSA48 T7VSSA49 Y7VSSA50 AD6VSSA51 K7VSSA52 H7VSSA53 M3VSSA54 V6VSSA55 H8VSSA56 C2VSSA57 AG3VSSA58 L6VSSA59 AJ1VSSA60 M7VSSA61 V7VSSA62 F6VSSA63 E6VSSA64 U5VSSA65 U6VSSA66 E5VSSA67 L5VSSA68 T8
VSS113 F28VSS114 H28VSS115 M24VSS116 J28VSS117 N19VSS118 K28VSS119 T23VSS120 L27
VSS122 M27VSS123 H24VSS124 N28VSS125 P25VSS126 P28VSS127 E26VSS128 K25VSS129 U28VSS130 V25VSS131 V28VSS132 R23
C5020.1U_0402_16V4Z 12
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
+3V_VDD
XTALIN_CLKXTALOUT_CLK
SB_SCLKSB_SDAT
PCIECLK0_RPCIECLK0#_R
SBSRCCLK_RSBSRCCLK#_R
SBLINKCLK_RSBLINKCLK#_R
PCIECLK0PCIECLK0#
SBSRCCLKSBSRCCLK#
SBLINKCLKSBLINKCLK#
CPUCLK0HCPUCLK0L
PCIECLK0#PCIECLK0
SBSRCCLKSBSRCCLK#
SBLINKCLKSBLINKCLK#
FS2
FS0FS1
FS2
NC_CLKREQ#CPPE_DOCK#
PCIECLK_DOCK#PCIECLK_DOCKPCIECLKD_R
PCIECLKD#_RPCIECLK_DOCKPCIECLK_DOCK#
NBSRCCLK_RNBSRCCLK#_R
NBSRCCLKNBSRCCLK#
NBSRCCLKNBSRCCLK#
CLK_STOP
CLK_STOP
FS0FS1
SB_SDAT<4,8,9,19>SB_SCLK<4,8,9,19>
PCIECLK0 <26>PCIECLK0# <26>
SBSRCCLK <18>SBSRCCLK# <18>
SBLINKCLK <13>SBLINKCLK# <13>
NB_REFCLK<13>
CLK_48M_CB <23>USBCLK_EXT <19>
CPUCLK0_H <6>CPUCLK0_L <6>
NC_CLKREQ#<26>
HTREFCLK <13>
CPPE_DOCK#<19,40>
PCIECLK_DOCK <40>PCIECLK_DOCK# <40>
CLK_14M_KBC <38>
CLK_14M_SIO <37>
NBSRCCLK <13>NBSRCCLK# <13>
VGATE<41,47,48,49>
SB_INT <19>
+3VS +3V_CLK+3VS+3V_VDD
+3V_CLK
+3VS
+3VS
+3VS
+3VS
+RS480_Core
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
Clock Generator
Custom
15 58Friday, April 15, 2005
2005/03/01 2006/03/11
Width=40 mils
Reserved
100.00
Reserved100.00
COMMENT
Reserved
48.0048.0048.0048.0048.00
USB
48.0048.00
FS2 FS1 CPU
X/3 X/6
SRCCLK
Hi-Z
HTT
200.00133.33100.00220.00180.00
EXT CLK FREQUENCY SELECT TABLE(MHZ)
X
1 1 1
1 0 1
1 0 0
0 1 1
0 0 1
PCIFS0
73.1236.5660.00 30.00 0 1 0
0 0 0
100.00
Normal HAMMER operation33.3366.6633.3366.6633.3366.66
100.00
[2:1]
Reserved
100.00Reserved
100.00
100.00
Hi-ZHi-Z
Reserved
R50
FF DF
12ohm 33ohm
R96 49.9_0402_1% 1 2
R94
10K_0402_5%
12
R5351.1_0402_1%
12
Y2
14.31818MHZ_20P_6X1430004201
12
L7
CHB2012U121_0805
1 2
C71
0.1U_0402_16V4Z
1
2
R528 33_0402_5% 1 2
L6CHB2012U121_0805
12
R55 33_0402_5% 1 2
R80 33_0402_5% 1 2
U8
ICS951418BGT_TSSOP56
X11X22
VDDCPU43
GND5
VDDSRC14
PCICLK0 50
VDDSRC21
VDD_PCI51
CPUCLK8C1 40CPUCLK8T1 41
VDDSRC35
CPUCLK8C0 44CPUCLK8T0 45
IREF37
GNDA 38VDDA 39
SRCCLKT7 12
VDD483
SRCCLKC7 13
VDDATI32
SRCCLKT6 16SRCCLKC6 17SRCCLKT5 18SRCCLKC5 19SRCCLKT4 22SRCCLKC4 23SRCCLKT3 24SRCCLKC3 25ATIGCLKT1 27ATIGCLKC1 28ATIGCLKT0 30ATIGCLKC0 29
CLK_STOP6
FS0/REF0 54FS1/REF1 53
FS2 9
SDATA8 SCLK7
REF252
GND55GNDSRC36
GNDATI31
GNDSRC26GNDSRC20
HTTCLK0 47USB_48MHz 4
CLKREQA#10 CLKREQB#11
GNDSRC15
GNDPCI49GNDHTT46GNDCPU42
VDDHTT48
SRCCLKT0 34SRCCLKC0 33
VDDREF56
C68
0.1U_0402_16V4Z
1
2
R58
10K_0402_5%
12
C69
0.1U_0402_16V4Z
1
2
R88 49.9_0402_1%SPR@1 2
R49 12_0402_5%SIO@1 2
C105
0.1U_0402_16V4Z
1
2
R90 49.9_0402_1% 1 2
R65 15_0402_1% 1 2
C10822P_0402_50V8J
1 2
R78 33_0402_5%SPR@1 2
R76 33_0402_5%1 2
R43 49.9_0402_1% 1 2
R84 33_0402_5%1 2
Q47
MMBT3904_SOT232
31
C74
10U_0805_10V4Z
1
2
R45 49.9_0402_1%@1 2
C72
0.1U_0402_16V4Z
1
2
R8210K_0402_5%
1 2
L9
CHB2012U121_0805
12
R87 33_0402_5% 1 2
R79 33_0402_5%SPR@1 2
R64 33_0402_5% 1 2
C70
0.1U_0402_16V4Z
1
2
C104
0.1U_0402_16V4Z
1
2
R44 49.9_0402_1%@1 2
C79
2.2U_0805_16V4Z
R91 49.9_0402_1% 1 2
R89 49.9_0402_1%SPR@1 2
R42 49.9_0402_1% 1 2
R508
1K_0402_5%1 2
R45510K_0402_5%
12
R81 33_0402_5% 1 2
C61
10U_0805_10V4Z
1
2
R509
1K_0402_5%@1 2
R56 33_0402_5%@1 2
R61 475_0402_1%
1 2
R59
10K_0402_5%
12
R97 49.9_0402_1% 1 2
R85
10K_0402_5%
1 2
R50 33_0402_5%1 2
R66 15_0402_1% 1 2
R57 33_0402_5%@1 2R54 33_0402_5% 1 2
R86 33_0402_5% 1 2
R52 33_0402_5% 1 2
C10922P_0402_50V8J
1 2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
DAC_BRIG
LCD_ENABLT
+LCDVDD_A
EDID_CLK_LCDEDID_DAT_LCD
ENVDD
DAC_BRIG
LCD_ENABLT
LVDSB1+LVDSB1-
LVDSBC+LVDSBC-
LVDSB2+
LVDSA1-
LVDSA0+
LVDSAC-LVDSAC+ LVDSA1+
LVDSB2-
LVDSA0-
LVDSA2-LVDSA2+
LVDSB0+LVDSB0-
INV_PWM <13>
EDID_CLK_LCD <13>EDID_DAT_LCD <13>
ENVDD<13>
PCIRST_LCD# <18>
ENABLT <13>
LVDSB1+<13>LVDSB1-<13>
LVDSBC-<13>LVDSBC+<13>
LVDSAC+<13>
LVDSA0+ <13>
LVDSB2-<13>
LVDSA2-<13>
LVDSB2+<13>
LVDSA1- <13>LVDSA1+ <13>
LVDSA0- <13>
LVDSA2+<13>
LVDSAC-<13>
LVDSB0-<13>LVDSB0+<13>
LID_SW# <19,39>
+3VS
+LCDVDD
+INVPWR_B+
+INVPWR_B+B+
+3VS
+3VS+LCDVDD
+LCDVDD +5VALW
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
LVDS Connector
Custom
16 58Friday, April 15, 2005
2005/03/01 2006/03/11
LCD Panel ConnectorThe cap.'s colsely to LCD CONN.
R517 0_0402_5%@1 2
D22
RB751V_SOD323
2 1
G
D S
Q7SI2301BDS_SOT23
21 3
R317
100_0402_1%
12
C39
10U_0805_10V4Z@
1
2
L220_0805_5%
1 2
C594.7U_0805_10V4Z
1
2
C38
0.01U_0402_16V7K
1
2
R3161.8K_0603_1%
R48
100K_0402_5%
12
D23
RB751V_SOD323
2 1
C43
4.7U_0805_10V4Z
1
2
G
D
SQ30
2N7002_SOT23 2
13 C46
0.1U_0402_16V4Z
1
2
R314
10K_0402_5%
12
Q29DTC124EK_SC59
O1
G3
I2
D34
RB751V_SOD323
2 1
R3151K_0402_1%
JP8
ACES_87216-4012
1133557799111113131515171719192121232325252727292931313333353537373939
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 40
R340_0805_5%
1 2
C60
0.047U_0402_16V4Z
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CRT_DDCCL
CRT_BLUE
TV_LUMA
TV_COMPS
3VDDCCL
3VDDCDA
CRT_DDCCL
CRT_DDCDA
HSYNC
VSYNC CRT_VSYNC_R
CRT_HSYNC
CRT_VSYNC
CRT_HSYNC_R
CRT_VSYNC_L
CRT_HSYNC_L
CRT_GREEN
CRT_RED
CRT_DDCDA
CRT_VSYNC
CRT_HSYNC
TV_CRMA
CRT_RED<13,40>
CRT_GREEN<13,40>
CRT_BLUE<13,40>
D_LUMA<13,40>
D_CRMA<13,40>
D_COMPS<13,40>
3VDDCDA<13>
3VDDCCL<13>
CRT_DDCDA <40>
CRT_DDCCL <40>
HSYNC<13>
VSYNC<13>
CRT_VSYNC <40>
CRT_HSYNC <40>
+CRTVDD+R_CRT_VCC
+5VS
+3VS +CRTVDD
+CRTVDD
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
CRT & TV out Connector
Custom
17 58Friday, April 15, 2005
2005/03/01 2006/03/11
S-Video
TV-Out Connector
CRT CONNECTOR
W=40mils
D20DAN217_SC59@
2 31
G
DS
Q32
2N7002_SOT23
2
13
C3
5P_0402_50V8C@
R3
0_0603_5%SVIDEO@
R331
20_0402_5%
1 2
D4DAN217_SC59@
2 31
R2
0_0603_5%SVIDEO@
C4400.1U_0402_16V4Z
1
2
C428
220P_0402_50V7K
JP1
SUYIN_33007SR-07T1-C
1234567
D3DAN217_SC59@
2 31
U31
74AHCT1G125GW_SOT353-5
A2 Y 4OE#
1
G3
P5
R351
4.7K_0402_5%
JP9
FOX_DZ11A91-L7
611
17
1228
1339
144
1015
5
1617
R1
0_0603_5%SVIDEO@
C422
0.1U_0402_16V4Z
1 2
C441
10P_0402_50V8J
C435
10P_0402_50V8J
G
DS
Q31
2N7002_SOT23
2
13
C448
220P_0402_50V7K
D2
RB411D_SOT23
2 1
C4
5P_0402_50V8C@
D5DAN217_SC59@
2 31
D18DAN217_SC59@
2 31
R344
4.7K_0402_5%
U32
74AHCT1G125GW_SOT353-5
A2 Y 4OE#
1
G3
P5
D19DAN217_SC59@
2 31
L32
FBM-L11-160808-800LMT 06031 2
C55P_0402_50V8C@
R330
4.7K_0402_5%
R332
20_0402_5%
1 2
R337 1K_0402_1%1 2
L33
FBM-L11-160808-800LMT 06031 2
R349
4.7K_0402_5%
F1
1.1A_6VDC_FUSE
21
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SB_32KHOSB_32KHI
PCI_AD2PCI_AD3PCI_AD4
PCI_AD1PCI_AD0
PCI_AD7
PCI_AD11
PCI_AD9PCI_AD10
PCI_AD13
PCI_AD5PCI_AD6
PCI_AD8
PCI_AD14
PCI_AD18
PCI_AD20
PCI_AD16PCI_AD15
PCI_AD17
PCI_AD19
PCI_AD12
PCI_AD24PCI_AD25PCI_AD26
PCI_AD29
PCI_AD21PCI_AD22PCI_AD23
PCI_AD27
PCI_AD30
PCI_AD28
PCI_AD31
PCI_AD[0..31]
PCI_REQ#0
PCI_GNT#0
PCI_GNT#4
PCI_PIRQA#PCI_PIRQB#
PCI_REQ#4
PCI_REQ#0PCI_REQ#1PCI_REQ#2PCI_REQ#3
PCI_FRAME#PCI_IRDY#PCI_TRDY#PCI_STOP#
PCI_SERR#PCI_PARPCI_DEVSEL#LOCK#
SB_RX0PSB_RX0NSB_RX1PSB_RX1N
SB_TX0PSB_TX0NSB_TX1PSB_TX1N
SB_RX0P_CSB_RX0N_CSB_RX1P_CSB_RX1N_C
A_RST#
ALLOW_LDTSTOP
PCICLK0_R
PCICLK2_RPCICLK3_RPCICLK4_R
PCICLK9_RPCICLKFB
A_RST#
PCIRST#
PM_CLKRUN#LOCK#
LPC_AD1LPC_AD2
LPC_AD0
LPC_FRAME#LPC_AD3
LPC_DRQ#1LPC_DRQ#0
LPC_AD1LPC_AD2LPC_AD0
LPC_AD3
PCI_PERR#
SIRQ
RTC_CLK
H_RST#
SB_32KHI
SB_32KHO
+PCIE_PVDD
+PCIE_VDDR
+PCIE_VDDR
PCI_RST#
PCI_PIRQD#PCI_PIRQC#
FWH_WP#
PCI_GNT#5
H_INIT#
PCICLK1_R
PCI_PIRQE#
PCI_PIRQG#PCI_PIRQH#
FWH_TBL#
PCI_REQ#5
PCI_REQ#5
PCI_GNT#5
PCI_PIRQF#
PCICLK5_R
SB_TX2PSB_TX2NSB_TX3PSB_TX3N
SB_TX2NSB_TX3P
SB_TX2P
SB_TX3N
PCIRST#
H_INIT#
FWH_INIT#
PCI_PERR#
PM_CLKRUN#
LPC_DRQ#0
KB_RST#
FWH_TBL#FWH_WP#
PCI_GNT#4PCI_REQ#4
PCI_GNT#0PCI_GNT#1PCI_GNT#2PCI_GNT#3
PCI_PIRQA#PCI_PIRQB#PCI_PIRQC#PCI_PIRQD#
LPC_DRQ#1SIRQ
PCI_PIRQH#PCI_PIRQG#
PCI_PIRQE#PCI_PIRQF#
PCI_AD[0..31]<22,23,27,29>
PCI_REQ#1 <29>PCI_REQ#2 <23>
PCI_GNT#1 <29>PCI_GNT#2 <23>PCI_GNT#3 <27>
PCI_TRDY# <23,27,29>
PCI_STOP# <23,27,29>
PCI_CBE#0 <23,27,29>PCI_CBE#1 <23,27,29>PCI_CBE#2 <23,27,29>PCI_CBE#3 <23,27,29>PCI_FRAME# <23,27,29>PCI_DEVSEL# <23,27,29>PCI_IRDY# <23,27,29>
PCI_PAR <23,27,29>
PCI_SERR# <23,27,29,38>
PCI_REQ#3 <27>
SB_RX0P<12>SB_RX0N<12>SB_RX1P<12>SB_RX1N<12>
SB_TX0P<12>SB_TX0N<12>SB_TX1P<12>SB_TX1N<12>
SBSRCCLK<15>SBSRCCLK#<15>
ALLOW_LDTSTOP<13>
CLK_PCI_PCM <23>
CLK_PCI_LAN <22,27>CLK_PCI_MINI <22,29>CLK_PCI_EC <22,38>
LPC_FRAME# <37,38,39>
LPC_AD1 <37,38,39>LPC_AD2 <37,38,39>
LPC_AD0 <37,38,39>
LPC_AD3 <37,38,39>
PCI_PERR# <23,27,29>
SIRQ <23,37,38>
AUTO_ON# <22>BMREQ#<13>
H_PWRGD<6>
LDTSTOP#<4,13>
RTC_CLK <22>
CLK_PCI_SIO <22,37>CLK_PCI6 <22>CLK_PCI7 <22>CLK_PCI8 <22>
PCI_RST# <23,26,27,29,32>
NB_RST# <13,26,35,37,38,39>
H_RST#<6>
FWH_WP# <39>
LPC_DRQ#0 <37>
CLK_PCI_FWH <39>
PCI_PIRQE#<23>
FWH_TBL# <39>
PCI_PIRQF#<23>PCI_PIRQG#<29>PCI_PIRQH#<27>
PM_CLKRUN# <23,27,29,37,38>
PCIRST_LCD# <16>
NB_PWRGD<13,38,41>
FWH_INIT# <39>
KB_RST#<19,38>
+3VS
+3VS
+3VS
+RTCVCC
+1.8VS
+1.8VS
+BATT1.1+RTCVCC
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
SB400-PCI-ECP/PCI/LPC/TRC
Custom
18 58Friday, April 15, 2005
2005/03/01 2006/03/11
W=20milsclose any doorW=20mils
+ -
Layoutchange
Layout and BOM change
R407 49.9_0402_1%
C185
0.1U_0402_16V4Z1
2
C267 0.01U_0402_16V8K 1 2
RP69
100K_0804_8P4R_5%
18273645
R191 8.2K_0402_5% 1 2
U38D
SN74LVC125APWLE_TSSOP14
I12 O 11OE#
13
R179 39_0402_5%1 2
R4024.12K_0603_1%1 2
Y532.768KHZ_12.5P_Q13MC30610003O
UT
4
IN1
NC
3
NC
2
R3981.2K_0402_5%
12
RP63
8.2K_0804_8P4R_5%
1 82 73 64 5
C600 0.1U_0402_16V4Z1 2
RP60
8.2K_0804_8P4R_5%
1 82 73 64 5
RP62
8.2K_0804_8P4R_5%
1 82 73 64 5
R45947K_0402_5%
12
C606 0.1U_0402_16V4Z1 2
R205 10K_0402_5% 1 2
C610 0.1U_0402_16V4Z1 2
PC
I EX
PR
ESS
INTE
RFA
CE
SB400
PC
I IN
TER
FAC
E
LP
C
RTC
CP
U
XTAL
PC
I CLK
S
U19A
218S4EASA32K SB400 BGA 564P
A_RST#AH8
PCIE_RCLKPL27PCIE_RCLKNM27
PCIE_TX0PM30PCIE_TX0NN30PCIE_TX1PK30PCIE_TX1NL30PCIE_TX2PH30PCIE_TX2NJ30PCIE_TX3PF30PCIE_TX3NG30
PCIE_RX0PM29PCIE_RX0NN29PCIE_RX1PM28PCIE_RX1NN28PCIE_RX2PJ29PCIE_RX2NK29PCIE_RX3PJ28PCIE_RX3NK28
PCIE_CALRPG27PCIE_CALRNH27
PCIE_CALIG28
PCIE_PVDDR30
PCIE_VDDR_1F26PCIE_VDDR_2R29PCIE_VDDR_3G26PCIE_VDDR_4P26PCIE_VDDR_5K26PCIE_VDDR_6L26PCIE_VDDR_7P28PCIE_VDDR_8N26PCIE_VDDR_9P27
PCIE_VSS_1H28PCIE_VSS_2F29PCIE_VSS_3H29PCIE_VSS_4H26PCIE_VSS_5F27PCIE_VSS_6G29PCIE_VSS_7L29PCIE_VSS_8J26PCIE_VSS_9L28PCIE_VSS_10J27PCIE_VSS_11N27PCIE_VSS_12M26PCIE_VSS_13K27PCIE_VSS_14P29PCIE_VSS_15P30
CPU_STP#/DPSLP#AJ8PCI_STP#AK7INTA#AG5INTB#AH5INTC#AJ5INTD#AH6INTE#/GPIO33AJ6INTF#/GPIO34AK6INTG#/GPIO35AG7INTH#/GPIO36AH7
X1B2
X2B1
CPU_PG/LDT_PGC29INTR/LINT0A28NMI/LINT1C28INIT#B29SMI#D29SLP#/LDT_STP#E4IGNNE#B30A20M#F28FERR#E28STPCLK#/ALLOW_LDTSTPE29LDT_PG/SSMUXSEL/GPIO0D25DPRSLPVRE27BMREQ#D27LDT_RST#D28
PCICLK0 L4PCICLK1 L3PCICLK2 L2PCICLK3 L1PCICLK4 M4PCICLK5 M3PCICLK6 M2PCICLK7 M1PCICLK8 N4PCICLK9 N3
PCICLK_FB N2
PCIRST# AJ7AD0/ROMA18 W3AD1/ROMA17 Y2AD2/ROMA16 W4AD3/ROMA15 Y3AD4/ROMA14 V1AD5/ROMA13 Y4AD6/ROMA12 V2AD7/ROMA11 W2
AD8/ROMA9 AA4AD9/ROMA8 V4
AD10/ROMA7 AA3AD11/ROMA6 U1AD12/ROMA5 AA2AD13/ROMA4 U2AD14/ROMA3 AA1AD15/ROMA2 U3AD16/ROMD0 T4AD17/ROMD1 AC1AD18/ROMD2 R2AD19/ROMD3 AD4AD20/ROMD4 R3AD21/ROMD5 AD3AD22/ROMD6 R4AD23/ROMD7 AD2
AD24 P2AD25 AE3AD26 P3AD27 AE2AD28 P4AD29 AF2AD30 N1AD31 AF1
CBE0#/ROMA10 V3CBE1#/ROMA1 AB4
CBE2#/ROMWE# AC2CBE3# AE4
FRAME# T3DEVSEL#/ROMA0 AC4
IRDY# AC3TRDY#/ROMOE# T2
PAR/ROMA19 U4STOP# T1PERR# AB2SERR# AB3REQ0# AF4REQ1# AF3REQ2# AG2
REQ3#/PDMA_REQ0# AG3REQ4#/PLL_BP33/PDMA_REQ1# AH1
REQ5#/GPIO13 AH2REQ6#/GPIO31 AH3
GNT0# AJ2GNT1# AK2GNT2# AJ3
GNT3#/PLL_BP66/PDMA_GNT0# AK3GNT4#/PLL_BP50/PDMA_GNT1# AG4
GNT5#/GPIO14 AH4GNT6#/GPIO32 AJ4
CLKRUN# AG1LOCK# AB1
LAD0 AG25LAD1 AH25LAD2 AJ25LAD3 AH24
LFRAME# AG24LDRQ0# AH26LDRQ1# AG26
SERIRQ AK27
RTCCLK C2RTC_IRQ#/ACPWR_STRAP F3
VBAT A2RTC_GND A1
R420 39_0402_5%1 2
C607 0.1U_0402_16V4Z1 2
C604 0.1U_0402_16V4Z1 2
RP58
8.2K_0804_8P4R_5%
1 82 73 64 5
R2328.2K_0402_5%
1 2
J4
JOPEN 12
RP57
8.2K_0804_8P4R_5%
1 82 73 64 5
C25018P_0402_50V8J
1
2
BATT1
CR2025 RTC BATTERY
R45747K_0402_5%
12
U38B
SN74LVC125APWLE_TSSOP14
I5 O 6OE#
4
R446 8.2K_0402_5% 1 2
R410 39_0402_5%1 2
R413 49.9_0402_1%
JP16
E&T_7651
21
L18 CHB2012U121_0805
1 2
U38A
SN74LVC125APWLE_TSSOP14
I2 O 3OE#
1
P14
G7
C279 10U_0805_10V4Z1 2
R2338.2K_0402_5%
1 2
RP68
10K_0804_8P4R_5%
18273645
R153
20M_0603_5%
1 2
R45633_0402_5%
1 2
R162150_0402_1%
12
R4608.2K_0402_5%
12
R518 0_0402_5%1 2
ZZZ
LA-2541 REV0 M/B
R424 39_0402_5%1 2
R411150_0402_1%
12
C591 0.1U_0402_16V4Z1 2
R122
1K_0402_5% 1 2
R5190_0402_5%@12
C270 0.1U_0402_16V4Z1 2
RP61
8.2K_0804_8P4R_5%
1 82 73 64 5
R423 39_0402_5%1 2
RP59
8.2K_0804_8P4R_5%
1 82 73 64 5
C269 0.01U_0402_16V8K 1 2C268 0.01U_0402_16V8K 1 2
R15520M_0603_5%
12
R416 49.9_0402_1%
Q10MMBT3904_SOT23
2
31
R414 39_0402_5%1 2
C25118P_0402_50V8J
1
2
C605 0.1U_0402_16V4Z@1 2
R458 33_0402_5% 1 2
R154470_0402_5%
1 2
C635 0.1U_0402_16V4Z 1 2
L19
FBML10160808121LMT_0603
1 2
C2451U_0603_10V4Z
1
2
C265 0.01U_0402_16V8K 1 2
R167 49.9_0402_1%
R181 39_0402_5%1 2
R4001.2K_0402_5%
12 Q38
MMBT3904_SOT23
2
31
C272 1U_0603_10V4Z1 2
C598 0.1U_0402_16V4Z1 2
C266 22U_1206_10V4Z1 2
C589 0.1U_0402_16V4Z1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CPPE_DOCK#CPPE_NC#
BT_DETECT#
WAKEUP_NC#THERM_SCI#
USB_OC7#
+AVDDRX
+AVDDTX
+AVDDRX
+AVDDTX
AC97_SDIN2
AC97_BITCLK
+AVDDC
+AVDDC
PCI_PME#
SB_SLP_S3#SB_SLP_S5#ON/OFFBTN#
NIC_WAKE#
SB_SLP_S3#
SB_SLP_S5#
LAN_LINK#
LID_SW#
PM_RSMRST#
BRD_ID1AGP_STP#AGP_BUSY#
SB_SCLK
SB_SCLK
SB_SDAT
AC97_BITCLK
AC97_SDIN0
AC97_SDIN1
AC97_SDIN2
AC97_RST#
AC97_SDIN1
S3_STATE
BT_OFF
BT_OFF
OCP#
NIC_WAKE#
RUNSCI_EC#
SYS_RESET#
RUNSCI_EC#
MUTE#BRD_ID0
SB_GPIO12
AC97_SDIN0
USB_VREFOUTPREP#
LID_SW#
SB_LOW_BAT#
PREP#
BRD_ID0
SB_SDAT
SD_DETECT#SD_DETECT#
OCP#
BT_DETECT#
LAN_LINK#
S3_STATE
USB_OC7#
SB_LOW_BAT#
THERM_SCI#
XMIT_OFF#
EXPCRD_RST#
EXPCRD_RST#
WAKEUP_NC#
NEWCARD_RST
GATEA20
BRD_ID1
AGP_BUSY#
PCI_PME#
SYS_RESET#
MUTE#
BRD_ID1
AGP_STP#
AC97_BITCLK
PM_RSMRST#
NEWCARD_RST
SB_SLP_S3#
PM_RSMRST#
USBP2+ <34>USBP2- <34>
USBP0- <40>USBP0+ <40>
USBP1+ <34>USBP1- <34>
USBP3- <40>USBP3+ <40>
USBP4- <34>
USBP6- <26>USBP6+ <26>
USBP7- <34>USBP7+ <34>
AC97_RST#<30>
AC97_BITCLK<30>
SB_SPDIFO<22>
H_THERMTRIP#<6>
PCI_PME#<23,29>
SB_SLP_S5#<46>ON/OFFBTN#<39>
SB_PWRGD<38>
PM_RSMRST#<38,46>
SB_SPKR<30>SB_SCLK<4,8,9,15>
AC97_SDOUT<22,30>
WAKEUP_NC# <26>
CPPE_DOCK# <15,40>CPPE_NC# <26>
THERM_SCI# <4>
GATEA20<38>KB_RST#<18,38>
USBP5- <34>
USBP4+ <34>
USBP5+ <34>
USBCLK_EXT <15>
AC97_SYNC<30>
LID_SW# <16,39>
SB_SDAT<4,8,9,15>
OCP#<52>BT_OFF<34>
RUNSCI_EC#<38>
NIC_WAKE#<27>
PREP#<40>
LOW_BAT# <38>
BT_DETECT# <34>
XMIT_OFF#<29>EXPCRD_RST#<40>
LAN_LINK#<27,28,40>
MUTE#<32>
AC97_SDIN0<30>
NEWCARD_RST<26>
SB_INT<15>
SLP_S3#<26,38,40,42>KBC_GPIO12 <38>
+3VALW
+3VALW
+3VALW
+3VALW
+3VS
+3VALW
+3VL+3VALW
+3VALW
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
SB400 USB/ACPI/AC97/GPIO
Custom
19 58Friday, April 15, 2005
2005/03/01 2006/03/11
featureBRD_ID0
Board ID Settings
BRD_ID1
0
0 full-featured 0
1 de-featured
BOM and layout modify
C573 0.1U_0402_16V4Z1 2
C592 10U_0805_10V4Z1 2
R156 10K_0402_5% 1 2
R38510K_0402_5%
1 2
C574 0.1U_0402_16V4Z1 2C590
10P_0402_25V8K@
1
2
R145
10K_0402_5%
12
T19 PAD
R405 8.2K_0402_5% 1 2
R412 10K_0402_5% 1 2
R144 47K_0402_5%1 2
R169 10K_0402_5% 1 2
R152 10K_0402_5% 1 2
R164 33_0402_5% 1 2
R141 10K_0402_5% 1 2
R381 10K_0402_5%@1 2
C562 1U_0603_10V4Z 1 2
R392 10K_0402_5% 1 2
C564 10U_0805_10V4Z1 2
R403 10K_0402_5% 1 2
R409 10K_0402_5% 1 2
U43TC7SH08FU_SSOP5@
B 1
A 2Y4
P5
G3
L41 CHB2012U121_0805
1 2
R143 4.7K_0402_5% 1 2
C572 0.1U_0402_16V4Z1 2
R147 2.2K_0402_5% 1 2
US
B IN
TER
FAC
E
SB400
US
B P
WR
CLK
/ R
ST
ACPI
/WAK
E U
P EV
ENTS
GP
IOA
C97
(NO
T U
SE
D)
U19B
218S4EASA32K SB400 BGA 564P
TALERT#/TEMP_ALERT#/GPIO10C6BLINK/GPM6#D5PCI_PME#/GEVENT4#C4RI#/EXTEVNT0#D3SLP_S3#B4SLP_S5#E3PWR_BTN#B3PWR_GOODC3SUS_STAT#D4TEST1F2TEST0E2GA20INAJ26KBRST#AJ27SMBALERT#/THRMTRIP#/GEVENT2#D6LPC_PME#/GEVENT3#C5LPC_SMI#/EXTEVNT1#A25VOLT_ALERT#/S3_STATE/GEVENT5#D8SYS_RESET#/GPM7#D7WAKE#/GEVENT8#D2
RSMRST#D1
14M_X1/OSCA23
14M_X2B23
SIO_CLKAK24
ROM_CS#/GPIO1B25GHI#/GPIO6C25VGATE/GPIO7C23AGP_STP#/GPIO4D24AGP_BUSY#/GPIO5D23FANOUT0/GPIO3A27SPKR/GPIO2C24SCL0/GPOC0#A26SDA0/GPOC1#B26DDC1_SCL/GPIO9B27DDC1_SDA/GPIO8C26DDC2_SCL/GPIO11C27DDC2_SDA/GPIO12D26
NC1J2NC4K3NC3J3NC2K2
AC_BITCLKG1AC_SDOUTG2AC_SDIN0H4AC_SDIN1G3AC_SDIN2G4AC_SYNCH1AC_RST#H3SPDIF_OUTH2
48M_X1/USBCLK A1548M_X2 B15
USB_RCOMP C15USB_VREFOUT D16
USB_ATEST1 C16USB_ATEST0 D15
USB_OC0#/GPM0# B8USB_OC1#/GPM1# C8
USB_OC2#/FANOUT1/GPM2# C7USB_OC3#/GPM3# B7USB_OC4#/GPM4# B6USB_OC5#/GPM5# A6
USB_OC6#/FAN_ALERT#/GEVENT6# B5USB_OC7#/CASE_ALERT#/GEVENT7# A5
USB_HSDP7+ A11USB_HSDM7- B11
USB_HSDP6+ A10USB_HSDM6- B10
USB_HSDP5+ A14USB_HSDM5- B14
USB_HSDP4+ A13USB_HSDM4- B13
USB_HSDP3+ A18USB_HSDM3- B18
USB_HSDP2+ A17USB_HSDM2- B17
USB_HSDP1+ A21USB_HSDM1- B21
USB_HSDP0+ A20USB_HSDM0- B20
AVDDTX_0 C21AVDDTX_1 C18AVDDTX_2 D13AVDDTX_3 D10AVDDRX_0 D20AVDDRX_1 D17AVDDRX_2 C14AVDDRX_3 C11
AVDDC A16
AVSSC B16
AVSS_USB_1 A9AVSS_USB_2 A12AVSS_USB_3 A19AVSS_USB_4 A22AVSS_USB_5 B9AVSS_USB_6 B12AVSS_USB_7 B19AVSS_USB_8 B22AVSS_USB_9 C9
AVSS_USB_10 C10AVSS_USB_11 C12AVSS_USB_12 C13AVSS_USB_13 C17AVSS_USB_14 C19AVSS_USB_15 C20AVSS_USB_16 C22AVSS_USB_17 D9AVSS_USB_18 D11AVSS_USB_19 D12AVSS_USB_20 D14AVSS_USB_21 D18AVSS_USB_22 D19AVSS_USB_23 D21AVSS_USB_24 D22
R37810K_0402_5%7611@
1 2
L37 FBML10160808121LMT_06031 2
R140 10K_0402_5% 1 2
R159 10K_0402_5% 1 2
L38 CHB2012U121_0805
1 2
U12TC7SH08FU_SSOP5
B 1
A 2Y4
P5
G3
R391 10K_0402_5% 1 2
D24
RB751V_SOD323
2 1
R5540_0402_5%
12
R379 10K_0402_5%4510@1 2
R149 10K_0402_5% 1 2
R390 10K_0402_5% 1 2
R173 33_0402_5% 1 2
R377 10K_0402_5% 1 2
R148 2.2K_0402_5% 1 2
R383 10K_0402_5%1 2R388
10K_0402_5%
12
C563 1U_0603_10V4Z 1 2
R387 10K_0402_5% 1 2
C576 0.1U_0402_16V4Z1 2
C594 1U_0603_10V4Z 1 2
R397 10K_0402_5% 1 2
R219 2.2K_0402_5% 1 2
R146 10K_0402_5% 1 2
R386 10K_0402_5%1 2
R399 4.7K_0402_5% 1 2
R382 10K_0402_5% 1 2
R160 10K_0402_5% 1 2
R384 10K_0402_5%1 2
C570 0.1U_0402_16V4Z1 2
R142 4.7K_0402_5% 1 2
R502 100K_0402_1%1 2
R389 10K_0402_5% 1 2
R490
10K_0402_5%
12
C565 10U_0805_10V4Z1 2
C575 0.1U_0402_16V4Z1 2
C571 0.1U_0402_16V4Z1 2
R408
10_0402_5%@
12
R380 10K_0402_5%1 2
R393 11.8K_0402_1%
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PD_D1PD_D0
PD_D2PD_D3
PD_D8PD_D9PD_D10PD_D11PD_D12PD_D13PD_D14PD_D15
PD_D4PD_D5PD_D6PD_D7
PD_D[0..15]
SD_D[0..15]
PD_A0PD_A1PD_A2
PD_CS#3PD_CS#1PD_IOW#PD_IOR#
PD_DACK#
PD_IRQAPD_IORDY
SD_D0
SD_D2SD_D1
SD_D3SD_D4SD_D5SD_D6SD_D7SD_D8
SD_D10SD_D9
SD_D11
SD_D15SD_D14SD_D13SD_D12
SD_SBA0
SD_SBA2SD_SBA1
SD_SCS3#SD_SCS1#
SD_SIOR#SD_SIOW#
SD_DACK#
SD_IRQASD_IORDY
PD_DREQ#
SD_DREQ#
PD_D[0..15]<35>
SD_D[0..15]<35>
PD_IRQA <35>PD_IORDY <35>
PD_A0 <35>PD_A1 <35>PD_A2 <35>
PD_CS#1 <35>PD_CS#3 <35>
PD_IOR# <35>PD_IOW# <35>
PD_DACK# <22,35>
SD_SBA0 <35>SD_SBA1 <35>SD_SBA2 <35>
SD_SCS1# <35>SD_SCS3# <35>
SD_SIOR# <35>SD_SIOW# <35>
SD_DACK# <35>
SD_IRQA <35>SD_IORDY <35>
PD_DREQ# <35>
SD_DREQ# <35>
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
SB400 IDE/SATA
Custom
20 58Friday, April 15, 2005
2005/03/01 2006/03/11
SEC
ON
DAR
Y AT
A 66
/100
PRIM
ARY
ATA
66/1
00
SB400
SER
IAL
ATA
POW
ER
SER
IAL
ATA
U19C
218S4EASA32K SB400 BGA 564P
SATA_TX0+AK22SATA_TX0-AJ22
SATA_RX0-AK21SATA_RX0+AJ21
SATA_TX1+AK19SATA_TX1-AJ19
SATA_RX1-AK18SATA_RX1+AJ18
SATA_TX2+AK14SATA_TX2-AJ14
SATA_RX2-AK13SATA_RX2+AJ13
SATA_TX3+AK11SATA_TX3-AJ11
SATA_RX3-AK10SATA_RX3+AJ10
SATA_CALAJ15
SATA_X1AJ16
SATA_X2AK16
SATA_ACT#AK8
PLLVDD_SATAAH15
XTLVDD_SATAAH16
AVDD_SATA_1AG10AVDD_SATA_2AG14AVDD_SATA_3AH12AVDD_SATA_4AG12AVDD_SATA_5AG18AVDD_SATA_6AG21AVDD_SATA_7AH18AVDD_SATA_8AG20
AVSS_SATA_1AG9AVSS_SATA_2AF10AVSS_SATA_3AF11AVSS_SATA_4AF12AVSS_SATA_5AF13AVSS_SATA_6AF14AVSS_SATA_7AF15AVSS_SATA_8AF16AVSS_SATA_9AF17AVSS_SATA_10AF18AVSS_SATA_11AF19AVSS_SATA_12AF20AVSS_SATA_13AF21AVSS_SATA_14AF22AVSS_SATA_15AH9AVSS_SATA_16AG11AVSS_SATA_17AG15AVSS_SATA_18AG17AVSS_SATA_19AG19AVSS_SATA_20AG22AVSS_SATA_21AG23AVSS_SATA_22AF9AVSS_SATA_23AH17AVSS_SATA_24AH23AVSS_SATA_25AH13AVSS_SATA_26AH20AVSS_SATA_27AK9AVSS_SATA_28AJ12AVSS_SATA_29AK17AVSS_SATA_30AK23AVSS_SATA_31AH10AVSS_SATA_32AJ23
PIDE_IORDY AD30PIDE_IRQ AE28
PIDE_A0 AD27PIDE_A1 AC27PIDE_A2 AD28
PIDE_DACK# AD29PIDE_DRQ AE27PIDE_IOR# AE30
PIDE_IOW# AE29PIDE_CS1# AC28PIDE_CS3# AC29
PIDE_D0 AF29PIDE_D1 AF27PIDE_D2 AG29PIDE_D3 AH30PIDE_D4 AH28PIDE_D5 AK29PIDE_D6 AK28PIDE_D7 AH27PIDE_D8 AG27PIDE_D9 AJ28
PIDE_D10 AJ29PIDE_D11 AH29PIDE_D12 AG28PIDE_D13 AG30PIDE_D14 AF30PIDE_D15 AF28
SIDE_IORDY V29SIDE_IRQ T27
SIDE_A0 T28SIDE_A1 U29SIDE_A2 T29
SIDE_DACK# V30SIDE_DRQ U28SIDE_IOR# W29
SIDE_IOW# W30SIDE_CS1# R27SIDE_CS3# R28
SIDE_D0/GPIO15 V28SIDE_D1/GPIO16 W28SIDE_D2/GPIO17 Y30SIDE_D3/GPIO18 AA30SIDE_D4/GPIO19 Y28SIDE_D5/GPIO20 AA28SIDE_D6/GPIO21 AB28SIDE_D7/GPIO22 AB27SIDE_D8/GPIO23 AB29SIDE_D9/GPIO24 AA27
SIDE_D10/GPIO25 Y27SIDE_D11/GPIO26 AA29SIDE_D12/GPIO27 W27SIDE_D13/GPIO28 Y29SIDE_D14/GPIO29 V27SIDE_D15/GPIO30 U27
AVSS_SATA_33 AG13AVSS_SATA_34 AH22AVSS_SATA_35 AK12AVSS_SATA_36 AH11AVSS_SATA_37 AJ17AVSS_SATA_38 AH14AVSS_SATA_39 AH19AVSS_SATA_40 AJ20AVSS_SATA_41 AH21AVSS_SATA_42 AJ9AVSS_SATA_43 AG16AVSS_SATA_44 AK15AVSS_SATA_45 AK20
+AVDD_CK
+V5_VREF
+3VS
+1.8VS
+3VALW
+1.8VALW
+1.2V_HT
+1.8VS
+3VS
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
SB400 Power/GND
Custom
21 58Friday, April 15, 2005
2005/03/01 2006/03/11
C627 0.1U_0402_16V4Z1 2
C578 0.1U_0402_16V4Z1 2
C624 0.1U_0402_16V4Z1 2
C244 22U_1206_10V4Z1 2
C614 0.1U_0402_16V4Z1 2
C289 22U_1206_10V4Z1 2
D10
RB751V_SOD323
2 1
C567 0.1U_0402_16V4Z1 2
C597 10U_0805_10V4Z1 2
C595 0.1U_0402_16V4Z1 2
C626 0.1U_0402_16V4Z1 2
C586 0.1U_0402_16V4Z1 2
C2921U_0603_10V4Z
1
2
SB400
POW
ER
U19D
218S4EASA32K SB400 BGA 564P
VDDQ_1A30VDDQ_2D30VDDQ_3E24VDDQ_4E25VDDQ_5J5VDDQ_6K1VDDQ_7K5VDDQ_8N5VDDQ_9P5VDDQ_10R1VDDQ_11U5VDDQ_12U26VDDQ_13U30VDDQ_14V5VDDQ_15V26VDDQ_16Y1VDDQ_17Y26VDDQ_18AA5VDDQ_19AA26VDDQ_20AB5VDDQ_21AC30VDDQ_22AD5VDDQ_23AD26VDDQ_24AE1VDDQ_25AE5VDDQ_26AE26VDDQ_27AF6VDDQ_28AF7VDDQ_29AF24VDDQ_30AF25VDDQ_31AK1VDDQ_32AK4VDDQ_33AK26VDDQ_34AK30
VDD_1M12VDD_2M13VDD_3M18VDD_4M19VDD_5N12VDD_6N13VDD_7N18VDD_8N19VDD_9V12VDD_10V13VDD_11V18VDD_12V19VDD_13W12VDD_14W13VDD_15W18VDD_16W19
S5_3.3V_1A3S5_3.3V_2A7S5_3.3V_3E6S5_3.3V_4E7S5_3.3V_5E1S5_3.3V_6F5
S5_1.8V_1E9S5_1.8V_2E10S5_1.8V_3E20S5_1.8V_4E21
USB_PHY_1.8V_1E13USB_PHY_1.8V_2E14USB_PHY_1.8V_3E16USB_PHY_1.8V_4E17
CPU_PWRC30
V5_VREFAG6
AVDDCKA24AVSSCKB24
VSS_1A4VSS_2A8VSS_3A29VSS_4B28VSS_5C1VSS_6E5VSS_7E8VSS_8E11VSS_9E12VSS_10E15VSS_11E18
VSS_12 E19VSS_13 E22VSS_14 E23VSS_15 E26VSS_16 E30VSS_17 F1VSS_18 F4VSS_19 G5VSS_20 H5VSS_21 J1VSS_22 J4VSS_23 K4VSS_24 L5VSS_25 M5VSS_26 P1VSS_27 R5VSS_28 R26VSS_29 T5VSS_30 T26VSS_31 T30VSS_32 W1VSS_33 W5VSS_34 W26VSS_35 Y5VSS_36 AB26VSS_37 AB30VSS_38 AC5VSS_39 AC26VSS_40 AD1VSS_41 AF5VSS_42 AF8VSS_43 AF23VSS_44 AF26VSS_45 AG8VSS_46 AJ1VSS_47 AJ24VSS_48 AJ30VSS_49 AK5VSS_50 AK25VSS_51 M14VSS_52 M15VSS_53 M16VSS_54 M17VSS_55 N14VSS_56 N15VSS_57 N16VSS_58 N17VSS_59 P12VSS_60 P13VSS_61 P14VSS_62 P15VSS_63 P16VSS_64 P17VSS_65 P18VSS_66 P19VSS_67 R12VSS_68 R13VSS_69 R14VSS_70 R15VSS_71 R16VSS_72 R17VSS_73 R18VSS_74 R19VSS_75 T12VSS_76 T13VSS_77 T14VSS_78 T15VSS_79 T16VSS_80 T17VSS_81 T18VSS_82 T19VSS_83 U12VSS_84 U13VSS_85 U14VSS_86 U15VSS_87 U16VSS_88 U17VSS_89 U18VSS_90 U19VSS_91 V14VSS_92 V15VSS_93 V16VSS_94 V17VSS_95 W14VSS_96 W15VSS_97 W16VSS_98 W17
C601 0.1U_0402_16V4Z1 2
L39
FBM-L11-321611-260-LMT_1206
12
R451 1K_0402_5%1 2
C561 1U_0603_10V4Z1 2
C623 0.1U_0402_16V4Z1 2
C579 0.1U_0402_16V4Z1 2C580 0.1U_0402_16V4Z1 2
C582 0.1U_0402_16V4Z1 2
C566 0.1U_0402_16V4Z1 2
C622 0.1U_0402_16V4Z1 2
C584 0.1U_0402_16V4Z1 2
C631 0.1U_0402_16V4Z1 2
C6290.1U_0402_16V4Z1
2
C616 0.1U_0402_16V4Z1 2
C569 0.1U_0402_16V4Z1 2
C252 0.1U_0402_16V4Z12
C612 0.1U_0402_16V4Z1 2
C286 22U_1206_10V4Z1 2
C602 0.1U_0402_16V4Z1 2
C628 0.1U_0402_16V4Z1 2
C587 0.1U_0402_16V4Z1 2
C618 0.1U_0402_16V4Z1 2
C613 0.1U_0402_16V4Z1 2
C568 0.1U_0402_16V4Z1 2
C603 0.1U_0402_16V4Z1 2
C630 0.1U_0402_16V4Z1 2
C608 0.1U_0402_16V4Z1 2
C302 22U_1206_10V4Z1 2
C599 0.1U_0402_16V4Z1 2
C577 0.1U_0402_16V4Z1 2
C621 0.1U_0402_16V4Z1 2
C583 0.1U_0402_16V4Z1 2
C581 0.1U_0402_16V4Z1 2
C585 0.1U_0402_16V4Z1 2
C609 0.1U_0402_16V4Z1 2
C620 0.1U_0402_16V4Z1 2
C615 0.1U_0402_16V4Z1 2
C617 0.1U_0402_16V4Z1 2
C625 0.1U_0402_16V4Z1 2
C611 0.1U_0402_16V4Z1 2
C619 0.1U_0402_16V4Z1 2
C559 10U_0805_10V4Z1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI8<18>
CLK_PCI_SIO<18,37>
CLK_PCI_MINI<18,29>
RTC_CLK<18>SB_SPDIFO<19>
AUTO_ON#<18>AC97_SDOUT<19,30>
CLK_PCI7<18>
CLK_PCI_EC<18,38>
CLK_PCI6<18>
PD_DACK#<20,35>
PCI_AD30<18,23,27,29>PCI_AD31<18,23,27,29>
PCI_AD29<18,23,27,29>PCI_AD28<18,23,27,29>
PCI_AD26<18,23,27,29>
PCI_AD24<18,23,27,29>
PCI_AD27<18,23,27,29>
PCI_AD25<18,23,27,29>
PCI_AD23<18,23,27,29>
LOAD_ROM#<13>
SPMEM_EN#<13>
CLK_PCI_LAN<18,27>
+3VALW +3VS +3VALW +3VS +3VS +3VS +3VS +3VS +3VS +3VS
+3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
Hardware Strap
Custom
22 58Friday, April 15, 2005
2005/03/01 2006/03/11
INTERNALRTC
DEFAULT
USEDEBUGSTRAPS
CLK_PCI_MINI
CPU I/F = K8
AUTOPWRON
EXTERNALRTC (NOTSUPPORTEDW/ IT8712 )
CLK_PCI6
SIO 24MHz
PCI_CLK8
ROM TYPEPULLHIGH
CLK_PCI_SIO
DEFAULT
14MHz XTALMODE
SIO 48MHzDEFAULT
DEFAULT
MANUALPWR ON
PULLLOW
DEFAULT
CLK_PCI_EC
14MHz OSCMODE
RTC_CLK
DEFAULT
L,L = FWH ROM
H,H = PCI ROM
AC97_SDOUT SB_SPDIFO
IGNOREDEBUGSTRAPS
CLK_PCI7
L,H = NORMAL LPC ROM
DEFAULT
CPU I/F = P4
DEFAULT
AUTO_ON#
H,L = PMC LPC ROM
USB PHYPWRDOWNENABLE
ACPWRON
REQUIRED STRAPS
PCI_AD23
DEBUG STRAPS
PCI_AD25 PCI_AD24
USE EEPROMPCIE STRAPS
USE DEFAULTPCIE STRAPS
DEFAULT
BY PASS USB PLL
USE USBPLL
DEFAULT
PCI_AD29
BYPASSACPIBCLK
USEACPIBCLKDEFAULT
PLL CHARGEPUMP CTRLBIT 1 HI
PD_DACK#
PLL VCOCTRL BIT1 HI
USE IDEPLL
USE PCIPLL
PLL CHARGEPUMP CTRLBIT 0 LO
DEFAULT
DEFAULT
BYPASS IDEPLL
PULLHIGH
PCI_AD31 PCI_AD30
DEFAULT
DEFAULT
BYPASSPCI PLL
DEFAULT
PLL VCOCTRL BIT1 LO
PCI_AD27 PCI_AD26
PULLLOW
PCI_AD28
PLL CHARGEPUMP CTRLBIT 1 LO
PLL VCOCTRL BIT0 LO
PLL VCOCTRL BIT0 HI
DEFAULT
PLL CHARGEPUMP CTRLBIT 0 HI
NB STRAPS(internalpulled up)
Low, SIDE PORT MEMORY ENABLEHigh, SIDE PORT MEMORY DISABLE
SPMEM_EN#:SIDE PORT MEMORY ENABLE strap
High, LOAD ROM STRAP DISABLE
LOAD_ROM#:LOAD ROM STRAP ENABLE strap
Low, LOAD ROM STRAP ENABLE
INTERNAL48MHz
EXTERNAL48MHz
USELONGRESET
USESHORTRESET
DEFAULT
CLK_PCI_LAN
DEFAULT
48MHz OSC /Clock buffer MODE
48MHz XTALMODE
USB PHYPWRDOWNDISABLEDEFAULT
R17210K_0402_5%
12
R18810K_0402_5%@
12
R442
10K_0402_5%@
12
R195
10K_0402_5%@
12
R194
10K_0402_5%
12
R418
10K_0402_5%@
12
R43010K_0402_5%
12
R43310K_0402_5%
12
R428
10K_0402_5%
12
R42510K_0402_5%@
12
R43210K_0402_5%
12
R42110K_0402_5%
12
R2021K_0402_5%@
12
R440
10K_0402_5%
12
R42910K_0402_5%@
12
R426
10K_0402_5%@
12
R19810K_0402_5%
12
R168
10K_0402_5%@
12
R4040_0402_5%@
12
R183
10K_0402_5%@
12
R3413K_0402_5%@
12
R200
10K_0402_5%@
12
R180
10K_0402_5%
12
R171
10K_0402_5%
12
R170
10K_0402_5%@
12
R43410K_0402_5%@
12
R18710K_0402_5%
12
R199
10K_0402_5%
12
R18410K_0402_5%@
12
R40610K_0402_5%
12
R437
10K_0402_5%@
12
R17810K_0402_5%@
12
R163
10K_0402_5%
12
R39610K_0402_5%
12
R422
10K_0402_5%
12
R203
10K_0402_5%
12
R427
10K_0402_5%@
12
R18510K_0402_5%
12
R3423K_0402_5%@
12
R43110K_0402_5%@
12
R417
10K_0402_5%
12
R204
10K_0402_5%@
12
R439
10K_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
X_IN
X_OUT
PCI_AD20CLK_PCI_PCM
XTPB1-
XTPBIAS1
XTPBIAS0
XTPB0+
+VDDPLL
MC_PWRON#CB_MSBS_SDCMD_SMWE#
MSBS_SDCMD_SMWE#
CB_SDCLK_SMRE#
SDCLK_SMRE# CB_SDWP#_SMCE#
SDWP#_SMCE#
PHY_TEST
MC_PWRON#
CPS
+VDDPLL
CNA
CB_SDCLK_SMRE#
CLK_48M_CB
XTPB1-
XTPBIAS1
X_IN
PCI_CBE#3
PCI_AD10
PCI_AD21
CB_SM_RB#
PCI_AD3
PCI_AD12
PCI_AD17
PHY_TEST
PCI_AD4
PCI_AD29
PCI_AD31
XTPBIAS0
XTPB1+
XTPB0-
PCI_AD22
PCI_AD24
CNA
PCI_CBE#0
PCI_AD7
PCI_AD18PCI_AD19
XTPA0+
CARD_LED
PCI_AD16
PCI_AD23
PCI_AD30
PCI_AD13
PCI_AD26PCI_AD25
XTPA0-
CPS
+VD
DP
LL
XTPA0-
PCI_AD8
PCI_AD14PCI_AD15
PCM_SPK#
PCM_SPK#
XTPB1+
CB_PME#PCI_AD1
PCI_AD5
XTPB0-XTPB0+
CB_PME#
PCI_AD11
PCI_AD27
XTPA0+
PCI_AD20
PCI_CBE#2
X_OUTPCI_AD9
PCI_AD28
PCI_AD6
PCI_AD0
PCI_CBE#1
PCI_AD2
MC_PWRON#
SM_RB#
CB_SM_RB#
VR_EN#
CLK_48M_CB
PCI_RST# <18,26,27,29,32>
PCI_PIRQF# <18>
PCI_PME# <19,29>
CLK_48M_CB<15>
PCI_SERR# <18,27,29,38>
PCI_IRDY# <18,27,29>
CLK_PCI_PCM <18>
SIRQ <18,37,38>
PCI_PERR# <18,27,29>
PCI_TRDY# <18,27,29>
PCI_GNT#2 <18>
PCI_PIRQE# <18>
PCM_SPK# <30>
PCI_PAR <18,27,29>
PCI_REQ#2 <18>
PM_CLKRUN# <18,27,29,37,38>
PCI_DEVSEL# <18,27,29>
VCCD1#<26>
PCI_FRAME# <18,27,29>
PCI_STOP# <18,27,29>
PCI_CBE#[0..3] <18,27,29>
PCI_AD[0..31] <18,22,27,29>
MC_PWRON#<25>
SM_CD#<25>
SDCMD_SMALE<25>SDD0_SMD4<25>SDD1_SMD5<25>SDD2_SMD6<25>
CB_SDWP#_SMCE#<25>SDD3_SMD7<25>
MS_CD#<25>SD_CD#<25>
MSCLK_SDCLK_SMELWP#<25>CB_MSBS_SDCMD_SMWE#<25>
MSD3_SDD3_SMD3<25>MSD2_SDD2_SMD2<25>
SMCLE<25>
CARD_LED<25>
MSBS_SDCMD_SMWE#<25>
SDCLK_SMRE#<25>
SM_RB# <25>
SDWP#_SMCE# <25>
MSD0_SDD0_SMD0<25>MSD1_SDD1_SMD1<25>
+3VS
+3VS
+3VS_PLL
+3VS
+3VS
+3VS
+3VS
+5VS
+3VS
+3VS
+3VS
+3VS_PLL
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
CardBus Controller TI7611
Custom
23 58Friday, April 15, 2005
2005/03/01 2006/03/11
when VR_EN# is low, internalregulator is actived
TI requires to pull high this pin
If EEPROM is unused, SCL/SDA must bepulled down to GND with 220ohm resistor.
CLOSE TO CHIP
CLOSE TO CHIP
put C331 as close tocontroller as possible GREEN
CARDREADER LED
Layout change
BOM change
Layout change
R532 0_0402_5%7611@1 2
C331
0.1U_0402_16V4Z7611@1 2
R495
1K_0402_5%7611@1 2
D17
12-21SYGC/S530-E1/TR8_GRN7611@
21
3
C33
30.
1U_0
402_
16V4
Z
1
2
R251
10K_0402_5%1 2
C314
220P_0603_50V8J
1
2
C334
1U_0603_10V4Z
1
2
R244
56.2_0603_1%
12
R537 0_0402_5%7611@1 2
R252 6.34K_0402_1%1 2
PCI7
621/
7611
/742
1/74
11
U23B
SNC1R21GHK_PBGA288
SPKROUT L7
SUSPEND# R2
VR_EN# H2
SCL M3SDA M2
VSPL
LP1
4VS
PLL
T17
VDPL
L_15
T18
VR_P
OR
TM
19VR
_PO
RT
H1
VCC
PW
10VC
CP
W3
VDPL
L_33
V19
R0U18R1U19
XOR19
XIR18
SM_PHYS_WP#/SC_FCBK2
TEST0P12NCW17RSVDT19
CLK_48M1
SC_CD#L2
SC_DATAL1
SC_CLKK5
SC_PWR_CTRLL5 SC_OC#L3
SC_VCC_5VK7 SC_RSTK3
SM_CLE/SC_GPIO0J7SM_R#/SC_RFUK1
SD_CLK/SM_RE#/SC_GPIO1J5SD_CMD/SM_ALE/SC_GPIO2J3SD_DAT0/SM_D4/SC_GPIO6H3SD_DAT1/SM_D5/SC_GPIO5J6SD_DAT2/SM_D6/SC_GPIO4J1SD_DAT3/SM_D7/SC_GPIO3J2SD_WP/SM_CE#H7
MS_CLK/SD_CLK/SM_EL_WP#G5MS_BS/SD_CMD/SM_WE#F3MS_DATA3/SD_DAT3/SM_D3H5MS_DATA2/SD_DAT2/SM_D2G3MS_DATA1/SD_DAT1/SM_D1G2MS_SDIO(DATA0)/SD_DAT0/SM_D0G1
SD_CD#E3MS_CD#F5SM_CD#F6
MC_PWR_CTRL_0F1MC_PWR_CTRL_1F2
PC0(TEST1)R12PC1(TEST2)U13PC2(TEST3)V13
PHY_TEST_MAR17CPSM11CNAP15
TPBIAS1U17TPA1+V18TPA1-W18TPB1+V16TPB1-W16
TPBIAS0U15TPA0+V15TPA0-W15TPB0+V14TPB0-W14
AGN
DN
12AG
ND
U14
AGN
DU
16
AVD
DR
13AV
DD
R14
AVD
DV1
7
AD31 U2AD30 V1AD29 V2AD28 U3AD27 W2AD26 V3AD25 U4AD24 V4AD23 V5AD22 U5AD21 R6AD20 P6AD19 W6AD18 V6AD17 U6AD16 R7AD15 V9AD14 U9AD13 R9AD12 N9AD11 V10AD10 U10
AD9 R10AD8 N10AD7 V11AD6 U11AD5 R11AD4 W12AD3 V12AD2 U12AD1 N11AD0 W13
C/BE3# W4C/BE2# W7C/BE1# W9C/BE0# W11
PAR P9FRAME# V7
TRDY# R8IRDY# U7
STOP# W8DEVSEL# N8
IDSEL W5PERR# V8SERR# U8
REQ# U1GNT# T2
MFUNC0 N3MFUNC1 M5MFUNC2 P1MFUNC3 P2MFUNC4 P3MFUNC5 N5MFUNC6 R1
PCICLK P5PCIRST# R3
GRST# T1RI_OUT#/PME# T3
R236
4.7K_0402_5%1 2
R5330_0402_5%
4510@
12
JP10SUYIN_020204FR004S506ZL
11 22 33 44
GN
D1
5G
ND
26
GN
D3
7G
ND
48
R2531M_0402_5%@
C319
0.01U_0402_16V7K 1
2
R2504.7K_0402_5%
1 2
C29
70.
1U_0
402_
16V4
Z
1
2
R247 220_0402_5%4510@
1 2
R229220_0402_5%
1 2
C303
10U_0805_10V4Z
1
2
R241
56.2_0603_1%
12
R227
10_0402_5%@
12
R538 0_0402_5%7611@1 2
C332 0.1U_0402_16V4Z4510@1 2
R224 0_0402_5%7611@1 2
R215 220_0402_5%1 2
C324
1U_0603_10V4Z1
2
R254
0_0603_5%
C291
10P_0402_25V8K@
1
2
C342 10P_0402_50V8J
R2284.7K_0402_5%
1 2
R539 0_0402_5%7611@1 2
C343 10P_0402_50V8J
C33010U_0805_10V4Z
1
2
R235100_0402_5%
1 2
X2
24.576MHZ_16P_XSL024576FG1H
12
R213
10K_0402_5%7611@1 2
R240 220_0402_5%1 2
C325
1U_0603_10V4Z1
2
R239
5.1K_0603_1%
12
R23110K_0402_5%
12
R22510K_0402_5%
12
R242
56.2_0603_1%
12
R2431K_0402_5%
12
R55610K_0402_5%@
12 Q45
MMBT3904_SOT237611@2
31
R496
220_0402_5%7611@
12
G
DS
Q182N7002_SOT23
2
13
R93
10_0402_5%@
12
R540 0_0402_5%7611@1 2
R208 10K_0402_5%7611@1 2
C317
1U_0603_10V4Z
1
2
R245
56.2_0603_1%
12
C112
10P_0402_25V8K@
1
2
C326
0.01U_0402_16V7K
1
2
R536 0_0402_5%7611@1 2
SN74CBTLV3125PWR_TSSOP14
U41
7611@
4B 11
2B6
2OE#42A5
3A 9
GND7
4A 12
VCC 14
3B 8
4OE# 131A2
1B3
1OE#1
3OE# 10
R2461K_0402_5%
12
R53133K_0402_5%@
12
R2264.7K_0402_5%
1 2
R209 0_0402_5%7611@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
S1_D[0:15]
S1_A[0..25]
S1_A16
S1_A14
S1_A20
S1_A12
S1_D12
S1_A9
S1_A2
S1_RST
S1_A4
S1_BVD1
S1_CE1#
S1_D3
S1_IOWR#
S1_CD2#
S1_WP
S1_A25
S1_A1
S1_RDY#
S1_A15
S1_D6
S1_D11
S1_D13
S1_D15
S1_WE#
S1_A8
S1_D4
S1_A6
S1_A3
S1_A0
S1_D8
S1_CD2#
S1_OE#
S1_A17
S1_CD1#
S1_A19
S1_IORD#
S1_D1S1_D9
S1_CLK
S1_INPACK#
S1_A22
S1_REG#
S1_A10
S1_A11
S1_A18
S1_A23S1_A13
S1_A5
S1_D0
S1_VS2
S1_A24
S1_A21
S1_D5
S1_BVD2
S1_CD1#
S1_D14
S1_WAIT#
S1_D2
S1_CE2#
S1_VS1
S1_D7
S1_A7
S1_D10
TPS_DATATPS_CLKTPS_LATCH
S1_D[0..15] <26>
S1_A[0..25] <26>
S1_CE2#<26>
S1_IOWR#<26>
S1_IORD#<26>
S1_RST<26>
S1_REG#<26>
S1_OE#<26>
S1_WE#<26>
S1_CE1#<26>
S1_WAIT#<26>S1_INPACK#<26>
S1_BVD1<26>S1_WP<26>
S1_RDY#<26>
S1_BVD2<26>
S1_CD1#<26>S1_CD2#<26>S1_VS1<26>S1_VS2<26>
TPS_DATA <26>TPS_CLK <26,38>
TPS_LATCH <26>
+3VS+S1_VCC
+3VS
+3VS
+S1_VCC
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
CardBus controller TI 7611
Custom
24 58Friday, April 15, 2005
2005/03/01 2006/03/11
C323
0.1U_0402_16V4Z
1
2
R534
0_0402_5%4510@1 2
C311
0.1U_0402_16V4Z
1
2
C313
0.1U_0402_16V4Z
1
2
C3280.01U_0402_16V7K
1
2
PCI7621/7611/7421/7411
U23A
SNC1R21GHK_PBGA288
A_CRST#/A_RESETA6
A_CAUDIO/A_BVD2(SPKR#)A2
B_CRST#/B_RESET F17
B_CAUDIO/B_BVD2(SPKR#) C17
A_USB_ENE2B_USB_ENE1
A_CAD31/A_D10D1A_CAD30/A_D9C1A_CAD29/A_D1D3A_CAD28/A_D8C2A_CAD27/A_D0B1A_CAD26/A_A0B4A_CAD25/A_A1A4A_CAD24/A_A2E6A_CAD23/A_A3B5A_CAD22/A_A4C6A_CAD21/A_A5B6A_CAD20/A_A6G9A_CAD19/A_A25C7A_CAD18/A_A7B7A_CAD17/A_A24A7A_CAD16/A_A17A10A_CAD15/A_IOWR#E11A_CAD14/A_A9G11A_CAD13/A_IORD#C11A_CAD12/A_A11B11A_CAD11/A_OE#C12A_CAD10/A_CE2#B12A_CAD9/A_A10A12A_CAD8/A_D15E12A_CAD7/A_D7C13A_CAD6/A_D13F12A_CAD5/A_D6A13A_CAD4/A_D12C14A_CAD3/A_D5E13A_CAD2/A_D11A14A_CAD1/A_D4B14A_CAD0/A_D3E14
A_CC/BE3#/A_REG#C5A_CC/BE2#/A_A12F9A_CC/BE1#/A_A8B10A_CC/BE0#/A_CE1#G12
A_CPAR/A_A13G10A_CFRAME#/A_A23C8A_CTRDY#/A_A22A8A_CIRDY#/A_A15B8A_CSTOP#/A_A20A9A_CDEVSEL#/A_A21C9A_CBLOCK#/A_A19E10A_CPERR#/A_A14F10A_CSERR#/A_WAIT#B3A_CREQ#/A_INPACK#E7A_CGNT#/A_WE#B9A_CSTSCHG/A_BVD1(STSCHG/RI)B2A_CCLKRUN#/A_WP(IOIS16)C3A_CCLK/A_A16E9A_CINT#/A_READY(IREQ)C4
A_CCD1#/A_CD1#C15A_CCD2#/A_CD2#E5A_CVS1/A_VS1#A3A_CVS2/A_VS2#E8
A_CRSVD/A_D14B13A_CRSVD/A_D2D2A_CRSVD/A_A18C10
GN
DG
7G
ND
G8
GN
DG
13G
ND
H13
GN
DJ9
GN
DJ1
0G
ND
J11
GN
DK9
GN
DK1
0G
ND
K11
GN
DL8
GN
DL9
GN
DL1
0G
ND
L11
GN
DL1
2G
ND
M8
VCC
AA5
VCC
AA1
1
VCC
H8
VCC
H9
VCC
H10
VCC
H11
VCC
H12
VCC
J8VC
CM
7VC
CJ1
2VC
CM
9VC
CM
10VC
CM
12VC
CK8
VCC
K12
VCC
N7
VCC
BD
19VC
CB
K19
B_CAD31/B_D10 B15B_CAD30/B_D9 A16B_CAD29/B_D1 B16B_CAD28/B_D8 A17B_CAD27/B_D0 C16B_CAD26/B_A0 D17B_CAD25/B_A1 C19B_CAD24/B_A2 D18B_CAD23/B_A3 E17B_CAD22/B_A4 E19B_CAD21/B_A5 G15B_CAD20/B_A6 F18
B_CAD19/B_A25 H14B_CAD18/B_A7 H15
B_CAD17/B_A24 G17B_CAD16/B_A17 K17
B_CAD15/B_IOWR# L13B_CAD14/B_A9 K18
B_CAD13/B_IORD# L15B_CAD12/B_A11 L17B_CAD11/B_OE# L18
B_CAD10/B_CE2# L19B_CAD9/B_A10 M17B_CAD8B_D15 M14B_CAD7/B_D7 M15
B_CAD6/B_D13 N19B_CAD5/B_D6 N18
B_CAD4/B_D12 N15B_CAD3/B_D5 M13
B_CAD2/B_D11 P18B_CAD1/B_D4 P17B_CAD0/B_D3 P19
B_CC/BE3#/B_REG# F15B_CC/BE2#/B_A12 G18
B_CC/BE1#/B_A8 K14B_CC/BE0#/B_CE1# M18
B_CPAR/B_A13 K13B_CFRAME#/B_A23 G19
B_CTRDY#/B_A22 H17B_CIRDY#/B_A15 J13
B_CSTOP#/B_A20 J17B_CDEVSEL#/B_A21 H19B_CBLOCK#/B_A19 J19
B_CPERR#/B_A14 J18B_CSERR#/B_WAIT# B18
B_CREQ#/B_INPACK# E18B_CGNT#/B_WE# J15
B_CSTSCHG/B_BVD1(STSCHG/RI) F14B_CCLKRUN#/B_WP(IOIS16) A18
B_CCLK/B_A16 H18B_CINT#/B_READY(IREQ) B19
B_CCD1#/B_CD1# N13B_CCD2#/B_CD2# B17
B_CVS1/B_VS1# C18B_CVS2/B_VS2# F19
B_CRSVD/B_D14 N17B_CRSVD/B_D2 A15
B_CRSVD/B_A18 K15
DATA N1CLOCK L6LATCH N2
C329
0.1U_0402_16V4Z
1
2
C3040.01U_0402_16V7K
1
2
C316
1U_0603_10V4Z1
2
C3270.01U_0402_16V7K
1
2
C307
0.1U_0402_16V4Z
1
2
C32210P_0402_50V8J
C3080.01U_0402_16V7K
1
2
R237
33_0402_5%1 2
C296
1U_0603_10V4Z1
2
C32110P_0402_50V8J
C305
0.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SD_CD#SM_CD#
MSBS_SDCMD_SMWE#
SDCLK_SMRE#
SDWP#_SMCE#
SM_RB#
SD_CD#SM_PHYS_WP#
SDD3_SMD7
MSD1_SDD1_SMD1
MSCLK_SDCLK_SMELWP#
CB_SDWP#_SMCE#
SDD2_SMD6
MSD3_SDD3_SMD3
MSD3_SDD3_SMD3
MS_CD#
MSD2_SDD2_SMD2
SDD0_SMD4
SM_RB#
MSD0_SDD0_SMD0MSBS_SDCMD_SMWE#
MSD0_SDD0_SMD0
SM_CD#
MSD3_SDD3_SMD3
MSD2_SDD2_SMD2
SDCMD_SMALE
SM_CD#
CB_MSBS_SDCMD_SMWE#
CB_MSBS_SDCMD_SMWE#
SDWP#_SMCE#
MSD1_SDD1_SMD1
MSCLK_SDCLK_SMELWP#
MSD1_SDD1_SMD1MSD0_SDD0_SMD0
SDD1_SMD5
SDCLK_SMRE#
MSD2_SDD2_SMD2
MSCLK_SDCLK_SMELWP#
MC_PWRON#
MC_PWRON#
SM_CTRL#
MC_PWRON#
SM_CD# MS_CD# SD_CD#
CARD_LED<23>
SD_CD# <23>SM_CD# <23>
MSD0_SDD0_SMD0<23>MSD1_SDD1_SMD1<23>MSD2_SDD2_SMD2<23>MSD3_SDD3_SMD3<23>
SDD0_SMD4<23>SDD1_SMD5<23>SDD2_SMD6<23>SDD3_SMD7<23>
MSCLK_SDCLK_SMELWP#<23>
MSBS_SDCMD_SMWE#<23>
SDCLK_SMRE#<23>
SDWP#_SMCE#<23>
SM_RB#<23>
SDCMD_SMALE<23>
SMCLE<23>
CB_MSBS_SDCMD_SMWE# <23>CB_SDWP#_SMCE# <23>
MS_CD#<23>
SD_CD#<23>
MC_PWRON#<23>
+3VS
+SM_VCC
+SD_MS_VCC
+SM_VCC
+SM_VCC
+SD_MS_VCC
+SM_VCC
+SD_MS_VCC+3VS
+3VS+SD_MS_VCC
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
Card reader socket
Custom
25 58Friday, April 15, 2005
2005/03/01 2006/03/11
Layout and BOM change
Layout change
Layout and BOM change
Layout change
Close to card reader socket
R221
100K_0603_5%7611@
12
R52610K_0402_5%7611@1 2
C6930.1U_0402_16V4Z@
1
2
G
DS
Q50SI2301BDS_SOT237611@
2
13
D41
RB751V_SOD3237611@21
C6920.1U_0402_16V4Z@
1
2
G
D
S Q562N7002_SOT237611@2
13
R553
10K_0402_1%@
12
U42
AATI4610AIGV-T1_SOT23-5@
OUT 1
ON# 4SET3
IN5
GND 2
G
DS
Q55SI2301BDS_SOT237611@
2
13
D42
RB751V_SOD3237611@21
C6940.1U_0402_16V4Z@
1
2
D9
RB751V_SOD3237611@
21
R535
10K_0402_5%7611@1 2C690
0.1U_0402_16V4Z7611@
1
2
C688
10U_0805_10V4Z7611@
1
2
5 IN 1 CONN
JP25
TAITW_R007-010-N37611_CONN@
SM_WP-IN / XD_WP-IN35
SM-D4 / XD-D421
MS-DATA3 18
MS-DATA0 15
SD-DAT2 12
SD-DAT0 7
SD-CMD 10
MS-DATA1 14
SM-D6 / XD-D623
SD-DAT3 11
SD-DAT1 6
SD-WP-SW 5
#SM-ALE / XD-ALE37
SM-D0 / XD-D034
SD_CLK 8
SM-D2 / XD-D232
SM_-VCC / XD_-VCC29MS-INS 17
MS-DATA2 16
MS-SCLK 19
SM-LVD25
#SM_-RE / XD_-RE27 MS-BS 13
SM-D5 / XD-D522
#SM_-CD30
SM-D7 / XD-D724
SM-D1 / XD-D133
#SM_-CE / XD_-CE28
#SM_R/-B / XD_R/-B26
SM-D3 / XD-D331
SD-VCC 9
#SM_-WE / XD_-WE36
MS-VCC 20
SM-CD-COM2SM-CLE / XD-CLE38
GND 1
SD-CD-SW 42SD-CD-COM 41
XD-VCC 40XD-CD 39
SM-CD-SW3
N/C 4
SM-WP-SW43
GND 4445454646
R2140_0402_5%7611@
1 2
D8
RB751V_SOD3237611@
21
C299
0.1U_0402_16V4Z7611@
1
2
R545
100K_0603_5%7611@
12
R525
10K_0402_5%7611@1 2
R52710K_0402_5%7611@1 2
R206
100K_0402_1%7611@
1 2
R546
100K_0402_5%7611@
12
G
D
S
Q172N7002_SOT237611@
2
13
C298
10U_0805_10V4Z7611@
1
2
R547
100K_0402_5%7611@
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PERST#
CPUSB#CPPE_NC#
CPUSB#
TPS_LATCH
TPS_DATATPS_CLK
PCI_RST#
TPS_DATATPS_LATCH
TPS_CLK
S1_D[0:15]
S1_A[0..25]
TPS_CLK
S1_IOWR#
S1_WP
S1_D14
S1_D11
S1_A6
S1_D7
S1_A23
S1_A20
S1_D9
S1_RST
S1_A2
S1_A16
S1_A10
S1_A1
S1_CD1#
S1_D2
S1_A7
S1_A13
USBP6+
S1_A22
S1_A19
S1_VS1
S1_A14
PCIECLK0#
S1_D8
S1_VS2
S1_D12
S1_A3
S1_CE1#
USBP6-
S1_A9
S1_D4
S1_A17
S1_D1
S1_A12
S1_A8
S1_A18
S1_CE2#
CPUSB#
S1_BVD1
S1_A25
S1_A4
S1_CD2#
S1_INPACK#
S1_A0
S1_A11
PERST#
S1_IORD#
S1_D0
S1_A15
CPPE_NC#
S1_REG#
S1_D15
S1_A5
S1_D6
PCIECLK0
CPPE_NC#
S1_BVD2
S1_A24
S1_A21
S1_D13
S1_WE#
S1_D3
S1_D10
S1_WAIT#
S1_RDY#
S1_OE#
S1_D5
NC_CLKREQ#
SLP_S3#<19,38,40,42>
NB_RST#<13,18,35,37,38,39>
USBP6+ <19>USBP6- <19>
PCIECLK0# <15>PCIECLK0 <15>
VCCD1# <23>
NC_CLKREQ# <15>CPPE_NC# <19>
WAKEUP_NC# <19>
TPS_DATA<24>TPS_CLK<24,38>TPS_LATCH<24>
S1_IORD#<24>S1_IOWR#<24>
S1_RST<24>
S1_REG#<24>
S1_CE2#<24>
S1_CE1#<24>
S1_D[0..15] <24>
S1_A[0..25] <24>
S1_CD1#<24>
S1_CD2#<24>
S1_WE#<24>S1_RDY#<24>
S1_WP<24>
S1_VS1<24>
S1_VS2<24>
S1_WAIT#<24>S1_INPACK#<24>
S1_BVD2<24>S1_BVD1<24>
S1_OE#<24>
PCI_RST#<18,23,27,29,32>
PCIE_MRX_C_PTX_P0 <12>PCIE_MRX_C_PTX_N0 <12>
PCIE_MTX_C_PRX_P0 <12>PCIE_MTX_C_PRX_N0 <12>
NEWCARD_RST<19>
+3VS_PEC
+3V_PEC
+1.5VS_PEC
+3VS
+3VALW
+1.5VS
+3VALW
+3VS_PEC
+1.5VS_PEC
+3V_PEC
+3VALW
+5VS
+S1_VCC
+3VS
+S1_VPP
+5VS
+3VS
+S1_VPP
+S1_VCC
+1.5VS_PEC
+3VS_PEC
+3V_PEC
+S1_VCC+S1_VPP
+S1_VCC+S1_VPP
+3V_PEC
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
PCMCIA /Express card socket
Custom
26 58Friday, April 15, 2005
2005/03/01 2006/03/11
Near to Express Card slot.
CardBus Power Switch
New Card Power Switch
G
D
S Q512N7002_SOT237611@2
13
C290
4.7U_0805_10V4Z7611@
1
2
U16
SNP1X11AIDBR_SSOP164510@
VCCD0 1VCCD1 2
3.3V33.3V4
5V55V6
GN
D7
OC 8
12V9
VPP 10
VCC 11VCC 12VCC 13
VPPD1 14VPPD0 15
SHD
N16
C259 0.1U_0402_16V4Z1 2
C288
4.7U_0805_10V4Z7611@
1
2
C3090.1U_0402_16V4Z7611@
12C285
0.1U_0402_16V4Z7611@
1
2C3101U_0603_10V4Z7611@
1 2
C281 0.1U_0402_16V4Z1 2
R223100K_0402_5%
12
JP22
JAE_PX20-BB2_LTCONN@
GNDB1D3B2D4B3D5B4D6B5D7B6CE1#B7A10B8OE#B9A11B10A9B11A8B12A13B13A14B14WE#B15READYB16VCCB17VPP1B18A16B19A15B20A12B21A7B22A6B23A5B24A4B25A3B26A2B27A1B28A0B29D0B30D1B31D2B32WPB33GNDB34GNDB35CD1#B36D11B37D12B38D13B39D14B40D15B41CE2#B42VS1#B43IORD#B44IOWR#B45A17B46A18B47A19B48A20B49A21B50VCCB51VPP2B52A22B53A23B54A24B55A25B56VS2#B57RESETB58WAIT#B59INPACK#B60REG#B61SPKR#B62STSCHG#B63D8B64D9B65D10B66CD2#B67GNDB68
CP_PE# A17
GND A26
REFCLK+ A19REFCLK- A18
GND A23
PETP0 A25PETN0 A24
GND A20
PERP0 A22PERN0 A21
SMB_CLK A7
+3.3V A15+3.3V A14
+3.3VAUX A12
+1.5V A10
PERST# A13
WAKE# A11
+1.5V A9SMB_DATA A8
CLKREQ# A16
RESERVED A6RESERVED A5CP_USB# A4USB_D+ A3USB_D- A2GND A1
SHIELD_GND 3SHIELD_GND 4SHIELD_GND 5SHIELD_GND 6
U22
TPS2231PWPR_PWP247611@
GN
D11
OC# 23
3.3Vin153.3Vin26
1.5Vin1181.5Vin219
3.3Vaux_in21
3.3Vout1 73.3Vout2 8
Aux_out 20
1.5Vout1 161.5Vout2 17
CPUSB#14CPPE#15STBY#4SHDN#3 RCLKEN 22
PERST# 9
NC
11
NC
210
NC
312
NC
413
NC
524
SYSRST#2 G
D
S Q48
2N7002_SOT23@2
13
R19310K_0402_5%4510@
12
U20
SNP1X21DBR_SSOP247611@
5V 15V 2
DATA3CLOCK4LATCH5
NC8 6
12V 7
AVPP8
AVCC9AVCC10 GND 11
RESET#12
NC4 24
NC5 23NC6 22
SHDN#21
12V 20
NC019
NC218 NC117
NC7 16
OC#15 NC3 143.3V 13
R222100K_0402_5%
12
C3000.1U_0402_16V4Z7611@
12
C2941U_0603_10V4Z7611@
1 2
R19610K_0402_5%7611@
12
C306
0.1U_0402_16V4Z7611@
1
2
C2784.7U_0805_10V4Z
1 2
R20110K_0402_5%7611@
12
C2584.7U_0805_10V4Z
1 2
C284 4.7U_0805_10V4Z
1 2
C275 0.1U_0402_16V4Z1 2
C301
0.1U_0402_16V4Z7611@
12
C287
4.7U_0805_10V4Z7611@
1
2
C2951U_0603_10V4Z7611@
1 2
R238100K_0402_5%7611@
1 2
C283
4.7U_0805_10V4Z
1 2
C282 0.1U_0402_16V4Z1 2
R230
43K_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A ALAN_X1 LAN_X2
PCI_AD[0..31]
PCI_AD17
LAN_EECLKLAN_EEDILAN_EEDO
LAN_EEDA
LAN_EEDILAN_EEDO
LAN_EEWP
LAN_EEDA
LAN_CTRL_1.2V
+1.2V_LAN_AVDD
+2.5V_LAN_AVDD
PM_CLKRUN#
LAN_EECLK
LAN_X1
PCI_AD0
PCI_AD4
PCI_AD11
PCI_AD18
LAN_X2
PCI_AD6
PCI_AD15
PCI_AD24
LAN_MDI1-
CLK_PCI_LAN
PCI_AD25LAN_MDI0-
PCI_AD3
PCI_AD9
PCI_AD19
PCI_AD23
PCI_AD27 LAN_MDI1+
PCI_CBE#2
PCI_AD7
PCI_AD12
PCI_AD14
PCI_AD30
LAN_X1_R
LAN_TRST#
LAN_ACTIVITY#
LAN_MDI3+
LAN_IDSEL
LAN_MDI2+
PCI_AD5
LAN_RDAC
LAN_CTRL_2.5V
LAN_MDI3-
PCI_AD22
PCI_AD26
PCI_CBE#3
PCI_AD13
PCI_AD17
PCI_AD20
PCI_AD16
LAN_MDI2-
PCI_CBE#0
LAN_EEDA
PCI_CBE#1
PCI_AD29
LAN_CTRL_2.5V
LAN_EEWP
LAN_AUXPWR
PCI_AD2
PCI_AD10
PCI_AD21
+1.2V_LAN_PLLVDD
LAN_EECLK
PCI_AD1
PCI_AD8
PCI_AD31
+LAN_BIASVDD
LAN_MDI0+
CLK_PCI_LAN
PCI_AD28
LAN_CTRL_1.2V
PCI_AD[0..31]<18,22,23,29>
PCI_FRAME#<18,23,29>PCI_IRDY#<18,23,29>PCI_TRDY#<18,23,29>
PCI_DEVSEL#<18,23,29>PCI_STOP#<18,23,29>
PCI_SERR#<18,23,29,38>PCI_PERR#<18,23,29>
PCI_PAR<18,23,29>CLK_PCI_LAN<18,22>
PCI_RST#<18,23,26,29,32>
NIC_WAKE#<19>
PCI_PIRQH#<18>
PCI_REQ#3<18>PCI_GNT#3<18>
PM_CLKRUN#<18,23,29,37,38>
LAN_ACTIVITY# <28,40>
LAN_MIDI3+ <28>LAN_MIDI3- <28>LAN_MIDI2+ <28>LAN_MIDI2- <28>LAN_MIDI1+ <28>LAN_MIDI1- <28>LAN_MIDI0+ <28>LAN_MIDI0- <28>
PCI_CBE#0<18,23,29>PCI_CBE#1<18,23,29>
PCI_CBE#3<18,23,29>PCI_CBE#2<18,23,29>
LAN_LINK# <19,28,40>
+3VALW
+3VALW
+3VALW
+3V_LOM_PCI
+3VALW
+3VS
+3VALW
+2.5V_LAN +1.2V_LAN
+1.2V_LAN
+3V_LOM_PCI
+1.2V_LAN
+2.5V_LAN
+3VALW
+1.2V_LAN
+2.5V_LAN
+2.5V_LAN
+1.2V_LAN_PLLVDD
+1.2V_LAN
+2.5V_LAN
+1.2V_LAN
+3VALW
+2.5V_LAN
+3VALW
+2.5V_LAN+3VALW
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
LAN controller BCM5788M
B
27 58Friday, April 15, 2005
2005/03/01 2006/03/11
1.21K for BCM5788 1.27K forBCM4401(P/N: SD034127100)
20mils
20mils20mils
20mils
10mils
10mils
R512 0_0603_5%@1 2
C383
0.1U_0402_16V4Z
1
2
R38 4.7K_0402_5%1 2 C404
0.1U_0402_16V4Z5788@
1
2
C386
0.1U_0402_16V4Z1
2
R23 10K_0402_5%5788@1 2
R41100_0402_5%
1 2
R4010_0402_5%@
12
C657
0.1U_0402_16V4Z@
1
2
C384
0.1U_0402_16V4Z1
2
C4818P_0402_50V8J@
1
2
C32
0.1U_0402_16V4Z1
2
R244.7K_0402_5%5788@
12
C396
0.1U_0402_16V4Z1
2
R22
4.7K_0402_5%5788@
12
L2 0_0603_5%4401@1 2
C390
0.1U_0402_16V4Z
1
2
C656
0.1U_0402_16V4Z@1
2
C394
0.1U_0402_16V4Z
1
2
C387
0.1U_0402_16V4Z
1
2
C402
0.1U_0402_16V4Z
1
2
C41
0.1U_0402_16V4Z1
2
C395
0.1U_0402_16V4Z1
2
C24
0.1U_0402_16V4Z1
2
C2527P_0402_50V8J
1
2
C470.1U_0402_16V4Z
1
2
C659
0.1U_0402_16V4Z@
1
2
C2627P_0402_50V8J
1
2
C20
0.1U_0402_16V4Z
1 2
BCM5788M/(BCM4401)
U6B
BCM5788M_FBGA196
VDDC_E12E12
VDDC_H8H8VDDC_J5J5VDDC_J6J6VDDC_J7J7VDDC_J8J8VDDC_J9J9VDDC_J10J10VDDC_K5K5VDDC_K6K6VDDC_K7K7VDDC_K8K8
VDDC_N14N14VDDC_P8P8VDDC_P12P12VDDC_P13P13VDDC_P14P14
VDDIO-PCI_A7A7VDDIO-PCI_B3B3VDDIO-PCI_C5C5VDDIO-PCI_E1E1VDDIO-PCI_E4E4VDDIO-PCI_G1G1VDDIO-PCI_K3K3VDDIO-PCI_L4L4VDDIO-PCI_N6N6VDDIO-PCI_P2P2
VDDP_K14/(NC_K14)K14VDDP_L13/(NC_L13)L13VDDP_P11/(NC_P11)P11
NC_J11/(GPIO_1)J11NC_K11/(GPIO_0)K11NC_L7L7NC_L8L8
VSS_D7 D7VSS_D8 D8
VSS_D9/(NC_D9) D9VSS_E2 E2VSS_E5 E5VSS_E6 E6VSS_E7 E7VSS_E8 E8VSS_E9 E9VSS_F5 F5VSS_F6 F6VSS_F7 F7VSS_F8 F8VSS_F9 F9
VSS_F10 F10VSS_G4 G4VSS_G5 G5VSS_G6 G6VSS_G7 G7VSS_G8 G8VSS_G9 G9
VSS_G10 G10VSS_H9 H9VSS_K2 K2VSS_L6 L6VSS_L9 L9VSS_M6 M6
VSS_M12 M12VSS_M13/(NC_M13) M13
VSS_N1 N1VSS_N12 N12VSS_N13 N13
AVDDL_F12/(AVDD_F12) F12AVDDL_F13/(AVDD_F13) F13
AVDD_F14/(NC_F14) F14
NC_L11/(VSS_L11) L11NC_L14/(VSS_L14) L14
NC_M8 M8
VDDC_H7H7 VDDC_H6H6 VDDC_H5H5
VDDC_K9K9VDDC_K10K10VDDC_L5L5VDDC_L10L10VDDC_M14M14
VSS_D6 D6VSS_D5 D5VSS_D4 D4VSS_B7 B7
AVDD_A13/(NC_A13) A13
NC_M9/(VREF) M9LOW_POWER/(TESTMODE) M11
NC_N8/(EXT_POR) N8NC_N9/(DOUT) N9
NC_P9/(DIN) P9
NC_H10H10NC_J4J4NC_K4K4
VDDIO_A11A11VDDIO_F11F11VDDIO_K12K12VDDIO_L12L12
CLKRUNH4 NC_C8C8
C398
0.1U_0402_16V4Z
1
2
Q27BCP69_SOT2235788@
1
24
3
R313 0_0402_5%5788@1 2
C658
0.1U_0402_16V4Z@1
2
C405 1000P_0402_50V7K1 2
C403
0.1U_0402_16V4Z
1
2
C401
0.1U_0402_16V4Z
1
2
C22
4.7U_0805_10V4Z
1
2
C45
0.1U_0402_16V4Z1
2
L50_0603_5%5788@
1 2
R311 1K_0402_5%1 2
C28
0.1U_0402_16V4Z
1
2
C37
4.7U_0805_10V4Z
1
2C385
0.1U_0402_16V4Z1
2
R513 0_0402_5%4401@1 2
R310 1K_0402_5%5788@1 2
C392
0.1U_0402_16V4Z1
2
Q6BCP69_SOT2235788@1
24
3
C23
10U_0805_10V4Z
1
2
C389
10U_0805_10V4Z
1
2
C397
2.2U_0805_16V4Z
1
2
C391
0.1U_0402_16V4Z1
2
U4
AT24C64A_SO85788@
A0 1A1 2NC 3
GND 4
VCC8WP7SCL6SDA5
L4 0_0603_5%1 2
L3 0_0603_5%5788@1 2
BCM5788M/(BCM4401)
U6A
BCM5788M_FBGA196
AD31B8AD30A8AD29C7AD28C6AD27B6AD26B5AD25A5AD24B4AD23B2AD22B1AD21C1AD20D3AD19D2AD18D1AD17E3AD16K1AD15L2AD14L1AD13M3AD12M2AD11M1AD10N2AD9N3AD8P3AD7N4AD6P4AD5M5AD4N5AD3P5AD2P6AD1M7AD0N7
CBE3C4CBE2F3CBE1L3CBE0M4
IDSELA4FRAMEF2IRDYF1TRDYG3DEVSELH3STOPH1PERRJ2SERRA2PARJ1PCI_CLKA3
INTAH2PCI_RSTC2GNTJ3REQC3
VAUXPRSNTJ12M66EN/(NC_F4)F4PMEA6
TRD3+/(NC_E13) E13TRD3-/(NC_E14) E14
TRD2+/(NC_D13) D13TRD2-/(NC_D14) D14
TRD1+/(RDP) C13TRD1-/(RDN) C14TRD0+/(TDP) B13TRD0-/(TDN) B14
REGSUP12/(NC_B9) B9REGCTL12/(NC_B10) B10
REGSEN12/(REG18OUT) A9
REGSUP25/(REGSUP18) B11REGCTL25/(NC_C11) C11
REGSEN25/(REGSUP18) C10
VESD1 P1VESD2 G2VESD3 A1
EEDATA/(SPROM_CS) P10EECLK/(SPROM_CLK) M10
GPIO1/(NC_K13) K13GPIO2/(NC_J13) J13
LINKLED/(LINKLED10) G13SPD100LED/(LINKLED100) H13
SPD1000LED/(COL_LED) G12TRAFFICLED/(ACT_LED) G14
PLLVDD2/(PLLVDD) H14NC_P7 P7
TCK C12TDI D12
TDO B12TMS A12
TRST D11
XTALVDD J14XTALO N10XTALI N11
NC_G11 G11NC_E10/(EEDATA_PXE) E10
NC_E11/(EECLK_PXE) E11NC_H11 H11
BIASVDD A14RDAC D10
NC_A10 A10NC_C9 C9
GPIO0/(NC_H12) H12
L210_0603_5%
1 2
R39 1.21K_0402_1%1 2
C393
0.1U_0402_16V4Z
1
2
R27 200_0402_1%1 2
R312 0_0402_5%5788@1 2
Y125MHZ_16P_XSL025000FK1H
1 2
U2
AT93C46-10SI-2.7_SO84401@
CS1SK2DI3DO4
VCC 8NC 7NC 6
GND 5
L200_0603_5%
1 2
C388
0.1U_0402_16V4Z1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LAN_MIDI2-
LAN_MIDI0+LAN_MIDI0-
RJ45_MDI3+RJ45_MDI3-
RJ45_MDI0+RJ45_MDI0-
RJ45_MDI2+RJ45_MDI2-
RJ45_MDI1+RJ45_MDI1-
LAN_MIDI3-
LAN_MIDI2+
LAN_MIDI1+LAN_MIDI1-
LAN_MIDI3+
RJ45_MDI2-
RJ45_MDI2+
RJ45_MDI1+
RJ45_MDI3-
RJ45_MDI3+
RJ45_MDI0+
RJ45_MDI0-
RJ45_MDI1-
LAN_MIDI3-
LAN_MIDI3+
LAN_MIDI0-
LAN_MIDI0+
LAN_MIDI1-
LAN_MIDI1+
LAN_MIDI2-
LAN_MIDI2+
LAN_MIDI0+LAN_MIDI0-
LAN_MIDI1+LAN_MIDI1-
RJ45_MDI1+RJ45_MDI1-
RJ45_MDI0+RJ45_MDI0-
MCT_T
MCT_R
MCT_R
MCT_T
LAN_LINK#
LAN_ACTIVITY#
LAN_MIDI3+<27>
LAN_MIDI3-<27>
LAN_MIDI2+<27>
LAN_MIDI2-<27>
LAN_MIDI0+<27>
LAN_MIDI0-<27>
LAN_MIDI1+<27>
LAN_MIDI1-<27>
RJ45_MDI2+ <40>
RJ45_MDI3+ <40>
RJ45_MDI2- <40>
RJ45_MDI3- <40>
RJ45_MDI1+ <40>RJ45_MDI1- <40>
RJ45_MDI0+ <40>RJ45_MDI0- <40>
LAN_LINK#<19,27,40>
LAN_ACTIVITY#<27,40>+2.5V_LAN
+3VALW
+3VALW
+2.5V_LAN
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
LAN Magnetic & RJ45
B
28 58Friday, April 15, 2005
2005/03/01 2006/03/11
Close to NIC U6
BOM change
R3149.9_0402_1%5788@
12
C33 0.01U_0402_16V7K12
C42
0.1U_0402_16V4Z
1 2
JP2
FOX_JM36113-L1H7
PR1-2
PR1+1
PR2+3
PR3+4
PR3-5
PR2-6
PR4+7
PR4-8 SH
LD1
13
SH
LD2
14LE
D_G
RE
EN
10
LED
_OR
AN
GE
9
LDE
_YE
LLO
W+
12
LDE
_YE
LLO
W-
11
R301300_0402_5%
12
R18 75_0402_5%12
R3649.9_0402_1%
12
C44
0.1U_0402_16V4Z
1 2
R302
300_0402_5%
12
U7
SQ-H40B-25788@
TCT11TD1+2TD1-3
TCT24TD2+5TD2-6 MX2- 19MX2+ 20MCT2 21
MX1- 22MX1+ 23MCT1 24
TCT37TD3+8TD3-9
TCT410TD4+11TD4-12
MCT3 18MX3+ 17MX3- 16
MCT4 15MX4+ 14MX4- 13
C31
0.1U_0402_16V4Z5788@
1 2
C34 0.01U_0402_16V7K5788@12C380
1000P_1206_2KV7K
12
R2949.9_0402_1%5788@
12
C36 0.01U_0402_16V7K5788@12
R3049.9_0402_1%5788@
12
R14 75_0402_5%5788@12
R3249.9_0402_1%5788@
12
C35 0.01U_0402_16V7K12
U5
LF-H80P_16P4401@
RD+1RD-2CT3NC4NC5CT6
RX+ 16RX- 15CT 14NC 13NC 12CT 11
TD+7 TX+ 10TX- 9TD-8
R3749.9_0402_1%
12
R3349.9_0402_1%
12
R3549.9_0402_1%
12
R19 75_0402_5%12
R13 75_0402_5%5788@12
C40
0.1U_0402_16V4Z5788@
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PCI_AD[0..31]
PCI_AD18CLK_PCI_MINI
XMIT_OFF#
PCI_AD1
PCI_FRAME#
PCI_AD25
PCI_AD29
PCI_IRDY#
PCI_AD5
PCI_AD26
PCI_AD7
PCI_AD9
PCI_SERR#
PCI_AD20PCI_AD21
XMIT_OFF#
PCI_STOP#
PCI_AD27
PCI_PIRQG#
PCI_AD11
PCI_AD6
PCI_DEVSEL#
PCI_PAR
PCI_AD24
PCI_PME#
PCI_AD0
PCI_CBE#0
MINI_IDSEL
PCI_AD10
PCI_AD13
PCI_PERR#
PCI_GNT#1
PCI_AD15
PCI_AD31
PCI_AD18
PCI_AD19
PCI_PIRQG#
PCI_AD17
PCI_AD3
PCI_AD14PCI_CBE#1
PCI_TRDY#
PCI_AD23
PCI_AD16PCI_CBE#2
PCI_AD2
PCI_AD28
PCI_RST#CLK_PCI_MINI
PCI_REQ#1
PCI_AD4
PCI_AD8
PCI_AD12
PCI_AD22
PCI_AD30
PCI_REQ#1<18>
PCI_PERR#<18,23,27>
CLK_PCI_MINI<18,22>
PM_CLKRUN#<18,23,27,37,38>
PCI_AD[0..31] <18,22,23,27>
PCI_IRDY#<18,23,27>
PCI_SERR#<18,23,27,38>
PCI_CBE#1<18,23,27>
CH_DATA<34>
WL_LED<36>
CH_CLK <34>
PCI_PAR <18,23,27>
PCI_CBE#2<18,23,27>
PCI_FRAME# <18,23,27>
PCI_PIRQG# <18>
PCI_TRDY# <18,23,27>
XMIT_OFF#<19>
PCI_STOP# <18,23,27>
PCI_CBE#0 <18,23,27>
PCI_DEVSEL# <18,23,27>
PCI_CBE#3<18,23,27>
PCI_GNT#1 <18>
PCI_PME# <19,23>
PCI_RST# <18,23,26,27,32>
+3VS +3VS
+3VS
+5VS
+5VS
+3VALW
+5VS
+3VALW
+3VALW
+5VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
Mini PCI slot
Custom
29 58Friday, April 15, 2005
2005/03/01 2006/03/11
W=40mils
RINGTIP
W=40mils
W=40mils
W=30mils
W=40milsW=30mils
C134
0.01U_0402_16V7K
1
2
C163
4.7U_0805_10V4Z
1
2
C118
0.1U_0402_16V4Z
1
2
C177
0.01U_0402_16V7K
1
2
C97
0.01U_0402_16V7K
1
2
C117
0.1U_0402_16V4Z
1
2
C82
4.7U_0805_10V4Z
1
2
C57
0.01U_0402_16V7K
1
2
R1181K_0402_5%
12
C142
0.1U_0402_16V4Z
1
2
C96
4.7U_0805_10V4Z
1
2
C15610P_0402_50V8J@
R100100_0402_1%BT@
1 2
R99100_0402_1%BT@1 2
C54
0.1U_0402_16V4Z
1
2
R98100_0402_1%
1 2
R4710K_0402_5% 1 2
KEY KEY
JP11
FOX_AS0A226-S2T
33 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 161717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 404141 42 424343 44 444545 46 464747 48 484949 50 505151 52 525353 54 545555 56 565757 58 585959 60 606161 62 626363 64 646565 66 666767 68 686969 70 707171 72 727373 74 747575 76 767777 78 787979 80 808181 82 828383 84 848585 86 868787 88 888989 90 909191 92 929393 94 949595 96 969797 98 989999 100 100101101 102 102103103 104 104105105 106 106107107 108 108109109 110 110111111 112 112113113 114 114115115 116 116117117 118 118119119 120 120121121 122 122123123 124 124125125 126 126
11 2 2
127127 128 128
C49
4.7U_0805_10V4Z@
1
2
R105
10_0402_5%@
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+3VALW_CODEC
MONO_IN MONO_IN1 MONO_INR
MONO_INRCODEC_HPS
LINE_IN_RLINE_IN_L
LINE_IN_R
LINE_IN_L
DLINE_IN_R_R
DLINE_IN_R_L
DIB_DATAN<31>
DIB_DATAP<31>
PWRCLKP<31>
PWRCLKN<31>
AC97_SDOUT<19,22>
AC97_SDIN0<19>
AC97_SYNC<19>AC97_RST#<19>
AC97_BITCLK<19>
PCM_SPK#<23>
SB_SPKR<19>
LINE_OUTL <32>LINE_OUTR <32>
MUTE_LED<32,39>
MIC <33>
GNDA <32,33,40>
DLINE_IN_R <40>
DLINE_IN_L <40>
HPS <32>
+3VALW+VDDA_CODEC
+3VAMP_CODEC
+VDDA_CODEC
+5VS+VDDA_CODEC
+CODEC_REF
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
CODEC CX20468-31
Custom
30 58Friday, April 15, 2005
2005/03/01 2006/03/11
For Layout:
Place decoupling caps near thepower pins of SmartAMCdevice.
W=40Mil
GNDAGND
C336
4.7U_0805_10V4Z
1
2
R3004.7K_0402_5%SPR@ 12
R260 0_0402_5%1 2
R551 0_0402_5%@1 2
C37010U_0805_10V4Z
1
2
C363 15P_0402_50V8J1 2
C339
150P_0402_50V8J@
1
2
R249
10K_0402_5%
12
C337
1U_0603_10V4Z
12
R294 0_1206_5%1 2
C3732.2U_0603_6.3V4ZSPR@12
C354
1U_0603_10V4Z1
2
R272 10K_0402_5%1 2
C338
1U_0603_10V4Z
12
R295
0_0805_5%
1 2
R259
560_0402_5%
1 2
R287
10K_0402_1%
12
C346
4.7U_0805_10V4Z
1
2
C359
1U_0603_10V4Z1
2
C374 1U_0603_10V4Z12
R552 0_0402_5%@1 2
X1 24.576MHZ_16P_XSL024576FG1H
12
R248 0_1206_5%@1 2
R270
2.2K_0402_5%
1 2D11
RB751V_SOD323
21
R264 0_1206_5%@1 2
R262 0_0402_5%1 2
C351
1U_0603_10V4Z
12
R271 33_0402_5%1 2
R255
10K_0603_1%
1 2
R549 0_0402_5%@1 2
C353
0.1U_0402_16V4Z
1
2
R548 0_0402_5%@1 2
R257
0_0805_5%
1 2
R279 20K_0402_5%1 2
R266
249K_0402_1%
12
C347
10U_0805_10V4Z
1
2
C335
0.1U_0402_16V4Z@
1
2
R256
5.9K_0603_1%
12
R267
1K_0402_5%
12
C352
0.1U_0402_16V4Z
1
2
C
BE
Q20
2SC2411K_SOT23
1
2
3R2974.7K_0402_5%SPR@ 1 2R2994.7K_0402_5%SPR@ 12
R280
10K_0402_1%
12
R258
560_0402_5%
1 2
C364
0.1U_0402_16V4Z
1
2
R292
33_0402_5%1 2
R2984.7K_0402_5%SPR@ 1 2
C344
0.01U_0402_16V7K
1
2
C362
0.1U_0402_16V4Z
1
2
R275 33_0402_5%1 2
C3722.2U_0603_6.3V4ZSPR@12
C358
0.1U_0402_16V4Z
1
2
C345
0.1U_0402_16V4Z
1
2
C357
1U_0603_10V4Z
12
U25
CX20468-31_TQFP48
RCOSC11
GN
DC
22
DIB_DATAN3
DIB_DATAP4
VDD
55
GN
D8
6
PWRCLKP7
PWRCLKN8
GN
DC
99
VD
DC
1010
ID0#11
ID1#12
DSPKOUT13
EAPD14
SDATA_OUT15SYNC16AC_RESET#17
VD
DC
1818
GN
DC
1919
AC_ONLY20
SDATA_IN021
BIT_CLK22
XTLI 25XTLO 24
AVSS
_CLK
26
VD
D_C
LK23
LINE_IN_L 27LINE_IN_R 28
MIC_IN 29
CD_IN_L 30CD_IN_GND 31CD_IN_R 32
AVD
D33
33
MBIAS/AVDD 34
AG
ND
3535
VREF_SCA 36VC_SCA 37REF_FLT 38
HP_OUT_L 42HP_OUT_R 43
LINE_OUT_L 39LINE_OUT_R 40
AG
ND
4141
AVD
D44
44
PC_BEEP45
S_PDIF 46
GPIO_4 47
GPIO_5 48
R550 0_0402_5%@1 2
R261 0_0402_5%1 2
R263 0_0402_5%1 2
C341
0.1U_0402_16V4Z
1
2
R265
10K_0402_5%@
12
U24
SI9182DH-AD_MSOP8
VIN4
SD8
VOUT 5
GND 3
SENSE or ADJ 6
ERROR7 CNOISE 1
DELAY2
C369
0.1U_0402_16V4Z
1
2
C340
150P_0402_50V8J@
1
2
D12
RB751V_SOD323
21
C349
0.1U_0402_16V4Z
1
2
R286
10K_0402_5%
1 2
C367 15P_0402_50V8J1 2
C348
0.1U_0402_16V4Z
1
2
R278 0_1206_5%@1 2
Vref_LSD
BR908_AC1
BR908_CC
MOD_TIP
RING_2
EICDIB_P1
RXI-1DIB_N1 RXI
BRIDGE_CC
TXF
VZ
EIF
TIP_2
PCLK
PWR+
CLKCLK2
DIB_P2
DIB_N2
Vc_LSD
TAC1
RAC1
TAC1/TIP
RAC1/RING
TIP_2
TRDC
RBias
EIO
TXO
MOD_RING
PWRCLKN<30>
DIB_DATAN<30>
DIB_DATAP<30>
PWRCLKP<30>
VDD
DGND_LSD
DGND_LSD AGND_LSD
AGND_LSD
AGND_LSD
AGND_LSD
AGND_LSDAGND_LSD
AGND_LSD
AGND_LSD
VDD
AGND_LSD
GND
GND
AGND_LSD
AGND_LSD
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
AMOM_modem
Custom
31 58Friday, April 15, 2005
2005/03/01 2006/03/11
MC906 and MC908 must be Y3 typeCapacitors for Nordic Countriesonly
Use 59K_0402_1% for MR954
MTP381
MTP62
1
MC928
0.1U_0402_10V6K
1
2
MTP581
MR906 6.8M_0805_5%1 2
MTP721
MR92827_0805_5%
12
MR9240_0402_5%
1 2
MC9740.001U_0402_50V7M@
1
2
MTP61 1
MTP491
MTP24
1
SECPRI
MT902
S X'FORM_ 835-00252
2 3
41
MTP691
MTP351
MBR906MMBD3004S_SOT23
231
MC9780.1U_0402_10V6K
1 2
MC906470P_1808_3KV
1
2
MC910
0.047U_1206_100V7K1 2
EB
CMQ902PMBTA42_SOT23
2
31
MR9220_0402_5%
1 2
MFB906
MMZ1608D301BT_06031 2
MTP681
MC9020.033U_1206_100V7K1 2
MTP30
1
MBR908BBAV99DW-7_SOT363
453
MR9021M_0805_5%
1 2
MC908470P_1808_3KV
1
2
MFB902
MMZ1608D301BT_06031 2
MC9180.1U_0603_16V7K
1
2MR910237K_0805_1%
1 2
MC940
1U_0603_6.3V6M
1
2
MJ2
E&T_3800-0212
MC96247P_0603_50V8J
1
2
MTP331
MTP321
MTP73
1
MC922 10P_1808_3KV1 2
MTP661
MC9040.033U_1206_100V7K1 2
MTP411
MQ904
FZT458TA_SOT223
3
1
2 4
MTP421
MC9302.2U_0805_10V6K
1
2
MR93215K_0402_5%
12
MC9660.01U_0805_100V7M
1 2
MTP23
1
SECPRI
MT922
30U_82154R_1%_1:1.67@
2 3
41
MTP52
1
MC924 10P_1808_3KV1 2
MTP371
MTP341
MR9041M_0805_5%
1 2
MTP22
1
MR908348K_0805_1%
1 2
MTP711
EB
CMQ906PMBTA42_SOT23
2
31MC976
0.001U_0402_50V7M
1
2
MC92610P_0402_50V8J
1 2
MTP28
1
MR95459K_0402_1%1 2
MTP641
MTP26
1
MTP361
MJ1B
HEADER8@
1 12 23 34 45 56 67 78 8
MC9700.1U_0402_10V6K
1
2
MC944
0.1U_0402_10V6K
1
2
MTP671
MR
V902
TB3100M-13-01_S
MB
11
22
MTP651
MTP60
1
MR938110_0603_5%
12
MTP27
1
MTP25
1
MTP40 1
MTP631
MTP29
1
MC958
0.015U_0603_25V7K
1 2
MU902
CX20493-58_QFN28
DV
dd24
TRDC 12
RXI 9
EIC 11
VRef4
Vc3
RAC1 21
TAC1 20
RBias 5
VZ 10
TXF 13
TXO 14
EIO 17
EIF 16
DG
nd23
AG
nd6
AV
dd2
CLK26
DIB_P27
DIB_N28
PWR+7
GPIO1 1
DC
_GN
D15
RAC2 19
TAC2 18
NC325 NC222 NC18
PADDLE29
MJ1
HEADER8@
1 12 23 34 45 56 67 78 8
MTP701
MBR904MMBD3004S_SOT23
231
MFB904
MMZ1608D301BT_06031 2
MTP391
MBR908ABAV99DW-7_SOT363
126
MTP31
1
MTP59
1
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SPKL+
SPKR+
SPKR-SPKR+
SPKL+SPKL-
SPKL+SPKL-
SPKR-SPKR+
RHPIN
LHPIN
LINE_C_OUTL
LINE_C_OUTR
HPS
HPSDLINE_OUT_R
INTSPK_CL+
INTSPK_CR+
PL
DLINE_OUT_R
PR
INTSPK_CL+
INTSPK_CR+
LINE_OUTL<30>
LINE_OUTR<30>
DOCK_HPS<40>HPS <30>
MUTE#<19>
MUTE_LED<30,39>
DLINE_OUT_R<40>
DLINE_OUT_L<40>
PCI_RST#<18,23,26,27,29>
+5VAMP
+5VS+5VAMP
+5VAMP
+5VAMP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
AMP & Audio Jack
Custom
32 58Friday, April 15, 2005
2005/03/01 2006/03/11
HEADPHONE OUT/LINE OUT
Av(inv)
1
GAIN1
1
Gain Settings
1 0
GAIN0
0
0 6 dB0
1
21.6 dB
15.6 dB
10 dB
10 dB
Headphone Plug from NB
HP OUT
Layout change
R291 100K_0402_5%
1 2R288
100K_0402_5%@
12
D35RB751V_SOD323@
21
+
C256 100U_6.3V_M
1 2
R161 30_0805_5%1 2
R277
100K_0402_5%@
12
C361 0.47U_0603_16V7K1 2
G
D
SQ21
2N7002_SOT23
2
13
C318
220P_0402_50V7K@
L40 KC FBM-11-160808-601T1 2
JP21 FOX_JA6033L-5S1-TR
12
3
4
5
6
7 8
C360 0.47U_0603_16V7K1 2
R269100K_0402_5%
12
C356 0.047U_0603_16V7K1 2
C375 0.47U_0603_16V7K1 2
JP24
ACES_85205-0400
11223344
C320
220P_0402_50V7K@
C59347P_0402_50V8J
R276
100K_0402_5%
12
C376 0.47U_0603_16V7K1 2
C312
220P_0402_50V7K@
D37
SM05_SOT23@
2 31
R419
1K_0402_5%
12
U26TC7SH32FU_SSOP5
I02
I11 O 4
G3
P5
C366
0.1U_0402_16V4Z
1
2
D36
SM05_SOT23@
231
C3500.1U_0402_16V4Z
1
2
C655
0.1U_0402_16V4Z
1
2
C371
10U_0805_10V4Z
1
2
U27
TPA0312PWP_TSSOP24
PVD
D1
7PV
DD
218
RLINEIN23
RHPIN20
PC-BEEP14
SHUTDOWN#22
VDD
19G
ND
424
GN
D3
13
ROUT+ 21ROUT- 16RIN8
GN
D2
12G
ND
11
LOUT+ 4LOUT- 9
SE/BTL# 15
HP/LINE# 17
LIN10
LHPIN6
LLINEIN5
BYPASS 11
GAIN0 2GAIN1 3
L42 KC FBM-11-160808-601T1 2
R401
1K_0402_5%
12
R268
100K_0402_5%1 2
C355 0.047U_0603_16V7K1 2
R289
100K_0402_5%
12
C3770.47U_0603_16V7K1
2
+
C255 100U_6.3V_M
1 2
C58847P_0402_50V8J
C315
220P_0402_50V7K@
R273
0_1206_5%C365
0.1U_0402_16V4Z
1
2
R166 30_0805_5%
1 2
C368 0.47U_0603_16V7K1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
INT_MIC
INT_MIC_CONN
EXT_MIC
INT_MIC_CONN
INT_MIC
EXT_MIC
MIC MIC <30>
+VDDA_CODEC
+VDDA_CODEC
+MICAMP
+MICAMP
+CODEC_REF
+VDDA_CODEC
+MICAMP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
Internal / External MIC
Custom
33 58Friday, April 15, 2005
2005/03/01 2006/03/11
MIC IN
Internal/External MIC
BOM change
BOM change
R136 150K_0402_1%
1 2
C550 100P_0402_50V8J
C554 0.22U_0603_10V7K
1 2
C240
1U_0603_10V4Z1
2
L44
0_0603_5%
1 2
C234
1200P_0603_50V7K@
JP17
ACES_85205-0200
12
R133
10K_0402_5%1 2
R138 2.2K_0402_5%1 2
C239 270P_0402_50V7K
C661
1U_0603_10V4Z
1
2
C558
470P_0402_50V7K
1
2
R375 100K_0402_5%1 2
R137 1K_0402_1%1 2
C556
100P_0402_50V8J
C235 0.027U_0402_16V4Z1 2
JP20 FOX_JA6033L-5S1-TR
12
3
4
5
6
7 8
R51410K_0402_5%
12
C660
1U_0603_10V4Z
1
2
R1343K_0402_5%
12
D38
SM05_SOT23@
231
R376 14K_0402_1%
1 2
+
-
P
GO
U34A
TLV2462CDR_SO8
3
21
84
R374 100K_0402_1%1 2
R1353K_0402_5%
12
L17 CHB1608B121_06031 2
C242
0.1U_0402_16V4Z
1
2
L36 CHB1608B121_06031 2
C548 0.22U_0603_10V7K
1 2
C2431U_0603_10V4Z
1
2
C241
100P_0402_50V8J
+
-
P
GO
U34B
TLV2462CDR_SO8
5
67
84
R516
3.3K_0402_5%
1 2
SLP_S5SLP_S5
USBP5+USBP5-
USBP4-
USBP7+
USBP7-
USBP4+
USBP2+ <19>USBP2- <19>
BT_LED <36>
USBP7+ <19>USBP7- <19>USBP4-<19>
USBP4+<19>
USBP5+<19>
USBP1+<19>USBP1-<19>
SLP_S5<40,42,48>
BT_OFF<19>
BT_DETECT# <19>
CH_DATA <29>CH_CLK <29>
TP_DATA<38>TP_CLK<38>
USBP5-<19>
+3V_BT
+3V_BT+3VALW
+USB_VCCA+5VALW
+USB_VCCA +USB_VCCA
+5VALW +USB_VCCB
+USB_VCCB
+3VS
+5VS
+USB_VCCB
+USB_VCCA
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
Bluetooth & USB CONN.
Custom
34 58Friday, April 15, 2005
2005/03/01 2006/03/11
BT CONN.TP CONNECTOR
W=40mils W=40mils
W=40mils
FINGER PRINT CONN.C6860.1U_0402_16V4ZFP@
12
R7
4.7K_0603_1%
12
D39
PRTR5V0U2X_SOT143@
VCC 4
I/O 3
GND1
I/O2
+C542
100U_6.3V_M
1
2
U33
AATI4610AIGV-T1_SOT23-5
OUT 1
ON# 4SET3
IN5
GND 2C120.47U_0603_16V7K
1
2
U1
AATI4610AIGV-T1_SOT23-5
OUT 1
ON# 4SET3
IN5
GND 2
+C219
100U_6.3V_M
1
2C379
0.1U_0402_16V4Z
1
2
+C7
100U_6.3V_M
1
2
C546
10P_0402_50V8J@
C212
10P_0402_50V8J@
C543
10P_0402_50V8J@
D40
IP4220CZ6_SO6@
D2+ 4
D1- 6
VCC 5
D1+1
GND2
D2-3
G
DS
Q36SI2301BDS_SOT23BT@
2
13
C16
0.1U_0402_16V4Z
1 2
C537
0.1U_0402_16V4Z
1
2
C1
10P_0402_50V8J@
C216
10P_0402_50V8J@
C237
0.01U_0402_16V7KBT@
1
2
C197
0.1U_0402_16V4Z
1
2
C549
1U_0603_10V4ZBT@
1
2
C236
0.1U_0402_16V4ZBT@
1
2
JP3
SUYIN 020167MR004S511ZU_4p
1234
5678
JP13
SUYIN_020122MR008S540ZU
VCC1D0-2D0+3VSS4
VCC 5D1- 6D1+ 7VSS 8
G210 G1 9G3 11G412
C2
10P_0402_50V8J@
C378
1000P_0402_50V7K
1
2
JP18
ACES_87212-0800BT_CONN@
12345678
R366
4.7K_0603_1%
12
C2384.7U_0805_10V4ZBT@
1
2
C536
0.1U_0402_16V4Z
1 2
JP12
ACES_85205-0400
11223344
C196
1000P_0402_50V7K
1
2
C538
1000P_0402_50V7K
1
2
JP19
ACES_87153-060111 22 33 44 55 66
C1950.47U_0603_16V7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PDIAG#
SD_SCS3#SD_SBA2
SD_D6SD_D5SD_D4
ODD_ACT_LED#
SEC_CSEL
SD_D1SD_D2SD_D3
SD_D0
SD_IORDY
SD_SBA1SD_SBA0
SD_IRQA
SD_SIOW#
SD_SCS1#
SD_SIOR#SD_DREQ#
SD_D8
SD_D11SD_D12SD_D13SD_D14
SD_D10SD_D9
SD_D15
SD_DACK#
PD_DACK#
PD_D15
PD_D5
PD_CS#3
PD_IRQA
PD_D3
NB_RST#
PD_CS#1
PD_D14PD_D1
PD_A2
PD_IOR#
PD_D4
PD_A0
PD_D13
PD_D8
PD_IOW#
PD_D9
PD_IORDY PCSEL
PD_A1
PD_D0
PD_D12
PD_DREQ#
PD_D10
PD_D7
HDD_ACT_LED#
PD_D2
PD_D6
PD_D11
PD_D[0..15]
SD_D[0..15]
ACT_LED#
NB_RST#SD_D7
HDD_ACT_LED#
ODD_ACT_LED#
NB_RST#<13,18,26,37,38,39>PD_D[0..15]<20>
SD_D[0..15]<20>
ACT_LED <36>
SD_SBA0<20>SD_SBA1<20>
SD_SBA2 <20>SD_SCS1#<20> SD_SCS3# <20>
SD_SIOR# <20>SD_SIOW#<20>
SD_DACK# <20>SD_IORDY<20>
SD_DREQ# <20>
SD_IRQA<20>
PD_A0<20>PD_A1<20>
PD_A2 <20>PD_CS#1<20> PD_CS#3 <20>
PD_IOR#<20>PD_IOW#<20>
PD_DACK#<20,22>PD_IORDY<20>
PD_DREQ#<20>
PD_IRQA<20>
+5VS +5VS
+5VS
+5VS+5VS+5VS+5VS
+5VS
+5VS
+5VS
+5VS
+5VS
+5VS
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
HDD / ODD connector
Custom
35 58Friday, April 15, 2005
2005/03/01 2006/03/11
HDD/ODDModule
W=80mils
Placea caps. near HDD CONN.
Place caps. near ODD CONN.
D32
RB751V_SOD323
21
R367 470_0402_5% 12
JP14
OCTEK_CDR-50DU1
11 2 233 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 161717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 404141 42 424343 44 444545 46 464747 48 484949 50 50
C277
1000P_0402_50V7K
1
2
C208
0.1U_0402_16V4Z@
1
2
C539
1U_0603_10V4Z@
1
2
R371 100K_0402_5%@1 2
D33
RB751V_SOD323
21
R510 100K_0402_5%
1 2
C280
1U_0603_10V4Z@
1
2
C276
0.1U_0402_16V4Z
1
2
JP23
SUYIN_200138FR044G277ZU
11 2 233 4 455 6 677 8 8991111 12 121313 14 141515 16 161717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 404141 42 424343 44 44GND45 GND 46
10 10
R511 100K_0402_5%
1 2
R192
1K_0402_5%
1 2
C198
1000P_0402_50V7K
1
2
C274
10U_0805_10V4Z@
1
2
C541
10U_0805_10V4Z@
1
2
C20610U_0805_10V4Z
1
2
C540 0.1U_0402_16V4Z
12
R190
100K_0402_5%
12
R207 470_0402_5%
1 2
C
BE
Q16
MMBT3906_SOT231
2
3
C27310U_0805_10V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
STB_LED#
WL_LED
BT_LED
ACT_LED<35>
STB_LED#<38,39,40>
WL_BT_LED#<39>
WL_LED<29>
BT_LED<34>
BAT_GRNLED#<38>
BAT_LED#<38>
+3VL
+5VS
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
LED INDICATOR
B
36 58Friday, April 15, 2005
2005/03/01 2006/03/11
GREENHDD/ODD LED AMBER
Charger LED
Wireless / Bluetooth LED GREENPOWER LED
BATT FULL LED
GREEN
BLUE
BOM and layout modify
R274
1K_0402_5%
1 2
D14
17-21SYGC/S530-E1/TR8_GRN
21
R281
100K_0402_5%BT@
12
R283
100K_0402_5%
12
R290
220_0402_5%
12
R282
1K_0402_5%BT@1 2
D13HT-170CBS-DT_BLUE_0805
21
D15
17-21SYGC/S530-E1/TR8_GRN
21
D16
19-22UYSYGC/S530-A2/TR8_G/Y
21
34
R296560_0402_5%
12
R285270_0402_5%
C
BE
Q22
MMBT3906_SOT231
2
3
R555270_0402_5%
Q24
MMBT3904_SOT23
2
31
R293
220_0402_5%
1 2
R284
1K_0402_5%
1 2
Q23
MMBT3904_SOT23BT@2
31
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CLK_14M_SIOCLK_PCI_SIO
LPC_AD3
LPC_AD1LPC_AD2
LPC_AD0
CLK_14M_SIO
LPC_FRAME#
LPD0LPD1LPD2LPD3LPD4LPD5LPD6LPD7
CTS#1RTS#1
RI#1
TXD1
DCD#1
DTR#1
DSR#1
RXD1
SIO_PD#
SIO_GPIO11
CLK_PCI_SIOSIRQ
LPC_DRQ#0
SIO_IRQ
PM_CLKRUN#
LPTBUSY
LPTSLCT
LPTACK#LPTERR#
LPTPE
LPTSTB#LPTAFD#
LPTINIT#LPTSLCTIN#
SIO_GPIO12
SIO_PME#
SIO_GPIO41SIO_GPIO42SIO_GPIO43SIO_GPIO44SIO_GPIO45SIO_GPIO46SER_SHD
SIO_GPIO23
SIO_GPIO11
SIO_GPIO40
SIO_GPIO10
SIO_GPIO42
SIO_GPIO41
SIO_GPIO40
LPTINIT#
SIO_GPIO23
LPD4
LPTAFD#
LPTACK#
LPD3
LPD7LPTSLCT
LPD2
LPD6
LPTSTB#
LPTBUSYLPTPE
LPD5
LPD1LPD0
LPTERR#
LPTSLCTIN#
DCD#1RI#1CTS#1DSR#1
SER_SHD
SIO_GPIO46SIO_GPIO45
SIO_GPIO43SIO_GPIO44
SIO_GPIO12SIO_GPIO10
SIO_IRQ
CLK_14M_SIO<15>
LPC_AD1<18,38,39>
LPC_FRAME#<18,38,39>
LPC_AD0<18,38,39>
LPC_AD2<18,38,39>LPC_AD3<18,38,39>
LPC_DRQ#0<18>
SIRQ<18,23,38>
PM_CLKRUN#<18,23,27,29,38>CLK_PCI_SIO<18,22>
LPD5 <40>LPD6 <40>
LPD4 <40>LPD3 <40>
LPD7 <40>
LPD0 <40>
LPD2 <40>LPD1 <40>
LPTBUSY <40>LPTPE <40>LPTSLCT <40>
LPTERR# <40>LPTACK# <40>
LPTINIT# <40>
LPTAFD# <40>LPTSTB# <40>
LPTSLCTIN# <40>
DCD#1 <40>
DTR#1 <40>CTS#1 <40>
TXD1 <40>DSR#1 <40>RTS#1 <40>
RXD1 <40>
RI#1 <40>
NB_RST#<13,18,26,35,38,39>
SER_SHD<40>
+3VS
+3VS
+3VS
+3VS
+3VS
+5VS_PRN+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
Super I/O LPC47N217
Custom
37 58Friday, April 15, 2005
2005/03/01 2006/03/11
Base I/O Address0 = 02Eh1 = 04Eh*
R2510_0402_5%@
12
R305
10K_0402_5%SIO@
1 2 R2810_0402_5%@
12
R308
10K_0402_5%SIO@
1 2
C3010P_0402_25V8K@
1
2
C381
0.1U_0402_16V4ZSIO@
1
2
R12
10K_0402_5%SIO@
1 2
D1
RB420D_SOT23SIO@
2 1
RP6
4.7K_0804_8P4R_5%SIO@
1 82 73 64 5
R11
10K_0402_5%SIO@
1 2
RP1
4.7K_0804_8P4R_5%SIO@
1 82 73 64 5
R309 1K_0402_5%SIO@1 2
RP7
4.7K_0804_8P4R_5%SIO@
1 82 73 64 5
RP3
4.7K_0804_8P4R_5%SIO@
1 82 73 64 5
R307 10K_0402_5%SIO@1 2
C2118P_0402_50V8J@
RP5
4.7K_0804_8P4R_5%SIO@
1 82 73 64 5
RP2
10K_0804_8P4R_5%SIO@
18273645
C29
4.7U_0805_10V4ZSIO@
1
2
RP4
10K_0804_8P4R_5%SIO@
18273645
POWER
CLOCK
GPIO
LPC
I/F SERI
AL I
/F
FIR
PARA
LLEL
I/F
U3
LPC47N217_STQFP64SIO@
LAD010LAD112LAD213LAD314
LFRAME#15LDRQ#16
PCI_RESET#17LPCPD#18
CLKRUN#19PCI_CLK20SER_IRQ21IO_PME#6
RXD1 62TXD1 63
DSR1# 64RTS1# 1CTS1# 2DTR1# 3
RI1# 4DCD1# 5
IRRX2 37IRTX2 38
IRMODE/IRRX3 39
INIT# 41SLCTIN# 42
PD0 44PD1 46PD2 47PD3 48PD4 49PD5 50PD6 51PD7 53
SLCT 55PE 56
BUSY 57ACK# 58
ERROR# 59ALF# 60
STROBE# 61
GPIO4023GPIO4124GPIO4225GPIO4327GPIO4428GPIO4529GPIO4630GPIO4731GPIO1032GPIO11/SYSOPT33GPIO12/IO_SMI#34GPIO13/IRQIN135GPIO14/IRQIN236GPIO2340
CLK149
VTR 7
VCC 26
VCC 54
VSS8VSS22VSS43VSS52 VCC 45
VCC 11
C382
0.1U_0402_16V4ZSIO@
1
2
R2610K_0402_5%SIO@
1 2
C27
0.1U_0402_16V4ZSIO@
1
2
R16
4.7K_0402_5%SIO@
1 2
R306
10K_0402_5%SIO@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KSO[0..13]
EA#
LOW_BAT#
FAN_PWM
KSI3
VCC1_PWRGD
STB_LED#
THM_MBAY#
KBD_CLK
KSO1
LPC_AD0
KSO15
CHGCTRL
KSI4
KSO4
KSO10
CLK_14M_KBC
KSI0
PGM
ON/OFFBTN_KBC#
NB_PWRGD
LPC_FRAME#
MODE
BAT_LED#
KSO11
PM_CLKRUN#
PS2_DATA
KSO9
NB_RST#
FWP#
SIRQ
AB1A_CLK
KSI5
KSO6
EA#
THM_MAIN#
KBD_DATA
KSO7
BATSELB_A#
AB1B_DATA
CLK_PCI_EC
TP_CLK
KSO0
PCI_SERR#
TP_DATA
KSI1
KSO8
AB1B_CLK
KSI7
LPC_AD2
LPCPD#
KSI6
PS2_CLK
AB1A_DATA
LPC_AD1
KSI2
KSO2KSO3
KSO5
LPC_AD3
C RY2
MODE
LPCPD#
KBRST
CAPS_LED#
S_CLK
A20M
TP_CLK
TP_DATA
PS2_CLKKBD_DATAKBD_CLK
PS2_DATA
CLK_PCI_EC
KSI0
KSI2KSI1
KSI5
KSI3
KSI7
KSI4
KSI6
VCC1_PWRGDNUM_LED#STB_LED#CAPS_LED#
NUM_LED#
PGM
PGM
FWP# NB_PWRGD
NUM_LED#
C RY1
BATCON
ADP_PRES
SB_PWRGD
SB_PWRGD
KBC_PWR_ONBAT_GRNLED#
KBC_GPIO12KBC_GPIO12
KSO12KSO13
KSO14
KSI[0..7]
CLK_14M_KBC
SLP_S3#
THM_MAIN#
FWP#
PM_RSMRST#
RUNSCI_EC#
AB1A_CLKAB1A_DATA
AB1B_DATAAB1B_CLK
KSO[0..13]<39>
SIRQ<18,23,37>
LPC_AD3<18,37,39>
LPC_AD0<18,37,39>
LPC_AD2<18,37,39>LPC_AD1<18,37,39>
BAT_LED# <36>STB_LED# <36,39,40>
AB1A_DATA <50>AB1A_CLK <50>
AB1B_DATA <50>AB1B_CLK <50>
ON/OFFBTN_KBC# <39>LOW_BAT# <19>
KSO15 <39>
THM_MBAY# <50>PCI_SERR# <18,23,27,29>
KBD_DATA<40>KBD_CLK<40>
LPC_FRAME#<18,37,39>
PM_CLKRUN#<18,23,27,29,37>
CLK_PCI_EC<18,22>
PS2_CLK<40>
TP_CLK<34>
PS2_DATA<40>
TP_DATA<34>
BATSELB_A# <51>
CLK_14M_KBC <15>
NB_PWRGD <13,18,41>VCC1_PWRGD <41>
FAN_PWM <4>CHGCTRL <43,51>
TPS_CLK <24,26>
CAPS_LED# <39>
NUM_LED# <39>
BATCON <51>
ADP_PRES <43,45,51>
SB_PWRGD <19>
KBC_PWR_ON <44>BAT_GRNLED# <36> KB_RST# <18,19>
GATEA20 <19>
KSO14 <39>
KSI[0..7]<39>PM_RSMRST# <19,46>
SLP_S3# <19,26,40,42>
RUNSCI_EC#<19>
THM_MAIN# <50>
NB_RST#<13,18,26,35,37,39>
KBC_GPIO12 <19>
+RTCVCC
+3VS
+3VL
+3VL +3VS
+5VS
+3VL
+3VL
+3VL
+3VL
+3VL +RTCVCC
+3VL
+3VL
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
EC LPC47N250
Custom
38 58Friday, April 15, 2005
2005/03/01 2006/03/11
AGND FILTER
1. For normal operation:
2. For KBC internal ROM flash:a. Open J8
For KBC debugging used.
DIGI_RXDIGI_TX
a. Short J8
b. Short J6
b. Open J6c. Open J9
c. Short J9
Layout and BOM changeLayout and BOM change
BOM and layout change
R472
10K_0402_5%
12
J9
NO SHORT PADS
1 2
C64310P_0402_50V8J@
C634
0.1U_0402_16V4Z
1
2
R466
10K_0402_5%
1 2
C653
10P_0402_50V8J
D30
RB751V_SOD323
21
RP65
47K_0804_8P4R_5%
1 82 73 64 5
J8
SHORT PADS
1 2
C650
0.1U_0402_16V4Z
1
2
RP64
47K_0804_8P4R_5%
1 82 73 64 5
R477
1K_0402_5%
12
R492
1K_0402_5%
1 2
R494
120K_0402_5%
12
RP66
10K_0804_8P4R_5%
1 82 73 64 5
C644
0.1U_0402_16V4Z
1
2
R484
47K_0402_5%
1 2
R487
10K_0402_5%
1 2
R483
1K_0402_5%
1 2
R480
10_0402_5%@
12
R507
100K_0402_5%
12
C649
0.1U_0402_16V4Z
1
2
G
D
S Q46
2N7002_SOT232
13
C637
0.1U_0402_16V4Z
1
2
R491
100K_0402_5%
12
R488 33_0402_5%7611@1 2
C640
0.1U_0402_16V4Z
1
2
C648
10P_0402_25V8K@
1
2
C639
0.1U_0402_16V4Z
1
2
R4932M_0402_5%@
1 2
C651
1U_0603_10V4Z1
2
C633
4.7U_0805_10V4Z
1
2
R489
10K_0402_5%
1 2
D31
RB751V_SOD323
2 1
RP67
4.7K_0804_8P4R_5%
1 82 73 64 5
C645
0.1U_0402_16V4Z
1
2
R486
300_0402_5%
12
Gene
ral
Purp
ose
I/O
Inte
rfac
e
Keyboard/Mouse InterfaceLPCBus
Power Mgmt/SIRQ
Misc
ella
neou
s
Access Bus Interface
SMSC_LPC47N250_TQFP-100P
LPC47N250-MD_TQFP100
U39
AGN
D55
KSO017KSO116KSO215KSO314KSO413KSO512KSO610KSO79KSO87KSO96KSO105KSO114KSO12/OUT8/KBRST3KSO13/GPIO182
KSI025KSI124KSI223KSI322KSI421KSI520KSI619KSI718
IMCLK26IMDAT27KCLK29KDAT31EMCLK32EMDAT33
CLKRUN#44SER_IRQ46PCI_CLK43EC_SCI#59
LAD[3]40LAD[2]39LAD[1]37LAD[0]35
LFRAME#41LRESET#42LPCPD#34
XTAL153XTAL254
VCC051XOSEL52
GN
D92
GN
D79
GN
D65
GN
D45
GN
D36
GN
D28
GN
D8
VCC
111
VCC
167
VCC
181
VCC
194
VCC
230
VCC
238
VCC
247
OUT0 99OUT1/IRQ8# 100
OUT7/SMI# 98OUT8/KBRST 97OUT9/PWM2 96
OUT10/PWM0 95OUT11/PWM1 93
GPIO2 62GPIO3 63
GPIO4/KSO14 64GPIO5/KSO15 66
GPIO7/PWM3 68GPIO8/RXD 69GPIO9/TXD 70
GPIO11/AB2A_DATA 71GPIO12/AB2A_CLK 72
GPIO13/AB2B_DATA 73GPIO14/AB2B_CLK 74
GPIO15/FAN_TACH1 75GPIO16/FAN_TACH2 76
GPIO17/A20M 77
GPIO20/PS2CLK 78GPIO21/PS2DAT 80
AB1A_DATA 86AB1A_CLK 87
AB1B_DATA 84AB1B_CLK 85
PGM 56FWP# 82
EA# 83CLOCK 48
32KHZ_OUT 58RESET_OUT# 49
PWRGD 61VCC1_PWRGD 60
24MHZ_OUT 50
TEST PIN 1MODE 57
DMS_LED# 91BAT_LED# 88
PWR_LED#/8051TX 90FDD_LED#/8051RX 89
C654
10P_0402_50V8J
Y6
32.768KHZ_12.5P_1TJS125DJ2A073
OU
T4
IN1
NC
3
NC
2
C652
0.1U_0402_16V4Z
1 2
R481
100K_0402_5%
1 2
R479
1K_0402_5%1 2
R476
10_0402_5%@
12
R497
100K_0402_5%
12
C641
4.7U_0805_10V4Z
1
2
J6
NO SHORT PADS
1 2
R468
10K_0402_5%
1 2
JP30
ACES_85201-0602@
123456
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LPC_AD3LPC_AD2LPC_AD1
LPC_FRAME#
LPC_AD0
FWH_IC
CLK_PCI_FWHNB_RST#FWH_INIT#
FWH_TBL#FWH_WP#
KSO[0..15]
ON/OFF#
ON/OFFBTN_KBC#
FWH_GPIKSI[0..7]
ON/OFF#
CLK_PCI_FWH
FWH_ICFWH_GPI
NB_RST#
LPC_AD3
LPC_AD0LPC_AD1LPC_AD2
LPC_FRAME#
FWH_WP#FWH_TBL#
FWH_INIT#
CLK_PCI_FWH
KSI4
KSO1
KSI7
KSO0
KSI0
KSO6
KSI1
KSO7
KSO3KSO12
KSI3
KSO13
KSO2
KSO8
KSO4
KSI6
KSO5
KSO10KSO15
KSO11
KSO9
KSO14
KSI2
KSI5
KSI3
KSO2
KSO4
KSO7
KSO8
KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSO14
KSO11
KSO10
KSO15
KSO3
KSO12
KSO13
KSO5
KSI0
KSO1
KSO6
CLK_PCI_FWH <18>
FWH_INIT# <18>
FWH_TBL#<18>FWH_WP#<18>
KSO[0..15]<38>
LID_SW# <16,19>
NB_RST# <13,18,26,35,37,38>
LPC_AD0 <18,37,38>LPC_AD1 <18,37,38>
LPC_AD3 <18,37,38>LPC_AD2 <18,37,38>
LPC_FRAME# <18,37,38>
ON/OFFBTN_KBC# <38>
ON/OFFBTN# <19>
KSI[0..7]<38>
KSO12<38>
KSI0<38>
KSI4<38>KSI5<38>KSI6<38>KSI7<38>
KSI1<38>
NUM_LED#<38>MUTE_LED<30,32>
CAPS_LED#<38>
WL_BT_LED#<36>
ON/OFF#<40>STB_LED#<36,38,40>
+3VS
+3VL
+3VALW
+3VL
+3VL
+3VS+5VS
+3VS
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
BIOS BOM/SW BD CONN/KB CONN
Custom
39 58Friday, April 15, 2005
2005/03/01 2006/03/11
BIOS ROMINT_KBD CONN.
Power button
Switch Board conn./ LID Switch
Layout and BOM change
C676 56P_0402_50V8J1 2
R473
100K_0402_5%
12
C665 56P_0402_50V8J1 2
C689
0.1U_0402_16V4Z1 2
C642
0.1U_0402_16V4Z
1
2
C60.1U_0402_16V4Z
1
2
R485
100K_0402_5%
12
C677 56P_0402_50V8J1 2
C666 56P_0402_50V8J1 2
D28
RB751V_SOD323
21
C678 56P_0402_50V8J1 2
C670 56P_0402_50V8J1 2
C667 56P_0402_50V8J1 2
C271
0.1U_0402_16V4Z
1
2
C682 56P_0402_50V8J1 2
C679 56P_0402_50V8J1 2
C671 56P_0402_50V8J1 2
U40A
SN74LVC14APWLE_TSSOP14
O 2I1
P14
G7
U18
SST49LF004B-33-4C-NH_PLCC32
NC1
DQ7/RES21
A9/FGPI3/GPI33 A8/FGPI2/GPI24 A7/FGPI1/GPI15 A6/FGPI0/GPI06
DQ5/RES19DQ6/RES20
ID3/A3 9ID2/A2 10ID1/A1 11ID0/A0 12
DQ0/FWH0/LAD013DQ1/FWH1/LAD114DQ2/FWH2/LAD215DQ3/FWH3/LAD317
INIT#/OCE# 24IC/MODE 29CLOCK/R/C# 31RST# 2
NC22
DQ4/RES18
A4/TBL#8
VDD 25
NC26NC27
VSS 28
LFRAME#/FWH4/WE# 23
A5/WP#7
VDD 32
VSS 16
A10/FGPI4/GPI430
C668 56P_0402_50V8J1 2
R158
10K_0402_5%
12
C683 56P_0402_50V8J1 2
SW1
ESE11MV9_4P
2
4
1
3
C680 56P_0402_50V8J1 2
C672 56P_0402_50V8J1 2
C669 56P_0402_50V8J1 2
R474
100K_0402_5%
1 2
JP4
ACES_85205-0400
11223344
C254
0.1U_0402_16V4Z
1
2
C684 56P_0402_50V8J1 2
C681 56P_0402_50V8J1 2
C673 56P_0402_50V8J1 2
C662 56P_0402_50V8J1 2
R415
10_0402_5%@
12
JP15
ACES_85203-2402
112233445566778899101011111212131314141515161617171818191920202121222223232424
25 2526 2627 2728 2829 2930 3031 3132 3233 3334 3435 3536 3637 3738 3839 3940 4041 4142 4243 4344 4445 4546 4647 4748 48
C685 56P_0402_50V8J1 2
JP6
ACES_85203-1402
11223344556677889910101111121213131414
C674 56P_0402_50V8J1 2
C663 56P_0402_50V8J1 2
U15
SST49LF008A-33-4C-EI_TSOP40@
A0/ID024A1/ID123A2/ID222A3/ID321
A4/TBL#20A5/WP#19
A6/FGP1018A7/FGP1117A8/FGP1216A9/FGP1315A10/FGP147
NC11NC23NC34NC45NC56NC68
NC813
DQ0/FWH0 25DQ1/FWH1 26DQ2/FWH2 27DQ3/FWH3 28
DQ4/RES 32DQ5/RES 33DQ6/RES 34DQ7/RES 35
NC711
NC914 IC 2
RST# 12
NC1031NC1136
OE#/INIT# 37
WE#/FWH4 38
VDD2 39VDD1 10
R/C#/CLK 9
VSS3 40VSS2 30VSS1 29
C596
10P_0402_25V8K@
1
2
G
D
S Q44
2N7002_SOT232
13
R189
100_0402_5%
1 2
C675 56P_0402_50V8J1 2
C638
0.1U_0402_16V4Z
1
2
C664 56P_0402_50V8J1 2
R475
100K_0402_5%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
RJ45_MDI3+
PWR_LED
ON/OFF#
RJ45_MDI1+
RJ45_MDI3-
RJ45_MDI1-
DOCK_MOD_TIPDOCK_MOD_RING
RJ45_MDI2-
RJ45_MDI0+
RJ45_MDI2+
RJ45_MDI0-
LAN_ACT#_DOCKLANLINK_STATUS#_DOCK
D_CRMAD_LUMA
D_COMPS
PREP#
DETECT
CRT_DDCDACRT_DDCCL
RXD1
RTS#1
DCD#1RI#1DTR#1
DSR#1
CTS#1
TXD1
LPTSTB#LPTAFD#LPTERR#
LPTACK#
LPTSLCTIN#LPTINIT#
LPD0LPD1
LPD4
LPD2
LPD5LPD6
LPD3
LPD7
LPTBUSYLPTPELPTSLCT
DETECT
KBD_DATAKBD_CLK
PS2_DATAPS2_CLK
PCIECLK_DOCK#
PCIE_MRX_C_PTX_N1
PCIE_MRX_C_PTX_P1
PCIECLK_DOCK
PCIE_MTX_C_PRX_P1
PCIE_MTX_C_PRX_N1
DOCK_HPS#
DLINE_IN_LDLINE_IN_R
CPPE_DOCK#
USBP3-
USBP3+
USBP0-
EXPCRD_RST#
USBP0+
DOCK_MOD_TIP
SER_SHD
SLP_S5#_5R
PWR_LED
LAN_ACT#_DOCK
LAN_ACTIVITY#
LANLINK_STATUS#_DOCK
LAN_LINK#
SLP_S5#_5R
DLINE_OUT_LDLINE_OUT_R
DOCK_MOD_RING
USBP0+
USBP3-
USBP0-
USBP3+
DOCK_HPS#
D_REDD_GREEND_BLUE
VA_ON#
RJ45_MDI1- <28>RJ45_MDI1+ <28>
RJ45_MDI3- <28>RJ45_MDI3+ <28>RJ45_MDI2+<28>
RJ45_MDI2-<28>
RJ45_MDI0-<28>RJ45_MDI0+<28>
CRT_GREEN<13,17>
D_COMPS<13,17>D_CRMA<13,17>D_LUMA<13,17>
PREP# <19>
ON/OFF#<39>
CRT_DDCCL<17>CRT_DDCDA<17>
CRT_RED<13,17>
CRT_BLUE<13,17>
RXD1<37>
RTS#1<37>
DCD#1<37>RI#1<37>
DTR#1<37>
DSR#1<37>
CTS#1<37>
TXD1<37>
LPTSTB#<37>LPTAFD#<37>LPTERR#<37>
LPTACK#<37>
LPTINIT#<37>LPTSLCTIN#<37>
LPD5<37>LPD4<37>
LPD1<37>LPD0<37>
LPD2<37>LPD3<37>
LPD7<37>LPD6<37>
LPTBUSY<37>LPTPE<37>
LPTSLCT<37>
KBD_DATA <38>KBD_CLK <38>
PS2_DATA <38>PS2_CLK <38>
PCIE_MRX_C_PTX_P1 <12>
PCIE_MRX_C_PTX_N1 <12>
PCIECLK_DOCK <15>
PCIECLK_DOCK# <15>
PCIE_MTX_C_PRX_N1 <12>
PCIE_MTX_C_PRX_P1 <12>
DLINE_IN_L <30>DLINE_IN_R <30>
CPPE_DOCK# <15,19>
USBP3-<19>
USBP3+<19>
EXPCRD_RST#<19>
USBP0+<19>
USBP0-<19>
SER_SHD<37>
STB_LED#<36,38,39>
LAN_ACTIVITY# <27,28>
LAN_LINK# <19,27,28>
SLP_S3#<19,26,38,42>
SLP_S5<34,42,48>
DLINE_OUT_L <32>DLINE_OUT_R <32>
CRT_HSYNC<17>CRT_VSYNC<17>
DOCK_HPS <32>
+DOCKVINVIN
+DOCKVIN
+5VS
+3VALW
+3VALW +5VALW+5VS+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
SPR Connector
Custom
40 58Friday, April 15, 2005
2005/03/01 2006/03/11
DOCK CONN. 184PIN
SPR@
SPR@
R4 0_0402_5%SPR@ 12
R17
1K_0402_5%SPR@
12
C13
5P_0402_50V8C@
R5 0_0402_5%SPR@ 12
R8
10K_0402_5%SPR@
12
C19
0.1U_0402_16V4ZSPR@
1
2
G
D
S Q3
2N7002_SOT23SPR@
2
13
L1KC FBM-L18-453215-900LMA90T_1812SPR@
12
C10 10P_0402_50V8J@
R6 0_0402_5%SPR@ 12
JP5
ACES_85205-0200
12
R21
10K_0402_5%SPR@
12
JP26B
JAE_SP03-14588-PCL03
4646474748484949505051515252535354545555565657575858595960606161626263636464656566666767686869697070717172727373747475757676777778787979808081818282
128 128129 129130 130131 131132 132133 133134 134135 135136 136137 137138 138139 139140 140141 141142 142143 143144 144145 145146 146147 147148 148149 149150 150151 151152 152153 153154 154155 155156 156157 157158 158159 159160 160161 161162 162163 163164 164
G2G2
RINGRING TIP TIP
P2 P2
GND165GND166GND167GND168GND169
GND 171GND 172GND 173GND 174GND 175GND 176GND170
G
D
S
Q5
2N7002_SOT23
2
13
R9 1K_0402_5%SPR@1 2
C18
1000P_0402_50V7KSPR@
1
2
G
D
S Q2
2N7002_SOT23SPR@
2
13
R20100K_0402_5%
12G
D
S Q1
2N7002_SOT23SPR@
2
13
C1110P_0402_50V8J@
C8 10P_0402_50V8J@
G
D
S
Q4
2N7002_SOT23SPR@
21
3
C15
5P_0402_50V8C@
R15100K_0402_5%
12
JP26A
JAE_SP03-14588-PCL03SPR_CONN@
P1G1
8384858687888990919293949596979899
100101102103104105106107108109110111112113114115116117118119120121122123124125126127
123456789101112131415161718192021222324252627282930313233343536373839404142434445
C17
1000P_0402_50V7KSPR@
1
2
C9 10P_0402_50V8J@
C14
5P_0402_50V8C@
R10
100K_0402_5%SPR@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SLP_S3
VCC1_PWRGD <38>
VR_ON <49>
VGATE<15,47,48,49>
SLP_S3<42,47>
NB_PWRGD <13,18,38>
+3VL
+3VL
+3VL +3VL+2.5VS +3VS
+3VS
+RS480_Core
+1.8VS
+3VL
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
Power OK
Custom
41 58Friday, April 15, 2005
2005/03/01 2006/03/11
For EC ATE
C646
0.1U_0402_16V4Z
1
2
Q41MMBT3904_SOT23
2
31
R470
10K_0402_5%
12
R469
10K_0402_5%
12
U40F
SN74LVC14APWLE_TSSOP14
O 12I13
P14
G7
R462
100K_0402_5%
1 2
R471
100K_0402_5%
1 2
R482
560K_0402_5%
12
C6321U_0603_10V4Z
1
2
R464100_0402_1%
12
U40B
SN74LVC14APWLE_TSSOP14
O 4I3
P14
G7
U40E
SN74LVC14APWLE_TSSOP14
O 10I11
P14
G7
D25
RB751V_SOD323
21
U40C
SN74LVC14APWLE_TSSOP14
O 6I5
P14
G7
R463
1K_0402_5%
12
C647
0.1U_0402_16V4Z
1
2
R46547K_0402_5%
12
U40D
SN74LVC14APWLE_TSSOP14
O 8I9
P14
G7
D26
RB751V_SOD323
21
J5
SHORT PADS
12
R46710K_0402_5%
1 2
R461
1K_0402_5%
12
U38C SN74LVC125APWLE_TSSOP14
I9 O 8
OE
#10
Q42MMBT3904_SOT23
2
31
D29RB751V_SOD323@ 2
1
G
D
S Q43
2N7002_SOT23
2
13
C6360.1U_0402_16V4Z
1
2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
I
I
J
J
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
SLP_S5
SLP_S3#
SLP_S5
SLP_S5#
SLP_S3RUNON
SLP_S3
RUNON
RUNON
SLP_S3 SLP_S3 SLP_S3 SLP_S5SLP_S3
SLP_S3
RUNON
SLP_S3#<19,26,38,40> SLP_S5#<46>
SLP_S5<34,40,48>SLP_S3<41,47>
+1.25V
VL VL+5VS+5VALW
B+
+3VS+3VALW
+2.5VS+2.5V
+1.8VS+1.8VALW
+3VS +5VS +2.5V+2.5VS+1.8VS
+1.2V_HT
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
DC/DC circuit
Custom
42 58Friday, April 15, 2005
2005/03/01 2006/03/11
+5VALW to +5VS Transfer
+3VALW to +3VS Transfer
+2.5V to +2.5VS Transfer
+1.8VALW to +1.8VS Transfer
Discharge circuit
For EC ATE
H12HOLEA
1
C5530.01U_0402_16V7K
1
2
U36
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
H20HOLEA
1
CF1
1
CF11
1
U14
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
CF7
1
U13
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
G
D
S Q37
2N7002_SOT232
13
R373
470_0402_5%
12
C551
10U_0805_10V4Z
1
2H21HOLEA
1
R372
470_0402_5%
12
J1
SHORT PADS
12
H4HOLEA
1
C560
0.1U_0402_16V4Z
1
2H9HOLEA
1
C257
10U_0805_10V4Z
1
2
FM41
R454
470_0402_5%
12
U35
SI4800DY_SO8
S 1S 2S 3G 4
D8D7D6D5
C263
0.1U_0402_16V4Z
1
2
CF10
1
CF13
1
CF9
1
C253
10U_0805_10V4Z
1
2
H1HOLEA
1
H8HOLEA
1
H22HOLEA
1
C261
10U_0805_10V4Z
1
2
G
D
S Q14
2N7002_SOT232
13
G
D
S Q34
2N7002_SOT232
13
G
D
S Q11
2N7002_SOT232
13
C547
10U_0805_10V4Z
1
2
C264
0.1U_0402_16V4Z
1
2
C557
10U_0805_10V4Z
1
2
C555
10U_0805_10V4Z
1
2
H5HOLEA
1
R361
470_0402_5%
12
H10HOLEA
1
C262
10U_0805_10V4Z
1
2
R177
22K_0402_5%
H23HOLEA
1
CF3
1
CF12
1
H3HOLEA
1H14HOLEA
1
G
D
S Q33
2N7002_SOT232
13
G
D
S Q35
2N7002_SOT232
13
FM21
CF8
1
CF6
1
H24HOLEA
1
H6HOLEA
1
H15HOLEA
1
FM51
FM61
C260
0.1U_0402_16V4Z
1
2
CF2
1
R165
100K_0402_5%1
2
CF4
1
H17HOLEA
1
CF5
1
CF14
1
R175
100K_0402_5%
12
D7
RB751V_SOD323
21
G
D
S
Q152N7002_SOT232
13
H18HOLEA
1
H13HOLEA
1
FM31
R197
470_0402_5%
12
G
D
S Q39
2N7002_SOT232
13
G
D
S Q12
2N7002_SOT232
13
H2HOLEA
1
R176
100K_0402_5%
12
H16HOLEA
1
R362
470_0402_5%
12
H11HOLEA
1
M1HOLEA
1
M2HOLEA
1
FM11
R174
470_0402_5%
12
G
D
S Q13
2N7002_SOT232
13
H19HOLEA
1
H7HOLEA
1
C552
0.1U_0402_16V4Z
1
2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
ALARM
AC_CHG
ADP_PRES
ADP_PRES
ACDET
AC_CHG
ACDRV#
ACDRV#
ACDET
CELLSEL# <51>
CHGCTRL<38,51>
ALARM <51>
ACSET<52>
ADP_PRES <38,45,51>
ACOK <45,50>
AC_CHG <51>
VIN
B+
BATT
VIN
VL
B+
BATT
BATT
BQ24703VREF+3VL
+3VL
BQ24703VREF
P4
P3
+3VL
VINVL
BATT
VL
P2
BATT
+3VL
1.24VREF
+3VL
P2
B+
B+
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
Charger
Custom
43 57Friday, April 15, 2005
2005/03/01 2006/03/01
INC.
CV=12.6V(6 CELLS LI-ION) 16.8V(8 CELL LI-ION)
10.14.2004
Icharger=3ACELLSEL# =0,Vcharger= 12.6VCELLSEL# =1,Vcharger= 16.8V
PR46174K_0603_1%
12
PR
39
100K
_040
2_1%
12
PR38150_0402_1%
12
PR17
0.018_2512_1%
1 2
PR300.025_2512_1%
1 2
PR
207
3K_0
402_
1%
12
PD11SKS30-04AT_TSMA2
1
G
D
S
PQ6
RHU002N06_SOT323
2
13
PC1140.1U_0402_10V6K
12
PR
3649
.9K_
0402
_1% 1
2
PC
19
1U_0
603_
6.3V
6M
12
PR4313.7K_0402_1%
12
PD
10R
LZ16
B_L
L34
21
PR51
1M_0402_5%
1 2
PC
184.
7U_0
805_
10V6
K
12
PU25
LMV431B_SOT23-5
NC 2
REF4
NC 1
CATHODE 3
ANODE5
G
D
S
PQ10RHU002N06_SOT323
2
13
PR4213.7K_0402_1%
12
PR587.87K_0402_1%
12
PR27
100K_0402_1%@
1 2
PR
56
10K_
0402
_1%
12
PR35200_0402_1%@
12
PC
114.
7U_1
206_
25V6
K
12
PR20100_0402_1%
12
PU24SN74LVC1G17DBVR_SOT23-5
O 4I2
P5
G3
NC 1
PR47301K_0603_0.1%
12
PR50130K_0402_1%
12
PC1130.1U_0402_10V6K
12
PR18150K_0402_5%
12
PU5B
LM393M_SO8
+5
-6 O 7
P8
G4
PR37
330K_0402_5%
1 2
PU5A
LM393M_SO8
+3
-2 O 1
P8
G4
PR
4010
K_04
02_5
%
12
PR3423.7K_0402_1%@
12
PR41
3K_0402_5%1 2
PC
214.
7U_0
805_
10V6
K
12
PR60
33K_0402_1%
1 2
PC
141U
_080
5_50
V4Z
12
PR
21
0_04
02_5
%
12
PC9
0.1U_0402_16V7K
1 2
PQ5AO4407_SO8
365 7 8
2
4
1PR578.87K_0402_1%
12
PU4 LMV321M7_SC70-5@
+1
-3
P5
G2
O 4
PC
230.
022U
_040
2_16
V7K
12
PR
204
47K_
0402
_1%
@
12
PC
2015
0P_0
402_
50V8
J
12
PR49
100K_0402_5%
1 2
PL2
15U_PLC1045P-150A_3.7A_20%
1 2
PR
208
3K_0
402_
1%12
PR48301K_0402_1%
12
PR19100_0402_1%
12
PR55100_0402_5%
12
PR
3219
1K_0
402_
1%
12PR31
100K_0402_1%@
12
PR231M_0402_5%@
1 2
PR28
140K_0402_1%
1 2
G
D
S
PQ59
RHU002N06_SOT323
2
13
PR5220K_0402_1%
12
PR5424K_0603_0.5%
12
PC
15
0.1U
_060
3_16
V7K
12
PC
124.
7U_1
206_
25V6
K
12
PC
2210
0P_0
402_
50V8
J
12
PR
44
10K_
0603
_1%
12
PR15200K_0402_5%
12
PR454.7K_0402_5%
12
PQ4AO4407_SO8
3 65
78
2
4
1
PR
3343
.2K_
0402
_1% 1
2
PC
164.
7U_1
206_
25V6
K
12
PU3
BQ24703_QFN28
ENABLE5ACSEL28ALARM19SRSET2ACSET3
IBAT13VREF4
ACN8ACP9ACDET26
ACPRES27 VHSP 20
GND 17BATDEP 1BATSET 6
BATDRV# 24BATP 12SRN 15SRP 16PWM# 21
COMP7
VCC 22
VS 18
ACDRV# 25
NC4 23NC3 14NC110
NC211
G
D
S
PQ7
RHU002N06_SOT3232
13
PR250_0402_5% 1 2
G
D
S
PQ9
RHU002N06_SOT3232
13
PR29100K_0402_5%
12
PR
610
K_04
02_5
%1
2
PR5324K_0402_1%
12
PR16
0.015_2512_1%
1 2
PR24
23.7K_0402_1%@
12
PC
1710
U_1
206_
25V6
M
1
2PD33
1SS355_SOD323 @
12
PC131U_0603_6.3V6M
1 2
PQ58AO4407_SO8
3 65
78
2
4
1
PR261K_0402_1%
12
PR209
0_0402_5%
1 2
G
D
S
PQ8RHU002N06_SOT3232
13
PR22
1.65K_0402_1%
12
PQ3AO4407_SO8
365
78
2
4
1
PR598.87K_0402_1%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DL3
DH3
5HG
LX5
BST3A
BST3BBST5B
DL5
DH5
BST5A
3HG
LX3
2VREF_1999
MAINPWON <6,45,50>
KBC_PWR_ON <38>
MAX_LX5<52>
B++
+3VALWP
VL
+5VALWP
B+
VL
B++VS
VS
2VREF_1999
+3VLP
+3VL
+3VL+3VLP
VL
2VREF_1999
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
3.3V / 5V
B
44 57Friday, April 15, 2005
2005/03/01 2006/03/01
+3.3V/+5V
J7NO SHORT PADS
12
PR690_0402_5%
12
PU6
MAX1999EEI_QSOP28
LX515DL519
BST514
DH516
OUT521FB59
SHDN#6ON54
GN
D23
ILIM5 11
DH3 26
LX3 27
TON
13
DL3 24
OUT3 22
FB3 7PGOOD 2SKIP#12
ON33
REF8
PRO
#10
VCC
17
V+20
ILIM3 5
BST3 28
LDO
325
LD05
18
N.C.1
PC
304.
7U_1
206_
25V6
K
12
G
D
S
PQ13RHU002N06_SOT323
2
13
PR622.2_0402_5%
1 2
PR
6820
0K_0
402_
1%
12
PR654.7_1206_5%
12
PR301
0_0402_5%1 2
PC
2710
U_1
206_
25V6
M
1
2
PR740_0402_5%@1 2
PR
7049
9K_0
402_
1%
12
PC
2922
00P_
0402
_50V
7K
12
PR
7149
9K_0
402_
1%
12
PC
334.
7U_0
805_
10V4
Z
12
PR2170_0402_5%
1 2
PC240.1U_0603_50V4Z
1 2
+ PC37150U_D_6.3VM
1
2
PR
763.
57K_
0402
_1%
@
12
PC250.1U_0603_50V4Z
1 2
PR79100K_0402_5%
12
PC
321U
_080
5_16
V7K
12
PR
6720
0K_0
402_
1%
12
PR630_0402_5%
12
PC280.1U_0603_16V7K
12
PC
380.
22U
_060
3_10
V7K
1
2
PR
750_
0402
_5%
12
G
D
S
PQ14RHU002N06_SOT323
2
13
PC
31
4.7U
_120
6_25
V6K
12
PR
780_
0402
_5%
12
PR
7347
K_04
02_5
%
12
PC
34
0.1U
_060
3_50
V4Z
1
2
PR
7210
.2K_
0402
_1%
@
12
PR770_0402_5%
12
PR
6447
_040
2_5%
12
PR61499K_0402_1%
12
PC400.1U_0603_16V7K
12
PL4
10U
H_D
104C
-919
AS-1
00M
_20%
12
PC
2622
00P_
0402
_50V
7K
12
PC360.1U_0603_25V7K
12
PD12CHP202U_SC70
1
3 2
AO4912_SO8
PQ11
D22 G2 8
G13D1/S2/K 5
D21D1/S2/K 7
S1/A4 D1/S2/K 6
PJ1
PAD-OPEN 2x2m
2 1
PL5
10U
H_D
104C
-919
AS-1
00M
_20%
12
+
PC
3515
0U_D
_6.3
VM
1
2
PC
394.
7U_0
805_
10V4
Z
12
PL3FBM-L18-453215-900LMA90T_1812
12
PR660_0402_5%
12 AO4912_SO8
PQ12
D22 G2 8
G13D1/S2/K 5
D21D1/S2/K 7
S1/A4 D1/S2/K 6
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
ADPIN
MAINPWON,44,50>
ADP_PRES <38,43,51>
ACOK<43,50>
VL B+
VL
+5VALW
VIN
VIN
VS
VMB_B
VMB_A
P4
VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
DCIN / Pre-Charge
Custom
45 57Friday, April 15, 2005
2005/03/01 2006/03/01
PC
810
00P
_040
2_50
V7K
12
PR219
0_0402_5%@ 1 2
PQ2DTC115EUA_SC70
2
13
PD2
1N4148_SOD80
12
PR11220K_0402_1%
12
PD6
RB715F_SOT323
2
31
PC21000P_0402_50V7K
12
PD3
1N4148_SOD80
12
PD51N4148_SOD80
12
PL1FBM-L18-453215-900LMA90T_1812
1 2
PC
410
00P
_040
2_50
V7K
1
2
1
2
3
4
PCN1
SINGATRON_2DC_S736I201
1
2
3
4
PR51.5K_1206_5%
1 2
PR13
47K_0402_5%
1 2
PC1100P_0402_50V8J
12
PR7
47_1206_5%
1 2
PR1410K_0402_5%
12
PD4
1N4148_SOD80
12
PR8100K_0402_5%
1 2
PR21.5K_1206_5% 1 2
PR10200K_0402_1%
12
PC
615
00P
_040
2_50
V7K
1
2
PR3
1.5K_1206_5%
1 2
PC
310
0P_0
402_
50V
8J
12
PC50.1U_0603_50V4Z
12
G
D
S
PQ1
RHU002N06_SOT323
2
13
PR
1230
1K_0
402_
1%
12P
C7
0.1U
_060
3_16
V7K
12
PR447_1206_5%
12
PR110K_0402_5%
12
PU1A
LM393M_SO8
+ 3
- 2O1
P8
G4
PD1EC10QS04_SOD106@
12
PR91M_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SB_SLP_S5#<19>
PM_RSMRST#<19,38> SLP_S5# <42>
+3VALWP
B+
+5VALWP
+2.5VP+1.8VALWP
B+++
+1.8VALWP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
2.5VP / 1.8VALWP
Custom
46 57Friday, April 15, 2005
2005/03/01 2006/03/01
Iimit=(10.3-8uA*Rimit)*(Rsense+140)/(Rsense*Rds)Rsense=1K,RILM=51K,Rds(on) tpy.=19.7mΩ,Max=24mΩ.
Iimit Max=9.6/51K*(100+1K)/19.7mΩ=10.897AIimit Min=9.6/51K*(100+1K)/(24mΩ*1.3)=6.636A
+VCCP O.C.P. = 6.636A ~ 10.897A
Rsense=2K,RILM=107K,Rds(on) tpy.=19.7mΩ,Max=24mΩ.
Iimit Max=9.6/107K*(100+2K)/19.7mΩ=9.564AIimit Min=9.6/107K*(100+2K)/(24mΩ*1.3)=6.0388A
+VCCP O.C.P. = 6.038A ~ 9.564A
Iimit=(10.3-8uA*Rimit)*(Rsense+140)/(Rsense*Rds)
PR8918.2K_0402_1%
12
PC571000P_0402_50V7K @
12
PR
8810
K_04
02_1
%
12
PL83.3UH_PLFC0745P-3R3A_30%
1 2
PC
550.
01U
_040
2_16
V7K
12
PR842.2_0402_5%
1 2
PR9010K_0402_5%
12
PC452200P_0402_50V7K @
12
PL7
4.7UH_PLFC1045P-4R7A_5.5A_30%
12
PR830_0402_5%
1 2
PC464.7U_1206_25V6K
12
PC
430.
1U_0
603_
25V7
K
12
PC
560.
01U
_040
2_16
V7K
12
PD13CHP202U_SC70
1
32
PC4210U_1206_25V6M
1
2
PR9391K_0402_1%
12
PC470.01U_0402_16V7K
12
PC
544.
7U_0
805_
6.3V
6K
12
PR820_0402_5%
1 2
PC
52
4.7U
_080
5_6.
3V6K
12
AO4912_SO8
PQ17
D2 2G28
G1 3D1/S2/K5
D2 1D1/S2/K7
S1/A 4D1/S2/K6
+
PC
5122
0U_D
2_4V
M
1
2
PR2110_0402_5%
12
PR2120_0402_5%
12
PD45
RB751V_SOD323
1 2
PR862.74K_0402_1%
12
PR1400_0402_5%
1 2
PR852.2_0402_5%
1 2
PR9457.6K_0402_1%
12
PC500.1U_0603_25V7K
12
PR9110K_0402_1%
12
AO4912_SO8
PQ16
D22 G2 8
G13D1/S2/K 5
D21D1/S2/K 7
S1/A4 D1/S2/K 6
+
PC
5322
0U_D
2_4V
M
1
2
PC480.01U_0402_16V7K
12
PL6
FBM-L11-322513-151LMAT_1210
12
ISL6227
PU7
ISL6227CA_SSOP28
GN
D1
LGATE12
PGND13
PHASE14
UGATE15
BOOT16
ISEN17
EN18
VOUT19VSEN110
OCSET111
SOFT112
DD
R13
VIN
14
PG115 PG2/REF 16
SOFT2 17
OCSET2 18
VSEN2 19VOUT2 20
EN2 21
ISEN2 22
BOOT2 23
UGATE2 24
PHASE2 25
PGND2 26
LGATE2 27
VCC
28
PR21333_0402_5%
12
PC
4122
00P_
0402
_50V
7K
@
12
PC
581000P_0402_50V7K
@
12
PC442.2U_0805_10V6K
12
PR9210K_0402_1%
12
PR812.2_0402_5%
12
PD44RB751V_SOD323
12
PC490.1U_0603_25V7K
12
PR8051_1206_5%
12
PR872.74K_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SLP_S3<41,42>
VGATE<15,41,48,49>
+3VS
+1.5VSP
+1.8VALW
+5VALW
+1.2V_HTP
+5VALW
+5VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
1.2V_HTP / +1.5VSP
A3
47 57Friday, April 15, 2005
2005/03/01 2006/03/01
PL93.3UH_PLFC0745P-3R3A_30%
1 2
PR1065.11K_0402_1%
1 2
G
D
S
PQ23SN7002N_SOT23
2
13
PC660.1U_0402_16V7K
12
PD141N4148_SOD80 1
2
PC644.7U_0805_6.3V6K
12
PR103
6.81K_0402_1%
12
PC69
1U_0603_6.3V6M@
12
G
D
SPQ20SN7002N_SOT23
2
13
PC77
0.1U_0402_16V7K
1 2PC76
0.1U_0402_16V7K@ 12
PC7010U_1206_25V6M
1
2
PC75
0.1U_0402_16V7K@ 12
PR104100K_0402_5%
12
PR102
10_0603_5% @
1 2
PC730.1U_0402_16V7K
12
PJ11JUMP_43X79
11
22
PU9
APL5331KAC-TR_SO8
VOUT4
NC 5GND2
VREF3
VIN1 VCNTL 6
NC 7
NC 8
TP 9
PR10710K_0402_1%
12
PU10
APW7057KC-TR_SOP8
BOOT 1
LGATE 4
UGATE 2
FB6
PHASE 8
GND3
OCSET7
VC
C5
+
PC
7422
0U_B
2_2.
5VM
1
2
PC651U_0603_6.3V6M
12
PR10110K_0402_1%
12
PR100
0_0402_5%
1 2
+
PC
121
220U
_B2_
2.5V
M
@
1
2
PC674.7U_0805_6.3V6K
12PC68
0.1U_0402_16V7K@
12
G
D
S
PQ22SN7002N_SOT23
2
13
PC72470P_0402_50V8J
12
AO4912_SO8
PQ21
D2 2G28
G1 3D1/S2/K5
D2 1D1/S2/K7
S1/A 4D1/S2/K6
PR1050_0402_5%
1 2
PR992K_0402_1%
12
PJ12
JUMP_43X118
1 122
PC
714.
7U_1
206_
25V
6K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1.2VDL
VGATE#
VGATE#
1.2V_DH
BST_
LX
1.2VLX
1.2V
_BST
VGATE
SLP_S5<34,40,42>
STRP_DATA <13>
VGATE41,47,49>
+3VALW
+1.25VP
+1.8VALW
+1.5VSP +1.5VS
+3VALWP +3VALW
+5VALWP +5VALW
+2.5VP +2.5V+1.25V+1.25VP
+1.8VALWP +1.8VALW
+1.2V_HT+1.2V_HTP
+2.5V
+RS480_CoreP
B+
+RS480_CoreP +RS480_Core
VL
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
1.25VP / RS480_Core
B
48 57Friday, April 15, 2005
2005/03/01 2006/03/01
(2A,140mils ,Via NO.= 7)
3A,120mils ,Via NO.= 6)
(5A,40mils ,Via NO.= 2)(5A,200mils ,Via NO.= 10)
(8A,320mils ,Via NO.= 16) (2A,80mils ,Via NO.= 4)
(5A,200mils ,Via NO.= 10)
4A,160mils ,Via NO.= 8)
PC5910U_1206_6.3V7K
12
PJ6
JUMP_43X79
1 122
G
D
S
PQ64RHU002N06_SOT323
2
13
PC
304
0.1U
_040
2_10
V6K
12
PR215
4.7_0402_5%
1 2
PC3080.1U_0402_10V6K
12
+ PC
307
330U
_D2E
_2.5
VM
1
2
PR3250_0402_5% @
1 2
PC3140.1U_0603_25V7K
12
AO4912_SO8
PQ62
D2 2G28
G1 3D1/S2/K5
D2 1D1/S2/K7
S1/A 4D1/S2/K6
PC3120.1U_0603_16V7K
12
PR324
0_0402_5%
1 2
PR9810K_0402_1%
12
PR9510K_0402_1%
12
PJ3
JUMP_43X1181 122
G
D
S
PQ
63R
HU
002N
06_S
OT3
23
@
2
13
PR
315
4.99
K_0
402_
1%
12
G
D
S
PQ67RHU002N06_SOT323
2
13
PJ4
JUMP_43X118
1 122
PJ7
JUMP_43X118
1 122
PC601U_0603_6.3V6M
12
PR
319
30_0
402_
5%
12
PL16FBM-L11-322513-151LMAT_1210
12
PR970_0402_5%
1 2
PC
313
3300
P_0
402_
50V7
K
12
PJ14
JUMP_43X118
1 122
G
D
SPQ19SN7002N_SOT23
2
13
PC
311
0.01
U_0
402_
25V
7Z
12
PC630.1U_0402_16V7K@
12
G
D
S
PQ65RHU002N06_SOT323
2
13
PR3187.32K_0603_1%
12
PR323
49.9K_0402_1%
1 2
PR31310_1206_5%
12
PR311
220K_0402_5%
1 2
PC610.1U_0402_16V7K
12
PC
305
1U_0
603_
6.3V
6M
12
PR
316
402_
0603
_1%
12
PC306
0.047U_0603_25V7M
1 2
PC6210U_1206_6.3V7K
12
PR
309
10K
_040
2_5%
12
PR
314
787_
0603
_1%
12
PC
302
10U
_120
6_25
V6M
1
2
PD34
1SS355_SOD323
12
PJ8
JUMP_43X79
1 122
PU26
MAX8578
SS2 LX 7
FB1
BST 6
EN9
DH 8
VCC3
GN
D4
OC
SET
10
DL 5
PR214
866_0402_1% 1 2
PL153.3UH_PLFC0745P-3R3_4.8A_30%
1 2
PJ5
JUMP_43X118
1 122
PR3170_0402_5%
1 2
PU8
APL5331KAC-TR_SO8
VOUT4
NC 5GND2
VREF3
VIN1 VCNTL 6
NC 7
NC 8
TP 9
PJ9
JUMP_43X118
1 122
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCC
VCC
LXM
BSTM
DHM
DLM
PGND
OAIN+
FB
DHS
LXS
DLSREF
REF
ILIM
BSTM
GNDS
OA
IN+
OAIN+
REF
OAIN+
OAIN+
VID0<6>
VID4<6>
VID3<6>
VID1<6>
VID2<6>
VGATE<15,41,47,48>
VR_ON1>
CP
U_C
OR
EFB <6
>
CP
U_C
OR
EFB
#
<6>
+3VS
+5VSCPU_B+
B+
CPU_B+
+5VS
+CPU_CORE
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
+CPU_CORE
Custom
49 57Friday, April 15, 2005
2005/03/01 2006/03/01
CPU VCC SENSE
Near CPU GND
For EC ATE
PC
794.
7U_1
206_
25V
6K
12
PR206
100K_0402_5%@1 2
PR
108
10_0
402_
5%
12
PC
944.
7U_1
206_
25V
6K
12
PR138
820_0402_5%
1 2
PC980.47U_0603_16V7K
1 2
PR
134
0_04
02_5
%12
J2 SHORT PADS1 2
PR131
121K_0402_1%
1 2
PR127 820_0402_5%
1 2
PR300100K_0402_5%@
1 2
PR96 0_0402_5%
12
PR1360_0402_5%
1 2
PC316
1000P_0402_50V7K12
PR
122
499_
0402
_1%
12
PC88
0.47U_0603_16V7K
1 2
PC841U_0603_10V6K
12
PR112
2.2_0402_5%
1 2
PR
109
10K
_040
2_5%
1
2
PC
954.
7U_1
206_
25V
6K
12
PR
133
100_
0402
_5%1
2
PR12660.4K_0402_1%
12
PR1140_0402_5%
1 2
PR118 0_0402_5%
12
PR111 0_0402_5%
12
PR20510_0402_5%@
12
PR
135
2.2_
0402
_5%
12
PC
300
4700
P_0
402_
25V
7K
@
12
PQ27IRF7413Z_SO8
S1
S3
G4
D8
D7
D6
D5
S2
PL11
.56UH_MPC1040LR56_ 23A_20%
1 2
PQ
28IR
F783
2_S
O8
S1
S3
G4
D8
D7
D6
D5
S2
PC
784.
7U_1
206_
25V
6K
12
PR21010_0402_5%@
12
PR
121
499_
0402
_1% 1
2
PC90 470P_0402_50V8J
1 2
PQ24IRF7413Z_SO8
S1
S3
G4
D8
D7
D6
D5
S2
PR117 0_0402_5%
12
PQ
29IR
F783
2_S
O8
S1
S3
G4
D8
D7
D6
D5
S2
PR13071.5K_0402_1%1 2
PR125
100K_0402_5% @
1 2
PR113 0_0402_5%
12
PC91 0.22U_0603_16V7K
1 2
PR119 0_0402_5%
1 2
PR137820_0402_5%
12
PC123
4700P_0402_25V7K@
1 2
PD16
CHP202U_SC70
1
3
2
PR110 0_0402_5%
12
PC315
1000P_0402_50V7K12
PR128 200K_0402_1%
1 2
PL12
.56UH_MPC1040LR56_ 23A_20%
1 2
PR129
1.82K_0402_1%
1 2
+
PC
8210
0U_2
5V_M1
2
PC
85
0.01
U_0
402_
50V
4Z
12
PC
87
1000
P_0
402_
50V
7K
@
12
PL10FBM-L18-453215-900LMA90T_1812
1 2
PC
122
1000
P_0
402_
50V
7K1
2
PC
97
0.22
U_0
603_
16V
7K
12
PD
15SK
S30-
04AT
_TS
MA
21
PD
17SK
S30-
04AT
_TS
MA
21
PC
960.
01U
_040
2_50
V4Z
12
PR
120
820_
0402
_5%
12
PR1240_0402_5%
1 2
PR115 0_0402_5%
12PR116
0.001_2512_5%
1 2
PC
8122
00P
_040
2_50
V7K
12
PC
800.
01U
_040
2_50
V4Z
12
PC
9210
0P_0
402_
50V
8J
12
PU11
MAX1544
TIME1
TON2
SUS3
S04
S15
SHDN#6
OFS7
REF8
ILIM9
VCC10
GND11
CCV12
GNDS 13
CCI 14
FB 15
OAIN- 16
OAIN+ 17
SKIP18
OVP19
D420
D321
D222
D123
D024
VROK25
BSTM 26
LXM 27
DHM 28
DLM 29
VDD 30
PGND 31
DLS 32
DHS 33
LXS 34
BSTS 35
V+ 36
CMP 37
CMN 38
CSN 39
CSP 40
PC
93
2200
P_0
402_
50V
7K
12
PR
132
80.6
K_0
402_
1%
12
PR
123
1.82
K_0
402_
1%
12
PC832.2U_0603_6.3V4Z
1
2
PC89
270P_0402_50V7K
1 2
PQ
25IR
F783
2_S
O8
S1
S3
G4
D8
D7
D6
D5
S2
PC
86
0.22
U_0
603_
16V
7K
12
PQ
26
IRF7
832_
SO
8
S1
S3
G4
D8
D7
D6
D5
S2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
EC_SMC_A1
EC_SMD_A1
EC_SMC_B1
EC_SMD_B1
TS_B
EC_SMD_BEC_SMC_B
EC_SMC_AEC_SMD_A
AB/I_B
MAINPWON <6,44,45>
THM_MBAY# <38>
AB1B_DATA <38>
AB1A_CLK <38>
AB1A_DATA <38>
AB1B_CLK <38>
CFET_B<51>
AB/I_A <51>
THM_MAIN# <38>
ACOK<43,45>
VL
VL
VMB_A
+3VL
VMB_B
BATT
VS
+5VALWP
VL
BATT_A
BATT_B
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
BATTERY CONN / OTP
Custom
50 57Friday, April 15, 2005
2005/03/01 2006/03/01
PH1 near CPU :
Recovery at 45 degree CPCBA thermal protection at 90 degree C
10.13.2004
PC1040.01U_0402_50V4Z
12
PC1031000P_0402_50V7K
12
PCN3
SUYIN_20163S-06G1-K
BATT+ 1
TS 5
SMD 2
GND 6
SMC 3B/I 4
PD43@SM24_SOT23
231
PR143100_0402_5%
12
PC1000.01U_0402_50V4Z
12
PR148150K_0402_1%
12
PC991000P_0402_50V7K
12
PR1491K_0402_5%
12
PR139
330K_0402_5%@12
PR
144
2.55
K_0
603_
1%
12
G
D
SPQ31
RHU002N06_SOT323@
2
13
G
D
S
PQ15
RHU002N06_SOT323
2
13
PR153499K_0402_1%@1 2
PH
110
K_T
H11
-3H
103F
T_06
03_1
%
12
PR1511K_0402_5%
12
PL13
FBM-L18-453215-900LMA90T_1812
1 2
PU12B
LM393M_SO8
@
+ 5
- 6O7
P8
G4
PR142100_0402_5%
12
PL14FBM-L18-453215-900LMA90T_1812
1 2
PC
106
0.1U
_060
3_16
V7K
@
12
PD42
@SM05_SOT23
2
31
PR156499K_0402_1%@
12
PC
107
1000
P_0
402_
50V
7K
@
12
PR159499K_0402_1%@
12
PR15710K_0402_1%@1 2
G
D
S
PQ30
RHU002N06_SOT323@
2
13
PR150210K_0402_1%
1 2
PR154100_0402_5%
12
PC
101
1000
P_0
402_
50V
7K
12P
C10
20.
22U
_040
2_10
V4Z
12
PR14547K_0402_1% 1 2
PR155
100_0402_5%
12
PR141100_0402_5%
12
PU12A
LM393M_SO8@
+ 3
- 2O1
P8
G4
PU1B
LM393M_SO8
+5
-6 O 7
P8
G4
PR147
150K_0402_1%
12
PR158365K_0603_1%@
12
PR15210K_0402_5%@
12
PCN2
TYCO_C-1746706_6P
BATT+ 1
ID 4
SMD 2
GND 6
SMC 3
B/I 5
PR14615K_0402_1% 1 2
PC
105
0.01
U_0
402_
50V
4Z
@
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
CELLSEL#
ADP_PRES
BATT_IN
BATSELB_A#
BATSELB_A
BATSELB_A#
BATSELB_A#
BATT_IN
CFET_A
CFET_B
CFET_A
BATT_IN
CFET_ABATT_IN
LATCH
BATT_IN
BATT_IN
BATSELB_A
CHGCTRL38,43>
AC_CHG<43>
BATSELB_A#<38>
ALARM<43>
ADP_PRES <38,43,45>
BATCON <38>
AB/I_A<50>
CFET_B<50>
CELLSEL#<43>
BATT
+3VL
+3VL
+3VL
BATT
+3VL
+3VL
+3VL
+3VL
+3VL
+3VL
BATT_A
BATT_B
+3VL
BATT_A
BATT_B
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
Charger
Custom
51 57Friday, April 15, 2005
2005/03/01 2006/03/01
INC.G
D S
PQ32RHU002N06_SOT323
2
1 3
PD26
1N4148_SOD80
1 2
C
BE
PQ39
HM
BT22
22A_
SOT2
3
1
2
3
PD201SS355_SOD323
12
PC
112
0.22
U_0
402_
10V4
Z
12
PR1621.5M_0402_5%
12
PR
180
10K_
0402
_5%
12
PR160
100_0402_5%
1 2
C
BE
PQ48
HM
BT22
22A_
SOT2
3
1
2
3
PU17
SN74AHC1G08DCKR_SC70
IN11
IN22 G3
O 4
P5
G
D
S
PQ36
RHU002N06_SOT3232
13
G
D
S
PQ53RHU002N06_SOT323
2
13
PR174470K_0402_5%
12
PU16SN74LVC1G17DBVR_SOT23-5
O 4I2
P5
G3
NC 1
G
D
S
PQ42
RHU002N06_SOT3232
13
PC
110
0.01
U_0
402_
16V7
K
12
PR
165
22K_
0402
_5%
12
PQ43AO4407_SO8
3 65
78
2
4
1
PR
163
47K_
0402
_5%
12
PR
170
220K
_040
2_5%
12
PU15
SN74LVC1G14DCKR_SC70-5~D
A2 Y 4
P5
NC
1
G3
PR181
10K_0402_5%
1 2
PC
108
0.1U
_040
2_10
V6K
12
PD27
RB715F_SOT323
2
31
PC109
1000P_0402_50V7K
1 2
G
D
S
PQ37RHU002N06_SOT323
2
13
PR173
10K_0402_5%
1 2
G
DS
PQ41RHU002N06_SOT323
2
13
G
D
S
PQ50RHU002N06_SOT323
2
13
PR161
0_0402_5%
1 2
G
D
S
PQ38RHU002N06_SOT323
2
13
G
D
S
PQ47
RHU002N06_SOT323
2
13
PR176470K_0402_5%
12
G
D
S
PQ51
RHU002N06_SOT3232
13
G
D
S
PQ49
RHU002N06_SOT3232
13
PR216100K_0402_5%
12
PD18
RB715F_SOT323
2
31
PU14
74LVC1G02_04_SOT353
INB1
INA2
P5
G3
O 4
PR166470K_0402_5%
12
PR
168
470K
_040
2_5%
12
G
D
S
PQ34RHU002N06_SOT323
2
13
PR
178
470K
_040
2_5%
12
PD21
RLZ6.2C_LL34
21
PQ44AO4407_SO8
365
78
2
4
1
PR177470K_0402_5%
12
PC
317
220P
_040
2_50
V7K
12
PR1724.7K_0402_5%
12
PQ45AO4407_SO8
3 65
78
2
4
1
PU18
SN74LVC1G14DCKR_SC70-5~D
A2 Y 4
P5
NC
1
G3
PR
164
22K_
0402
_5%
12
PD23
1N4148_SOD80
1 2
PR1794.7K_0402_5%
12
PQ46AO4407_SO8
365
78
2
4
1
G
DS
PQ33RHU002N06_SOT323
2
13
PU13
74LVC1G02_04_SOT353
INB1
INA2
P5
G3
O 4
PR175100K_0402_5%
12
G
D
S
PQ52
RHU002N06_SOT323
2
13
PD22
1N4148_SOD80
12
PD25
B540C_SMC
21
PR167470K_0402_5%
12
PR16910K_0402_1%
12
G
D
S
PQ35RHU002N06_SOT323
2
13
G
D
S
PQ40RHU002N06_SOT323
2
13
PU20
SN74LVC1G17DBVR_SOT23-5
O 4I2
P5
G3
NC 1
PU19
SN74AHC1G08DCKR_SC70
IN11
IN22 G3
O 4
P5
PD24
B540C_SMC
21
PR
171
10K_
0402
_5%
12
PC111
1000P_0402_50V7K
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ACSET <43> OCP# <19>
MAX_LX5 <44>
P4
B+
+5VS
+5VS
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
System OCP throttle
Custom
52 57Friday, April 15, 2005
2005/03/01 2006/03/01
PC
119
1U_0
805_
16V
7K
12
PR
203
10K
_040
2_5%
12
PR187
1K_0402_1%
1 2
C
BE
PQ54MMBT3906_SOT23
1
2
3
PR199
0_0402_5%
1 2
PR19710_0402_5%
12
PR184
100K_0402_5%
1 2
PR320
39K_0603_1%
1 2PU23
LMV431ACMX5_SOT23-5
NC 2
REF4
NC 1
CATHODE 3
ANODE5
PU22B
LM358A_SO8
+5
-6 0 7
PU21A
LM358A_SO8
+ 3
- 201
P8
G4
PC1180.1U_0402_16V7K
12
PD
321S
S35
5_S
OD
323
@
12
PC1172200P_0402_50V7K
1 2
PR194100K_0603_0.5%
1 2
PC
116
1U_0
805_
16V
7K
12
PR
185
0_04
02_5
%
12
PR196909_0402_1%
12
PR
201
237K
_040
2_1%
12
PU22A
LM358A_SO8
+3
-2 0 1
P8
G4
PD
311S
S35
5_S
OD
323
@
12
PR19536.5K_0402_1%@
1 2
PR
191
10K
_040
2_5%
12
PR
186
0_04
02_5
%
12
PD29
RB751V_SOD323
1 2
PR322100K_0402_5% 1 2
PR
193
80.6
K_0
402_
1%
12
PR2020_0402_5%
12
PR19810K_0603_0.1%
12
PR
183
133K
_040
2_1%
12
PR1921M_0603_1%
1 2
PC
120
0.01
U_0
402_
16V
7K
12
PR18910K_0402_1%
1 2
G
D
S
PQ56RHU002N06_SOT323
2
13
PD30
RB751V_SOD323
1 2
PR
321
12K
_060
3_5%
12
G
D
S
PQ57RHU002N06_SOT323
2
13
PU21B
LM358A_SO8
+5
-6 0 7
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
PWR PIR Sheet (1)
Custom
53 57Friday, April 15, 2005
2005/03/01 2006/03/01
Version Change List ( P. I. R. List ) for Power Circuit
Item Issue DescriptionDateRequestOwner Solution Description Rev.Page# Title
1
2
41CHARGER 08/17/2004
(DB) HPThe reason for the change is reslove the timing diff between two compatator for AC detect
add PQ33
41 CHARGER08/17/2004(DB) Change PR16 to 15m ohm ,change PR17 to 18m ohm
change PR30 to 25m ohm.add PR207,PR208,PC9
341
CHARGER 08/26/2004(DB) HP
add a PC113 4.7uF cap for +3VL and add PC114 a 4.7uF cap for VL. Both caps can be non-installed
DB
DB
DB
446 RS480_Core 10/14/2004
(SI-1) HP To implement PS480 power play
5 48 Battery CONN 10/14/2004(SI-1) To change main battery CONN. pin define for supporting
NiMH battery (10/20-Cancel the design change,don't support the NiMH battery)
SI
SI
6 45
HP
HP
add PU26(MAX8576),PQ62(AO4912),PL15,PC307,
add PD44,PR2131.8VALWP11/1/2004(SI-1)
To add 1.8VALWP discharge circuitSI
SI2
SI2
7 46 RS480_Core12/27/2004(SI2) HP To set RS480_Core(1.0V) from 1.04V to 1.0V Change PR314 from 750ohm to 787ohm ,
PR316 from 255ohm to 402ohm
8 50 Battery Selector 12/27/2004(SI2) HP Add PR216 (100k) to connect PU20 pin2
9 2.5V12/27/2004(SI2) add PD45HW
10 51 OCP 2/21/2005(PV) HP
Remove PR182,PR188,PR190,PR200,PQ55add PR320,PR321,PR322To change the work mode of OCP function
SI2
PV
11
45
44 CHARGER4/7/2005(MV) HP Airline with travel battery issue
Remove PU4,PD33,PR23,PR24,PR27,PR31,PR34,PR35MV
12 Battery Selector 4/14/2005(MV)
add PC317 MV
1
1
2
2
3
3
4
4
5
5
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
HW PIR Sheet(1)
Custom
54 58Friday, April 15, 2005
2005/03/01 2006/03/11
<93.08.09>
6
1 codec is the primary codec and must be tied to AC_SDIN0 19, 30 Change AC97_SDIN2 to AC97_SDIN0 for CODEC
30 Change R351 and R352 to be zero ohm resistors
M.B. Ver.
0 .1
0 .1
This shutdown pin of TPS2211A does not have a internal pullup 2 6 Add R770 0 .1
2
3
Reason for change PAGE Modify ListFixed IssueItem
Conexant recommendation
4
5
7
8
9
10
11
12
13
14
15
16
17
18
19
20
6 Connect pin 3(SD#) of U4 to +3VS directly 0 .1AMD recommendation
3 6 Delete Q79, R384 and R578Driving standby/power LED by STB_LED# pin directly for cost saving. 0 .1<93.08.11>
If +2.5VDDA can be connected to +2.5VS directly, we can save the cost of U4 6 Reserve R772 0 .1
23,24 Add Q85, D50, D51, R773, R774, R775 and C665. Change C403 and C406 from 0.33uF to 1uF 0 .1TI recommendation
Connect pin 12 of U12 to PCI_RST#26
18 Change R141 from 4.53k 1% to 5.49k 1% 0 .1ATI recommendation
HP request 27, 28 Change NIC from RTL8110SBL to BCM5788M 0 .1
33 Reserve C704
18 Add R799, R800, R801 and R802
<93.08.11> re-annotation for process rule 4~30, 32~42 re-annotation for all components, excluding MOM and power components. 0 .1
Power saving 5 , 8 Change R51, R60, R320 and R326 from 100 ohm to 1K ohm 0 .2
Delete useless components which were reserved in rev.0.1 7, 13 De lete C233, C523, R321, C409, U30, R234, C293 and U21 0 .2
Pin-9(FS2) of U8(Clock gen.) is not a clock output pin. 1 3 Delete R95, add R72. 0 .2
Use Link# instead of Activity# for NIC_LINK# function 1 9 Connect U19.C5 to LAN_LINK# 0 .2
CARD_LED is an active high signal 2 3 Change Q45 from MMBT3906 to MMBT3904 0 .2
PETp0 and PETn0 should be connected to Tx on the host, PERp0 and PERn0should be connected to Rx on the host.
2 6 Swap these differential pairs 0 .2
Add an inverter between KBRST from KBC(U39) to KBRST# in SB400(U19) 3 8 Add Q46 and R497 0 .2
The reset signal(PCI_RST#) for LPC BIOS ROM de-assert too late 3 9 Use NB_RST#(A_RST#) instead of PCI_RST# 0 .2
PowerPlay support 13, 14 Add R327, connect U9.E10 to power circuit. Change VDD_CORE of U9 from +1.2V_HT to+RS480_Core
0 .2
VariBright support 13, 38 Add R499 and R501, reserve R498 and R500 0 .2
21 HP request 1 9 Add R502 0 .2
Add R503, R504 and R50538
36 Change Bat_LED to be on +3VL rail
<93.10.18>23 Change R496 from 150 ohm to 220 ohm
Change R285, R290 and R293 from 150 ohm to 220 ohm; Change R296 from 300 ohm to560 ohm
36
Delete Q40, add R508(reserved), R509 and Q4715
22 Main battery pin definition change 3 8 Change the net of U39.76 from THM_MAIN# to KBC_GPIO16; Add R507 0 .2
23 Mandatory ATI RS480 Design Change(PA_RS480F1) 1 1 Change R357 from 1K ohm to 0 ohm, delete R355 and R363 from BOM. 0 .2<93.10.21>
depopulate R499 and R501, populate R498 and R500
1
1
2
2
3
3
4
4
5
5
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
HW PIR Sheet (2)
Custom
55 58Friday, April 15, 2005
2005/03/01 2006/03/11
23 ATI Application Note(AN_IXP400AG2) 2 0 Delete R216, R217 and R218, pull SATA_X1, PLLVDD_SATA, XTALVDD_ SATA andAVDD_SATA[8:1] to GND
M.B. Ver.
0 .2
Reason for change PAGE Modify ListFixed IssueItem
<93.10.21>
24 Power team recommendation 1 6 Change R316 from 22K_+/-5% to 1.8K_+/-1%, Change R315 from 10K_+/-5% to 1K_+/-1% 0 .2
25 IDE DASP# signal route error 3 5 Add D32, D33, R510 and R511 0 .2<93.10.26>
26 To fix USB signal rate failed issue 1 5 Populate R76 0 .2<93.11.02>19 Do not populate C246 and C247 for external 48MHz OSC.
2 2 Populate R183 and R417, do not populate R418
27 To improve drive strength/Min Bottom Margin for PCIE 18 Change R402 from 5.49K ohm to 4.12K ohm 0 .2
28 ATI Product Advisory(PA_IXP400AC10) 1 8 Short PJ13; needn't to populate U17, R182 and R186; Change C265, C267, C268 and C269back to 0.1uF
0 .2
29 HP request 1 4 Delete D6
0 .2
19 Change R382 from 10K ohm to 47K ohm
38
41 Change C636 from 1uF to 0.1uF
Change R491, R497 and R507 from 10K ohm to 100K ohm
15 Populate R508 and do not populate R509
30 Charge LED show wrong color 3 6 Swap the net of D16 pin 1 for the net of pin4 0 .2
3 1 Once power up Conexant CODEC, We got a pop sound issue. We have used SBGPIO1 to asserted MUTE# for audio amp shutdown to avoided this pop sound.Unfortunately, GPIO1 will output about 1.2m second "Hi" pulse once SB getaux-power, so we can't shutdown amp during this interval. We have to add RCdelay circuit to eliminate this pulse.
3 2 Change R291 from 10K ohm to 100K ohm, add C655 0 .2
32 MIC can't work 3 3 Change the power of U34 from +VDDA_CODEC to +5VS 0 .2
33 The gain of MIC amp. is too big 3 3 Change R136 from 150K ohm to 100K ohm 0 .2
34 HP request 1 3Change L23~L25 from FBM-L10-160808-800LMT to HLC0603CSCCR11JT; Change L26~L28from 0 ohm to HLC0603CSCC39NJT 0 .2<93.11.09>
35 To improve overshoot for PCI clock 1 8 Change R410, R414, R181, R179, R420, R424 and R423 from 22 ohm to 39 ohm 0 .2
36 To improve RTC accuracy 1 8 Change C250 and C251 from 12pF to 18pF 0 .2
37 Broadcom recommendation 2 7Add R513 and reserve R512 for BCM4401; Change R313 from 1K ohm to 0 ohm forBCM5788M; Reserve C656~C659 0 .2
28 Populate C35 for both BCM5788M and BCM4401
38 To improve background noise for microphone 3 3 Add L43, C660 and R514 0 .2
39 To fix white screen issue after pressing Ctl+Alt+Del to restart 1 3 Add R515 0 .2
40 32Change C356 and C355 from 0.47uF (X7R 10%) to 0.047uF (X7R 10%); Change C320, 318,315, and 312 from 470pF to 220pF but still reserved only 0 .2<93.11.12> HP request
4 1 16Add Lid switch control from HW side Add D34 0 .2
<93.11.17> 42change PCIRST# to NB_RST#
35
37
38
43 HP request for microphone and audio 3 2 Add D35
33 Add L44,C661,R516
Change R376 to 14K
44 reserve for new card clock request 2 6 reserve Q48
Change U34 to TLC2462
Change R136 to 150K
0 .2
0 .2
0 .2
1
1
2
2
3
3
4
4
5
5
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
HW PIR Sheet (3)
Custom
56 58Friday, April 15, 2005
2005/03/01 2006/03/11
45 HP request 1 8 Add R518 and R519
M.B. Ver.
0 .2
Reason for change PAGE Modify ListItem
<93.11.18>16 Add R517
0 .3
0 .3
0 .3
0 .3
0 .3
<93.12.23> 46 Remove unused component
4 7 Fixed ENVDD pulse when power on 1 3 Add R521
18 Del U17,R182,R186
48 Fixed V,VS,SLP_S3 and SLPS5 pulse when ALWS apply
1 9 De l R139
Change U23 from 7411 to 761149 Support Smart Card 2 3,25
Add U12 (AND gate)
U23 pin k7 pull high to +5VS
Reserve U41 (Quick switch)Support XD 1.2 2 3,2550
51 Improve LAN performanceChange R29 to 1.21K
27
28Change U7 to PULSE_H5007
33
42 Pull high R175 and R176 to VL
0 .3
Add R522,R523,R524,R525,R526,R527
19
Fixed Issue
Del L43
<93.12.29> 52 Reserve ESD diode on external MIC and speaker connector 3 2 Reseve D36,D37
33 Reserve D38
<94.01.07> 53Remove unused component 2 Del R103,R104,R106,R107 (10K 0402 5%)
1 8 De l PJ13,U17,R186,R182 (Modify net name from +1.9VS to +1.8VS)
1 9 Del R150,Y4,C246,C247,C248,C248,C249,Y3,R151,U37,R394
38 Del R520,C662,R505,R501,R503,R504
Reserve ESD diode on USB port5 4 34 Reserve D39,D40,D41
0 .3
0 .3
0 .3
55 For TI request 2 3,25 Del R522,R523,R524 (on quick switch)
Change R452 to 2.2K
Change JP25,pin5 net name to CB_SDWP#_SMCE#
Change JP25,pin10 net name to CB_MSBS_SDCMD_SMWE#
Reserve R531
0 .3
Add R532 on net CLK_48M_CB for 7611
Add R533 on net CLK_48M_CB for 4510
Add R534 for 4510
<94.01.10>For TI request 2 3,25 Add R535
De l R452
Add R536,R537,R538,R539,R540
56 0 .3
Change JP25,pin13 net name to CB_MSBS_SDCMD_SMWE#
Del R453
<94.01.13> 57 For MS card issue 2 5 Del Q19
Add R544,Q50,R543R545
Reserve U42,Q49,R542,R541,C687,R546
58 For HP recommand 04 Change R336 to 1.2K 0402 5%
18 Change R398 and R400 to 1.2K
0 .3
0 .3
1
1
2
2
3
3
4
4
5
5
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
HW PIR Sheet (4)
Custom
57 58Friday, April 15, 2005
2005/03/01 2006/03/11
<94.02.24> 59 Change RP8,RP11,RP14~RP17,RP20,RP23,RP24,RP27,RP36,RP37,RP40,RP43,RP44,RP47,RP48,RP51,RP53,RP56 from 10Ω to 39Ω
M.B. Ver.
0 .4Improve EMI issue on DDR data bus 8
Reason for change PAGE Modify ListFixed IssueItem
60 For S3,S4 resume issue 1 3
18
Change L34 from FBML10160808121LMT bead to 150Ω 1% resistor
Change C268,C269,C265,C267 from 0.1u to 0.01u
6 1Support HW throttling (OCP) 1 9 Change U19.C6 NETNAME from THERM_SCI to OCP#
Change U19.B6 NETNAME from OCP# to THERM_SCI
6 1 Can't detect Nee card when warm boot1 9 Change MINIPCI_DIS# NETNAME to NEWCARD_RST
Del R395 and R530
Change MINIPCI_RST# NETNAME to PCI_RST#19,29
19
19
Add Q5126
63 Remove unused component and footprint 2 8 Del R303,Q25,Q26
62 Modify LED brightness 3 6 Change R285 from 220Ω to 68Ω
Del R47838
0 .4
0 .4
0 .4
0 .4
0 .4
19 Change R149 from pull high to pull down
<94.03.07> 64 Connect Mini PCI clamp to GND 29 Connect JP11.127 and JP11.128 to GND 0 .4
65 Remove unused footprint 1 5 De l R62,R63,R77
66 Fixed ATI SB400 32.576MHz RTC accuracy issue 1 8 Change Y5 to EPSON 12.5P 20ppm crystal
0 .4
0 .4
6 7 Modem time drift issue 3 0 Change C363 and C367 to 15PF 0 .4
68 Separate Cardreader SM_XD power rail 2 5 Del U42,R545,R546 0 .4
69 Change SB 14.318MHz from NB to clock gen
7 0
Strap on SB400 PCICLK2 redefine. 2 5 Pop R180 and unpup R18371
For ATI recommand to modify PCIE driving strength 1 2 Change R121 to 8.25KΩ, R120 to 82.5Ω72
13 Delete R67 footprint and let NB OSCOUT pin NC.
Change clock gen 14.318MHz driving method 15 Let Clock gen pin 54 only drive 14.318MHz to SB
Let Clock gen pin 53 drive 14.318MHz to Super IO and KBC
19 Delete R529 footprint ,connect SB 14.318MHz from clock gen
7 3
<94.03.09>
For ATI recommand 19 Let SB SUS_STAT# NC
13 NB SUS_STAT# pull high to 1.8VS, R360 change to 4.7KΩ, R364 change to 470KΩ
0 .4
0 .4
0 .4
0 .4
0 .4
Add R546,R547,Q56,D41,D42
74 Reserve USB ESD diode footprint Reserve resistor footprint between A_ground and D_ground for ESD concern
3 4 Reserve D39 and D40 footprint
3 0 Reserve R548,R549,R550,R551,R552 footprint
0 .4
7 5 Broadcom 5788M version change 2 7 Change 5788M from revA3 to revA5
76 TI 7611 version change 2 3 Change TI 7611 from revA to revC
0 .4
0 .4
77 Amber LED change for HP request 3 6 Change D16 to 19-22UYSYGC/S530-A2/TR8 19X16 G/Y 0 .4
78 Layout space save 1 8 Add RP68,RP69
Del R449,R210,R211,R450,R446,R447,R212,R220
1
1
2
2
3
3
4
4
5
5
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-2541 0.4
HW PIR Sheet (5)
Custom
58 58Friday, April 15, 2005
2005/03/01 2006/03/11
<94.04.11> 79
M.B. Ver.
0 .5
Reason for change PAGE Modify ListFixed IssueItem
80
DDR memtest failed 8 Change RP8,RP11,RP14~RP17,RP20,RP23,RP24,RP27,RP36,RP37,RP40,RP43,RP44,RP47,RP48,RP51,RP53,RP56 from 39Ω to 10Ω
Workaround for S3 resume failed 1 9 Reserve U43 and add R554 0 .5
81 For Sandisk MS pro 512MB card issue 2 3 Change R209,R224,R536,R537,R538,R539,R540 to 0 ohm 0 .5
82 For insert MS card shut down issue 2 5 Reserve U42,R553 and add C690
Change Cardreader socket pin 45,46 to N.C.
Change Cardreader socket pin 1 to GND
83 For SM card detect abnormal issue 2 6 Change cardreader pin30 to GND
0 .5
0 .5
84 Charger and BATT full LED brightness abnormaml 3 6 Add R555 0 .5
85 Improve EMI issue 3 9 Add C689
86 Improve internal mic noise 3 3 Change C235 to 0.047u and C239 to 220p
0 .5
0 .5
<94.04.14> 87 TI recommand 23 Reserve R556 (pull down on CARD_LED)
2 5 Reserve C692,C693,C694 (0.1u cap on card detect pin)
8 8 Improve internal mic noise 3 3 Change C235 to 0.027u and C239 to 270p