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M-Mushtaq Hussain 1.4.1 CPU Architecture Von Neumann model Von Neumann introduced the idea of the stored program. Previously data and programs were stored in separate memories.von Neumann realized that data and programs are indistinguishable and can therefore use the same memory. Von Neumann architecture uses a single processor. It follows a linear sequence of fetch- decode-execute operations for sequence of instructions which makeup the program. In order to do this a processor has to use some special registers. A register is simply a location that can store extremely limited amount of instruction or data only immediately before or after processing. The registers are outside the immediate access store and consequently allow faster access to the data they store. Processor uses a group of special purpose registers to execute a program Program counter (PC): Program counter is sometimes called sequence control register. It stores the address of the next instruction to be fetched. Memory address register (MAR): When the next instruction is needed, its address is copied from the PC and placed in the memory address register. Memory data registers (MDR): It is sometime called the memory buffer register (MBR) because it acts like a buffer, temporarily storing a data value before passing it on to e.g. CIR. Index register (IR): An index register in a computer's CPU is a processor register used for modifying operand addresses during the run of a program, typically for doing vector/array operations. If the address is an indexed address, add the address to the contents of the index register to form the address of actual data. Current instruction register (CIR): Holds the instruction that is about to be executed. Status register: A status register, flag register, or condition code register is a collection of status flag bits for a processor. The status register is a hardware register which contains information about the state of the processor. Role of arithmetic logic unit (ALU), control unit (CU) and system clock Arithmetic logic unit In digital electronics, an arithmetic logic unit (ALU) is a digital circuit that performs arithmetic and bitwise logical operations on integer binary numbers. It is a fundamental building block of the central processing unit (CPU) found in many computers. An ALU performs basic arithmetic and logic operations. Examples of arithmetic operations are addition, subtraction, multiplication, and division. Examples of logic operations are comparisons of values such as NOT, AND, and OR. Control unit The control unit is a component of a computer's central processing unit (CPU) that directs operation of the processor. It tells the computer's memory, arithmetic/logic unit and input and output devices how to respond to a program's instructions. It directs the operation of the other units by providing timing and control signals. All computer resources are managed by the CU (Control Unit).It directs the flow of data between the Central Processing Unit (CPU) and the other devices. Control unit: The Control Unit makes decisions and sends the appropriate signal down its lines to other parts of the computer. It controls the timing of operations in the computer and controls the instructions sent to the processor and the peripheral devices. Contact the teacher: 03215275281

Hussain M-Mushtaq · 1.4.2 The fetch-execute cycle . An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-execute cycle, or FDX) is the basic operation cycle

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Page 1: Hussain M-Mushtaq · 1.4.2 The fetch-execute cycle . An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-execute cycle, or FDX) is the basic operation cycle

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1.4.1 CPU Architecture

Von Neumann model

Von Neumann introduced the idea of the stored

program. Previously data and programs were stored

in separate memories.von Neumann realized that

data and programs are indistinguishable and can

therefore use the same memory.

Von Neumann architecture uses a single processor. It follows a linear sequence of fetch-

decode-execute operations for sequence of instructions which makeup the program. In

order to do this a processor has to use some special registers.

A register is simply a location that can store extremely limited amount of instruction or

data only immediately before or after processing. The registers are outside the immediate

access store and consequently allow faster access to the data they store.

Processor uses a group of special purpose registers to execute a program

Program counter (PC): Program counter is sometimes called sequence control

register. It stores the address of the next instruction to be fetched.

Memory address register (MAR): When the next instruction is needed, its address is

copied from the PC and placed in the memory address register.

Memory data registers (MDR): It is sometime called the memory buffer register

(MBR) because it acts like a buffer, temporarily storing a data value before passing it

on to e.g. CIR.

Index register (IR): An index register in a computer's CPU is a processor

register used for modifying operand addresses during the run of a program, typically

for doing vector/array operations. If the address is an indexed address, add the

address to the contents of the index register to form the address of actual data.

Current instruction register (CIR): Holds the instruction that is about to be executed.

Status register: A status register, flag register, or condition code register is a

collection of status flag bits for a processor. The status register is a hardware

register which contains information about the state of the processor.

Role of arithmetic logic unit (ALU), control unit (CU) and system clock

Arithmetic logic unit

In digital electronics, an arithmetic logic unit (ALU) is a digital circuit that

performs arithmetic and bitwise logical operations on integer binary numbers. It is a

fundamental building block of the central processing unit (CPU) found in many computers. An ALU performs basic arithmetic and logic operations. Examples of arithmetic operations

are addition, subtraction, multiplication, and division. Examples of logic operations are

comparisons of values such as NOT, AND, and OR.

Control unit

The control unit is a component of a computer's central processing unit (CPU) that directs

operation of the processor. It tells the computer's memory, arithmetic/logic unit and input

and output devices how to respond to a program's instructions.

It directs the operation of the other units by providing timing and control signals. All

computer resources are managed by the CU (Control Unit).It directs the flow of data

between the Central Processing Unit (CPU) and the other devices.

Control unit: The Control Unit makes

decisions and sends the appropriate

signal down its lines to other parts of the

computer. It controls the timing of

operations in the computer and controls

the instructions sent to the processor and

the peripheral devices.

Contact the teacher: 03215275281

Page 2: Hussain M-Mushtaq · 1.4.2 The fetch-execute cycle . An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-execute cycle, or FDX) is the basic operation cycle

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System clock

Every computer contains an internal clock that regulates the rate at which instructions are

executed and synchronizes all the various computer components. The CPU requires a fixed

number of clock ticks (or clock cycles) to execute each instruction. The faster the clock, the

more instructions the CPU can execute per second.

Clock speeds are expressed in mega hertz (MHz) or giga hertz ((GHz).

Clock rate, the speed at which a microprocessor executes instructions.

Address bus

An address bus is a computer bus (a series of lines connecting two or more devices) that is

used to specify the address from/to which the CPU wishes to read or write. The number of

bits of address bus determines the maximum size of memory which the processor can

access. For example, a system with a 32-bit address bus can address 232 (4,294,967,296)

memory locations. If each memory address holds one byte, the addressable memory space

is 4 GB.

Data bus

Data bus is used to carry the data that needs to be transferred from one hardware

component to another. The memory data register (MDR) is at one end of the data bus. The

data bus is bi-directional because same bus is used for data transmission from

microprocessor to memory location or input/output device and vice versa.

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Page 3: Hussain M-Mushtaq · 1.4.2 The fetch-execute cycle . An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-execute cycle, or FDX) is the basic operation cycle

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Control bus

Control bus is used to send control signals from the control unit to the other components of

the system. A separate wire is dedicated to a particular control signal e.g.

A completed data transfer(read/write)operation

Reset button pressed

Interrupt request

Interrupt acknowledgement

How bus width and clock speed affect the performance of the computer system

The clock speed (or clock rate) is stated in megahertz (MHz) or gigahertz (GHz), and

refers to the speed at which the processor can execute instructions. The faster the

clock, the more instructions the processor can complete per second.

The number of wires in data bus determines the quantity of data that the bus can

carry at any one time.

Increasing the data bus will increase the quantity of data the bus can carry at one

time so speeds up the performance/processing of the computer

A compute with a data bus of 32 lines is called a 32 bit computer and word length is

32.

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Page 4: Hussain M-Mushtaq · 1.4.2 The fetch-execute cycle . An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-execute cycle, or FDX) is the basic operation cycle

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Ports:

In computer hardware, a port serves as an interface between the computer and

other computers or peripheral devices. Computer ports have many uses, to connect

a monitor, webcam, speakers, or other peripheral devices. On the physical layer, a

computer port is a specialized outlet on a piece of equipment to which

a plug or cable connects. Electronically it provides a method to transfer signals

between devices.

Hardware ports can be divided into two groups based on the signal transfer:

Serial ports send and receive one bit at a time via a single wire.

Parallel ports send multiple bits at the same time over several sets of wires.

After ports are connected, they typically require handshaking, where transfer type,

transfer rate, and other necessary information is shared before data are sent.

Plug-and-play ports are designed so that the connected devices automatically start

handshaking as soon as they are connected. USB ports and FireWire ports are plug-

and-play.

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Page 5: Hussain M-Mushtaq · 1.4.2 The fetch-execute cycle . An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-execute cycle, or FDX) is the basic operation cycle

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1.4.2 The fetch-execute cycle

An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-

execute cycle, or FDX) is the basic operation cycle of a computer. It is the process by

which a computer retrieves a program instruction from its memory, determines what

actions the instruction requires, and carries out those actions. This cycle is repeated

continuously by the central processing unit (CPU), from bootup to when the

computer is shut down.

Program counter (PC) - an incrementing counter that keeps track of the memory

address of the instruction that is to be executed next.

Memory address register (MAR) - holds the address of a memory block to be read

from or written to.

Memory data register (MDR) - a two-way register that holds data fetched from

memory (and ready for the CPU to process) or data waiting to be stored in memory.

Current Instruction register (IR) - a temporary holding ground for the instruction

that has just been fetched from memory.

Control unit (CU) - decodes the program instruction in the IR, selecting machine

resources such as a data source register and a particular arithmetic operation, and

coordinates activation of those resources.

Arithmetic logic unit (ALU) - performs mathematical and logical operations.

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Page 6: Hussain M-Mushtaq · 1.4.2 The fetch-execute cycle . An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-execute cycle, or FDX) is the basic operation cycle

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Description in the form of flowchart

Register transfer notation

1. [MAR] [PC] 2. PC [PC] + 1 3. MDR [[MAR]] 4. CIR [MDR] 5. DECODE 6. EXECUTE 7. GO TO STEP 1

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Page 7: Hussain M-Mushtaq · 1.4.2 The fetch-execute cycle . An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-execute cycle, or FDX) is the basic operation cycle

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Step by step description of fetch-execute-cycle

1. Copy the address that is in program counter(pc)into the memory address

register (MAR)

2. Increment the PC (ready for next fetch)

3. Load the instruction that is in the memory address given by the MAR into the

memory data register (MDR)

After increment

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Page 8: Hussain M-Mushtaq · 1.4.2 The fetch-execute cycle . An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-execute cycle, or FDX) is the basic operation cycle

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4. The MBR loads the Current Instruction Register with the instruction to be executed.

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Page 9: Hussain M-Mushtaq · 1.4.2 The fetch-execute cycle . An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-execute cycle, or FDX) is the basic operation cycle

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1.4.3 The processor’s instruction set

An instruction set is a group of commands for a CPU in machine language. The instruction

set consists of multiple pieces, including addressing modes, instructions, native data types,

registers, memory architecture, interrupt, exception handling and external I/O.

Classification of instruction sets

Complex instruction set computer (CISC) has many specialized instructions, some of

which may only be rarely used in practical programs.

A reduced instruction set computer (RISC) simplifies the processor by only

implementing instructions that are frequently used in programs

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Page 10: Hussain M-Mushtaq · 1.4.2 The fetch-execute cycle . An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-execute cycle, or FDX) is the basic operation cycle

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Instruction has two main parts

Op code (abbreviated from operation code) is the portion of a machine language instruction

that specifies the operation to be performed

Operand address or data on which the operation is to be performed.

Addressing modes

Immediate

Direct

Indirect

Indexed

Relative

Immediate addressing

Immediate addressing means that the data to be used is hard-coded into the instruction

itself.This is the fastest method of addressing as it does not involve main memory at all.

For example, you want to add 2 to the content of the accumulator

The instruction is:

ADD #2

Nothing has been fetched from memory; the instruction simply adds 2 to the accumulator

immediately. Immediate Addressing is very useful to carry out instructions involving

constants (as opposed to variables). For example you might want to use 'PI' as a constant

3.14 within your code.

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Page 11: Hussain M-Mushtaq · 1.4.2 The fetch-execute cycle . An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-execute cycle, or FDX) is the basic operation cycle

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Direct addressing

This is a very simple way of addressing memory - direct addressing means the code refers

directly to a location in memory

For example SUB (3001)

In this instance the value held at the absolute location 3001 in RAM is subtracted from the

accumulator. The good thing about direct addressing is that it is fast (but not as fast as

immediate addressing) the bad thing about direct addressing is that the code depends on

the correct data always being present at same location.

It is generally a good idea to avoid referring to absolute memory addresses in order to have

'relocatable code' i.e. code that does not depend on specific locations in memory.

You could use direct addressing on computers that are only running a single program. For

example an engine management computer only ever runs the code the car engineers

programmed into it, and so direct memory addressing is excellent for fast memory access.

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Page 12: Hussain M-Mushtaq · 1.4.2 The fetch-execute cycle . An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-execute cycle, or FDX) is the basic operation cycle

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Indirect addressing

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Page 13: Hussain M-Mushtaq · 1.4.2 The fetch-execute cycle . An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-execute cycle, or FDX) is the basic operation cycle

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Indexed addressing

The address is formed by the operand plus the number in the index register.

Index addressing is fast and is excellent for manipulating data structures such as arrays as

all you need to do is set up a base address (e.g. 10 in CIR) then use the index in your code

to access individual elements. Another advantage of indexed addressing is that if the array

is re-located in memory at any point then only the base address needs to be changed. The

code making use of the index can remain exactly the same.

Relative addressing

Quite often a program only needs to jump a little bit in order to jump to the next

instruction. Maybe just a few memory locations away from the current instruction. A very

efficient way of doing this is to just add a small offset to the current address in the program

counter. (Remember that the program counter always points to the next instruction to be

executed).This is called 'relative addressing'

DEFINITION:

Relative addressing means that the next instruction to be carried out is an offset number of

locations away, relative to the address of the current instruction.

Consider this bit of pseudo-code:

jmp +3 if accumulator == 2 Code executed if accumulator is NOT = 2 jmp +5 (unconditional relative jump to avoid the next line of code) acc: Code executed if accumulator is = 2) Carry on:

In the code snippet above, the first line of code is checking to see if the accumulator has the

value of 2 in it. If it is has, then the next instruction is 3 lines away. This is called a

conditional jump and it is making use of relative addressing.

Another example of relative addressing can be seen in the jmp +5 instructions. This is

telling the CPU to effectively avoid the next instruction and go straight to the 'carryon' point.

CIR

ADI 10 10 200

.

IR(index register) + .

150 .

160 120

accumulator .

120 .

200 395

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Page 14: Hussain M-Mushtaq · 1.4.2 The fetch-execute cycle . An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-execute cycle, or FDX) is the basic operation cycle

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Summary of addressing modes

Application of all addressing modes

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Page 15: Hussain M-Mushtaq · 1.4.2 The fetch-execute cycle . An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-execute cycle, or FDX) is the basic operation cycle

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Assembly language

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