High-Gain and High-Bandwidth Rail-to-Rail Operational Amplifierwith Slew Rate Boost Circuit

Hong-Yi Huang, Bo-Ruei Wang and Jen-Chieh Liuhyhuanggmails.fju.edu.tw

Department of Electric Engineering, Fu-Jen Catholic University, Taiwan

Abstract - In this work, a high gain and high bandwidth multiple poles. A frequency compensation techniquerail-to-rail operational amplifier with slew rate boost which can not obviously extend the bandwidth iscircuit is presented. The constant gm is enhanced required to ensure the stability of a multistage amplifierthrough a source-to-bulk bias control of an input pair. [10]. Furthermore, inserting the compensationA source degeneration scheme is applied to realize an capacitors would decay the slew rate and increase theinput common-mode range insensitive output stage. settling time.Several compensation schemes are applied to maintain The proposed high gain and high bandwidththe stability. A slew rate boost circuit can improve the rail-to-rail operational amplifier will be discussed inoutput slewing. The op amp performs 100-dB dc gain, section II. It contains an input stage, a current100-MHz bandwidth and 22.5-V/us slew rate at 15-pF summation circuit with gain boost, an output stage withoutput load. The layout area is 593x519 um2 in a source degeneration, compensation schemes and a slew0.18-um CMOS process. It consumes 3.2-mW at 1.8V rate boost circuit. Section III describes simulations andsupply voltage. comparisons of the amplifiers. Conclusions are given

in section IV.I. INTORDUCTION

II. CIRCUIT DESCRIPTIONSThe operational amplifier is a fundamental circuit

commonly used in mixed-signal IC. The specifications Fig. 1 shows the block diagram of the proposedof operational amplifier limit the performance of a operational amplifier. It contains a rail-to-rail andsub-system. For low-voltage video application, the constant gm input stage, a current summation circuitrail-to-rail input and output operational amplifier is with gain boost, an input insensitive class AB outputused to maintain the dynamic range and obtain an stage with source degeneration, compensation schemesacceptable signal-to-noise ratio [1]. Besides, the speed and a slew rate boost circuit. Fig. 2 shows the completeand the accuracy are two of the most important circuits of the proposed amplifier.properties of the analog circuits. The settling behavior Rate

I lS~~~~~~~oosltCircuiltlof an op amp determines the bandwidth and resolutionin an analog-to-digital converter and a sample and hold Vin+ Rail-to-Rail Current Summation Vcm Insensitivecircuitry. Fast settling requires high unity-gain Input Stage with with Class AB Output Vout

i=I_C;onstant g,,C;ircuiIt _Gain BDoost Circuit Stagebandwidth and accurate settling requires high dc gain _[1], [2]. .omp.s.t1 o

To allow maximum signal amplitudes, the inputcommon mode range (ICMR) and output swing should Fig. 1. Block diagram of the proposed amplifier.range from its power supply to ground level. Manyschemes for achieving rail-to-rail ICMR and constant As illustrated in Fig.2., when the input dc leveltransconductance were introduced, such as parallel Vin is 0 < Vin <Vtn, only the PMOS input pairs, PI,n-channel and p-channel differential pairs, level shift P2, P3 and P4, are turned on. The total trans-dual p-channel input pairs and multiple-input floating conductance (GM) is described as following equation,gate transistors [1], [3]-[7]. A class-AB output stagewas applied to drive the output load and obtain GM=gmp] +gmp3 (1)rail-to-rail output signal swing [4], [7]. It has adrawback that the output voltage is strongly dependent When the input dc iS VDD - Vtp <Vin. VDD,on its input dc level [8], [9].

There is an intrinsic trade-off problem between only the NMOS input pairs, NI, N2, N3 and N4, aregain and bandwidth of an op amp. Designing an op amp turned on. The total trans-conductance (GM) iswith high gain and high bandwidth requires described as following equation,combination of multiple schemes. A high gain op ampis usually combined by multistage amps with GM=gmn1 +gmn3 (2)long-channel devices biased at low current. A highbandwidth op amp is implemented by single stage amp When the input dc is Vtn . Vin . VDD - Vtp,with short-channel devices biased at high current [2].An output stage is necessary to drive a large capacitive both the PMOS and NMOS input pairs are turned on.load and/or a small resistive load. A multiage stage amp In this region, the current IBP in P5 and P6 supplies thesuffers from the stability resulting from the presence of tail current of the pair N3-N4. The differential pair

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N3-N4 is switched off. On the other side, the current bias technique to prevent the cascode device operatingIBN in N5 and N6 sinks the tail current of the pair in triode region. The boosted amplifiers are used toP3-P4. The differential pair P3-P4 is switched off. achieve 100-dB dc gain.Hence, only four devices, PI, P2, N iand N2 are turned The bandwidth (c) of boost amp must be largeron.The total gm is as following, than the -3dB frequency (w1,) of the original op. It can

be smaller than the second pole frequency (ar2) of theGMsouempImnI (3) original op. The following equation satisfied the

stability of the op [2].If gmn5-gN6 then GM is equal to 2gm at all

input dc level. The bulk terminals of P1-P4 and N1-N4 wI <0 <(02 (4)are connected to VDD and GND, respectively. The bulkterminals of P5, P6, N5 and N6 are connected to their After Gainsource terminals (VSB=O). The device threshold iol Boost

voltages of the control differential pairs P5-P6 andN5-N6 are smaller than the other input pairs Pt-P4 and FinalNI-N4. The control pair can be switched on earlier sthan the other input pairs. Therefore, the deviation ofclass-Astutputhe total transconductance (GM) can be reduced. Fig. 3oBtputshows the simulation of GM versus Vlcm. Comparing 20

VSB for P5-P6 and N5-N6, the case VSB=O obtains 400 d b ieof gm deviation whch is smaller tha that of thecase10 100 lk 10k 100k IM 10M 100Mof g Odeviation whicheisgenerated smallerethansthatiofFrequency (Hz)

VSB#O. Fig. 4. Analysis of gain boosted scheme.

The quiescent current control class-AB output1200 stage provides high output swing and high output1000' current. Fig. 5(a) shows that the dc gain is sensitive to800 Vlcm. This work improves the drawback by inserting a

0 4 that the output stage provide a constant response at full20 range of input common mode voltage. Accordingly, the

0 ~~~~~~~~~~~outputstage is insensitive to VICM.0,0 O2 O* 13*O.41*0 12 1* 1*1 1,8With anadditional output stage, the phase margin

vl ~~~~~~isdecreased. The op amp requires compensations toFig. 3. P5-P6 and N5-N6 on VSB=0 and VSB#O. increase the stability. The pole and zero cancellation

and active compensation are provided to achieveFig. 4 plots the analysis of frequency response of 45° phase margin. Inserting a zero, the phase margin

gain boosted scheme. The gain stage uses the floating can be calculated as following equations,

908

P.M. = t1800- tan' r GB n tanGB pG + tan ' + tan '(G-.B After the insertion of the compensation circuits,pi1%) y P2) K p3) Kiz1) Z2) the slew rate is degraded by the compensationZ1 = 1 n Z2 = 1 _P1I= , capacitors. The slew rate is defined as,

RC X CC Rcb XCcb Rvox (Cc + Cvo)

P2 = 1 gp3= and G.B.=100MHz. (5) SR+ ICharge (10)Rvoutx CL Ccb CTotal

where CTotal is total capacitance at the output node

900-tan-l(-) - tan-l(-) + tan-' GB. + tan-'(-) > 450 (6)P2 P3 ZcZ2

; VoutFor a target G.B.=100-MHz, Z2=P3 is designed, Jj

1 ~~9mp'VP RL LRcb=- (7) gmagmx

Zi. P2 P2 (8) Fig. 7. Small signal model of the active compensation.P2 P21- 1-G.B. looM For a fixed charging current, the slew rate is

inverse proportional to the total capacitance. The slewAs illustrated in Fig. 6, the slope of the curve rate boost circuit uses a differential amplifier to sense

without active compensation approaches 60-dB/dec the difference between VIN+ and VIN- When VIN+identifying three poles which decays the phase margin. exceeds VIN, the currents of Mp1 and MPB play aTo compensate the phase margin without affecting the current mirror providing lboost to enhance the positiveoriginal frequency response, Mn, Ma and Mp perform slewing. When VIN+ is smaller than VIN, lboost providesthe active compensation circuit to cancel the non- no output current. The simulation is shown in Fig. 8.dominant poles [10]. The op amp has specifications to provide 0.8mA source

Fig. 7 depicts the small signal model of the active current and 6mA sink current for VOH=1.62V andcompensation. The transfer function is following, VOL=O lmV, respectively. The 6mA sink current

results in poor positive slewing. Only the positive1 slewing requires to be enhanced, the boost current is

Va gmna turned off as VIN larger than VIN+ to reduce extraga(9) power dissipation.Vout 1 1 The cascade current source of the slew rate boost

gma SCa circuit is provided to maintain high output impedancefor driving a low output resistance and avoiding the

A LHP zero induced by gma and Ca cancels the effects on the output stage. Moreover, the boost circuitnon-dominant high-frequency pole beyond 1 OONMz. also provides current to keep VOH at high level.

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(a) (b) 0.1 0.2 0.3 0.4 0.5 0 6 0.7Fig. 5. Output stage versus VICM, (a) without Rs, (b) Time (us)with Rs. Fig. 8. Transient analysis of slew rate boost circuit.

III. SIMULATION AND COMPARISONS1i n - Without

so L \ X compensation Table I compares the rail-to-rail op-amps [1]-[9].e /\ \ / ~~~~~~~~Tomake a quantitative evaluation of the op amps, the60WE- ith Rtc i! C6\ following two figures of merits (FOM) are applied,._ Comnpensaltionl

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Fig. 6. Bodes plot of the compensated schemes. Power

909

TABLE I Comparisons of the rail-to-rail amplifiers['l [2] [3] [4] [5] [6] [7] [8] [9] This work

Published year 03' 90,' 01 05' 97' 97' 94' 02' 90' 05'Process (um) 0.8 1.6 0.8 0.5 2 0.5 1 0.6 2 0.18

VDD m 3 5 1.15 4 5 3.3 3 ±5 ±5 1.8Output swing m 2.86 4.2 1.2 4.1 2.5 2.7 ±5 7 1.8

ICMRm 3 1.2 2.85 5 3.3 2.1 ±5 7.7 1.8DC gain (dB) 95.1 90 60 89 66 77 85 100 66 100

Bandwidth (MHz) 17.5 116 5 1.2 12 40 2.6 250 11.8 100Phase margin (°) 60 64 70 74 66 55 47gr deviation (%) 9 5 0.7 3.3 10 7.5 5 4%CMRR (dB) 70 47 80 105 70 68 147PSRR+ (dB) 54.4 40 1-00 114PSRR- (dB) 52.3 -- -- -- -77 101

Noise (nVFVRz) 66.3@0.O13W- - - - 22 54@0.O1BW28.2O0.1BW 10k 24O.ABW

Slew rate+(Vus) 16.26 7 5 12 2 360 35 22.5SIew rate- V/us) 16.28- - - 12 4 26 46Settling time (ns) 275 114.5

T.H.D. (%) 0.09 - 0.18 -- 0.1 0.04Output current (mi) 1.6 10.4 0.8 0.2 2 2.7 3 5 1.25 1.97Power (mW 4.8 52 0.92 0.8 10 8.91 9 50 12.5 3.55

CL (pF) 30 16 50 30 35 R 10 R 30 15FOMs(MHz-pFIFW 109 36 63 45 42 2.9 28 423FOML,VA1is-pFAmVW 102 380 187 42 2.2 62 95.2VJH (lSOURc=8m ___ _ _A) 1 .62VVOL (ISINK=6mA) . .. .lmV

The proposed op amp provides both high gain Transistors," IEEE Trans. Circuits Syst. II, vol. 48, pp.and high bandwidth. Considering the FOM on gain 111-116, Jan. 2001.bandwidth and load product, this work has the best [4] Timothy Wayne Fischer, Aydm Ilker Karsilayan andFOM. This work has a specification to provide 6mA Edgar Sanchez-Sinencio, "A Rail-to-Rail Amplifier Inputoutput sinking current, leading to difficulty of output Stage With +0.35% gm Fluctuation," IEEE Trans. Circuitsoutput sinking current, leadMg to difficulty Of output Syst. I, vol. 52, pp. 271-282, Feb. 2005.stage design and lower FOM on the slew rate. With the [5] Laszlo Moldovan and Hua Harry Li, "A Rail-to-Rail,output stage and slew rate boost circuit, the total Constant Gain, Buffered Op-Amp for Real Time Videoharmonic distortion (T.H.D.) of this work still Applications," IEEE J. Solid-State Circuits, vol. 32, pp.maintains very good linearity. 169-176, Feb. 1997.

[6] William Redman-White, "A High Bandwidth ConstantIV. CONSLUSION gm and Slew Rate Rail-to-Rail CMOS Input Circuit and its

Application to Analog Cells for Low Voltage VLSI

A high-gain high-bandwidth op amp with slew System," IEEE J. Solid-State Circuits, vol. 32, pp.701-712,rate boost circuit is presented. It provides 4% gm May 1997.

deviation. The output stage is insensitive to input [7] Ron Hogervorst, John P. Tero, Ruud G. H. Eschauzierdeviation. The output stage iS insensitive to input and Johan H. Huijsing, "A Compact Power-Efficient 3Vcommon-mode range. A slew rate boost circuit can CMOS Rail-to-Rail Input/Output Operational Amplifierimprove the output slewing. The op amp performs for VLSI Cell Libraries," IEEE J. Solid-State Circuits, vol.100-dB dc gain, 100-MHz bandwidth and 22.5-V/us 29, pp. 1505-1513, Dec. 1994.slew rate at 15-pF output load. Comparing with the [8] Vadim Ivanov and Shilong Zhang, "250 MHz CMOSother rail-to-rail op amps, it has the best figures of rail-to-Rail IO OpAmp: Structural Design Approach,"merits on gain bandwidth and load product. It can be European Solid-State Circuits Conference, pp. 183-186,applied to high resolution high bandwidth analog- 2002.a ito- hightresolution high bandwidth analo-. [9] Staoshi Sakurai, Seyed R. Zarabadi and Mohammedto-digital converter and video applications. Ismail, "Folded-Cascode CMOS Operational Amplifier

with Slew Rate Enhancement Circuit," in IEEE Proc.REFERENCES Circuits and Systems, vol. 4, pp.3205-3208, May 1990.

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Duque-Carrillo and Guido Torelli, "Constant-gm Multistage Amplifiers," IEEE J. Solid-State Circuits, vol.Constant-Slew-Rate High-Bandwidth Low-Voltage 38, pp. 511-520, Mar. 2003.Rail-to-Raol CMOS Input Stage for VLSI Cell Libraries,"IEEE J. Solid-State Circuits, vol. 38, pp.1364-1372, Aug.2003.

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