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CMOS RF Circuits for 5-GHz BWA Hsiao-Chin Chen, Tao Wang, Yu-Che Yang, Yu-Hsuan Liu and Shey-Shi Lu Graduate Institute of Electronics Engineering, National Taiwan University No. 1, Sec. 4, Roosevelt Road, Taipei, 10617 Taiwan Abstract—CMOS RF circuits suitable for broadband wireless access (BWA) applications including IEEE 802.11a and IEEE 802.16e are introduced. The critical requirements of receivers, transmitters and frequency synthesizers are discussed. The performances of several implemented 5-GHz CMOS RF building blocks are reported. The receiver front-end exhibits 7.2-dB noise figures, -21.2-dBm P1B and 25.2-dB gain. From 4.9 to 5.9 GHz, the S11 is below -10 dB. The transmitter front-end can provide digital power control with dynamic range more than 30 dB and the measured output return loss is below -10 dB from 4.9 to 5.1 GHz. The frequency synthesizer can achieve a resolution less than 1 Hz and settling time shorter than 10 us. The synthesized carrier signal exhibits an integrated phase noise of only 0.44 degree rms. These results show that the presented RF circuits are very promising in the realization of transceivers for modern wireless broadband access standards. I. INTRODUCTION Wireless broadband access gradually becomes one of the most popular businesses in recent years by bringing great facility into our daily life. Based on the IEEE 802.11 standards for wireless broadband access, numberless WLAN (wireless local area network) hot spots are built to replace the last one hundred feet of networking. As a revolution in wireless broadband access, IEEE 802.16 standard is intended for providing high bandwidth wireless voice and data for residential and enterprise use. IEEE 802.16, called worldwide interoperability microwave access (WiMAX), not only reaches further range than WLAN but also supports adaptive modulation to exploit highest available data rate based on link quality [1]. In brief, WiMAX shows great promise as the last mile solution for bringing high-speed internet access into homes and businesses. Its new extension IEEE 802.16e, the mobile WiMAX, further combines the advantages of high-data-rate WLAN and high -mobility cellular systems, which makes it even more attractive [2]. It is predicted that the sale of WiMAX equipment will have a compound annual growth rate at 130% from 2005 to 2009. System-on-chip is the industry trend due to its many benefits such as reduction in cost and size as well as better performance under lower power consumption. The CMOS process now dominates the market of digital-ICs fabrication. As the minimum gate length of MOS devices keeps shrinking, the improved cut-off frequency enables the circuit design at high frequency. When RF circuits can be successfully fabricated in standard CMOS processes, the dream of a single-chip wireless communication system would finally come true. In this paper, CMOS RF circuits suitable for broadband wireless access applications including IEEE 802.11a and IEEE 802.16e are presented. The RF building blocks of receivers and transmitters would be introduced in Sec. II and III respectively. Meanwhile, the performances of these circuits along with their requirements would be discussed in a system perspective. Then, the discussion would be focused on the frequency synthesizers in Sec. IV followed by a brief summary in Sec. V. II. RECEIVER FRONT-END Fig.1 shows the block diagram of the proposed direct conversion receiver consisting of an RF front-end, a frequency synthesizer and analog base band circuits (ABBs). The front-end is mainly formed by a low-noise-amplifier (LNA) [3], a quadrature coupler and I/Q subharmonic mixers (SHMs) [4]. Since simple 90 o phase splitting of the subharmonic LO signal is incapable to generate I/Q receiver output, we adopt the RF path quadrature generation technique using an on-chip quadrature coupler to get rid of the complex octet-phase generation circuit. Following the single-ended LNA, the quadrature coupler splits the RF input signal into two signals in quadrature. The single-ended quadrature signals are then converted into the differential signals by the input transformers of the two SHMs. The SHMs would be pumped by subharmonic LO signal and then down-convert the RF signals to base band. Passing the analog base band circuits, the in-band component in the signals would be amplified while the out-of-band interferer would be rejected. Fig.1 The block diagram of receiver The proposed receiver front-end was fabricated in a standard 0.18-um CMOS technology. As in many other CMOS processes, components like QC and transformers would not 70 1-4244-0957-8/07/$25.00 ©2007 IEEE.

[IEEE 2007 IEEE Mobile WiMAX Symposium - Orlando, FL, USA (2007.03.25-2007.03.29)] 2007 IEEE Mobile WiMAX Symposium - CMOS RF circuits for 5-GHz BWA

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Page 1: [IEEE 2007 IEEE Mobile WiMAX Symposium - Orlando, FL, USA (2007.03.25-2007.03.29)] 2007 IEEE Mobile WiMAX Symposium - CMOS RF circuits for 5-GHz BWA

CMOS RF Circuits for 5-GHz BWA

Hsiao-Chin Chen, Tao Wang, Yu-Che Yang, Yu-Hsuan Liu and Shey-Shi Lu Graduate Institute of Electronics Engineering, National Taiwan University

No. 1, Sec. 4, Roosevelt Road, Taipei, 10617 Taiwan Abstract—CMOS RF circuits suitable for broadband wireless access (BWA) applications including IEEE 802.11a and IEEE 802.16e are introduced. The critical requirements of receivers, transmitters and frequency synthesizers are discussed. The performances of several implemented 5-GHz CMOS RF building blocks are reported. The receiver front-end exhibits 7.2-dB noise figures, -21.2-dBm P1B and 25.2-dB gain. From 4.9 to 5.9 GHz, the S11 is below -10 dB. The transmitter front-end can provide digital power control with dynamic range more than 30 dB and the measured output return loss is below -10 dB from 4.9 to 5.1 GHz. The frequency synthesizer can achieve a resolution less than 1 Hz and settling time shorter than 10 us. The synthesized carrier signal exhibits an integrated phase noise of only 0.44 degree rms. These results show that the presented RF circuits are very promising in the realization of transceivers for modern wireless broadband access standards.

I. INTRODUCTION

Wireless broadband access gradually becomes one of the most popular businesses in recent years by bringing great facility into our daily life. Based on the IEEE 802.11 standards for wireless broadband access, numberless WLAN (wireless local area network) hot spots are built to replace the last one hundred feet of networking. As a revolution in wireless broadband access, IEEE 802.16 standard is intended for providing high bandwidth wireless voice and data for residential and enterprise use. IEEE 802.16, called worldwide interoperability microwave access (WiMAX), not only reaches further range than WLAN but also supports adaptive modulation to exploit highest available data rate based on link quality [1]. In brief, WiMAX shows great promise as the last mile solution for bringing high-speed internet access into homes and businesses. Its new extension IEEE 802.16e, the mobile WiMAX, further combines the advantages of high-data-rate WLAN and high -mobility cellular systems, which makes it even more attractive [2]. It is predicted that the sale of WiMAX equipment will have a compound annual growth rate at 130% from 2005 to 2009. System-on-chip is the industry trend due to its many benefits such as reduction in cost and size as well as better performance under lower power consumption. The CMOS process now dominates the market of digital-ICs fabrication. As the minimum gate length of MOS devices keeps shrinking, the improved cut-off frequency enables the circuit design at high frequency. When RF circuits can be successfully fabricated in standard CMOS processes, the dream of a single-chip wireless communication system would finally come true.

In this paper, CMOS RF circuits suitable for broadband wireless access applications including IEEE 802.11a and IEEE 802.16e are presented. The RF building blocks of receivers and transmitters would be introduced in Sec. II and III respectively. Meanwhile, the performances of these circuits along with their requirements would be discussed in a system perspective. Then, the discussion would be focused on the frequency synthesizers in Sec. IV followed by a brief summary in Sec. V.

II. RECEIVER FRONT-END

Fig.1 shows the block diagram of the proposed direct conversion receiver consisting of an RF front-end, a frequency synthesizer and analog base band circuits (ABBs). The front-end is mainly formed by a low-noise-amplifier (LNA) [3], a quadrature coupler and I/Q subharmonic mixers (SHMs) [4]. Since simple 90o phase splitting of the subharmonic LO signal is incapable to generate I/Q receiver output, we adopt the RF path quadrature generation technique using an on-chip quadrature coupler to get rid of the complex octet-phase generation circuit. Following the single-ended LNA, the quadrature coupler splits the RF input signal into two signals in quadrature. The single-ended quadrature signals are then converted into the differential signals by the input transformers of the two SHMs. The SHMs would be pumped by subharmonic LO signal and then down-convert the RF signals to base band. Passing the analog base band circuits, the in-band component in the signals would be amplified while the out-of-band interferer would be rejected.

Fig.1 The block diagram of receiver

The proposed receiver front-end was fabricated in a standard 0.18-um CMOS technology. As in many other CMOS processes, components like QC and transformers would not

701-4244-0957-8/07/$25.00 ©2007 IEEE.

Page 2: [IEEE 2007 IEEE Mobile WiMAX Symposium - Orlando, FL, USA (2007.03.25-2007.03.29)] 2007 IEEE Mobile WiMAX Symposium - CMOS RF circuits for 5-GHz BWA

be provided. Therefore, the on-chip QC and transformers were in-house designed by using 2.5-D EM simulator ADS momentum given with the process parameters. The die photo of this chip is shown in Fig.2. The occupied die area is 2.98 × 2.03 mm2. The total power consumption of this receiver front-end is 45.5 mW.

Fig. 2 The die photo of receiver front-end

A. Spectrum Utilization While licensed bands are claimed to be more robust and reliable, IEEE 802.11a/b/g-based Wi-Fi residing at unlicensed bands has successfully demonstrated the viability of BWA in spite of competing technologies within these bands. These unlicensed bands, freely available for any experimental or commercial purposes, save both time and money for practical deployment. The unlicensed national information infrastructure (U-NII) bands have three major frequency bands: low and middle U-NII band from 5.15 to 5.35 GHz, world radio conference (WRC) from 5.47 to 5.725 GHz and upper U-NII/ ISM band from 5.725 to 5.85 GHz. Most WiMAX activities are now in the upper U-NII band where a remarkable WiMAX growth should be expectable. In Japan the 4.9-5.0 GHz band will be used for WiMAX after 2007, even though a license would be required for BS deployment. Meanwhile, the free 5.47-5.725 GHz band is also considered for future use [5]. The 5-GHz band seems to be the most dominant frequency band in WiMAX technology. Moreover, using the 5-GHz band provides the possibility for the convergence of WiMAX and WLAN, which would offer mobile users a more flexible broadband access as they roam between WiMAX and WLAN standards [6]. The input return loss of a receiver should be low enough to achieve successful power transfer from the antenna. Normally, the required S11 of a receiver should be below -10 dB for the entire band of interest. Most of the time, this value would be dominated by the input impedance matching of the LNA due to its fair reverse isolation (~30 dB). The S11 measurement of the receiver RF front-end was on-chip performed. It was found the measured S11 was below -12.9 dB from 4.9 to 5.9 GHz. In terms of input return loss, the realized receiver front-end meets the requirement for WLAN 802.11a as well as WiMAX in the future profile.

B. Sensitivity The noise figure requirement for WiMAX is not directly specified, but may be estimated from the fact that receivers must achieve -80-dBm sensitivity over a channel bandwidth of 20 MHz while adopting OFDM and QPSK. Assuming the receiver SNR must exceed 6 dB to attend BER below 10-6, with 5 dB implement margin, the overall receiver noise figure must be better than 10.0 dB. If OFDMA is adopted, the estimated noise figure requirement can be relaxed by 1 dB (NF < 11 dB) [2]. Both the noise figure and the gain of the implemented receiver front-end were measured. The receiver front-end exhibited a spot NF of 7.2 dB at 20 MHz base band. Measurement results show that the front-end achieves a gain larger than 25.0 dB which is high enough to suppress the noise contribution of the following analog base band circuits (ABBs). An overall receiver NF of 9.3 dB can be achieved by the proposed receiver front-end followed by ABBs with NF below 30 dB which is usually attainable. C. Linearity The maximum signal handled by the receivers is -30 dBm for both WLAN 802.11a and WiMAX standards [2]. In terms of circuit performances, the receivers should meet certain linearity requirement so that a maximum signal of -30 dBm can be decoded. Normally, the input-1dB-compression point (P1dB) of a receiver should be at least 4 dB above the receiver maximum input signal in order to meet the linearity requirement and therefore the required P1dB would be -26 dBm in this case. As a rule of thumb, the input third-order intercept point (IIP3) is generally larger than P1dB by 9 ~ 10 dB. Accordingly, the required IIP3 for receivers would be around -16 dBm. The gain-compression of the receiver front-end under different input signal levels was measured where the P1dB of -21.2 dBm was obtained. Apparently, this P1dB is large enough for a WLAN/WiMAX receiver to deal with the maximum input power. The receiver linearity was further estimated by a system simulator given with the performances of the proposed front-end in terms of IIP3. It was found the receiver could achieve an IIP3 of -15.9 dBm while adopting the proposed front-end followed by an analog base-band with 12-dBm IIP3 which is normally achievable.

III. TRANSMITTER FRONT-END

The block diagram of a transmitter front-end comprising I/Q modulators and a variable gain amplifier (VGA) is shown in Fig. 3 [7]. The four-path quadrature base band signals are first up-converted to RF by the modulators. Then the modulated signal would be amplified by the two-stage VGA where the power gain is designed with linear-in-dB characteristic which is achieved by manipulating four digital bits. An on-chip balun is used to achieve differential-to-single-conversion and also part of the output impedance matching network. In particular, its turn ratio (3:1) would scale down the output impedance of VGA which can greatly simplify the required output matching network.

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Fig. 3 The block diagram of transmitter front-end

The proposed transmitter front-end is fabricated in 0.18-um CMOS technology, and the die photo is shown in the Fig. 4. The total die area is 2.4 × 1.1 mm2. The realized circuit draws 53.3 mA from a 2.8-V supply.

Fig. 4 The die photo of transmitter front-end

A. Transmit Spectral Mask The transmission mask test was performed on the transmitter given with QPSK modulated base band signals. The output modulated spectrum of the transmitter front-end along with the WLAN mask and WiMAX mask is shown in Fig. 5. The transmitted spectral density of the transmitted signal shall fall within the specified mask. The output spectrum can meet the WLAN requirement but fail the WiMAX mask test. However, by incorporating a base band low-pass filter, the unwanted spurs at output which lead to the failure of the WiMAX mask test could be effectively suppressed.

Fig. 5 The measured output spectrum of transmitter front-end.

B. Frequency Band The power gain, input and output return loss of VGA were measured versus frequency as shown in Fig. 6. The output return loss is below -10 dB from 4.9 to 5.1 GHz while the maximum gain of 14.5 dB occurs at 4.9 GHz. The frequency response shows the realized VGA is suitable for the future profile of WiMAX in Japan.

Fig. 6 The measured frequency response of VGA.

C. Power Control Because WiMAX system can be used for non-line-of-sight applications, gain control of the transmitter is necessary to adjust the output power level depending on the channel quality. The required range of gain control for subscriber station (SS) transmitters is 50 dB and the minimum gain step should be no more than 1 dB. The relative accuracy of the power control mechanism should be ± 1.5 for step sizes not exceeding 15 dB, ± 3 for step sizes from 15 dB to 30 dB and ± 5 for step sizes greater than 30 dB. The simulation results of VGA gain are shown in Fig. 7, where the gain control is linear-in-dB.

Fig. 7 The simulated VGA gain versus control words.

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The minimum gain step is ~ 2 dB so the number of control bits should be increased to 5 or 6 in order to achieve a minimum step of 1 dB. The gain-control range is more than 33 dB and the gain accuracy is within ± 0.8 dB for step sizes below 30 dB. Normally the following power amplifier could offer a power control range from 20 dB to 25 dB. Therefore we know the range of power control and the relative gain accuracy of the proposed transmitter front-end meet the power control requirement for WiMAX standard.

IV. FREQUENCY SYNTHESIZER

The frequency synthesizer provides the local oscillator (LO) signal for mixers to down-convert the RF to base band. For adopting OFDM, WiMAX imposes stringent requirement on frequency synthesizers in terms of frequency resolution and phase noise due to the large number of sub-carriers. The step size of the channel is 125 kHz in the 3.5 GHz band and the sub-carrier spacing can be as low as 7.81 kHz for special cases. The root-mean-square (rms) phase noise integrated from twentieth of the tone spacing to half the channel bandwidth should be less than 1°. In addition, assuming half frequency division duplex architecture is used, the carrier frequency has to settle within 100 us while the operation mode is switched from transmit to receive, which sets the upper limit for the locking time of the frequency synthesizer. Fractional-N frequency synthesizer architecture was utilized to generate the 2.45-3.1 GHz LO signal to drive the 5-GHz SHMs mentioned in Sec. II. The block diagram of the frequency synthesizer is shown in Fig. 8. The frequency synthesizer comprises a voltage-controlled oscillator (VCO), a frequency divider, a phase/frequency detector, a charge pump, a MASH3 ∆Σ modulator and various buffers [8].

Fig. 8 The block diagram of the frequency synthesizer.

The fractional-N frequency synthesizer was also fabricated in 0.18um CMOS technology. The die photo is shown in Fig. 9. The die area is 1.23 × 0.83 mm2. The frequency synthesizer meets all the previously mentioned requirements at a power consumption of 47.8 mW. A resolution less than 1 Hz and a lock time shorter than 10 us are achieved. Integrated from 100 Hz to 10 MHz, a total phase noise of 0.44° is demonstrated.

Fig. 9 The die photo of the frequency synthesizer.

V. SUMMARY

In this paper we present CMOS RF circuits which can be used in modern broadband wireless access applications. In addition to the circuit performances, the critical requirements of receivers, transmitters and frequency synthesizers are discussed. The results show that RF transceivers for WiMAX or even a monolithic WiMAX platform can be successfully implemented in standard CMOS technologies.

ACKNOWLEDGMENT

Financial supports from national science council under contract no. NSC 95-2218-E-002-042/95-2221-E-002-364 and the Ministry of Economic Affairs of the R.O.C. under contract no. 94-EC-17-A-05-S1-0017, chip fabrication from UMC under campus program and technical help from CIC and NDL are appreciated.

REFERENCES [1] Air Interface for Fixed Broadband Wireless Access Systems, IEEE Std

802.16- 2004. [2] Air Interface for Fixed Broadband Wireless Access Systems, IEEE Std

802.16e-2005. [3] T. Wang, H.-C. Chen, H.-W. Chiu, Y.-S. Lin, G.-W. Huang and S.-S. Lu,

“Micromachined CMOS LNA and VCO by CMOS-Compatible ICP Deep Trench Technology,” IEEE Trans. on Microwave Theory and Techniques, Vol. 54, No. 2, pp. 580-588, Feb., 2006.

[4] H.-C. Chen, T. Wang, G.-W. Huang and S.-S. Lu, “A Monolithic 5.9 GHz CMOS I/Q Direct-Down Converter Utilizing a Quadrature Coupler and Transformer-coupled Subharmonic mixers”, IEEE Microwave and Wireless Components Letters, Vol. 16, No. 4, pp. 197-199, April, 2006

[5] RF Spectrum Utilization in WiMAX, Fujitsu Microelectronics America, white paper.

[6] Y. Zhou, C. P. Yoong, L. S. Weng, Y. J. Khoi, M. C. Y. Wah, K. A. C. Moy and D. W. T. Fatt, “A 5 GHz Dual-Mode WiMAX/WLAN Direct-Conversion Receiver”, ISCAS, 2006.

[7] Y.-H. Liu; H.-C. Chen; T. Wang and S.-S. Lu, “A CMOS transmitter front-end with digital power control for WiMAX 802.16e applications”, APMC 2005.

[8] Y.-C. Yang, S.-A. Yu, Y.-H. Liu, T. Wang and S.-S. Lu, “A Quantization Noise Suppression Technique for DeltaSigma Fractional- N Frequency Synthesizers”, IEEE J. of solid-state circuits, pp. 2500-2511, Nov. 2006.

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