Design and Development of Coherent Data Logging System for Offline SAR Processor

Fakhar Ahsan, Mubashar Yasin, Fatima Ameeb and Umair Razzaq (fakahr59@hotmail.com, mubasharpk09@gmail.com, fatimaarneeb@gmail.com, umair.razzaq@gmail.com)

Centre of Excellence in Science and Applied Technology, Islamabad.

Abstract - Synthetic Aperture Radar (SAR) is an imaging

system which can produce very high-resolution images from

data collected by a relatively small antenna mounted onto a moving, airborne or spaceborne platform!l]. SAR images are formed from the reflection of coherent signals. Therefore, a SAR system requires a high end data collection system which preserves coherent Doppler phase information

in order to reconstruct image properly. In this paper a coherent data logging system is presented that acquires and

stores the radar echoes as it moves along its path, preserving the signal characteristics and phase changes. Both the In-phase (/) and Quadrature (Q) signals are acquired through distinct channels. The speed of the platform is also recorded at known interval as speed information is significant for SAR signal processing.

I. INTRODUCTION

Radar has proved to be beneficial, because of its day­and-night capability, possibility to penetrate clouds and rain, moving target identification and camouflage target detection. However optical instruments were advantageous over conventional radars in the interpretation of depicted objects because the great wavelength of radar signals limits the achievable resolution in cross range direction of real aperture radar systems. Thus, imaging cannot be realized using static radar systems. We need Synthetic Aperture Radar (SAR) for proper imaging of a scene.

Today, SAR plays an important role not only in military ground surveillance but also in earth and atmospheric explorations. During last 25-30 years, many SAR systems have been developed for both space and airborne operation. The radar offers many advantages over infrared or visible spectral sensors. The idea of SAR was to transmit pulses and store the scene echoes along a synthetic aperture (i.e. the path of motion of SAR sensor) and to combine the echoes afterwards and generate high­resolution images by applying an appropriate focusing algorithm.

The SAR is a coherent system, which requires it to retain the amplitude and phase infonnation of the received signals at each position as the radar moves. Due to the radar platfonn motion the Doppler shift is induced. This Doppler plays a vital role in reconstructing the scene image in cross-range direction. SAR requires a high end data collection system which preserves coherent Doppler phase information. If coherence is lost, it will disturb the processing and image cannot be produced properly.

This paper presents a scheme for the coherent signal acquisition for FMCW-SAR. The proposed scheme is capable of storing the SAR signal along with important system parameters. As the speed information is

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significant for SAR signal processing, the data acquisition system is interfaced with a GPS module to get the accurate measure of speed. The prescribed system also controls PRF and DDS based chirp generation scheme over SPI interface. This ensures that whole system including Transmitter and Receiver get a coherent PRF. In this paper a specially fonnulated data storage structure is also presented that holds the major system parameters for each experiment, followed by radar's received data with interleaved speed information.

The complete system has been implemented on XtremeDSP Kit that has a virtex-4 FPGA. Two high speed ADC channels are available onboard, GPS module and DDS are interfaced through FPGA's GPIOs.

II. SAR IMAGING

The SAR illumination is said to be spatially coherent if the illuminating signal measured at each point has a constant phase relationship to the signal measured at any other point. In this case, the individual reflections from points on the terrain can add both constructively and destructively, causing an effect known as speckle [2]. Spatially incoherent light, normally used in photography, is a superposition of many independently generated waves which have a randomly varying phase. Reflections from incoherently illuminated points add in intensity (mean squared magnitude) and, therefore, cannot interfere destructively [3].

Another difference between SAR and photographic images is that objects that are rough on the scale of optical wavelengths may appear smooth at microwave lengths. As a result, such objects may act as microwave mirror, producing little or no reflection in the direction of the radar, and showing up in the SAR image as black spots. Such is the case, for example, with an airport runway surrounded by vegetation. Another difference between radar and optical images is that radar works on a ranging principle, whereas an optical image is a projection of a scene onto a plane. Thus, in the case of radar, terrain points falling within the antenna beam, and equidistant in range from the radar but at differing elevations, will be mapped to the same point in the radar image [3].

III. SAR DATA ACQUISITION CHAIN

The SAR data acquisition system consists of three modules, (i) Signal Acquisition, (ii) Platform Speed logging, (iii) DDS controller. Signal Acquisition module is designed so that it does not lose its coherence with the RF chain which is driven by the DDS. Speed logging is additional feature in this scheme as SAR processor

Proceedings of 2012 9th International Bhurban Conference on Applied Sciences & Technology (IBCAST) 340 Islamabad, Pakistan, 9th - 12th January, 2012

continuously needs the speed update for correct operation.

The clock manager module is responsible to provide appropriate clock to each component of the system. The clocking of complete system has a vital role in the coherence of the system. It is essential that the RF

equipment, DDS, ADCs and digital hardware get clocks from the single source. In our prescribed system, the PLL is used to generate main source of the clock for the whole system. The clock for the ADCs and digital hardware is derived from the clock which is used to derive the DDS. The same clock is used in RF up/down conversion hardware. Fig. 1 shows a block diagram of clocking mechanism.

An external DDS board will generate the chirp for FMCW-SAR. The DDS controller embedded in FPGA will make it sure that chirp generation is coherent with the acquisition hardware, by using the same PRF and other control signal. At the system startup, the DDS needs to be initialized, so that it can generate the desired chirp signal. The DDS configuration parameters will be fetched from software API running on Pc.

Form signal acquisition point of view, it is noted that from RF chain, we shall get baseband SAR signals band­limited to a few MHz, but just to have a good SNR from high-speed ADCs used in our system, we shall oversample the signal well above the nyquist frequency. After that we can decimate the samples by just dropping extra samples. As we already had band-limited signal no extra filtration is required after sample dropping.

IV. ARCHITECTURE

Fig. 2 shows the block diagram of complete acquisition system. The baseband In-phase(J) and Quadrature (Q) signals are acquired through two distinct ADC channels. Acquisition system has two separate FIFOs for J and Q samples. Both FIFOs are controlled in coherence with each other. Both FIFOs can store up to 8192 samples (where each samples is of 16 bit).

The System Controller module is responsible of maintaining the coherence between different parts of the system. As this controller gets a coherent clock from external source, so it derives coherent clocks for sampling and data transfer. It also controls the PCI transfers (DMA or address mapped) and read/write operations of FIFOs. This controller sends interrupt to PCI Interface after storing samples of a single PRI.

Master Oscillator

I

1

I ! ... nDigi tal C I OCkn

l J

Manager l PLL

J DDS for

[ [ ADCs

RF section FPGA KF Section

Digitaillardwflrt

Figure 1. Coherent System Clock Mechanism

Figure 2. SAR Data Acquisition Architecture

A GPS device is used to measure the speed of the platform. The GPS device sends the information over RS-232 interface. The speed logging module is basically a GPS decoder, which receives GPS NMEA string over serial interface and extracts the speed information in 'knots' (or alternatively in 'krn/h'). This speed info will be stored in FPGA in a software accessible register of PCI. The update rate of speed will be one second. The software API can read new value after every second.

A software API will be running on PC to interact with the PCI so that the acquired data can be logged in a file on Pc. The software API will support the operations like FPGA configuration, system soft reset, DDS parameter setting, reading samples of single PRI from PCI after interrupt, get speed update at regular intervals, and writing all information along with logged data into a file. A special file structure is devised for this system.

Fig. 3 shows the structure of a file devised for coherent SAR data acquisition system. The structure contains all the necessary information required for the generation of SAR image from acquired data.

SlartofFile Height (16 bit) I e,(8bit) I 8"'l(8bit)

Samp1eNo 0

PRF(16bit) I sal11ple!>IPRI (16bit)

Platform velocily(32 bit)

f(16hit) I Q(l6bit)

f(16hit) I Q(l6bit)

Platform vclocity(32 bit)

f(16hit) I Q(l6bit)

/(16bit) I Q(l6bit)

Platform velocily(32bit)

Platform Velocity Packet: I'-----_---"---'-""_ir�_' '---, Noles Speed is logged after every second therefore aller N no. of samplcs a velocity packet is stored.(i.e for PRF 1Khz, speed word is placed after every 1000 PRJ chunck)

j\'= sample.5I/>RJ • J>/lF (I- F.5)

Figure 3. SAR File Format

Proceedings of 2012 9th International Bhurban Conference on Applied Sciences & Technology (IBCAST) 341 Islamabad, Pakistan, 9th - 12th January, 2012

V. IMPLEMENTATION

The complete system has been implemented on XtremeDSP Kit (shown in Fig.4) that has a virtex-4 FPGA. Two high speed ADC channels are available onboard, GPS module and DDS are interfaced through FPGA's GPIOs. Table 1 lists the resource utilization of the FPGA. It can be seen that enough resources are still available to implement the processing part of SAR system. Fig. 5 shows the picture of DDS board used for the coherent control of Tx. chirp generation.

TABLE I FPGA Resource Utilization

Device xc4vsx35-IOff668

Number of occupied Slices 2084 Number of FIFOl6IRAMBl6s 40 Number of DSP48s 3 Number of 4 input LUTs 2801

Figure 4 Xtreme DSP Kit

---

Sign�1 V1c\\cr UCllil� t:"or �K

..... _ "f' ... --- .. 1."'.-"""-_ ..... . ' .

13% 20% 2% 9%

Figure 6 Spectrogram (Static Test - object moving away from radar)

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• .. • ... .. • • • ......... IIIIIII ... n� ..

Figure 7 Spectrogram (Static Test - object moving towards radar)

IIBgure F-H Edot � lnltl'l Toofl Onltop Wind_ tWlp Doi:!;I5 � - f)� ' O� -[I)

Figure 8. Test Signal Plot

VI. RESULTS

Fig. 8 shows the time-domain plot of a quadrature test signal applied at the input of ADCs. The plot contains the superimposed plot of signals from 100 PRIs returns. It can be seen that we haven't lost our sync and the phase information is preserved throughout the acquisition.

ACKNOWLEDGMENT

The authors would like to express their sincere thanks to all members of the project team. It has been pleasure to work together with them. The paper belongs to them too.

REFERENCES

[I] D. A. Ausherman, A. Kozma, J. L. Walker, H. M. Jones, and E. C .Poggio, "Developments in radar imaging," IEEE Trans.on Aerospace and. Electronics. Systems., vol. AES-20, pp. 363-400, July 1984

[2] J. W. Goodman, "Some fundamental properties of speckle," J. Opr. Soc. Amer., vol. 66, pp. 1145-1150, Nov. 1976.

[3] David C.Munson, Jr. , Robert L. Visentin, "A signal processing view of strip-mapping synthetic aperture radar," IEEE Trans.on Acoustics, Speech and Signal ProceSSing, vol 13, pp 2131-2147, December 1989

Proceedings of 2012 9th International Bhurban Conference on Applied Sciences & Technology (IBCAST) 342 Islamabad, Pakistan, 9th - 12th January, 2012