Single Chip Plated Ni/Pd over ALCAP Bond Pads for Flip Chip Applications and Prototyping

Brian J. Lewis Daniel F. Baldwin, Ph.D.

Paul N. Houston Fei Xie, Ph.D Le Hang La

Engent, Inc. – Enabling Next Generation Technologies Advanced Assembly Technology

Norcross, GA 30071 Abstract

Commonly, during the process development cycle for new products, limitations exist on the materials that are available for the prototype work. Most SMT devices are readily available in different formats and solder alloys to satisfy most of the needs for passive components, however, many times, IC devices are limited to what is available from the fab or IC brokers. These limitations range from die only available with aluminum, wirebond ready I/O metallization, pad layouts in fine pitch perimeter patterns or that the silicon wafers are already sawn and presented as singulated die. For applications where advancement in performance or miniaturization is needed, and the benefits of flip chip technology are attractive, it is not a trivial task to be able to use these die. In these cases, the process of adding solderable plating technologies to the I/O bond pads is very favorable. The technologies are currently run for wafer lever plating baths, but very little has been done to evaluate singulated chip plating. Work in plating Ni/Pd onto the ALCAP structure has been performed to evaluate the process and feasibility of processing groups of singulated die with aluminum bond pads.

The work to be detailed in this paper will go through the chemistries used in the plating process onto an aluminum bond pad that makes it suitable for flip chip processes. Several bumping structures, such as solder bumping over this Ni/Pd plating stack up and plating over gold or copper stud bumps before adding solder bumps, are evaluated. A process for low cost bumping the singulated flip chips is also detailed. The data for shear testing of 10 variations of bumping structures, before and after 500 liquid thermal shock cycles, is detailed. Finally, a comprehensive study for assembly of solder bumped flip chips, with the various selective plating processes, will be detailed as well as a detailed analysis of the TC reliability of this assembly approach. It will be shown that selective Ni/Pd plating onto singulated, ALCAP bare die can allow, for these die that are typically wire bonded, to be used in a practical approach, solder flip chip process. It will also be shown that these processes provide reasonable reliability results when compared to a mainstream, wafer processed, solder bumped flip chip die.

Introduction Reasonable approaches of modifying the interconnect

system of bare die from die attach/wire bond assembly methods into flip chip style interconnects have been around for quite some time. Although the process can be challenging, adding standard gold stud bumps onto existing aluminum based (ALCAP) die bond pads and attaching these stud bumped die to substrates by means of a dipped conductive epoxy is relatively common. This process is used for many applications, across many types of substrate materials; however some factors from adhesion issues, stress factors causing reduced reliability, or environmental limitations due to the corrosive properties of the silver particles in the epoxy, may deter one from using this assembly approach. In these cases, a need for using a solder bumped flip chip is more suitable. But here lies the problem. Most singulated die, previously processed for wirebond assembly, are not set up for a solder attachment process due the lack of a suitable under bump metallization (UBM) that allows the solder to wet onto the aluminum capped die bond pads. This UBM process is normally done during the wafer phase, before dicing, where a deposition process adds this wettable layer onto the wafer bond pads. There are a large variety of propriety UBM techniques, but they all serve the same purpose of providing a means for solder to be added onto each pad. The wafer based process of adding a UBM is typically done by evaporation of a seed/adhesion layer, a barrier layer, and a wettable surface layer. These layers can also be added by chemical plating processes. Once the UBM is present, these bond pads are ready for a solder bump to be added by solder plating deposition or direct solder attachment from printing or ball dropping. Unfortunately, this is not the case in already singulated die. In this case, the UBM is processed on individual die, typically, with a chemical deposition method, similar to how wafers UBMs are processed. Here die are mounted, temporarily, to a carrier or backer that goes though each of the wet steps to deposit the plating. Once complete, the die are removed from the carrier and solder bumping is processed.

In this paper, based on the need to modify a wirebond configured die to a flip chip format, a bumping and attachment method was needed. The product was required to

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go into a highly pressurized, high temperature environment that caused localized corrosion of the silver particles in the conductive epoxy, leading to a leakage path during operation, so gold stud bumping dipped into silver epoxy was ruled out. Other methods, such as thermosonic bonding where evaluated, but since the die were being mounted onto a plated LTCC substrate, adequate yields and reliability could not be achieved. Solder processing of the die was determined to be the most suitable option. Since the die started with an ALCAP bond pad, multiple interfaces for the solder attach was considered. Table 1 details the methods considered.

UBM and plating stack-up options

Traditional approach- Au stud bump => direct solder attach

Traditional approach - Cu stud bump => direct solder attach

Ni/Pd UBM => Sn/Pb solder bumped

Ni/Pd UBM => Pb-free solder bumped

Ni/Pd UBM => Au stud bump

Ni/Pd UBM => Cu stud bump

Au stud bump over ALCAP => Ni/Pd UBM => Solder bumped Pb-free

Cu stud bump over ALCAP => Ni/Pd UBM => Solder bumped Pb-free

Figure 1: UBM and solder wettable surface interfaces considered for singulated die processing

The next session details the work that went into determining the best method for processing the die for the case needed, but also to evaluate if plating, no matter if directly on the ALCAP pad, or added below or above a Au or Cu stud, with solder attached to either method, would provide a yielding, reliable solder joint.

Discussion

Ni/Pd plating process

Copper and gold stud bumping processes were already established before work was done in this study. Two ALCAP based die were chosen for this work: a 12 I/O ASIC die used in the case study product and an 88 I/O daisy chain die. The biggest challenge was to establish a plating process that could be performed on singulated die. Placing die into beakers for each of the wet processing steps seemed like to best choice. Figure 2 details the bench top, beaker plating process that was chosen for this study.

Work was started with Atotech USA, to provide the chemistries needed to deposit an electroless nickel and palladium layer onto the ALCAP bond pads. There were 8 beakers setup for the process. The process steps, temperatures and plating times can be seen in figure 3.

Figure 2: Under hood, table top plating system. Plating baths were setup into beakers.

Figure 3: Electroless Nickel/Palladium plating process steps

Several techniques were used to hold the die onto a backer while the plating occurred. Die were originally held down using a temporary adhesive, but the acid etch processes usually caused the die to come away from the backer. Finally, standard adhesive-backed, plating tape showed to work rather well. The tape was added onto glass slides and die were then placed onto the tape. Once die were held down, the first of the steps was to condition and etch the aluminum oxides that exist on the ALCAP pads. Once this difficult layer is cleaned and removed, a seed layer must be applied. A zincate process is then performed, etched, then applied again. At this point, the zincate layer is present and the nickel process can begin. The surface is cleaned and conditioned before the Nickel plating step begins. Plating for the nickel was performed at an 87C bath temperature for 15 minutes then parts sat in the palladium bath at 50C for 9 min. A DI water rinse was done between each of the steps. The results ended up coming close to the desired amount. Nickel thickness of 4-6 microns were achieved, as well as 0.2 to 0.4

Process Step Temp Time

Aluminum Conditioner

23C 1 min

Aluminum Etch 50C 1 min

Zincate – step 1 30C 1 min

HNO3 etch/clean 23C 1 min

Zincate – step 2 30C 3 min

Surface Cleaner 40C 5 min

Nickel Activator 40C 1 min

Nickel Plate step 87C 15 min

Palladium plate step 50C 9 min

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microns of Palladium. Figure 4-6 details several of the plating results of bare ALCAP die, as well as die with gold and copper stud that had deposited plating added on top. These are all shown before solder was attached.

Figure 4: Ni/Pd plating over ALCAP bond pad of singulated die

Figure 5: Ni/Pd plating over Gold stud bump on ALCAP bond pad of singulated die

Figure 6: Ni/Pd plating over copper stud bump on ALCAP bond pad of singulated die

From the list of plating stack-up options listed in Figure 1, 30 of each die type and plating stack-up were prepared for bumping and assembly.

Solder bumping of plated die The bumping process was performed by a screen printing

approach. Type 9, water soluble solder paste, having a <3 micron particle size, was used for the printing. Due to area ratio concerns and since the aperture size on these prints ranged from 90 to 120 micron squares, a 75 micron stencil thickness was chosen. The paste was printed using an automated screen printing system onto the shiny surface of an un-processed 6 inch wafer. After inspection of the prints and bad locations were removed, die from each of the legs were placed into the paste deposits and the entire wafer was then sent into the reflow over, through a nitrogen environment, to form the bumps. Once cooled, the wafers were placed into heated water to remove the die from the wafer surface by cleaning away the flux residue. Die were then inspected, sorted into legs, and sent into a final cleaning step. All die typically had a slightly flattened top of the solder deposit due to the weight of the die resting on the molten solder. These “coined” die were left alone assuming the assembly process would not be affected by this artifact. Figure 7 shows a cross section image of one of the plated, bumped die.

Figure 7: Solder bumped die over the Ni/Pd plating Shear test results

Next, to evaluate the plating process and to compare the various legs, die from each group were chosen for shear test analysis, with data taken at various level of liquid to liquid thermal shock. Table 8 shows the result of these shear tests.

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Table 8: Shear test results of plating legs across 50 cycles of LLTS testing

The results show, as expected, slightly higher shear strength of copper wire on ALCAP over gold wire on ALCAP. It also shows a rise in shear strength of gold and copper wires that have been plated over. Even better, there was a considerable increase of shear strength of solder bumped die that contained plated studs underneath. Even after 500 cycles of LLTS testing, there was little change to strength of most samples. Shear testing of traditional bumped PB8 die, with a typical bumping process, showed an average of 70-80 grams of shear force. The results of the plated bumps are showing that adding the plating is contributing to the overall strength of the system. Board Assembly

The next step in the study was to mount the various legs of the stack-up groups onto test boards and put into liquid shock and air to air testing. For the PB8 (88 I/O) die, these die were mounted onto a high TG FR4 test board, that tested the over continuity of the die. The ASIC devices were assembled to LLTC ceramic substrates. Both die had a simple assembly process. The die were picked out of waffle packs, per their legs, dipped into water soluble flux at a height of 45 microns, and placed onto their respective boards. They then went into a established reflow profile.

Overall yield of the die were not bad. Ones that failed

typically did so due to an un-inspected missing bump from the bumping process. As the bumping process was not completely established at the time, occasionally the die would slide on the wafer during reflow, due to the high oven convection rate. This would cause some die to have bond pads that did not take up solder. However ones that showed uniform bumping showed 100% yields. Results of the assembly process for several of the stack-ups can be seen in figures 9 through 12. 

Figure 9: Co stud ASIC die bumped and plated with Ni/Pd soldered to LTCC substrate.

Figure 10: side view of bumped ASIC assembled to LTCC substrate

Figure 11: side view of Cu stud, plated, bumped PB8 assembled to FR4 test board.

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Figure 12: side view of plated ALCAP bumped ASIC assembled to FR4 test board. Reliability

At the time of writing this paper, the 20 ASICs on LTCC plated copper stud samples had gone through 1000 cycles of LLTS and had shown no evidence of cracking or failure. Figure 13 details a cross section image of one of these samples after 1000 cycles.

Figure 13: plated copper stud ASIC after 1000 cycles of LLTS. No failures seen.

The other legs in the study are currently in test, with some past 300 cycles LLTS, and most of the AATC is in the early stages of testing. So far there seems to be no signs of early failure. Testing will continue and the results presented. Conclusion

A successful Ni/Pd plating process was developed to add a solder wettable UBM to singulated flip chip devices. A variety of stack-ups were tested across two die types to evaluate the feasible approach of converting a wire bondable, ALCAP plated die into one that could be used in a solder bumped flip chip application. Several types of stack-ups, ranging from Ni/Pd plating directly over the ALCAP bond pad, to Ni/Pd plating over Au or Cu studs were evaluated. Solder bumps plated over the Ni/Pd ALCAP pad, showed

similar shear test results with traditional solder bumped die with a wafer processed UBM. Data showed that when plating was added over a gold or copper stud bump, and a solder bump was added over the plated studs, shear strengths showed double of the strength of ones that had no plated studs.

The bumping process was developed using type 9 solder paste and was screen printed on a blank wafer surface. The die were successfully bumped, although some improvements to this process is needed.

Of the die that showed successful bumping, the assembly process, using a dip flux method, showed great functional yields. Those samples have been added into liquid thermal shock and air-air thermal cycling chambers. The first of the data groups, using the plated copper studs over ALCAP, made it through 1000 cycles of LLTS without any signs of failure.

Additional testing is being conducted and will be shown at a later date. However, data so far has shown that singulated die, with a wire bondable ALCAP bond pad, can be plated with an electroless Ni/Pd surface which can be used as a UBM for a solder flip chip process.

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