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A FUZZY CONTROLLED SEPIC FED SEVEN LEVEL INVERTER FOR
PHOTOVOLTAIC SYSTEM
A.Bindu1, M.Carolin Mabel
2, C.Bharatiraja
3
1CSI Institute of Technology, Thovalai, India, [email protected]
2St.Xaviers Catholic College of Engineering, Chunkankadai,India, [email protected] 2Department of Electrical and Electronics, SRM university, India, [email protected]
Abstract
This paper bestows a single ended primary-inductor converter (SEPIC) whose duty ratio is adjusted
for tracking MPP using perturb and observe MPPT technique. The fuzzy controlled SEPIC MPPT
scheme preserves the voltage without variation and reduces current ripples, steady-state error and
overshoot. A seven-level inverter topology with minimum switching devices is used to decrease the
voltage stress in the switches. The scheme suggested ensures the use of PV module for maximum
efficiency and speed in changing load at the inverter outturn. The three level and seven level
topologies are compared and results are verified with MATLAB software. The result shows the
FLC controlled MPPT scheme for SEPIC produces improved efficiency in seven level inverter
compared to three level inverter. Simulation results presented proves the effectiveness of the
method.
Keywords - MLI, MPPT, FLC, THD, P&O
1. INTRODUCTION
The use of fossil fuel in large scale is causing green house gas emissions worldwide, which is
affecting the climate adversely. The use of solar energy leads to a new paradigm shift in the energy
scenario. The gap between demand and availability in the power sector of the country is increasing
day by day. This makes it convenient for tapping energy from the sun which is available free of
cost. Apart from the off-grid systems on-grid system would also be installed to satisfy the power
demand.
In PV system, inverters connected with grid portray a fast engendering area. A cost
effective PV system is possible with efficient power converter design. The output voltage from a
solar panel is converted into usable DC at its maximum power point using fuzzy logic controller
and then to AC by a seven level inverter. The maximum power point tracker maximizes the output
power from a PV system for a given set of conditions. This paper presents a SEPIC fed inverter
scheme to improve efficiency and minimize the overall system cost of PV array.
Depending upon change in atmospheric conditions, the grid current is tracked by the current
International Journal of Pure and Applied MathematicsVolume 114 No. 12 2017, 603-613ISSN: 1311-8080 (printed version); ISSN: 1314-3395 (on-line version)url: http://www.ijpam.euSpecial Issue ijpam.eu
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controlled scheme and the stability of a PV system internal dynamics is analyzed by an energy
based Lyapunov function [5] due to the discontinuous input current power loss is more in buck and
buck-boost converters. The larger output voltage of boost converter than the input makes maximum
power tracking ability inflexible. CUK converter has an inverted output compared to SEPIC.
Artificial neural network determines the membership function and fuzzy rules in an adaptive neuro-
fuzzy controller which in turn determines the inverter output current. The performance using PI
controllers is slower and with more steady-state error compared to neuro-fizzy. Power factor
obtained is unity keeping the inverter current and line voltage in same phase and frequency [7].
The output of the inverter provides better THD due to the FLC-based MPPT scheme [1]. In
case of unbalanced DC-link voltage in each H-bridge module carrier based neutral voltage
modulation strategy produces maximum reachable output voltage [4]. Multicarrier PWM switching
technique can be used to generate low harmonic waveforms at the inverter output [3]. Although
many approaches have been suggested a multilevel space vector modulation can also be used for
single phase cascaded multilevel inverter to synthesize the staircase voltage waveform [2]. Some
new modifications in the inverter topology provide superior features such as reduced switching
devices in terms of number, cost, requirements in control and reliability, reduced PWM
complexities [6].
For PWM signal generation, three reference signals with same amplitude and frequency can
be produced and shifted with a difference equivalent to the triangular carrier signal amplitude.[9].
PWM signals are generated using dual reference modulation scheme also. The modulation index
can be varied but should not cross the maximum value otherwise over modulation occurs [11].
Multi channel carrier phase shifting sinusoidal PWM (CPS-SPWM) strategy is applied to generate
driving signals using FPGA chip [15].
Hysteresis algorithm based current control has the shortcomings of switching frequency
variation, heavy interference, harmonic distortion in multilevel inverter. Modulated hysteresis
control overcomes these undesirable factors [14]. Single phase bidirectional inverters for DC
distribution with buck/boost maximum power point trackers equally distribute PV array output. In
parallel operation the controllers online check the input configuration of MPPTs [12]. Cascade of
DC/DC booster and PWM inverter results in reduced energy utilization. The performance is
improved by the use of H-bridge power sharing algorithm. The speed of controller implementation
is increased by FPGA [10].
As the power allocation and the output voltage generation are coupled, wide range of
reactive power compensation can be achieved by a novel Discrete Fourier Transform (DFT) and
International Journal of Pure and Applied Mathematics Special Issue
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phase locked loop (PLL) method [13]. The PWM switching and nonlinear load causes harmonics
in the output voltage of inverter. An L-C filter using fuzzy logic controller at the inverter output
reduces voltage waveform distortion is presented in [8].
2. MODELING OF SOLAR PANEL
Solar arrays are frequently used in shaggy and remote atmospheres.Hence modules must be
capable of prolonged maintenance free operations.A single solar cell is a two terminal device whose
operation is similar to a diode in the dark and when energized by the solar irradiation,it generates a
photo voltage and current.The generated dc photo voltage is of 0.5V to 1V and a photo current in
short circuit is of some tens of mA/cm2. The voltage is too low, eventhough there is reasonable
current for uttermost applications.The useful output is produced by connecting the cells together
and encapsulating into module.The module used consists of series and parallel combination of cells
to form arrays with increased current and voltage,according to the power requirement of the
application.
The solar array is designed and simulated using MATLAB software. The ratings of the
solar array used for simulation is maximum power (Pmax) :140Wp ± 3%, open circuit voltage (Voc):
22.46V, short circuit current (Isc):8.51A, voltage at maximum power (Vmax):17.89V, current at
maximum power (Imax):7.83A. 11pannels of same ratings are used to produce PV output of
approximately 221.25V.
Fig1.Proposed Solar Array
3. FUZZY CONTROLLED SEPIC CONVERTER
A. SEPIC converter
The PV array output is connected to SEPIC. Two inductors L1 & L2 with series resistance
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R1 & R2 are used for continuous current conduction and capacitors Cs & Co are used as series and
output capacitors respectively. The switching pulse is generated by FLC/PWM generator with
50KHz carrier signal. The input and output isolation is provided by the series capacitor. The current
ripples are suppressed using the output capacitor.
Fig.2 FLC based SEPIC
The duty cycle is given by
V OUT + VD
D = ………… (1)
V IN + V OUT + V D
The inductor value is calculated by
V IN (MIN)
L = × DMAX ………… (2)
∆ IL × fSW
fSW and DMAX represents the switching frequency & the duty cycle at the minimum input voltage.
In a SEPIC converter when the power switch Q1 is turned on the inductor starts charging,
and the output capacitor controls the ripple current.
The output capacitor
IOUT × D
COUT ≥ ………… (2)
VRIPPLE × 0.5 × fSW
B. Maximum power point tracking
The P&O algorithm is implemented to track the maximum power point. The P&O
algorithm compares the PV power with the previous perturbation. The direction of perturbation is
reversed if the power is decreasing otherwise the direction would be opposite. The P&O algorithm
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oscillates when the maximum power point is reached.
C. Fuzzy control scheme
The control scheme used for the SEPIC is shown in fig. Fuzzy logic method makes it
possible for the precise statement about the behavior of a complex system behavior. Fuzzy control
refers to the control of the duty cycle through fuzzy linguistic descriptions. Many fuzzy control
applications have been implemented successfully. The central core of a fuzzy controller is a
linguistic explanation about the approximate control action for a given condition. Fuzzy linguistic
descriptions involve associations of fuzzy variables and procedures for inferencing. Whereas
derivative controller, what is modeled is the physical system or process being controlled.
Fig3. Mamdani FIS
(a)
(b)
(c)
Fig.4. FLC membership functions for (a) e (tn), (b) ∆ e(tn) and (c) u (tn)
The input variables in fuzzy control are the error voltage e, which is the deviation of
measured variable y from the set point or reference r. At any time t = tn, the crisp error is defined as
e (tn) = r – y (tn) and the change in error ∆ e(tn), between two successive time steps. At time t = tn ,
the crisp change in error is the difference between the present error and the error in the previous
step t = tn-1 namely e(tn) – e(tn-1). The output variable is the control voltage u, at time t = tn , that
is the change in the action (∆ u) . Hence, if the defuzzified output at time ’n’ is ∆u*( tn ), the overall
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crisp output of the controller will be
u (tn) = u (tn-1 ) + ∆u*( tn) ……….(4)
Since it requires fewer data points in the output universe of discourse in order for the
controller to operate with reasonable accuracy.
The proposed FLC keeps the output voltage of SEPIC constant. Vdc and Vdc ref are
compared and the error is fed to the fuzzy logic controller. The error is reduced by using
knowledge based rules and the voltage Vdc is maintained constant.
4. SEVEN LEVEL INVERTER
A seven level inverter with a conventional H-bridge and two bidirectional switches and
capacitor acts as a voltage divider is proposed to generate output AC voltage from the PV array.
The topology is shown fig.5. The PV array output is connected to the inverter through a SEPIC.
The SEPIC maintains the output voltage from the PV array reducing current ripples. By providing
proper switching DC output voltage of SEPIC can be converted to seven level output voltage. The
generated AC voltage from the inverter is delivered to the load.
Fig.5 .Diagram of seven level inverter
The output voltage produced by the inverter can be expressed as ∞
V0(Ө) = A0+ ∑ An cos nӨ + Bn sin nӨ ……….(5) n=1 Due to quarter wave symmetry A0 and Bn are zero. The above equation can be written as
∞
V0(Ө) = ∑ An cos nӨ ……….(6)
n=1,3,..
4Vdc p m
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where An= ∑ [(-1) sin (nαm)] .……….(7)
nπ m =1
Therefore,
∞ 4Vdc p m
V0(Ө) = ∑ ∑ [(-1) sin(nαm)] cos nӨ …..(8)
n=1,3,.. nπ m =1
TABLE 1
SEVEN LEVEL OUTPUT SWITCHING STATES
In this work a multi reference PWM scheme is used. A carrier signal of high frequency and
three reference signals of same amplitude and frequency but phase shifted with an offset equal to
the carrier signal amplitude are compared to produce switching pulses. Switching pattern is
produced when Vref1 and Vref2 are greater than the peak amplitude of the Vcarrier , then Vref3 is
checked for zero crossing. After that Vref2 is compared for zero crossing and then again Vref1 is
compared with Vcarrier . The carrier signal frequency is selected as 10 KHz in this work.
5. RESULTS AND DISCUSSION
The suggested PV system is simulated using MATLAB SIMULINK. The PV output is
tracked using MPPT and presented as the input signal for SEPIC. The output voltage, current and
power waveforms are given in fig.6. The FLC is used in the SEPIC to produce control signal
depending up on the error signal. The output voltage of SEPIC shown in fig.7. The three
reference signals and a triangular carrier signal used to generate switching pulses are shown in.8.(a).
The signals given to the six switches used in the inverter are shown in fig.8. The seven level
inverters output voltage and current wave forms are shown in fig.9. The PV output voltage is
221.25V DC with an output current of 4A. The power output is 884.9W. The switching frequency
of SEPIC is 50 KHz and it produces an output voltage of approximately 221.25V.
S1 S2 S3 S4 S5 S6 V0
1 0 0 1 0 0 VDC
0 0 0 1 1 0 2VDC/3
0 0 0 1 0 1 VDC/3
0 0 1 1 0 0 0
0 1 0 0 1 0 -VDC/3
0 1 0 0 0 1 -2VDC/3
0 1 1 0 0 0 -VDC
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(a)
(b)
(c)
Fig.6.PV output waveforms(a)voltage,(b)current(c)power
Fig.7.SEPIC output waveform
(a)
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Fig.8.(a)Multicarrier PWM, (b)switching signals
(a)
(b)
Fig.9.Seven level inverter output waveforms (a)voltage (b)current
This paper proposed SEPIC fed single phase seven level inverter for a PV system. The
performance of the inverter is optimized by a fuzzy controlled SEPIC. The proposed FLC scheme
gives better performance in terms of overshoot and speed than PI controlled converters. A seven
level inverter topology with reduced switching devices is compared with three level inverter. The
simulation results show that the seven level inverter has improved output and the MPPT and FLC
scheme gives a better solution for the PV system.
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