IN THE UNITED STATES DISTRICT COURT FOR THE EASTERN ...€¦ · Case No. 2:16-cv-695-RWS-RSP JURY TRIAL DEMANDED MEMBER CASE INTEL CORPORATION, Intervenor. JOINT CLAIM CONSTRUCTION

06973-00001/8978191.1 1

IN THE UNITED STATES DISTRICT COURT

FOR THE EASTERN DISTRICT OF TEXAS

MARSHALL DIVISION

ALACRITECH, INC.,

Plaintiff,

v.

CENTURYLINK COMMUNICATIONS

LLC, et al.

Defendants.

Case No. 2:16-cv-693-JRG-RSP

LEAD CASE

JURY TRIAL DEMANDED

ALACRITECH, INC.,

Plaintiff,

v.

WINSTRON CORPORATION, et al.,

Defendants.

Case No. 2:16-cv-692-JRG-RSP

JURY TRIAL DEMANDED

MEMBER CASE

ALACRITECH, INC.,

Plaintiff,

v.

DELL INC.,

Defendant.

Case No. 2:16-cv-695-RWS-RSP

JURY TRIAL DEMANDED

MEMBER CASE

INTEL CORPORATION,

Intervenor.

JOINT CLAIM CONSTRUCTION AND PRE-HEARING STATEMENT

PURSUANT TO PATENT RULE 4-3

Case 2:16-cv-00693-JRG-RSP Document 134 Filed 02/21/17 Page 1 of 7 PageID #: 4126

INTEL Ex.1039.001

06973-00001/8978191.1 2

Pursuant to Patent Rule 4-3 and the Court’s Docket Control Order, Plaintiff Alacritech,

Inc. (“Alacritech”) and Intervenor and Defendants (collectively, “Defendants”) hereby submit

this Joint Claim Construction Statement.

A. CONSTRUCTION OF THOSE CLAIM TERMS, PHRASES, OR CLAUSES

ON WHICH THE PARTIES AGREE

The parties do not presently agree on the constructions of any terms.

B. EACH PARTY’S PROPOSED CONSTRUCTION OF EACH DISPUTED

CLAIM TERM, PHRASE, OR CLAUSE, TOGETHER WITH AN

IDENTIFICATION OF INTRINSIC AND OTHER EVIDENCE

Exhibits A and B, attached hereto, identify the disputed claim terms. Exhibit A contains

Alacritech’s proposed constructions for each disputed claim term and intrinsic and other

evidence in support; Exhibit B contains Defendants’ proposed constructions for each disputed

claim term and intrinsic and other evidence in support.

C. THE ANTICIPATED LENGTH OF TIME NECESSARY FOR THE

CLAIM CONSTRUCTION HEARING

The parties anticipate that two hours per side will be sufficient time to present the parties’

respective positions.

D. POSSIBLE WITNESSES AT THE CLAIM CONSTRUCTION HEARING

The parties do not presently intend to call any witnesses at the Claim Construction

Hearing.

E. OTHER ISSUES WHICH MIGHT APPROPRIATELY BE TAKEN UP AT

A PREHEARING CONFERENCE PRIOR TO THE CLAIM

CONSTRUCTION HEARING

The parties are not aware of any other issues that should be taken up at a pre-hearing

conference before the Claim Construction Hearing.


INTEL Ex.1039.002

06973-00001/8978191.1 3

Dated: February 21, 2017 Respectfully submitted,

QUINN EMANUEL URQUHART &

SULLIVAN, LLP

/s/ Joseph M. Paunovich_______________

Claude M. Stern

California State Bar No. 96737

[email protected]


SULLIVAN, LLP

555 Twin Dolphin Drive, 5th Floor

Redwood Shores, CA 94065

Telephone: (650) 801-5000

Facsimile: (650) 801-5100

Joseph M. Paunovich

[email protected]


Jordan Brock Kaericher


[email protected]


SULLIVAN, LLP

865 South Figueroa Street, 10th Floor

Los Angeles, CA 90017

Telephone: (213) 443-3000

Facsimile: (213) 443-3100

T. John Ward, Jr.

Texas State Bar No. 00794818

[email protected]

Claire Abernathy Henry

Texas State Bar No. 24053063

[email protected]

WARD & SMITH LAW FIRM

1507 Bill Owens Parkway

Longview, Texas 75604

Telephone: (903) 757-6400

Facsimile: (903) 757-2323

ATTORNEYS FOR PLAINTIFF

ALACRITECH, INC.

WEIL GOTSHAL & MANGES, LLP

/s/ Garland T. Stephens

Garland T. Stephens, Lead Attorney (24053910)

Douglas W. McClellan (24027488)

Melissa L. Hotze (24049831)

Justin L. Constant (24067551)

Richard D. Eiszner (65891)

WEIL, GOTSHAL & MANGES LLP

700 Louisiana, Suite 1700

Houston, TX 77002

Telephone: (713) 546-5000

Facsimile: (713) 224-9511

[email protected]

[email protected]

[email protected]

[email protected]

[email protected]

Anne Marie Cappella (181402)

Jeremy Jason Lang (255642)

Amanda K. Branch (300860)


201 Redwood Shores Parkway

Redwood Shores, CA 94065

Telephone: (650) 802-3000

Facsimile: (650) 802-3100

[email protected]

[email protected]

[email protected]

William Sutton Ansley (80085)


1300 Eye Street, N.W., Suite 900

Washington, DC 20005

Telephone: (202) 682-7000

Facsimile: (202) 857-0940

[email protected]

David Mitchell DesRosier (676024)


100 Federal Street, 34th Floor

Boston, MA 02110


INTEL Ex.1039.003

06973-00001/8978191.1 4

Telephone: (617) 772-8300

Facsimile: (617) 772-8333

[email protected]

Harry L. Gillam, Jr. (07921800)

Gillam & Smith LLP

303 S. Washington Ave.

Marshall, TX 75670

Telephone: (903) 934-8450

Facsimile: (903) 934-9257

[email protected]

David Folsom (07210800)

Jackson Walker L.L.P.

6002 Summerfield Dr., Suite B

Texarkana, TX 75503

Telephone: (903) 255-3250

Facsimile: (903) 255-3265

[email protected]

ATTORNEYS FOR INTERVENOR

INTEL CORPORATION

/s/ Frank V. Pietrantonio

Deron R. Dacus

Texas Bar No. 00790553

THE DACUS FIRM, P.C.

821 ESE Loop 323, Suite 430

Tyler, TX 75701

Tel: (903) 705-1117

Fax: (903) 705-1117

[email protected]

Jonathan G. Graves (VA Bar 46136)

Frank V. Pietrantonio (VA Bar 25473)

Stephen C. Crenshaw (VA Bar 82016)

COOLEY LLP

One Freedom Square

Reston Town Center

11951 Freedom Drive

Reston, VA 20190-5656

Telephone: (703) 456-800

Fax: (703) 456-8100


INTEL Ex.1039.004

06973-00001/8978191.1 5

[email protected]

[email protected]

[email protected]

Phillip E. Morton (DC Bar 1032243)

COOLEY LLP

1299 Pennsylvania Ave., N.W.

Suite 700

Washington, DC 20004-2400

Telephone: (202) 842-7800

Fax: (202) 842-7899

[email protected]

ATTORNEYS FOR DEFENDANTS TIER 3,

INC., SAVVIS COMMUNICATIONS CORP.,

AND CENTURYLINK COMMUNICATIONS

LLC

/s/ Michael J. Newton

Michael J. Newton (TX Bar No. 24003844)

Brady Cox (TX Bar No. 24074084)

ALSTON & BIRD, LLP

2828 North Harwood Street, 18th Floor

Dallas, Texas 75201-2139

Tel: (214) 922-3400

Fax: (214) 922-3899

[email protected]

[email protected]

Deron R. Dacus (TX Bar No. 00790553)

THE DACUS FIRM, PC

821 ESE Loop 323, Suite 430

Tyler, Texas 75701

(903) 705-1117

(903) 581-2543 Fax

[email protected]

Kirk T. Bradley (NC Bar No. 26490)

ALSTON & BIRD, LLP

Bank of America Plaza

101 South Tryon Street, Suite 4000

Charlotte, NC 28280-4000

Tel: (704) 444-1000

Fax: (704) 444-1111


INTEL Ex.1039.005

06973-00001/8978191.1 6

[email protected]

Lindsey Yeargin (GA Bar No. 248608)

Emily Chambers Welch (GA Bar No. 606071)

ALSTON & BIRD, LLP

One Atlantic Center

1201 West Peachtree St NW #4900

Atlanta, GA 30309

Tel: 404-881-7000

Fax: 404-881-7777

[email protected]

[email protected]

ATTORNEYS FOR DEFENDANT DELL INC.

/s/Harold H. Davis, Jr.

Ravi S. Deol

State Bar No. 24090073

[email protected]

K&L GATES LLP

1717 Main St.

Suite 2800

Dallas, Texas 75201

214.939.5500

214.939.5849 Facsimile

Harold H. Davis, Jr., Lead Counsel

California Bar No. 235552 (admitted in E.D. Tex.)

[email protected]

Howard Chen

Texas Bar No. 24009953

Rachel Burnim

California Bar No. 292952 (admitted in E.D. Tex.)

K&L GATES LLP

Four Embarcadero, Suite 1200

San Francisco, CA 94111

Telephone: 415.882.8200

Facsimile: 415.882.8220

ATTORNEYS FOR DEFENDANTS WISTRON

CORP., WIWYNN CORP., AND SMS

INFOCOMM CORP.


INTEL Ex.1039.006

06973-00001/8978191.1 7

CERTIFICATE OF SERVICE

The undersigned hereby certifies that a true and correct copy of the above and foregoing

document has been served on February 21, 2017, to all counsel of record who are deemed to

have consented to electronic service via the Court’s CM/ECF system per Local Rule CV-5(a)(3).

/s/ Antonio Sistos


INTEL Ex.1039.007

06973-00001/8977889.2 - 1 -

Exhibit A

Alacritech’s Claim Constructions and Supporting Evidence

JointlyProposedClaimConstructionTermsClaim Term Proposed Construction(s) Intrinsic Evidence Extrinsic Evidence

1. “fast-path processing”

/ “slow-path processing”

Fast-path: “the protocol stack of the

host computer performs little or no

network layer or transport layer

processing”

---------------------------------

Slow-path: No construction necessary

‘205 Patent at Abstract

‘205 Patent at 3:48-51

‘205 Patent at 3:63 through 4:4

‘205 Patent at 8:8-40

‘205 Patent at 8:41-60

‘205 Patent at 11:18-30

‘205 Patent at 15:51-55

‘205 Patent at 17:6-34

‘205 Patent at 18:16-37

‘205 Patent at 21:45-50

‘205 Patent at 24:45-50

‘205 Patent at 39:35-45

‘205 Patent Claim 1



‘205 File History, 4/18/2006

Amendment at ALA00014037,

ALA00014043

‘036 Patent at 39:10-20

‘036 Patent at 39:45-48

‘241 File History, 10/04/2006

Amendment at ALA00015142

‘809 Provisional at 7-8

‘809 Provisional at 13

Expert testimony of Dr. Paul Min

2. “context [for

communication]”

“data regarding an active connection” ‘036 Patent Claim 1




Context: the set of circumstances or

Case 2:16-cv-00693-JRG-RSP Document 134-1 Filed 02/21/17 Page 1 of 23 PageID #: 4133

INTEL Ex.1039.008

06973-00001/8977889.2 - 2 -

Claim Term Proposed Construction(s) Intrinsic Evidence Extrinsic Evidence


‘036 Patent at 8:25-30

‘036 Patent at 10:10-22

‘036 Patent at 15:22-27


‘036 Patent at 39:33-40

‘036 Patent at 39:45-48

‘036 Patent at Fig. 2

‘036 Patent at Fig. 4B




‘036 File History, 03/28/2006


ALA00014686

‘036 File History, 10/10/2006


ALA00014514

‘241 File History, 10/04/2006



facts that surround a particular event,

situation, etc.1

Context: the circumstances in which

an event occurs.2

3. “flow key” “an identifier for a connection”








02/11/2011 Boucher Tr. (Patent

Interference No. 105,775), 63:23-

65:17.

1 Random House Webster’s College Dictionary, 2nd ed. (1999).

2 The American Heritage Dictionary, 3rd ed. (1994).


INTEL Ex.1039.009

06973-00001/8977889.2 - 3 -













‘880 Patent at 7:15-28

‘880 Patent at 7:47-60


‘880 Patent at 13:29-48

‘880 Patent at 18:15-26

‘880 Patent at 36:38-46


‘880 Patent at 59:27-33

‘880 Patent at 60:19-35


‘880 Patent at 64:4-18

‘880 File History, 6/19/2003 Request to

Provoke Interference at

ALA07368392, ALA07368395,

ALA07368397, ALA07368401,

ALA07368412, ALA07368414

2/10/2011 Boucher Dep. Tr. 99:13-

20.

Key: In databases, a unique value

that is used to identify a data record.

Synonymous with primary key.3

Key: In database management, an

identifier for a record or group of

records in a datafile.4

Key: a group of characters that

identifies a record in a database or

other computer file.5

3 Webster’s New World Dictionary of Computer Terms, 8th ed. (2000).

4 Microsoft Computer Dictionary, 4th ed. (1999).



INTEL Ex.1039.010

06973-00001/8977889.2 - 4 -


‘880 File History, 6/14/2010


4. “database” / “flow

database”

“collection of organized data” ‘880 Patent Claim 43

‘880 Patent at 36:38-42

‘880 Patent at 64:4-18



ALA07368397, ALA07368408,

ALA07368412, ALA07368415

‘880 File History, 6/14/2010



Database: A collection of organized,

related data, esp. one in electronic

form that can be accessed and

manipulated by specialized computer

software.6

Database: A collection of related

information about a subject

organized in a useful manner that

provides a base or foundation for

procedures, such as retrieving

information, drawing conclusions,

and making decisions. Any

collection of information that servers

these purposes qualifies as a

database, even if the information

isn’t stored on a computer. In fact,

important predecessors of today’s

sophisticated business database

systems were files kept on index

cards and stored in file cabinets.

Information usually is divided into

data records, each with one or more

data fields.7




INTEL Ex.1039.011

06973-00001/8977889.2 - 5 -


5. “a destination [] in the

memory of the

computer” / “a

destination memory;” /

“a destination in

memory;” / “a

destination . . . on the

host computer system”

“a single contiguous block or several

associated blocks of memory in the

computer”








‘699 Patent at 2:44-60



‘699 Patent at 6:60-7:2

‘699 Patent at Figs. 2 and 3








‘205 Patent at 43:4-18



Destination: 1. the place to which a

person or thing travels or is sent. 2.

The purpose for which something is

destined.8

Destination: The record, file,

document, or disk to which

information is copied or moved, as

opposed to the source.9

Destination: The location (drive,

folder, or directory) to which a file is

copied or moved. Compare source

(definition 1).10

8 Random House Webster’s College Dictionary, 2nd ed. (1999)

9 Webster’s New World Dictionary of Computer Terms, 8th ed. (2000)

10 Microsoft Computer Dictionary, 4th ed. (1999)


INTEL Ex.1039.012

06973-00001/8977889.2 - 6 -

TermsProposedByPlaintiffClaim Term Proposed Construction(s) Intrinsic Evidence Extrinsic Evidence

6. “operation code” “status data” ’880 Patent Claim 1









‘880 Patent at 7:47-60



‘880 Patent File History, 6/19/2003

Request to Provoke Interference

at ALA07368393,

ALA07368397, ALA07368406,

ALA07368411, ALA07368415



ALA00016218



ALA00016884


Word: The native unit of storage on

a particular machine. A word is the

largest amount of data that can be

handled by the microprocessor in one

operation and is also, as a rule, the

width of the main data bus. Word

sizes of 16 bits and 32 bits are the

most common.11

Word: A unit of information

composed of characters, bits, or bytes

that’s treated as an entity and that can

be stored in one location.12

11 Microsoft Computer Dictionary, 4th ed. (1999).



INTEL Ex.1039.013

06973-00001/8977889.2 - 7 -

TermsProposedByDefendantsClaim Term Proposed Construction(s) Intrinsic Evidence Extrinsic Evidence

7. “prepending” /

“prepended”

No construction necessary ‘036 Patent Claim 4











‘036 Patent at 14:5-12

‘036 Patent at 4:14-18

‘036 Patent at 4:28-33

‘036 Patent at 4:39-46

’036 Patent at 8:8-14

‘036 Patent at 11:10-16

‘036 Patent at 11:36-42

‘036 Patent at 29:61-64

‘036 Patent at 39:21-27


‘241 File History, 4/19/2007

Amendment at ALA00015063-

064, ALA00015071


8. “status information”









INTEL Ex.1039.014

06973-00001/8977889.2 - 8 -




‘072 Patent at 11:18-33


‘072 Patent at 27:24-30

‘072 Patent at 30:14-16

‘072 Patent at 63:59-67

‘072 Patent at 64:21-38

9. “substantially no

network layer or

transport layer

processing” /

“significant network

layer or significant

transport layer

processing”




‘205 Patent at 4:48-50

‘205 Patent at 39:35-45

‘205 Patent at 43:13-17


10. “substantially

contiguous manner”


‘205 Patent at 42:30-47


11. “without an interrupt

dividing”

No construction necessary.13 ‘241 Patent Claim 1






Interrupt: A hardware or software

signal that temporarily stops program

execution in a computer so that

13 Should Defendants seek unnecessary judicial review of the term, Plaintiff reserves the right to rely on the provided extrinsic evidence.


INTEL Ex.1039.015

06973-00001/8977889.2 - 9 -


‘241 Patent at 4:20-33

‘241 Patent at 5:24-28

‘241 Patent at 11:34-46

‘241 Patent at 14:9-33


‘241 Patent at 16:19-22


‘241 Patent at 36:24-54

‘241 Patent at 37:16-32

‘241 Patent at 41:27-40

another procedure can be carried

out.14

Interrupt: A signal to the

microprocessor indicating that an

event has occurred that requires its

attention. Processing is halted

momentarily so that input/output or

other operations can take place.

When the operation is finished,

processing resumes.15

Interrupt: A signal from a device to

a computer’s processor requesting

attention from the processor. When

the processor receives an interrupt, it

suspends its current operations, saves

the status of its work, and transfers

control to a special routine known as

an interrupt handler, which contains

the instructions for dealing with the

particular situation that caused the

interrupt. Interrupts can be generated

by various hardware devices to

request service or report problems, or

by the processor itself in response to

program errors or requests for

operating-system services. Interrupts

14 Random House Webster’s College Dictionary, 2nd ed. (1999)



INTEL Ex.1039.016

06973-00001/8977889.2 - 10 -


are the processor’s way of

communicating with the other

elements that make up a computer

system. A hierarchy of interrupt

priorities determines which interrupt

request will be handled first if more

than one request is made. A program

can temporarily disable some

interrupts if it needs the full attention

of the processor to complete a

particular task.16

12. “re-assembly buffer”







‘880 Patent at 29:35-48


13. “Flow re-assembler”

No construction necessary. ‘880 Patent Claim 41


‘880 Patent at 13:13-28

‘880 Patent at 13:29-48

‘880 Patent at 13:49-51

‘880 Patent at 14:4-9

‘880 Patent at 18:15-26

‘880 Patent at 33:64-34:9

‘880 File History, 11/1/2010


16 Microsoft Computer Dictionary, 4th ed. (1999)


INTEL Ex.1039.017

06973-00001/8977889.2 - 11 -



‘880 File History, 6/14/2010 at

ALA07367903



ALA07368408, ALA07368415-

16

14. “packet batching

module”

No construction necessary.




‘880 Patent at 64:4-18


‘880 Patent at 5:48-63

‘880 Patent at 36:38-46


‘880 Patent at 59:27-33

‘880 Patent at 60:19-35




ALA07368408


15. “traffic classifier”

No construction necessary.17



‘880 Patent at 59:27-33

‘880 Patent at 63:25-63




Traffic: The messages sent and

received over a communication

channel.18


18 Modern Dictionary of Electronics, 6th ed. (1997).


INTEL Ex.1039.018

06973-00001/8977889.2 - 12 -


ALA07368407

‘880 File History, 11/1/2010


Traffic: Bellcore’s definition: A flow

of attempts, calls, and messages. My

definition: The amount of activity

during a given period of time over a

circuit, line or group of lines, or the

number of messages handled by a

communications switch. There are

many measures of “traffic.”

Typically it’s so many minutes of

voice conversation, or so many bits

of data conversation. Note that

Bellcore includes attempts in its

definition of traffic. I don't. The

decision is yours. But you should be

aware of what you include in your

calculations.19

Traffic: Messages that are

transmitted and received over a

communication channel.20

Prioritization of Network Traffic

Prioritization can be explained as

follows: implement some method to

get important packets through a

network when the network is

congested and delay unimportant

packets until later. Important packets

19 Newton’s Telecom Dictionary, 16th ed. (2000).

20 IEEE Standard Glossary of Computer Networking Terminology (1995).


INTEL Ex.1039.019

06973-00001/8977889.2 - 13 -


are generally classified as delay-

sensitive traffic such as that generated

by live videoconferencing, voice

calls, mission-critical transaction

processing, remote monitoring, and

collaborative computing (in which

people work in real time on their

computer screens across networks).

Unimportant packets may include

packets carrying electronic mail or

packets downloaded from Internet

Web sites by freeloading users.21

See also Gupta, Sanjay et al., Traffic

classification and scheduling in ATM

networks (1993).

See also Kubbar, Osama et al.,

Traffic Classification and Resource

Allocation in ATM Networks (1996)

16. “flow database

manager”

No construction necessary [beyond

proposal for “database”]22



‘880 Patent at 59:11-12

‘880 Patent at 59:54-58

‘880 Patent at 64:29-35


Database: A collection of organized,

related data, esp. one in electronic

form that can be accessed and

21 Encyclopedia of Networking (1998).



INTEL Ex.1039.020

06973-00001/8977889.2 - 14 -


‘880 Patent at 68:25-29



ALA07368408

manipulated by specialized computer

software.23

Database: A collection of related

information about a subject organized

in a useful manner that provides a

base or foundation for procedures,

such as retrieving information,

drawing conclusions, and making

decisions. Any collection of

information that servers these

purposes qualifies as a database, even

if the information isn’t stored on a

computer. In fact, important

predecessors of today’s sophisticated

business database systems were files

kept on index cards and stored in file

cabinets. Information usually is

divided into data records, each with

one or more data fields.24

Database management: Tasks

related to creating, maintaining,

organizing, and retrieving

information from a database. See

data manipulation.25





INTEL Ex.1039.021

06973-00001/8977889.2 - 15 -


17. “flow manager”

No construction necessary.26 ‘880 Patent Claim 43




‘880 Patent at 18:15-26

‘880 Patent at 59:27-33

‘880 Patent at 63:47-64

‘880 Patent at 87:60-65



ALA07368409, ALA07368411,

ALA07368412


Traffic: The messages sent and

received over a communication

channel.27

Traffic: Bellcore’s definition: A flow

of attempts, calls, and messages. My

definition: The amount of activity

during a given period of time over a

circuit, line or group of lines, or the

number of messages handled by a

communications switch. There are

many measures of “traffic.”

Typically it’s so many minutes of

voice conversation, or so many bits

of data conversation. Note that

Bellcore includes attempts in its

definition of traffic. I don't. The

decision is yours. But you should be

aware of what you include in your

calculations.28


27 Modern Dictionary of Electronics, 6th ed. (1997).

28 Newton’s Telecom Dictionary, 16th ed. (2000).


INTEL Ex.1039.022

06973-00001/8977889.2 - 16 -


Traffic: Messages that are

transmitted and received over a

communication channel.29

Prioritization of Network Traffic

Prioritization can be explained as

follows: implement some method to

get important packets through a

network when the network is

congested and delay unimportant

packets until later. Important packets

are generally classified as delay-

sensitive traffic such as that generated

by live videoconferencing, voice

calls, mission-critical transaction

processing, remote monitoring, and

collaborative computing (in which

people work in real time on their

computer screens across networks).

Unimportant packets may include

packets carrying electronic mail or

packets downloaded from Internet

Web sites by freeloading users.30

See also Gupta, Sanjay et al., Traffic

classification and scheduling in ATM

networks (1993).

29 IEEE Standard Glossary of Computer Networking Terminology (1995).

30 Encyclopedia of Networking (1998).


INTEL Ex.1039.023

06973-00001/8977889.2 - 17 -


See also Kubbar, Osama et al.,

Traffic Classification and Resource

Allocation in ATM Networks (1996)

18. “re-assembler”

No construction necessary. ‘880 Patent Claim 43


‘880 Patent at 13:49-56

‘880 Patent at 87:60-64



ALA07368405, ALA07368410,

ALA07367744-45


19. “means for

receiving, by the

network interface device

from the computer, a

command to transmit

data from the computer

to the network”

No construction necessary

Not subject to 112(6)

To the extent the Court determines

otherwise,

Function: Receiving a command to

transmit data from the computer to the

network

Structures: a network interface

device, a register on the network

interface device, and equivalents

thereof.



‘104 Patent at 3:30-44

‘104 Patent at 5:3-32

‘104 Patent at 6:14-26

‘205 Patent at 38:15-26


20. “means for sending,

by the network interface



‘104 Patent at 3:37-44



INTEL Ex.1039.024

06973-00001/8977889.2 - 18 -


device to the network,

data corresponding to

the command, including

means for prepending a

transport layer header to

at least some of the

data”



otherwise,

Function: Sending data corresponding

to the command, including means for

prepending a transport layer header to

at least some of the data


device and equivalents thereof.

‘104 Patent at 5:5-16

‘104 Patent at 6:14-26

‘205 Patent at 38:15-26

21. “means for sending,

by the network interface

device to the computer,

an indication that the

data has been sent from

the network interface

device to the network,

prior to receiving, by the

network interface device

from the network, an

acknowledgement

(ACK) that the data has

been received.”




otherwise,

Function: Sending an indication that

the data has been sent from the

network interface device to the

network prior to receiving, by the

network interface device from the

network, an acknowledgment (ACK)

that the data was received.


device and equivalents thereof.



‘104 Patent at 2:41-51

‘104 Patent at 4:1-11

‘104 Patent at 4:35-44

‘104 Patent at 4:45-62

‘205 Patent at 38:15-26


22. “means, coupled to Subject to 112(6) ‘205 Patent Claim 23 Expert testimony of Dr. Paul Min


INTEL Ex.1039.025

06973-00001/8977889.2 - 19 -


the host computer, for

receiving from outside

the apparatus a response

to an ISCSI read request

command and for fast-

path processing a

portion of the response

to the ISCSI read

request command, the

portion including data,

the portion being fast-

path processed such that

the data is placed into

the destination memory

on the host computer

without the protocol

stack of the host

computer doing

significant network

layer or significant

transport layer

processing, the means

also being for receiving

a subsequent portion of

the response to the

ISCSI read request

command and for slow-

path processing the

subsequent portion such

that the protocol stack of

the host computer does

network layer and

Function: “receiving from outside the

apparatus a response to an ISCSI read

request command and for fast-path

processing a portion of the response to

the ISCSI read request command, the

portion including data, the portion

being fast-path processed such that the

data is placed into the destination

memory on the host computer without

the protocol stack of the host

computer doing significant network

layer or significant transport layer

processing, the means also being for

receiving a subsequent portion of the

response to the ISCSI read request

command and for slow-path

processing the subsequent portion

such that the protocol stack of the host

computer does network layer and

transport layer processing on the

subsequent portion”

Structure: A network interface

device, a processor in a network


thereof




‘205 Patent at 4:23-39

‘205 Patent at 4:40-59

‘205 Patent at 6:15-18

’205 Patent at 17:6-19,

’205 Patent at 17:35-46

’205 Patent at 17:60-67


‘205 Patent at 41:23-35

‘205 Patent at 43:4-22


INTEL Ex.1039.026

06973-00001/8977889.2 - 20 -


transport layer

processing on the

subsequent portion”

23. “first mechanism” /

“second mechanism”




otherwise,

Claim 1

Function (1: “first mechanism”):

processing the packets so that for each

packet the network layer header and

the transport layer header are validated

without an interrupt dividing the

processing of the network layer header

and the transport layer header…

sending the data from each packet of

the first type to a destination in

memory allocated to an application

without sending any of the media

access control layer headers, network

layer headers or transport layer

headers to the destination

Structures (1: “first mechanism”):

A network interface device, a

processor in a network interface

device, and equivalents thereof




‘241 Patent at 7:42-58


‘241 Patent at 9:34-48

’241 Patent at 9:66 through 10:23

‘241 Patent at 10:24-40

‘241 Patent at 11:36-46

‘241 Patent at 13:8-33

‘241 Patent at 14:34-46

‘241 Patent at 15:16-30

‘241 Patent at 15:53-60

‘241 Patent at 17:20-36


‘241 Patent at 31:51-66

‘241 Patent at 32:9-16

‘241 Patent at 39:32-45

‘241 Patent at 40:22-42

‘241 Patent at 43:9-35

‘241 Patent at Fig. 4B


‘036 Patent at 5:21-29

‘036 Patent at 6:32-33

‘036 Patent at 39:21-27

‘036 Patent at 41:31-37





INTEL Ex.1039.027

06973-00001/8977889.2 - 21 -


Claims 3 & 4:

Function (Claim 3: “second mechanism”): “processing an upper

layer header of at least one of the

packets thereby determining the

destination, wherein the upper layer

header corresponds to a protocol layer

above the transport layer.

Function (Claim 4: “second mechanism”): processing an upper

layer header of at least one of the

packets of the second type thereby

determining the destination

Structure(s) (Claims 3 & 4: “second

mechanism”): a host CPU operating

a TCP protocol stack, as detailed in,

e.g., ’241 Patent, 9:66 to 10:23, 40:22-

42, 43:9-35, Fig. 4B, and equivalents

thereto.

Claim 5

Function (Claim 5: “second mechanism”): processing a transport

layer header of another packet prior to

receiving the plurality of packets

from the network, thereby establishing

a Transmission Control Protocol



INTEL Ex.1039.028

06973-00001/8977889.2 - 22 -


(TCP) connection for the packets of

the first type.

Structure(s) (Claim 5: “second

mechanism”): a host CPU operating

a TCP protocol stack, as detailed in,

e.g., ‘241 patent, 9:34-48, 9:66 to

10:23, 39:32-45, 43:9-35, Fig. 4B, and

equivalents thereto

Claim 17

Function (17: “first mechanism”):

providing a block of data and a

Transmission Control Protocol (TCP)

connection

Structures (17: “first mechanism”):

a host CPU operating a TCP protocol

stack, as detailed in, e.g., ‘241 patent,

7:42-58; 17:20-36; Fig. 11; and

equivalents thereof.

Function (17: “second mechanism”):

dividing the block of data into

multiple segments; prepending an

outbound packet header to each of the

segments, thereby forming an

outbound packet corresponding to

each segment, the outbound packet

header containing an outbound media


INTEL Ex.1039.029

06973-00001/8977889.2 - 23 -


access control layer header, an

outbound Internet Protocol (IP) header

and an outbound TCP header, wherein

the prepending of each outbound

packet header occurs without an

interrupt dividing the prepending of

the outbound media access control

layer header, the outbound (IP) header

and the outbound TCP header.

Structures (17: “second

mechanism”): A network interface

device, a processor in the network


thereof

24. second

apparatus[es]”


Not subject to 112(6).





‘036 Patent at 7:53-66

‘036 Patent at 8:9-15

‘036 Patent at 15:9-27

‘036 Patent at 15:



INTEL Ex.1039.030

1

Exhibit B

Defendants’ and Intervenors’ Proposed Constructions and Supporting Evidence

Term and

Asserted

Claims

Proposed

Construction Supporting Evidence

1

“prepending” /

“prepended”

036: 4

072: 1, 9, 15

104: 1, 22

241: 7, 9, 12,

15, 17, 18

“adding to the

front” / “added to

the front”

[Alacritech 1997 Prov. pp. 6, 57, ALA00138383 at ALA00138392, 443]

[Alacritech 1998 Prov. pp. 91-92, ALA00138562 at ALA00138654-55]

[Alacritech 2002 Prov., 2002-04-22 Specification, 60/374,788, pp. 122, 159, 338, 377,

378, 521, 562, 725, 782]

[241 Patent Claim 7]







[241 Patent 11:9-46]

[241 Patent 12:19-50]

[241 Patent 13:48-14:33]

[241 Patent 16:9-33]

[241 Patent 16:57-17:19]

[241 Patent 29:42-55]

[241 Patent 32:56-33:18]

[241 Patent 68:48-50]



1 To the extent that the cited Supporting Evidence includes references to other portions of specifications, figures, or other documents,

they are expressly incorporated. To the extent that the testimony of Mark Lanning is cited as Supporting Evidence, all references or

citations included in the Declarations of Mr. Mark Lanning regarding claim construction in this case are expressly incorporated.


INTEL Ex.1039.031

Defendants’ and Intervenor Proposed

Constructions and Supporting Evidence

Exhibit B

2

Term and

Asserted

Claims

Proposed


1


[072 Patent 11:18-54]

[072 Patent 12:26-57]

[072 Patent 13:52-14:36]

[072 Patent 16:10-34]

[072 Patent 16:57-17:18]

[072 Patent 29:33-45]

[072 Patent 32:41-33:2]

[072 Patent 67:57-67]







[036 Patent 11:20-57]

[036 Patent 12:30-61]

[036 Patent 13:59-14:44]

[036 Patent 16:20-44]

[036 Patent 17:1-30]

[036 Patent 29:52-64]

[036 Patent 32:65-33:27]

[036 Patent 68:40-52]

“fast-path

processed” /

“fast-path

processing”

205: 1, 8, 31

“a mode of

operation in

which the

network interface

device performs

all physical layer,

[Alacritech 1997 Prov. pp. 6, 7, 10-14, 15, 18, 21, 24, 25-28, 30, 35, 39-45, 53, 55, 57,

ALA00138383 at ALA00138392, 393, 396-400, 401, 404, 407, 410, 411-414, 416, 421,

425-431, 439, 441, 443]





INTEL Ex.1039.032



Exhibit B

3

Term and

Asserted

Claims

Proposed


1

MAC layer, IP

layer, and TCP

layer processing”



[205 Patent 1:37-56]

[205 Patent 2:19-31]

[205 Patent 3:40-59]

[205 Patent 3:60-4:6]

[205 Patent 4:23-39]

[205 Patent 4:40-64]

[205 Patent 5:40-42]

[205 Patent 6:14-17]

[205 Patent 8:8-24]

[205 Patent 8:25-40]

[205 Patent 8:41-60]

[205 Patent 9:17-29]

[205 Patent 10:26-38]

[205 Patent 10:39-57]

[205 Patent 10:58-11:17]

[205 Patent 11:18-31]

[205 Patent 11:53-12:3]

[205 Patent 12:4-24]

[205 Patent 12:59-13:13]

[205 Patent 13:14-42]

[205 Patent 14:21-49]

[205 Patent 15:51-16:9]

[205 Patent 16:24-52]

[205 Patent 16:53-17:5]

[205 Patent 17:6-18]

[205 Patent 17:19-34]

[205 Patent 17:35-49]

[205 Patent 18:1-15]


INTEL Ex.1039.033



Exhibit B

4

Term and

Asserted

Claims

Proposed


1

[205 Patent 18:16-37]

[205 Patent 18:38-56]

[205 Patent 18:57-19:10]

[205 Patent 19:11-31]

[205 Patent 20:61-21:12]

[205 Patent 21:13-26]

[205 Patent 22:43-56]

[205 Patent 35:27-44]

[205 Patent 36:8-21]

[205 Patent 36:22-43]

[205 Patent 36:44-49]

[205 Patent 36:50-37:7]

[205 Patent 37:8-18]

[205 Patent 37:19-61]

[205 Patent 39:30-45]

[205 Patent 39:46-62]

[205 Patent 39:63-40:11]

[205 Patent 40:36-63]

[205 Patent 41:23-35]

[205 Patent 42:11-16]

[205 Patent 42:48-60]

[205 Patent 43:4-28]

“slow path

processing”

205: 8, 31

“a mode of

operation in

which the host

performs at least

some of the

physical layer,

MAC layer, IP

layer, or TCP

[Alacritech 1997 Prov. pp. 6, 7, 10-14, 15, 18, 21, 24, 25-28, 30, 35, 39-45, 53, 55,

ALA00138383 at ALA00138392, 393, 396-400, 401, 404, 407, 410, 411-414, 416, 421,

425-431, 439, 441]





[205 Patent 2:52-3:13]


INTEL Ex.1039.034



Exhibit B

5

Term and

Asserted

Claims

Proposed


1

layer processing”

[205 Patent 4:23-39]

[205 Patent 4:40-64]

[205 Patent 5:40-42]

[205 Patent 6:14-17]

[205 Patent 8:25-40]

[205 Patent 11:53-12:3]

[205 Patent 14:21-49]

[205 Patent 17:6-18]

[205 Patent 17:19-34]

[205 Patent 18:16-37]

[205 Patent 18:57-19:10]

[205 Patent 28:63-29:17]

[205 Patent 30:43-31:5]

[205 Patent 36:8-21]

[205 Patent 36:44-49]

[205 Patent 36:50-37:7]

[205 Patent 39:30-45]

[205 Patent 40:36-63]

[205 Patent 40:64-41:22]

[205 Patent 41:23-35]

“a destination

[] in the [a]

memory of the

computer”

699: 1, 2, 7, 13,

20

“a destination

memory”

205: 1, 8, 22,

31, 36

“the location in

host memory

where data

resides when all

MAC layer,

network layer,

and transport

layer processing

is complete”

ALA00120474-512

[Alacritech 1997 Prov. pp. 1-3, 6-16, ALA00138383 at ALA00138387-389, 392-402]

[880 File History, ALA00016191 at ALA0016422]









INTEL Ex.1039.035



Exhibit B

6

Term and

Asserted

Claims

Proposed


1

“a destination

in memory”

241: 1, 22

“a

destination...on

the host

computer

system”

880: 5






[241 Patent 1:50-2:18]

[241 Patent 2:27-44]

[241 Patent 2:61-3:10]

[241 Patent 3:27-49]

[241 Patent 3:50-65]

[241 Patent 3:66-4:19]

[241 Patent 4:20-33]

[241 Patent 5:18-38]

[241 Patent 5:39-60]

[241 Patent 6:6-9]

[241 Patent 7:17-19]

[241 Patent 7:42-58]

[241 Patent 7:59-8:4]

[241 Patent 8:39-60]

[241 Patent 9:17-33]

[241 Patent 9:49-65]

[241 Patent 9:66-10:23]

[241 Patent 10:24-40]

[241 Patent 11:9-46]

[241 Patent 11:47-62]

[241 Patent 12:51-13:7]

[241 Patent 13:8-33]

[241 Patent 13:34-47]

[241 Patent 13:48-14:33]

[241 Patent 14:48-64]


INTEL Ex.1039.036



Exhibit B

7

Term and

Asserted

Claims

Proposed


1

[241 Patent 14:65-15:16]

[241 Patent 15:17-30]

[241 Patent 15:31-56]

[241 Patent 15:57-16:8]

[241 Patent 16:9-33]

[241 Patent 16:34-56]

[241 Patent 16:57-17:19]

[241 Patent 17:20-36]

[241 Patent 18:10-27]

[241 Patent 18:39-64]

[241 Patent 18:65-19:30]

[241 Patent 19:61-20:8]

[241 Patent 20:20-60]

[241 Patent 21:12-30]

[241 Patent 21:65-22:27]

[241 Patent 23:46-24:3]

[241 Patent 26:24-49]

[241 Patent 27:2-31]

[241 Patent 27:32-47]

[241 Patent 30:40-53]

[241 Patent 30:54-31:8]

[241 Patent 31:14-39]

[241 Patent 31:40-50]

[241 Patent 31:51-32:26]

[241 Patent 32:27-35]

[241 Patent 33:19-29]

[241 Patent 34:14-59]

[241 Patent 35:20-46]

[241 Patent 35:64-36:11]

[241 Patent 36:40-47]


INTEL Ex.1039.037



Exhibit B

8

Term and

Asserted

Claims

Proposed


1

[241 Patent 37:23-25]

[241 Patent 37:26-30]

[241 Patent 37:38-38]

[241 Patent 37:50-50]

[241 Patent 37:51-65]

[241 Patent 38:7-24]

[241 Patent 38:25-38]

[241 Patent 38:41-45]

[241 Patent 38:54-62]

[241 Patent 39:21-31]

[241 Patent 39:52-67]

[241 Patent 40:15-15]

[241 Patent 40:16-21]

[241 Patent 40:23-35]

[241 Patent 40:36-42]

[241 Patent 40:43-56]

[241 Patent 40:57-41:3]

[241 Patent 41:42-42]

[241 Patent 41:43-51]

[241 Patent 42:27-27]

[241 Patent 42:28-47]

[241 Patent 43:10-36]

[241 Patent 43:37-40]

[241 Patent 44:8-18]

[241 Patent 44:33-55]

[241 Patent 47:41-50]

[241 Patent 48:10-12]

[241 Patent 48:20-24]

[241 Patent 48:29-38]

[241 Patent 50:4-14]


INTEL Ex.1039.038



Exhibit B

9

Term and

Asserted

Claims

Proposed


1

[241 Patent 50:28-35]

[241 Patent 50:38-38]

[241 Patent 52:18-26]

[241 Patent 53:8-13]

[241 Patent 54:23-29]

[241 Patent 55:4-6]

[241 Patent 56:4-4]

[241 Patent 56:5-9]

[241 Patent 56:10-10]

[241 Patent 56:11-37]

[241 Patent 56:42-48]

[241 Patent 56:61-62]

[241 Patent 56:64-57:7]

[241 Patent 57:8-15]

[241 Patent 57:28-45]

[241 Patent 57:57-60]

[241 Patent 58:12-17]

[241 Patent 58:62-59:4]

[241 Patent 60:12-22]

[241 Patent 60:33-42]

[241 Patent 60:43-47]

[241 Patent 60:54-61:2]

[241 Patent 61:3-16]

[241 Patent 61:18-34]

[241 Patent 61:36-51]

[241 Patent 61:53-62]

[241 Patent 62:22-25]

[241 Patent 62:42-45]

[241 Patent 62:47-57]

[241 Patent 62:59-63:7]


INTEL Ex.1039.039



Exhibit B

10

Term and

Asserted

Claims

Proposed


1

[241 Patent 63:18-35]

[241 Patent 63:63-65]

[241 Patent 64:2-5]

[241 Patent 64:7-16]

[241 Patent 64:17-36]

[241 Patent 64:47-62]

[241 Patent 65:19-45]

[241 Patent 66:6-10]

[241 Patent 66:23-43]

[241 Patent 67:41-52]

[241 Patent 67:61-68:15]

[241 Patent 68:17-46]

[241 Patent 68:48-50]

[241 Patent 70:17-21]

[241 Patent 71:30-41]

[241 Patent 72:32-54]

[241 Patent 72:64-73:13]

[241 Patent 73:14-23]

[241 Patent 73:28-34]

[241 Patent 75:1-15]

[241 Patent 76:16-19]

[241 Patent 77:54-61]

[241 Patent 78:21-28]

[241 Patent 78:29-30]

[241 Patent 78:55-58]

[241 Patent 79:60-65]

[241 Patent 79:66-80:3]

[241 Patent 80:4-5]

[241 Patent 84:53-85:52]

[241 Patent 85:62-86:2]


INTEL Ex.1039.040



Exhibit B

11

Term and

Asserted

Claims

Proposed


1

[241 Patent 86:8-16]

[241 Patent 86:17-30]

[241 Patent 86:31-36]

[241 Patent 86:37-56]

[241 Patent 87:32-37]

[241 Patent 88:56-62]

[241 Patent 95:15-37]

[241 Patent 96:23-34]

[241 Patent 97:50-65]

[241 Patent 97:66-67]

[241 Patent 98:6-30]





















INTEL Ex.1039.041



Exhibit B

12

Term and

Asserted

Claims

Proposed


1



[205 Patent 1:37-56]

[205 Patent 4:23-39]

[205 Patent 4:40-64]

[205 Patent 4:65-67]

[205 Patent 6:12-13]

[205 Patent 6:25-42]

[205 Patent 8:8-24]

[205 Patent 8:41-60]

[205 Patent 8:61-9:16]

[205 Patent 9:17-29]

[205 Patent 9:30-48]

[205 Patent 10:39-57]

[205 Patent 10:58-11:17]

[205 Patent 11:18-31]

[205 Patent 12:25-58]

[205 Patent 13:14-42]

[205 Patent 13:43-57]

[205 Patent 14:8-20]

[205 Patent 14:21-49]

[205 Patent 15:27-50]

[205 Patent 15:51-16:9]

[205 Patent 16:10-23]

[205 Patent 16:53-17:5]

[205 Patent 17:19-34]

[205 Patent 17:35-49]

[205 Patent 17:50-67]

[205 Patent 18:16-37]

[205 Patent 19:47-20:8]


INTEL Ex.1039.042



Exhibit B

13

Term and

Asserted

Claims

Proposed


1

[205 Patent 21:45-60]

[205 Patent 22:13-25]

[205 Patent 22:26-42]

[205 Patent 22:57-23:8]

[205 Patent 23:9-21]

[205 Patent 24:7-26]

[205 Patent 24:51-25:11]

[205 Patent 25:12-42]

[205 Patent 26:5-19]

[205 Patent 26:31-60]

[205 Patent 27:23-41]

[205 Patent 28:9-38]

[205 Patent 29:58-30:15]

[205 Patent 32:41-59]

[205 Patent 33:5-20]

[205 Patent 36:8-21]

[205 Patent 36:22-43]

[205 Patent 36:50-37:7]

[205 Patent 37:8-18]

[205 Patent 37:19-61]

[205 Patent 37:62-38:3]

[205 Patent 38:27-38]

[205 Patent 38:39-51]

[205 Patent 38:65-39:11]

[205 Patent 39:30-45]

[205 Patent 39:46-62]

[205 Patent 39:63-40:11]

[205 Patent 40:12-26]

[205 Patent 40:27-35]

[205 Patent 40:36-63]


INTEL Ex.1039.043



Exhibit B

14

Term and

Asserted

Claims

Proposed


1

[205 Patent 40:64-41:22]

[205 Patent 41:23-35]

[205 Patent 41:54-42:10]

[205 Patent 42:31-47]

[205 Patent 42:48-60]

[205 Patent 42:61-43:3]

[205 Patent 43:4-28]

























INTEL Ex.1039.044



Exhibit B

15

Term and

Asserted

Claims

Proposed


1


[880 Patent 1:37-49]

[880 Patent 1:57-2:14]

[880 Patent 2:31-44]

[880 Patent 3:4-16]

[880 Patent 3:45-60]

[880 Patent 4:24-25]

[880 Patent 5:48-63]

[880 Patent 6:5-23]

[880 Patent 6:24-37]

[880 Patent 6:48-57]

[880 Patent 7:15-28]

[880 Patent 7:47-62]

[880 Patent 8:7-11]

[880 Patent 8:12-24]

[880 Patent 8:25-32]

[880 Patent 8:33-46]

[880 Patent 8:47-60]

[880 Patent 9:27-34]

[880 Patent 10:1-19]

[880 Patent 10:41-11:2]

[880 Patent 11:3-12]

[880 Patent 11:40-50]

[880 Patent 11:66-12:13]

[880 Patent 12:14-26]

[880 Patent 13:49-59]

[880 Patent 15:45-50]

[880 Patent 15:51-56]

[880 Patent 16:14-25]

[880 Patent 16:26-36]


INTEL Ex.1039.045



Exhibit B

16

Term and

Asserted

Claims

Proposed


1

[880 Patent 17:60-18:3]

[880 Patent 18:16-26]

[880 Patent 18:27-29]

[880 Patent 20:1-8]

[880 Patent 20:32-37]

[880 Patent 21:5-13]

[880 Patent 21:32-41]

[880 Patent 23:21-28]

[880 Patent 23:29-41]

[880 Patent 23:42-51]

[880 Patent 23:58-67]

[880 Patent 24:1-9]

[880 Patent 24:10-20]

[880 Patent 24:21-33]

[880 Patent 24:43-48]

[880 Patent 24:52-25:2]

[880 Patent 25:60-67]

[880 Patent 26:18-25]

[880 Patent 27:21-30]

[880 Patent 27:37-45]

[880 Patent 27:46-49]

[880 Patent 27:55-28:3]

[880 Patent 28:4-17]

[880 Patent 28:21-35]

[880 Patent 28:36-53]

[880 Patent 28:54-62]

[880 Patent 29:14-16]

[880 Patent 29:24-34]

[880 Patent 29:35-48]

[880 Patent 29:57-64]


INTEL Ex.1039.046



Exhibit B

17

Term and

Asserted

Claims

Proposed


1

[880 Patent 30:14-23]

[880 Patent 30:24-44]

[880 Patent 30:53-67]

[880 Patent 31:21-46]

[880 Patent 32:4-7]

[880 Patent 32:19-39]

[880 Patent 33:26-37]

[880 Patent 33:43-63]

[880 Patent 33:64-34:14]

[880 Patent 34:15-27]

[880 Patent 36:8-18]

[880 Patent 37:25-34]

[880 Patent 37:48-53]

[880 Patent 38:3-9]

[880 Patent 38:10-21]

[880 Patent 38:28-32]

[880 Patent 38:33-47]

[880 Patent 38:48-55]

[880 Patent 38:56-60]

[880 Patent 39:28-41]

[880 Patent 44:40-43]

[880 Patent 46:36-43]

[880 Patent 46:44-53]

[880 Patent 46:61-62]

[880 Patent 46:66-67]

[880 Patent 47:3-19]

[880 Patent 47:26-37]

[880 Patent 48:56-67]

[880 Patent 49:1-3]

[880 Patent 49:4-23]


INTEL Ex.1039.047



Exhibit B

18

Term and

Asserted

Claims

Proposed


1

[880 Patent 49:54-57]

[880 Patent 49:58-67]

[880 Patent 50:1-3]

[880 Patent 50:4-5]

[880 Patent 50:19-23]

[880 Patent 51:5-16]

[880 Patent 52:17-23]

[880 Patent 52:24-26]

[880 Patent 53:39-47]

[880 Patent 54:1-17]

[880 Patent 54:22-27]

[880 Patent 54:28-37]

[880 Patent 54:38-50]

[880 Patent 54:59-55:3]

[880 Patent 55:9-23]

[880 Patent 55:24-33]

[880 Patent 56:11-19]

[880 Patent 56:31-42]

[880 Patent 57:28-35]

[880 Patent 57:40-53]

[880 Patent 58:8-9]

[880 Patent 58:10-12]

[880 Patent 58:24-25]

[880 Patent 58:26-27]

[880 Patent 58:30-31]

[880 Patent 58:57-59]

[880 Patent 59:3-3]

[880 Patent 59:59-65]

[880 Patent 60:19-35]

[880 Patent 60:45-54]


INTEL Ex.1039.048



Exhibit B

19

Term and

Asserted

Claims

Proposed


1

[880 Patent 60:55-67]

[880 Patent 61:3-9]

[880 Patent 61:23-38]

[880 Patent 63:36-40]

[880 Patent 63:41-46]

[880 Patent 64:4-18]

[880 Patent 66:10-23]

[880 Patent 68:3-13]

[880 Patent 70:1-13]

[880 Patent 71:1-10]

[880 Patent 73:24-30]

[880 Patent 73:31-40]

[880 Patent 74:53-65]

[880 Patent 74:66-75:9]

[880 Patent 75:10-16]

[880 Patent 75:29-37]

[880 Patent 75:38-45]

[880 Patent 75:51-59]

[880 Patent 75:60-76:6]

[880 Patent 76:7-12]

[880 Patent 76:26-30]

[880 Patent 76:34-45]

[880 Patent 77:51-56]

[880 Patent 78:33-62]

[880 Patent 79:24-42]

[880 Patent 80:21-50]

[880 Patent 81:38-44]

[880 Patent 87:50-88:15]

[880 Patent 88:65-89:7]



INTEL Ex.1039.049



Exhibit B

20

Term and

Asserted

Claims

Proposed


1




















[699 Patent 2:28-43]

[699 Patent 2:44-61]

[699 Patent 2:64-3:20]

[699 Patent 3:27-30]

[699 Patent 3:39-42]

[699 Patent 3:49-60]

[699 Patent 4:11-27]

[699 Patent 4:28-44]

[699 Patent 4:55-67]

[699 Patent 5:11-24]

[699 Patent 5:25-35]


INTEL Ex.1039.050



Exhibit B

21

Term and

Asserted

Claims

Proposed


1

[699 Patent 5:36-48]

[699 Patent 5:49-53]

[699 Patent 5:54-58]

[699 Patent 5:59-64]

[699 Patent 5:65-6:8]

[699 Patent 6:9-16]

[699 Patent 6:17-28]

[699 Patent 6:29-37]

[699 Patent 6:38-43]

[699 Patent 6:58-7:5]

“database”

880: 9, 10, 12,

13, 23, 32, 35,

42, 43, 48, 50,

56, 58

“a collection of

logically related

data stored

together in one or

more

computerized

files”

[Definition of “database” in The New IEEE Standard Dictionary of Electrical and

Electronics Terms, 6th ed. (1996), 88801DOC000883-000887]

[880 File History, ALA00016191 at ALA00016423-25, 29, 32-34, 36-38, 40, 43, 44]














[880 Patent 7:15-28]

[880 Patent 7:29-42]

[880 Patent 7:43-46]

[880 Patent 7:47-62]


INTEL Ex.1039.051



Exhibit B

22

Term and

Asserted

Claims

Proposed


1

[880 Patent 7:63-67]

[880 Patent 11:13-27]

[880 Patent 17:51-59]

[880 Patent 21:42-55]

[880 Patent 21:56-61]

[880 Patent 22:23-38]

[880 Patent 22:39-42]

[880 Patent 22:51-56]

[880 Patent 36:38-46]

[880 Patent 59:5-7]

[880 Patent 59:11-12]

[880 Patent 60:19-35]

[880 Patent 60:45-54]

[880 Patent 60:55-67]

[880 Patent 61:1-2]

[880 Patent 61:10-22]

[880 Patent 61:41-49]

[880 Patent 61:50-55]

[880 Patent 61:56-62:2]

[880 Patent 62:19-44]

[880 Patent 62:52-52]

[880 Patent 62:55-55]

[880 Patent 62:56-59]

[880 Patent 63:5-22]

[880 Patent 63:47-64]

[880 Patent 63:65-64:3]

[880 Patent 64:4-18]

[880 Patent 64:24-47]

[880 Patent 64:48-65:6]

[880 Patent 65:19-22]


INTEL Ex.1039.052



Exhibit B

23

Term and

Asserted

Claims

Proposed


1

[880 Patent 65:25-26]

[880 Patent 65:27-27]

[880 Patent 65:28-28]

[880 Patent 65:29-29]

[880 Patent 65:33-43]

[880 Patent 65:58-67]

[880 Patent 66:1-9]

[880 Patent 66:10-23]

[880 Patent 66:42-54]

[880 Patent 67:9-20]

[880 Patent 67:44-68:2]

[880 Patent 68:19-33]

[880 Patent 68:44-69:7]

[880 Patent 69:8-11]

[880 Patent 69:30-42]

[880 Patent 69:43-50]

[880 Patent 69:56-60]

[880 Patent 69:61-67]

[880 Patent 70:1-13]

[880 Patent 70:14-16]

[880 Patent 71:42-58]

“operation

code”

880: 1, 17, 32,

34, 45

“the portion of a

machine language

or assembly

language

instruction that

specifies the type

of instruction and

the structure of

the data on which

[Definition of “operation code” in Microsoft Press Computer Dictionary, 3rd ed. (1997)]

[88801DOC000888-000893]

[88801DOC000894-000916]

[880 File History, ALA00016191 at ALA00016300, 304, 421, 425, 427, 433, 434, 439,

440, 451, 453, 784]

[Alacritech 1997 Prov., pp. 77-82, ALA00138383 at ALA00138463-68]

[Alacritech 1998 Prov., pp. 110-116, ALA00138562 at ALA00138673-79]




INTEL Ex.1039.053



Exhibit B

24

Term and

Asserted

Claims

Proposed


1

it operates”










[880 Patent 5:48-63]

[880 Patent 7:47-62]

[880 Patent 10:1-19]

[880 Patent 12:61-13:12]

[880 Patent 13:13-28]

[880 Patent 13:29-48]

[880 Patent 13:49-59]

[880 Patent 15:35-41]

[880 Patent 30:45-52]

[880 Patent 31:3-17]

[880 Patent 32:47-64]

[880 Patent 42:4-10]

[880 Patent 53:30-35]

[880 Patent 53:62-67]

[880 Patent 54:59-55:3]

[880 Patent 62:60-64]

[880 Patent 63:26-30]

[880 Patent 63:31-35]

[880 Patent 63:47-64]

[880 Patent 63:65-64:3]

[880 Patent 64:4-18]


INTEL Ex.1039.054



Exhibit B

25

Term and

Asserted

Claims

Proposed


1

[880 Patent 74:20-31]

[880 Patent 74:53-65]

[880 Patent 78:7-18]

[880 Patent 78:19-22]

[880 Patent 78:33-62]

[880 Patent 79:43-80:20]

[880 Patent 80:57-67]

[880 Patent 81:1-4]

[880 Patent 81:38-44]

[880 Patent, Fig. 2]

[880 Patent, Fig. 4]

[880 Patent, Fig. 23B]

“context”

036: 1, 3-7;

072: 1, 2, 7, 9,

15, 16, 19

Indefinite. Expert Testimony of Mark Lanning.

[ALA00019278-286]

[ALA00019294-300]

[“Fast-path TCP_TASK_OFFLOAD Porting Effort Summary,” Dkt. 38-3 in Alacritech

v. Microsoft, Case No. Case 3:04-cv-03284-JSW, ALA07371911]

[Connery Exhibit 2047, filed July 21, 2011 in In the matter of Connery v. Boucher,

Patent Interference No. 105,775, ALA07396518]

[Alacritech, Inc. v. Microsoft Corp., Case No. 3:04-cv-03284-JSW, Dkt. 38 (N.D. Cal.

Nov. 11, 2004) (Declaration of Peter Craft In Support of Alacritech’s Motion for

Preliminary Injunction)]

[Alacritech, Inc. v. Microsoft Corp., Case No. 3:04-cv-03284-JSW, Dkt. 96 (N.D. Cal.

Apr. 12, 2005) (Order regarding Alacritech’s Motion for Preliminary Injunction)]

[Interference No. 105,775 (Blightman testimony) at 67:21-68:2, ALA07369508 at

ALA07369574-75]

[Interference No. 105,775 (Higgen testimony) at 122:11-123:12, ALA07369639 at

ALA07369760-61]


INTEL Ex.1039.055



Exhibit B

26

Term and

Asserted

Claims

Proposed


1

RFC 793 (88801DOC000917-88801DOC001006).

[Alacritech 1997 Prov., pp. 4-7, 11, 25-27, 42-45, 49-58, 71, ALA00138383 at

ALA00138390-393, 397, 411-413, 428-431, 435-444, 457]















[072 Patent 6:34-37]

[072 Patent 7:56-8:5]

[072 Patent 8:6-18]

[072 Patent 9:49-52]

[072 Patent 10:9-33]

[072 Patent 11:18-54]

[072 Patent 13:52-14:36]

[072 Patent 15:1-19]

[072 Patent 16:57-17:18]

[072 Patent 20:55-21:4]

[072 Patent 21:24-56]

[072 Patent 21:57-22:19]

[072 Patent 24:15-34]


INTEL Ex.1039.056



Exhibit B

27

Term and

Asserted

Claims

Proposed


1

[072 Patent 24:38-40]

[072 Patent 24:55-25:3]

[072 Patent 27:24-40]

[072 Patent 29:66-30:23]

[072 Patent 30:43-64]

[072 Patent 30:65-31:2]

[072 Patent 31:3-27]

[072 Patent 31:38-32:12]

[072 Patent 32:13-21]

[072 Patent 32:41-33:2]

[072 Patent 37:31-45]

[072 Patent 37:46-53]

[072 Patent 38:63-63]

[072 Patent 39:1-11]

[072 Patent 39:12-26]

[072 Patent 39:27-31]

[072 Patent 39:33-48]

[072 Patent 39:49-54]

[072 Patent 43:27-39]

[072 Patent 44:11-33]

[072 Patent 45:56-46:3]

[072 Patent 49:38-47]

[072 Patent 49:48-56]

[072 Patent 50:43-47]

[072 Patent 52:21-25]

[072 Patent 53:6-23]

[072 Patent 53:29-33]

[072 Patent 53:34-44]

[072 Patent 53:45-47]

[072 Patent 53:48-54]


INTEL Ex.1039.057



Exhibit B

28

Term and

Asserted

Claims

Proposed


1

[072 Patent 53:55-62]

[072 Patent 53:63-67]

[072 Patent 54:1-7]

[072 Patent 54:8-12]

[072 Patent 54:14-21]

[072 Patent 54:31-34]

[072 Patent 54:35-39]

[072 Patent 54:40-61]

[072 Patent 54:64-55:3]

[072 Patent 55:9-11]

[072 Patent 63:61-67]

[072 Patent 64:22-38]

[072 Patent 64:65-65:9]

[072 Patent 66:2-19]

[072 Patent 66:59-67:3]

[072 Patent 67:12-34]

[072 Patent 68:2-7]

[072 Patent 69:44-64]

[072 Patent 71:3-6]

[072 Patent 71:8-17]

[072 Patent 71:29-32]

[072 Patent 71:37-40]

[072 Patent 71:50-67]

[072 Patent 72:1-9]

[072 Patent 72:10-24]

[072 Patent 72:25-34]

[072 Patent 72:35-38]

[072 Patent 72:50-57]

[072 Patent 72:58-73:4]

[072 Patent 73:6-8]


INTEL Ex.1039.058



Exhibit B

29

Term and

Asserted

Claims

Proposed


1

[072 Patent 73:10-15]

[072 Patent 73:16-29]

[072 Patent 73:31-36]

[072 Patent 73:43-43]

[072 Patent 73:44-44]

[072 Patent 73:45-45]

[072 Patent 73:46-46]

[072 Patent 73:50-51]

[072 Patent 73:64-64]

[072 Patent 73:65-74:3]

[072 Patent 74:10-24]

[072 Patent 74:32-50]

[072 Patent 74:54-60]

[072 Patent 75:8-8]

[072 Patent 75:14-20]

[072 Patent 75:21-22]

[072 Patent 75:30-31]

[072 Patent 75:37-47]

[072 Patent 75:48-48]

[072 Patent 75:49-76:17]

[072 Patent 76:27-27]

[072 Patent 76:28-41]

[072 Patent 76:48-60]

[072 Patent 76:61-67]

[072 Patent 77:1-4]

[072 Patent 84:42-42]

[072 Patent 86:2-27]

[072 Patent 96:38-52]

[072 Patent 96:59-97:15]



INTEL Ex.1039.059



Exhibit B

30

Term and

Asserted

Claims

Proposed


1







[036 Patent 6:28-31]

[036 Patent 7:53-8:2]

[036 Patent 8:3-15]

[036 Patent 9:50-53]

[036 Patent 10:10-34]

Documents

IN THE UNITED STATES DISTRICT COURT FOR THE EASTERN ...€¦ · Case No. 2:16-cv-695-RWS-RSP JURY TRIAL DEMANDED MEMBER CASE INTEL CORPORATION, Intervenor. JOINT CLAIM CONSTRUCTION