IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 41, NO. 12, DECEMBER 1994 2391

Influence of Lattice Self-Heating and Hot-Carrier Transport on Device Performance

Minchang Liang and Mark E. Law, Senior Member, IEEE

Abstract-As device technologies improve, the traditional drift- diffusion transport model becomes inadequate to predict the performance of state-of-the-art semiconductor devices. The rea- sons are believed to be the larger field and field gradient inside advanced devices which cause lattice heating and hot carrier nonlocal transport phenomena. For more accurate prediction on device performance, a new device simulator capable of full thermodynamic simulation was developed. The carrier and car- rier energy transport equations are directly derived from the Boltzmann transport equation, and the energy transfer among electrons, holes and crystal lattice takes into account most of the all possible mechanisms. This simulator was used to simulate the dc behavior of a BJT and a half-micron NMOS. The simulation results show that for advanced devices, not only the drift-diffusion model becomes inadequate, but including only one of the two thermal effects results in error in simulated device characteristics.

I. INTRODUCTION RIFT-DIFFUSION-BASED device modeling is losing D its capability for correct prediction on the performance

of state-of-the-art semiconductor devices. Insufficiency of the drift-diffusion (DD) model results from the failure of some of its assumptions when the ignored physical mechanisms begin to occur in device operation. Two of the most important physical mechanisms ignored in the DD transport model are the lattice self-heating and the hot carrier effects. Lattice self- heating results from the high dissipated power density in the devices, and will cause characteristics variation of the crystal lattice. Hot carrier effects, on the other hand, are due to the high field and field gradient inside devices, and will have large impact on the carrier transport and device reliability.

DD transport model assumes that the device is always isothermal, and the carriers are always in a quasi-static state such that a direct relation between the carrier energy and the local electric field exists. The first assumption eliminates the carrier flux component driven by the temperature gradient, while the second enables the use of the local field-dependent relation for carrier transport parameters such as the carrier mobility. Since only potential and carrier concentrations are included in the solutions, it is implicitly assumed the dissipated power density inside devices is so low that no significant lattice temperature increase ever occurs.

These assumptions, however, begin to fail as the device technologies improve. Because the scaling of the device phys-

Manuscript received February 28, 1994; revised June 27, 1994. The review of this paper was arranged by Associate Editor A. H. Marshak. This work was supported by the Semiconductor Research Corporation.

The authors are with the Department of Electrical Engineering, University of Florida, Gainesville, FL 32603 USA.

IEEE Log Number 940589 1.

ical dimension is more aggressive than that of the applied bias, much stronger electric field and field gradient may exist in the advanced devices. As a result, dissipated power density inside devices becomes large enough that self-heating effects cannot be neglected [I]. Moreover, hot carrier nonlocal transport such as velocity overshoot begins to emerge due to the large field gradient and the finite energy relaxation rate [ 2 ] . Consequently, the DD model becomes insufficient, and a full thermodynamic solution system which includes solutions for the carrier energies and the lattice temperature is needed for more accurate device performance prediction.

In the next section, derivation of the thermodynamic so- lution system of a new two-dimensional device simulator (FLOODS-Florida Object Oriented Device Simulator [3]) will be briefly presented. Comparison between FLOODS and other device simulators will also be discussed. In the third section, the influence of lattice self-heating and hot-carrier nonlocal transport effects on a short-base npn BJT will be investigated. In the fourth section, influence of the two thermal effects on a submicron NMOSFET will be studied. They will show both effects are important in the advanced devices’ operation, and simultaneous inclusion of both effects in the simulation is necessary for predicting the performance of state- of-the-art semiconductor devices.

11. THE THERMODYNAMIC SYSTEM The complete thermodynamic system includes the solution

for the electrostatic potential, the electron and hole concentra- tion, and the electron, hole and lattice temperatures. The carrier temperature is a representation of the carrier energy. In order to solve for the three additional solution variables, three new semiconductor equations need to be added into the traditional device model. The underlying physics of the thermodynamic system are extended from [7], although in [7] the author discussed only the formulation of self-heating. The complete system basically states two fundamental assumptions: the conservation of charge and energy.

The six semiconductor equations can be written as follows:

-U 0 (€U@) = p = q ( p - n + C )

A

(4) d - (UL) = -V S L - RWL. dt

0018-9383/94$04.00 0 1994 IEEE

2392 IEEE TRANSACTIONS ON ELECTRON DEVICES. VOL. 41, NO. 12, DECEMBER 1994

P

8 a

energy flux and the carrier energy transfer rate among carriers and lattice through scattering and recombination. Equation (4) is the lattice heating equation. UL is the lattice heat, and is usually written as CL .TL where CL denotes the lattice specific heat. Currently, specific heat is assumed to be constant. Further study on this parameter may be required. SL is the heat flux. RWL is the lattice energy transfer rate.

Evaluation of the energy transfer rates among electrons, holes and crystal lattice (Rw,, R1vp7 RM'L) are crucial while solving the thermodynamic equations. For Rwn and Rwp, the physical mechanisms includes energy transfer due to recombination and scattering. The energy transfer pattems for different recombination mechanisms may also be differ- ent. The following equations summarize the energy transfer through recombination for electrons and holes.

io1' Rwn(BBA) = (Ec + TKBTn)Rp(BBA) 3 0.00 0.20 0.40 0.60 0.80 1.00

Depth (p) '

Fig. I. 1-D doping profile of the MOSAIC-I11 bipolar transistor. The peak base doping is about 10" cm-". while the epi-collector concentration is 2

(9)

X10" ' .

Equation (1) is the Poisson's equation, from which the elec- trostatic potential can be obtained from the local charge distribution and the contact applied bias. Energy band infor- mation can be attained from the potential distribution.

E, = E, - qX - q @ . E, = E, - Eg ( 5 ) where E, is the vacuum level of the intrinsic semiconductor, X is the electron affinity, and Eg is the energy bandgap. The reference level is the equilibrium fermi level. The influence of bandgap narrowing is included implicitly in Eg. Equation (2) is the carrier continuity equation, where IC denotes the carrier concentration which can be electron or hole, J n , p is carrier flux, and Rn,p is the carrier recombination rate. If transient trapping is ignored as assumed in FLOODS, R , equals Rp. The energy balance equations are described in (3). Again, x represents the carrier concentration. U, is the intemal energy of the carrier and is the summation of the carrier kinetic and potential energy. Since it has been assumed that the carrier's drift kinetic energy is negligible compared to its thermal kinetic energy, U, can be approximated by ~ . ~ . K B T ~ , ~ - ~ E ~ , , . Use of the carrier intemal energy in the balance equations is different from that usually assumed [8], [ I l l , [14], the carrier kinetic energy alone. It is because that the other systems ignore the possible energy transfer among the carriers and the crystal lattice through recombination mechanisms, in which the carrier potential energy is involved. It can be shown that, by expanding ( 3 ) and substituting Sn,p and R I ~ ( , , ~ ) with their definitions which are shown later, the reference level will disappear from the DC part of the balance equation completely. That is, the definition of the reference level can be arbitrary. 5'n,p and are, respectively, the carrier

A

-

-

where R ~ R H is the SRH recombination rate, and Rn(BBA) and Rp(BBA) are the Auger recombination rate with electron and hole as the third particle, respectively. Impact ionization is the reverse mechanism of Auger recombination, and so can be included in Rc(BB.k). In FLOODS, a carrier-energy dependent, self-consistent impact ionization model [4] is implemented. An extension of this model to field-dependency is also imple- mented [6]. For energy transfer through scattering, models in 181 are used. The models are written as

The suggested values in [8] for rWuno, ~ ~ ~ 1 , ~ ~ ~ 0 , ~ ~ ~ 1 , no, po are used. The overall energy transfer rate for the carriers can be

For the crystal lattice, if without extemal photon excitation, energy has to be conserved, and so R I ~ , + Rwp + RwrL = 0.

The carrier and carrier energy fluxes are derived directly from the Boltzmann transport equation with the relaxation time approximation [6]. Assumptions of parabolic band, small perturbation approximation and negligible drift kinetic energy are made during the derivation. Fermi statistics is used in the actual system, although its influence on the formulation is removed from the following equations for the sake of simplicity. The obtained formulas are

written as Rw(n,p) = cw(n ,p) + R w ( ~ , p ) ( S R H ) f Rw(n,p)(BBA).

LIANG AND LAW: INFLUENCE OF LATTICE SELF-HEATING 2393

I"

0.5 0.6 0.7 0.8 0.9 1.0

v,, (V)

Fig. 2. is 3.0 V.

Gummel plot for MOSAIC-I11 bipolar junction transistor. The I

A

SL = -KLV,-TL (16)

where Dn,p = ( K B T ~ , ~ P , , ~ ) / Y . Kn,, = ( 5 / 2 - a ) . ( P , n ) .

and a is the energy dependence of the relaxation time (i.e., 7 c( E-"). K L is the lattice thermal conductivity, and the model developed by Glassbrenner 1.51 has been implemented in FLOODS as the default model [6]. It can be observed from ( 1 2) and (1 3 ) that the carrier temperature gradient provides an additional driving force to the carriers which is ignored in DD model. It also should be noticed that, instead of local-field dependence, the carrier velocity saturation should be modeled through the carrier temperature dependence of the mobility such that hot carrier nonlocal transport can be modeled properly. In FLOODS, the default mobility model is based on Klaassen's previous work [9], [IO] with some modifications to separate the lattice temperature and carrier energy-dependence components of the model 161.

The dc solution system is close to what were described in [8] and 1111, and is almost identical to the model shown in [ 141 except some approximations made in [ 141 for the energy exchanging terms. The models in [8] and [l 11, however, have no capability to model the energy transfer mechanisms through carrier recombination. The model in [14], on the other hand, seems to lack the ability to describe the possible potential

Pn,, ' K;Trl,p/q* DT,,,) = ( K B T ( n , p ) / Y ) ' P ( n , p ) . (1 - a ) ,

6.Oe-04

5.Oe-04

4.Oe-04

4 3.Oe-04

Y

U H

VBE is 0.8 V c 1.Oe-04

Fig. 3. The simulated and measured IC-\& relation. \'BE is 0.8 V. Full thermodynamic simulations were used to attain the simulation results. Excellent consistency has been achieved.

energy variation in time while simulating transient and AC problems. Whether the transient variation of the potential energy affects the device characteristics is still not clear, and may need further study in fundamental device theory.

111. THERMAL EFFECTS ON BJT The MOSAIC-111 [I21 bipolar transistor was used to study

the lattice self-heating and the hot-carrier transport effect in BJT. The vertical doping profile in the active region of the BJT is shown in Fig. 1. Fig. 2 shows the Gummel plots predicted by the complete thermodynamic device model and by the drift-diffusion model. There is no significant difference in the simulation results, and the discrepancy between the simulation and the measurement may result from the difference in the actual and simulated device structures. Fig. 3 exhibits the measured and simulated 1 c - v ~ ~ relation for V-E equal to 0.8 V. Both self-heating and energy balance are included in the simulations. The simulation results show excellent consistent to the measurement data.

Fig. 4 shows the collector currents predicted with different thermal effects. The applied base-emitter voltage is 0.8 V. Simulation results show that lattice self-heating results in a much larger 1 c - v ~ ~ slope, while the hot carrier effect basically provides a parallel shift of the collector current. The former can be explained by the fact that the intrinsic carrier concentration increases as the lattice temperature rises. It implies a much larger minority carrier concentration in the base, and therefore a higher collector current as joule-heating becomes significant. Since joule-heating is an increasing func- tion of the applied VCE even if the collector current is "saturated," the collector current dependence on VCE will be

2394

5e-04

4 Y

4e-04 c,

a, & 7 U Li 0 c,

a, ri

0 U

3e-04

2e-04

-Energy Balance & Self-Heati g -Self -Heating -Drift-Diffusion W Energy Balance

I t -Energy Balance & Self-Heating mC Self -Heating -Drift-Dif fusion D-OEnergy Balance

1 , l . I . I . I .

0.0 1.0 2.0 3.0 4.0 5.0 6.0 vCE (v)

Fig. 4. InHuence of different thermal effects on the collector current. The \B, is 0.8 V. The lattice self-heating effect increases the slope of the I c 3 - v ~ ~ curve, while the hot-carrier effect reduces the net current How.

IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 41, NO. 12, DECEMBER 1994

larger than what is predicted without joule-heating effect. One thing worth mentioning is, although heating occurs locally, the lattice temperature is practically uniform inside the device due to small size of the BJT. Therefore, it is actually the heat sink capability of the package, interconnect, and substrate determines the degree of self-heating.

Inclusion of carrier energy transport results in positive electron temperature gradient in the base region due to elec- tron heat convection. The temperature gradient provides an additional retarding force to the electron flow. It causes a smaller collector current when the energy balance equations are included in the simulation, as shown in Fig. 4.

Fig. 5 shows the influence of self-heating and hot carrier ef- fect on the base current. As with the collector current, inclusion of the lattice self-heating effect predicts a larger base current dependence on VCE, and the underlying physical mechanism is identical to that of the collector current. Inclusion of the energy balance equations, on the other hand, always results in a higher base current. The reason underlying this difference is the carrier mobility. The holes are cool in the emitter region. Therefore, almost no mobility degradation due to hot carrier should be observed. However, the hole mobility evaluated with the field-dependent model is substantially smaller due to the existence of a large built-in electric field in the emitter. This field, in reality, does not heat up the holes, but is still taken into account in the field-dependent mobility model and results in nonphysical mobility reduction. This is another example of the error caused by a field-dependent mobility model.

Neglect of any of the thermal effects can result in nonnegli- gible error in predicting the device characteristics. Ignoring the self-heating effect causes error in the BJT input transconduc-

4e-06

3.5e-06

3 c, a, 2 3e-06 7 U P)

m m

2. Se-06

2e-06 0.0 1.0 2.0 3.0 4.0 5.0 6.0

VCE (V)

Fig. 5. Influence of different thermal effects on the base current. The self-heating effect increases the slope of IS-\&, and the hotcarrier effect also increases the base current.

tance (912) and the output parameter (VA), as shown in Fig. 6 and Fig. 7. A sign difference even occurs in the predicted g12 as self-heating becomes significant. The characteristics of V , and 912 has been verified by measurements [13]. Error in simulated collector and base current also appears when the hot- carrier effect is ignored. The hot-carrier effect may have even larger influence in the transient behavior of the device. Velocity overshoot, which occurs as a result of the finite electron energy relaxation rate, improves the charging/discharging capability inside the epi-collector region, and therefore reduces the carrier transit time. Without including the hot-carrier effect, the speed of the BJT will be underestimated.

IV. THERMAL EFFECTS ON MOSFET

A submicron NMOS has been used to examine the influ- ence of the self-heating and hot-carrier effect on MOSFET performance. The device structure is exhibited in Fig. 8. The gate oxide thickness is 15 nm, the substrate doping is 1.4 x 1017 cm-3, and the channel length is about 0.6 pm. An LDD structure with doping equal to 10'' cmV3 has been implemented in the device to reduce the impact ionization.

Fig. 9 shows the drain current as a function of the gate voltage. It shows the complete thermal simulation predicts with great consistency to the measurement data for both sub- threshold and strong inversion operation range. Fig. 10 shows the drain currents for various fixed gate voltages. Energy- dependent impact ionization is included in the simulation. Negative resistance is observed in both measurement data and simulation results for the cases of large gate voltage. The only parameter adjusted in the simulations is the extemal thermal resistance, which is required to find the proper boundary condition for the self-heating equation for the MOSFET.

LIANG AND LAW: INFLUENCE OF LAlTICE SELF-HEATING 2395

2e-05

1 .8e -05

1.6e-05

1.4e-05

1 .2e -05

5 le-05 d v

8e-06 t;:

6e-06

4e-06

2e-06

0

-2e-06 Ld ' """ ' "'*"' ' """ ' """ ' """ ' O a J

1 0 - l ~ IO-* io-6 10+ 1 0 ' ~ l o 3

C o l l e c t o r Cur ren t (A/pm)

Fig. 6. The transconductance versus the collector current. The sharp increase of the transconductance is due to the self-heating effect. Results in [ 131 shows the same tendency.

O E n e r g y Ba lance & S e l f - H e a t i n g O D r i f t - D i f f u s i o n

5 0 . 0 6 0 . 0 i

3

C o l l e c t o r Cur ren t (A/pm) Fig. 7. Simulated Early voltage for the cases with and without the thermal equations. Measurement results in [ 131 shows the same decreasing tendency in high current region.

To understand how self-heating and hot-carrier transport affect the 1 0 - v ~ ~ characteristics, a set of simulations were performed under different simulation conditions. Impact ion-

Drain

Fig. 8. The simulated MOSFET structure. The substrate doping is 1.4 x 10" cmP3. The channel length is about 0.6 pm. LDD has been used to reduce the impact ionization effect.

10-2

104

- 10" 4 Y

VI n H

108

10-10 - Ful l -The rma l , V,, = 5 V

.Measurement, VDs = 0 . 0 5 V

0 . 0 1 . 0 2 . 0 3 . 0 4 . 0 5 .0 VGS (v)

Fig. 9. Source-drain current as a function of the gate voltage. The drain-to-source voltage is 0.05 and 5 V. It shows the full thermodynamic simulation exhibits good consistency to the measurement.

ization is tumed off in the simulations. The results are demon- strated in Fig. 11, which shows decrease in the output con- ductance if self-heating is included in the simulation. Fig. 12 shows the output conductance. The thick lines are from DD simulation. The thin lines are from full thermal simulation. For the thick lines, the conductance stays positive which is primarily due to channel modulation. The thin lines, on the other hand, shows that the output conductance decreases as VDS increases, and in some cases even becomes negative. The difference in the output conductance results from self-heating. As lattice temperature rises, the carrier phonon scattering rate will increase which reduces the carrier mobility. The larger VDS is, the higher the lattice temperature and the lower the

2396

0.015

0.010

- 4 Y

0)

H

0.005

0.000

I VGS = 7 v

VGs = 6 V

VCS = 5 v

VGS = 1 v A A A A A A A A T - r T T T T T .

0.0 1.0 2.0 3 . 0 4 . 0 5.0 6.0 7.0

VDS ( v )

Fig. 10. Drain current as a function of the drain to source voltage. Impact ionization is observed, and FLOODS did predict the effect. Furthermore, for high ti;+, negative output conductance is observed and predicted, too. It is believed to result from lattice self-heating.

electron mobility will be. The lattice self-heating effect tends to compensate the channel modulation, and, therefore, reduces the MOSFET output conductance. To make sure it is the lattice temperature-induced mobility degradation that causes the output conductance decrease, self-heating simulations with temperature-independent mobility were performed. As ex- pected, the negative output conductance does not appear. By comparing Fig. 10 and Fig. 11, it seems that heating effect is more significant in Fig. 1 1. It is because that impact ionization tends to compensate the influence of self-heating on the drain current.

Fig. 11 also examines the influence of the hot carrier effect on device performance. It is observed that, for higher gate bias, inclusion of the energy balance equations produce a higher drain current. Since the hot carrier effect couples to the carrier transport equations and complicates the whole solution system, the physical mechanisms underlying this phenomenon are not easy to understand. Some factors may contribute to the larger current. One is the electron energy gradient that tends to widen the channel thickness. Another factor is the occurrence of the electron velocity overshoot. Velocity overshoot will change the mobile charge and electric field distribution in the channel. A dip in the electron concentration will occur near the drain, which causes a higher diffusion current. Field curvature near the drain will be reduced, and the field in the channel becomes slightly higher. Carrier mobility is also higher due to nonlocal transport effect. The net effect is the increase of the drift current. Both effects tend to increase the drain current. For the half micron MOSFET, it seems the increase of the diffusion current is the dominant effect. Other effects may also exist,

IEEE TRANSACTIONS ON ELECTRON DEVICES, 'VOL. 41, NO. 12. DECEMBER 1994

0.012

0.009

- 4 Y

2 0.006 H

0.003

0.000

- Energy Balance & Self-heating &--A Energy Balance 0- Q Self-heating x-x Drift Din usion

0.0 1.0 2.0 3.0 4 . 0 5.0 6.0 7.0

VDS (v) Fig. 11. Influence of the self-heating and the hot carrier effects on source to drain current. It is observed that self-heating reduces the incremental transconductance, while the inclusion of hot carrier effect increases the drain

8e-05

6e-05

4e-05

26-05

Oe+00

- Drift Diffusion

-2e-05 1 .o 3.0 5.0 7.0

vDS (v)

Fig. 12. The incremental channel conductance. The thick lines are results from DD simulation, while the thin lines are from full thermal simulation. Negative output conductance is observed in results of full thermal simulation. Impact ionization is turned off in both simulations.

and it is an interesting subject for further investigation. As in the BJT, velocity overshoot will reduce the carrier transit time through channel. It will also reduce the charge density in the

.. ..

LIANG AND LAW: INFLUENCE OF LATTICE SELF-HEATING 2397

0.35

0.30

0.25 E E 2 0.20 - c c

0-0 Full-Thermal 30.15 .- C H Drift-Diffusion

0.10 E

0.05

0.00 Fig. 14.

into the substrate.

Electron temperature distribution. Electrons are hotter near the 0.0 2.0 4.0 6.0 8.0 10.0 drain-substrate junction and the energy gradient results in a driving force Applied Drain Bias (V)

Fig. 13. the drift-diffusion and energy balance models.

Comparison of MOSFET breakdown characteristics predicted by current but higher base current than the quantity obtained from DD simulation for the BJT, as exhibited in Fig. 4 and Fig. 5.

u~~~~~~~~ saturation7, region of the channel. Both effects imply This implies the DD simulation overestimates the Gummel a faster MOSFET whose speed is usually underestimated by number. For MOSFET, inclusion of hot carrier effect predicts

a higher drain current. It is probably due to the velocity the DD model. illustrates how the nonlocal effect affects the pre- overshoot. For steady state, influence of hot carrier effect is not

dieted MOSFET breakdown characteristics, The impact ioniza- as obvious as lattice self-heating. Its effect, however, should tion mode] [I51 is energy-dependent. For drift-diffusion be more significant in device transient behavior due to the simulations, the model is modified to be local field-dependent carrier [6]. Due to the nonlocal effect, electrons are not as hot as For even smaller devices, the thermal effects on device Per-

ionization rate obtained with energy balance equations is much effects will result in significant error, and full thermodynamic lower than that obtained in the drift-diffusion simulations. This is another influence of the hot-carrier effects.

Fig. 14 shows the electron temperature distribution inside the MOSFET. A s demonstrated, a carrier temperature gradient is developed from drain to substrate, and results in an addi- tional substrate current. Usually, this Current Will dominate the substrate current until impact ionization becomes significant.

Fig.

overshoot.

they may k under quasi-static condition. Therefore, impact formance become more important. Ignorance Of any Of the

necessary.

REFERENCES

[ 11 Robert M. Fox and Sang-Gug Lee, “Scalable small-signal model for BJT self-heating,” IEEE Electron Device Letr., vol. 12, pp. 649-651, 1991.

[2] Mark A. Stettler, Muhammad A. Alam, and Mark Lannstrom, “A crit- ical examination of the assumptions underlying macroscopic transport equations for silicon devices,” IEEE Trans. Electron Devices, vol. 40, pp. 733-740, 1993.

[3] Minchang Liang and Mark E. Law, “An object oriented approach to device simulation-FLOODS,’’ IEEE Trans. Comp.-Aided Design, to be published.

[4] W. Lee et al., “Numerical modeling of advanced semiconductor de- vices,” IBM J . Res. Develop., vol. 36, pp. 208-230, 1992.

[SI C. J. Glasbrenner and G. A. Slack, “Thermal conductivity of silicon and Germanium from 3 K to the melting point,” Phys. Rev., vol. 134, no.

,61 Minchang Liang, thermodynamic system for advanced

V. CONCLUSION this paper, we show the importance of including both

the lattice self-heating and the hot-carrier effect in simulating advanced devices. Lattice self-heating, which was included in power device simulation, is getting significant in scaled semiconductor devices due to the increasing dissipated power density. The rising lattice temperature inside devices will in- crease the minority carrier concentration, and reduce the carrier mobility. For BJT, the net effect will be a fast increasing input transconductance and decreasing ~~~l~ voltage, as displayed in Fig. 6 and Fig. 7. In MOSmT’s, the net effect shows UP as a smaller or even negative incremental channel conductance, as shown in Fig. 12.

Influence of the hot carrier effect is complicated. It will re- sult in nonlocal carrier transport, cause the local charge density

4A, pp. A1058-1069, 1964.

device simulation,” Ph.D. Dissertation, Chap. 4, Aug. 1994. [7] G. K. Wachutka, “Rigorous thermodynamic treatment of heat generation

and conduction in semiconductor device modeling,” IEEE Trans. Comp.- Aided Design,

[8] Robert K. Cook, “Numerical simulation of hot-camer transport in silicon bipolar transistor,” IEEE Trans. E k r r o n Devices, vol. ED-30, pp. 1103-1 110, 1983.

[9] D. B. M. Klaassen, “A unified mobility model for device simulation-I. Model equations and concentration dependence,” Solid-Srate Electron., vol. 35, pp. 953-959, 1992.

[ I O ] D. B. M. Klaassen, “A unified mobility model for device simulation-11. Temperature dependence of carrier mobility and lifetime,” Solid-State E k w m . , Vol. 35, PP. 961-967, 1992.

[ I I] Hsin-Hsiung Ou and Ting-Wei Tang, “Numerical modeling of hot

9, pp, 141-1 149, 1990,

to and thus produces a different local distribution. In carriers in submicrometer silicon BJT’s,” /,TEE Trans. E[ecrron Devices, steady state, the hot carrier simulation shows lower collector vol. ED-34, pp. 1533-1539, 1987.

2398 IEEE TRANSACIIONS ON ELECTRON DEVICES, VOL. 41, NO. 12, DECEMBER 1994

[I21 P. J. Zdebel, R. I. Balda, B. V. Hwang, V. del la Torre, and A. Wagner, “MOSAIC-111-A high performance bipolar technology with advanced self-aligned devices,” Proc. Bipolar Circuits and Technal. Meet., p. 172, 1987.

113) Sang-Gug Lee, “Predictive modeling of high-current output resistance and thermal effects in bipolar junction transistor,” Ph.D. dissertation, Univ. Florida, 1992.

[I41 D. Chen et al . , “Dual energy transport model with coupled lattice and carrier temperatures,” Simulation of semiconductor Devices And Processe.\, vol. 5 , pp. 157-160, 1993.

[l5] E. Scholl and W. Quade, “Effect of impact ionization on hot-carrier energy and momentum relaxation in semiconductor,” J. Phys. Cc Solid- State Phys . , vol. 20, pp. L861, 1987

Minchang Liang received the B.S. degree in elec- trical engineering from the National Chiao-Tung University, Taiwan, in 1986, and the M.S. and Ph.D. degrees in electrical engineering from the University of Florida in 1990 and 1994

From 1986 to 1988 he worked in the computer department of the Missile Manufacturing Center, Taiwan, as part of his military service. He joined the University of Florida in 1988, and has worked as a Research Assistant since late 1989. His research interests include semiconductor device modeling,

hot-carrier effects, submicrometer thermal engineering, and technology CAD tool development.

Mark E. Law (S‘79-Mc8l-SM‘92) received the Ph.D. degree from Stanford University in 1988.

After obtaining his degree, he spent one year at Stanford as a research associate. During this time, he co-authored the SUPREM-IV process simulator and his research focused on the modeling of point defects and dopant diffusion in silicon. He joined the University of Florida as an Assistant Professor in 1988, and was promoted to Associate Professor in 1993. His research interests are in process and device modeling for technology computer aided

design (TCAD). He is a coprincipal investigator in the University of Florida Semiconductor Research Corporation (SRC) program on advanced device modeling and has SRC funded research in the area of IC process modeling. He has written over 50 papers in the area of process and device modeling. He has been working in this field for over ten years as a professor, student, and engineer for Hewlett-Packard. He has served on the technical committees of the Bipolar Circuits and Technology Meeting (BCTM), the International Electron Device Meeting (IEDM), and the Numerical Process and Device Simulation Workshop (NUPAD). He served as guest editor for a special issue of the f E E E Transactions on Computer-Aided Design devoted to the proceedings of NUPAD, and served as the technical program committee chairman for the 1994 NUPAD. He also worked on the Semiconductor Industrial Association roadmap for TCAD.

Dr. Law is a member of the Electrochemical Society, American Physical Society, American Society for Engineering Education, Phi Kappa Phi, Tau Beta Pi, Eta Kappa Nu, and Sigma Xi. In 1992, he was named a National Science Foundation Presidential Faculty Fellow and earlier he had won an IBM young investigator award. SRC has further recognized his research in TCAD by awarding his research group the Technical Excellence Award. Iowa State University named him an outstanding young alumnus for 1994.