56
Diplomarbeit Integrated 2.45 GHz Power Amplifier Ausgef¨ uhrt zum Zwecke der Erlangung des akademischen Grades eines Diplom-Ingenieurs unter Leitung von Werner Simb¨ urger und Arpad L. Scholtz E389 Institut f¨ ur Nachrichtentechnik und Hochfrequenztechnik eingereicht an der Technischen Universit¨at Wien Fakult¨ at f¨ ur Elektrotechnik von Winfried Bakalski 9527233 Metzstr.26 , D-86316 Friedberg Friedberg, im September 2001

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Page 1: Integrated 2.45GHz Power Amplifiercc.ee.nchu.edu.tw/~aiclab/public_htm/Wireless/Theses/... · 2007-09-06 · 2.5 pF 4.4 pF T3 193.44 mm2 T4 193.44 mm2 T1 48.36 mm2 T2 48.36 mm2 D1

Diplomarbeit

Integrated 2.45 GHzPower Amplifier

Ausgefuhrt zum Zwecke der Erlangung des akademischen Grades eines

Diplom-Ingenieurs unter Leitung von

Werner Simburger und Arpad L. Scholtz

E389

Institut fur Nachrichtentechnik und Hochfrequenztechnik

eingereicht an der Technischen Universitat Wien

Fakultat fur Elektrotechnik

von

Winfried Bakalski

9527233Metzstr.26 , D-86316 Friedberg

Friedberg, im September 2001

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Contents

1 Introduction 1

2 Integrated 2.45 GHz power amplifier 2

3 Optimum load impedance 53.1 Load-pull measurement test-board . . . . . . . . . . . . . . . . . . 53.2 Load-pull measurement setup . . . . . . . . . . . . . . . . . . . . 73.3 Measurement Results . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.3.1 Optimum load impedance . . . . . . . . . . . . . . . . . . 123.3.2 Power transfer characteristics . . . . . . . . . . . . . . . . 153.3.3 Input matching . . . . . . . . . . . . . . . . . . . . . . . . 19

4 Output matching network 224.1 Lumped LC-balun . . . . . . . . . . . . . . . . . . . . . . . . . . 224.2 Dual band LC-balun . . . . . . . . . . . . . . . . . . . . . . . . . 224.3 Microstrip line balun . . . . . . . . . . . . . . . . . . . . . . . . . 24

4.3.1 Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 274.3.2 Radial stubs . . . . . . . . . . . . . . . . . . . . . . . . . . 35

4.4 Power amplifier module with microstrip line balun . . . . . . . . . 384.5 Measurement results . . . . . . . . . . . . . . . . . . . . . . . . . 40

Conclusion 47

Bibliography 50

i

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Abstract

Aim of this work was to design a compact output balun network for push-pull type RF power amplifiers. A monolithic integrated 1V - 3V, 2.45GHz poweramplifier in Si-bipolar (B6HF) with up to 29 dBm output power was characterizedby load-pull measurements. With this result a new partly distributed balun wasdeveloped, based on a lumped Lattice-type balun. This new balun uses microstripline elements and requires only one lumped capacitor for its realization.

To demonstrate the performance of the designed balun, a 2.45 GHz poweramplifier module was realized. The module was characterized and shows excellentresults. At 1 V/ 2.4V / 3V the maximum output power is 21.3 dBm/ 27.5 dBm/29.1 dBm at 2.45GHz and 10 dBm input power. The maximum PAE is 46%. Thesmall signal gain is 37 dB.

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List of Abbreviations

AC Alternating CurrentB6HF Infineon silicon bipolar technology with fT = 25GHzBICMOS Bipolar Complementary Metal Oxide SemiconductorC Capacity in [F]CW Constant Wave (= constant frequency)DC Direct Currentεr Relative permittivityESD Electrostatic Sensitive Devicef Frequency [Hz]fOp Operation frequency in [Hz]fT Transit frequency in [Hz]IC Integrated CircuitISM Industrial Scientific MedicalL Inductance in [H]λ Wavelength in [m]n Turn ratioN Number of turnsµ Permeability in [Vs/Am]MOS Metal Oxide SemiconductorPAE Power Added EfficiencyPCB P rinted Circuit BoardRF Radio F requencyρ Reflection coefficientSMA SubM iniatur A : Standard RF connector up to 18 GHzSMD Surface Mounted DeviceVSWR V oltage Standing Wave Ratioω angular frequencyZ complex impedance in [Ω]

i

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Chapter 1

Introduction

A RF power amplifier is required in every wireless system. However there areseveral ways to design such a power amplifier depending on the requirements. Inthis thesis, a power amplifier for mobile applications such as Bluetooth and ISMis characterized including a new balun design for output matching.

The aim was to design a compact balun using as few lumped elements as possible.As lumped microwave elements are expensive, the cost is reduced in a significantway, especially for mass production.

In chapter 2 the integrated power amplifier chip is presented by its circuit designand layout. The load-pull characterization needed for the design of the outputmatching network is presented in chapter 3. A load-pull measurement setup hasbeen constructed and the optimum load impedance was evaluated. Power transfercharacteristics, frequency response, the small signal gain and the input reflectioncoefficient were measured.

Chapter 4 shows the design and the realization of a power amplifier module usinga new balun that has been developed based on a lumped LC-balun. The designof the compact output balun is described in detail. A complete characterizationof the power amplifier module was done using the designed output matchingnetwork.

1

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Chapter 2

Integrated 2.45 GHz poweramplifier

In this work a monolithic Si-bipolar integrated power amplifier circuit designedat Infineon Corporate Research was used [Simburger 01]. It has been realizedin a standard 25GHz fT BICMOS production technology B6HF from InfineonTechnologies [Klose, H. 93]. The power amplifier described here is a 2-stage push-pull type power amplifier for the 2.45GHz ISM band.

The push-pull configuration (Fig. 2.1) was invented in the early days of the elec-tron tube circuitry and was adapted to the semiconductor era with its benefits.There appears a 4:1 load-line impedance benefit for a push-pull combining schemein an equal-power comparison to a single-ended design. The basic types of poweramplifiers and their bias requirements and class of operation can be found in[Trost 97]. A push-pull power amplifier can be designed for low voltage operationand high output power. So for battery usage no efficiency cutting DC/DC con-verter to get higher supply voltages is needed. A disadvantage of the push-pullamplifiers is the need of an output balun, if an asymmetric load is attached. Es-pecially the design of this balun is a limiting factor for the overall performance asthe optimum load impedance must be known. The wrong load impedance will lead

InputNetwork+BIAS

OutputNetwork+PowerSupply

InputOutput

VCC

ZL

T1

T2

Balun

Figure 2.1: Schematic diagram of a push-pull amplifier.

2

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CHAPTER2. INTEGRATED 2.45 GHZ POWER AMPLIFIER 3

into lowered output power and PAE or even destruction of the circuit. [Heinz 99]has shown that also a asymmetric load will cause heavy output power loss.

Some special features of this design are based on the use of on-chip transformersin the input and driver stage. The design procedure and basics of on-chip trans-formers can be found in [Kehrer 00] and [Kehrer 01]. The amplifier has a balancedoutput. There is no output balun integrated. The output balun was realized as amicrostrip line balun described in chapter 4.

The schematic of the power amplifier Fig. 2.2 can be divided into three parts, theinput stage the driver stage and the output stage.

Substrate

RFIN+

RFIN-

VCCD

VEED E

PBGDBG

VEE

PB RFOUT+

RFOUT-

DB

X1N=3:2

X2N=4:1

R2

30 WR1

30 W4.4 pF 2.5

pF

2.5

pF4.4 pF

T3

193.44 mm 2

T4

193.44 mm 2

T1

48.36 mm 2

T2

48.36 mm 2

D1

48.36 mm 2 D2

48.36 mm 2

Emitter Window

b = 0.8

l = 40.7 m

A =16.12

E

Em

E,eff

m

m

m

m2

InputMatchingNetwork

Driver Stage Output Stage

Figure 2.2: Schematic diagram of the power amplifier ISM3A.

• Input matching network: The input matching network consists of an in-put transformer X1 and two 4.4 pF capacitors connected in antiseries. Thetransformer acts as balun as well as input matching network. There areseveral outstanding advantages due to the transformer:

– The DC isolation: A DC-block capacitor at the input is not necessary.There are no restrictions to the external DC potential at the inputterminals.

– ESD: The electrostatic sensitive device requirements are relaxed.

– Optional balanced or unbalanced input: Connecting one port to groundthe input will be unbalanced, otherwise balanced.

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CHAPTER2. INTEGRATED 2.45 GHZ POWER AMPLIFIER 4

RF

-OU

T-

RF

-OU

T+

GN

DR

FIN

+R

FIN

- PB

G

DB

G

VCCD

VEED

E

E

PBTEST

PIN

TEST

PINDB

Figure 2.3: Photograph of the power amplifier ISM3A. The chip size is 1500 x950 µm2.

– Input matching: The input impedance of the driver stage is trans-formed to about 50Ω if the input signal is connected single-ended.

• Driver stage:

The driver stage consists of T1 and T2 with 48 µm2 effective emitter areaeach. The DC bias operating current of the driver stage is controlled by usingthe diode D1 connected to the secondary center tap of the input transformerX1. The bias operating current is controlled by the DB-pad of the chip. D1was realized by a transistor connected as a current mirror diode with aneffective emitter area of 48 µm2. The interstage power transformer X2 hasbeen connected as a parallel resonant device using two anti-series MOScapacitors of 2.5 pF. They are connected parallel to the primary winding ofX2. The used turn-ratio of X2 is n = 4:1. The transistors T1 and T2 arebiased via the center tap of the secondary winding of X2.

• Output stage:

The output stage is very similar to the input stage, except that the effec-tive emitter area is two times 193 µm2. The bias operating current of theoutput stage is controlled by D2, which has the same transistor structureand emitter area as the driver stage. The power supply has to be feed byexternal matching network. The output power is delivered by the balancedoutput pins RFOUT+ and RFOUT-.

A chip photograph can be seen in Fig. 2.3.

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Chapter 3

Optimum load impedance

Achieving the best performance of the power amplifier requires the right loadimpedance at the output. For small-signal amplifiers power matching is the bestway. In this case the load is dimensioned exactly conjugate complex to theimpedance of the amplifier circuit. This strategy warrants the maximum outputpower [Gonzales 84].

A power amplifier in most cases does not work in the linear range. The nonlinearity makes the system time variant. Thus, the linear power matching methodis not correct. In fact, [Sokal, N. O 75], [Jochen 95] and [El-Hamamsy 94] showedthat the maximum output power for nonlinear power amplifiers is maximized, ifa certain load impedance is attached for the fundamental frequency, the secondand the third harmonic frequency. For the second harmonic frequency the loadshould behave near to a short circuit, while for the third harmonic frequency anopen circuit is desired.

The real part of the load for the fundamental frequency depends mainly on thepower supply voltage and the desired power output while the imaginary part iscaused by parasitic substrate and transistor capacities, not to forget the induc-tances of the bonding wires and interconnections.

3.1 Load-pull measurement test-board

To evaluate the optimum load impedance, a microwave substrate was designedfor the power amplifier. The substrate material is a Rogers RO4003 with a thick-ness of 810µm and an εr of 3.38 and tan δ =0.0027 at 10GHz. The chip wasattached on the board using a silver epoxy adhesive and bonded on the trans-mission lines. The design contains two λ/4 - transformers with radial stubs forthe power supply at the output transistors of the chip (Fig. 3.1). In addition sur-face mounted capacitors were soldered for RF-blocking on the supply lines. ADC-block capacitor connected in series to the RF output is necessary to pre-vent a DC current to the following measurement or functional components. The

5

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CHAPTER3. OPTIMUM LOAD IMPEDANCE 6

50

Micro

strip

W

50

Microstrip

W

50 MicrostripW VCC

VCC

VCC

RFO+

VCCD

DB

EB

VEE

RFI

RFO-

l/4Transform

er

l/4

Tran

sfor

mer

OUTPUT 1(to Loadpull Setup)

OUTPUT 2(to Loadpull Setup)

INPUT

Driver StageBias Control

ISM3A 2.45 GHzPower Amplifier

Output StageBias Control

AVX ACCU-P06035J120GBT12 pF

Referenceplane

Referenceplane AVX ACCU-P

06035J120GBT12 pF

Figure 3.1: Schematic diagram of the load-pull test-board.

transmission-lines were designed as 50Ω lines by the width of 1.87mm. At theSMA connectors the linewidth was decreased to prevent impedance discontinu-ities in Z0 [Veijsilovic 99]. The PCB is shown in Fig. 3.2 and the complete poweramplifier test-board is shown in Fig. 3.3.

Figure 3.2: Load-pull test-board. PCB size: 49mm x 74mm

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CHAPTER3. OPTIMUM LOAD IMPEDANCE 7

Figure 3.3: Photograph of the load-pull amplifier test-board. PCB size: 49mm x74mm

3.2 Load-pull measurement setup

The load-pull measurement setup for a balanced output amplifier requires twoseparate impedance tuner for each output. Each impedance tuner represents theload for one output collector. Fig. 3.4 shows a block diagram of the measurementsetup.

Z (t)OUT

Z (t)OUT

Power amplifier Power-

Meter

Power-

Meter

Matching Network

Matching Network

Figure 3.4: Measurement setup with matching networks for manual tuning.

The matching networks in Fig. 3.4 are two slide screw tuners of the same kind.

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CHAPTER3. OPTIMUM LOAD IMPEDANCE 8

Tab. 3.1 gives a performance summary of the slide screw tuner type Maury Mod.8045 (Fig. 3.5).

227 mm

Figure 3.5: The Maury 8045 slide-screw tuner.

Frequency Range [GHz] 0.8 - 8GHzMinimum Matching 0.8 - 2.5GHz 2.5 - 8 GHzRange 25:1 18:1Connector Model 3.5mmPower Handling CW : 25W Peak 0.25 kW

Table 3.1: Specification of the Maury 8045 slide screw tuner.

A slide screw tuner allows to adjust the imaginary part of the load-line impedanceby moving the slider and to adjust the real part by two micrometer screws (coarseand fine). The slide screw tuner consist of a 50Ω coaxial transmission line slitted

C

x

50 W

Z = 50 WL

ZIN

Figure 3.6: Simple electrical equivalent model of a slide screw tuner.

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CHAPTER3. OPTIMUM LOAD IMPEDANCE 9

5

6

7

8

XC

Z :IN

Figure 3.7: Input impedance of the slide screw tuner shown in Fig. 3.6.

on the upper side, toward the slider and the bottom side. On the upper side ametal block connected to ground is fixed on the micrometer screws. This allowsto adjust the distance between the center conductor and the shielding at theactual position. Fig. 3.6 shows the electrical substitute model. X describes theactual position, and therewith the phase. As the measurement is done for a shortwavelength compared to the outer size of the slitted transmission line, there areseveral positions with the same imaginary part. Turning the micrometer screwschanges the capacity C in the slide screw tuner. Fig. 3.7 shows the effect of movingthe slider in its imaginary part X and turning the micrometer screw for changingof the real part. Turning the metal block near to the transmission line will givea low impedance, the measured plot will be near to the outer line of the smithchart.

To verify the impedance adjusted by the slide screw tuners, it is necessary to use anetwork analyzer. The calibration was done using a standard HP calibration kit.Afterwards a short-circuit soldered SMA connector was connected to each port ofthe analyzer to remove the electrical delay part of the connector. The electricaldelay was entered manually at the network analyzer. To perform a measurementat the output reference plane of the amplifier circuit, two reference plane PCBs(Fig. 3.8) were connected directly to the slide screw tuners. The reference planePCBs were manufactured by cutting a test-board PCB at the power amplifieroutput reference plane.

The use of a network analyzer as a load line impedance display requires RFswitches. This was done by the use of two coaxial relays. To prevent a destructionof the power amplifier due to output mismatch, a protection circuit was added tothe power supply: When switching to the network analyzer, the power supply isset to power-down by disabling the trigger signal. This is done using the relays

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CHAPTER3. OPTIMUM LOAD IMPEDANCE 10

Reference

Plane

Figure 3.8: Calibration PCB to move the reference plane.

power supply at the input of an AND-gate. The other input port is connected tothe trigger signal for the power supply. So only for the power-on mode a triggersignal is available for the power supply circuitry.

The measurement configuration is shown in Fig. 3.9. It is a modfied version de-scribed by [Heinz 99]. For the whole measurement the output of the tuners wereconnected directly to a 50Ω load, as the slide screw tuner output does not deliver50Ω at the output securely. A hybrid with its 0 and 180 input ports was not usedfor possibility of hybrid mismatch. To get rid of this problem those two ports wereattached at a two port power meter with defined 50 Ω loads. To check the am-plifier for extreme distortion or oscillations, a spectrum analyzer was connectedadditionally. To maximize the output power, both power levels have to be added.As the optimum output power was only achieved by symmetric output matchingimpedances the power output level result was simply one port + 3 dB. This offsetis also used for the calculation of the power added efficiency and the collectoroutput power efficiency. The impedances measured by the network analyser rep-resent the load per collector. Another definition for the balanced impedance is theload between the two conductors. The measured impedances have to be doubledto get the right correlation to the balanced impedance definition.

There were two ways of tuning: Stepping through a grid of impedances or just bymaximizing the output power manually. In the following charts the impedancemesh is presented, but afterwards the maximized area has been used to find theexact maximum by a manual tune. The result of the manual is sketched in thecharts.

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CHAPTER3. OPTIMUM LOAD IMPEDANCE 11

TO

PO

WE

R-

ME

TE

R

LO

AD

= 5

0W

Po

we

r-o

n&

Tu

ne

/P

ow

er-

off&

Ne

two

rkA

na

lyse

r re

ad

Po

we

r-o

n /

Po

we

r-o

ff

Po

we

r-o

n e

na

ble

ou

tpu

t

To

Ne

two

rkA

na

lyse

r S

11

INP

UT

To

Ne

two

rkA

na

lyse

r S

22

Re

lay-s

witch

po

we

r su

pp

lyP

ow

er

Am

plif

ier

Te

st

Bo

ard

Lo

ad

-Pu

llT

un

er

RF

-Re

lays

Figure 3.9: Load pull measurement setup.

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CHAPTER3. OPTIMUM LOAD IMPEDANCE 12

Input Power: 10 dBm f = 2.45 GHz Supply Voltage: 2.4 V

RF off currents: Driver stage: 2 x 20 mA Output stage 2 x 90 mAop

Im[Z] [j ]WRe[Z] [ ]W

PAE = 38.5 % / Pout = 26.6 dBm

Z = 13 - j2L,OPT W

Figure 3.10: Measured power added efficiency (PAE) versus the load impedanceat each RF output.

3.3 Measurement Results

3.3.1 Optimum load impedance

Fig. 3.10 to Fig. 3.15 show the results of the load-pull measurement. As the poweramplifier is designed to operate at a supply voltage of 2V to 2.4V (two bat-tery cells in mobile applications), the matching procedure was optimized for thissupply voltage range, even if the maximum output power is reached at a supplyvoltage of 3 V. The measurement was done by 2Ω real and imaginary steps. Theoptimum impedance is evaluated to be 13 - j2 Ω at 2.4 V and fOP =2.45GHz.

The plots for the real value of the load impedance are shown in Fig. 3.13 toFig. 3.15. The maximum at the plots is rather flat, but for lower impedancesthe output power goes down rapidly. Too low impedances cause high transistorcurrents and that leads to a decreasing transit frequency fT as the saturation

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CHAPTER3. OPTIMUM LOAD IMPEDANCE 13

Input Power: 10 dBm f = 2.45 GHz Supply Voltage: 2.4 V

RF off currents: Driver stage: 2 x 20 mA Output stage 2 x 90 mAop

Im[Z] [j ]WRe[Z] [ ]W

Z = 13 - j2L,OPT W

CAE = 51 %

Figure 3.11: Measured collector output efficiency versus load impedance.

voltage VCE,sat increases. As well, high output impedances reduce the outputpower, as the output current decreases and the voltage amplitude stays constant.

It’s important to mention that too low impedances lower than 4Ω can causedamage on the output transistors, as the current rises too high for the outputtransistors. Higher output power could be reached by higher supply voltages asthe RF output voltage amplitude is higher.

Fig. 3.11 shows the collector output efficiency. As it is very high, this indicatesthat the output stage circuit works quite effective.

Fig. 3.12 shows the output power versus the collector load impedance. It differsfrom the PAE curve in that way, as the output power maximum is not identicalto the PAE maximum. In this application, this is not a problem, because thePAE maximum is not far away from the output maximum. So the output powermaximum as criteria for the maximum was taken, as it is measurable with ahigher accuracy than than the PAE. The PAE depends on the output powerand the power supply voltages and currents. The reason for a the output power

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CHAPTER3. OPTIMUM LOAD IMPEDANCE 14

Input Power: 10 dBm f = 2.45 GHz Supply Voltage: 2.4 V

RF off currents: Driver stage: 2 x 20 mA Output stage 2 x 90 mAop

Im[Z] [j ]WRe[Z] [ ]W

Z = 13 - j2L,OPT W

Pout = 26.6 dBm / PAE = 38.5%

Figure 3.12: Measured output Power versus load impedance.

maximum at a lower impedance is, that the output currents still increase forthe lower impedance. But PAE decreases, as the power consumption inrcreasesfaster than the the increase of the output power. Tab. 3.2 shows the performancesummary of the power amplifier using the load-pull measurement setup.

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CHAPTER3. OPTIMUM LOAD IMPEDANCE 15

Operating frequency 2.3GHz – 2.6GHzSupply voltage 1.2V – 3 VSmall-signal gain 30 dB(2.45GHz, Vcc=2.4V)Input VSWR ≤ 2(2.45GHz, Pin=10 dBm)Chip size 1.5mm × 0.95mmTechnology B6HF, Si bipolar 0.8µm, fT =25GHz

Supply voltage 1.2 1.5 2.0 2.4 3.0 V

Maximum output power 138 219 407 589 794 mWat 2.45 GHz and Pin=10 dBm (21.3) (23.5) (26.1) (27.5) (29) (dBm)Power-added efficiencyat 2.45 GHz Pin=10 dBm 31 32 37 38 40 %Output-Stage collector efficiencyat 2.45 GHz and Pin=10 dBm 32 35 39 39 41 %

Optimum load impedanceper collector 13 - j4 13 - j2 13 - j2 13 - j1.4 13 - j1 Ω(f=2.45GHz; Pin=10 dBm)Output stage collector current 2 x 135 2 x 215 2 x 215 2 x 245 2 x 275 mA(RF on)Output stage collector current 2 x 94 2 x 98 2 x 100 2 x 100 2 x 100 mA(RF off)Driver stage current (RF on) 2 x 47 2 x 49 2 x 52 2 x 58 2 x 60 mADriver stage current (RF off) 2 x 10 2 x 10 2 x 11 2 x 12 2 x 12.5 mABias-current (driver stage) 9 9 9 9 9 mABias-current (output stage) 25 25 25 25 25 mA

Table 3.2: Load-pull measurement performance summary (T=300 K, 12.5% dutycycle, 0.577ms pulse width, input reflection coefficient measurement with 1.5mspulse width).

3.3.2 Power transfer characteristics

From the power characteristic the saturated output power, the 1 dB compression,as well as the small-signal gain of the amplifier is evaluated. If this is done forseveral power supply voltages, one can see that the compression point may bereached earlier or later and that the small-signal gain is limited by a too lowsupply voltage or a total saturation of the transistors. Fig. 3.16 shows the powercharacteristic for three voltages: 1.2 V (if one battery cell is used); 2.4V (twocells) and 3V (the specified maximum operation voltage for which the chip wasdesigned). The PAE versus input power is shown in Fig. 3.17. The maximum PAEis about 40%

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CHAPTER3. OPTIMUM LOAD IMPEDANCE 16

8 10 12 14 16 1834.5

35

35.5

36

36.5

37

37.5

38

38.5

39P

ower

add

ed e

ffici

ency

[%]

Re[Z] [Ω]

Input Power: 10dBm fOP

= 2.45 GHz Supply Voltage: 2.4 V RF off currents: Driver stage: 2 x 20 mA Output stage: 2 x 90 mA

Im[Z] = 0 Ω

Figure 3.13: Measured power added efficiency versus real part of the loadimpedance.

8 10 12 14 16 1845

46

47

48

49

50

51

52

colle

ctor

effi

cien

cy [%

]

Re[Z] [Ω]

Input Power: 10dBm fOP

= 2.45 GHz Supply Voltage: 2.4 V RF off currents: Driver stage: 2 x 20 mA Output stage: 2 x 90 mA

Im[Z] = 0 Ω

Figure 3.14: Measured collector efficiency versus real part of the load impedance.

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CHAPTER3. OPTIMUM LOAD IMPEDANCE 17

8 10 12 14 16 1825

25.5

26

26.5

27

27.5

28O

utpu

t Pow

er [d

Bm

]

Re[Z] [Ω]

Input Power: 10dBm fOP

= 2.45 GHz Supply Voltage: 2.4 V RF off currents: Driver stage: 2 x 20 mA Output stage: 2 x 90 mA

Im[Z] = 0 Ω

Figure 3.15: Measured output power versus real part of the load impedance.

−30 −25 −20 −15 −10 −5 0 5 10−5

0

5

10

15

20

25

30

Out

put P

ower

[dB

m]

Input Power [dBm]

fOP

= 2.45 GHz ZL= 13 − j2 Ω RF−off currents: Driver stage: 2 x 12 mA Output stage: 2 x 100 mA

3V2.4V1.2V

Figure 3.16: Measured power transfer characteristic.

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CHAPTER3. OPTIMUM LOAD IMPEDANCE 18

−30 −25 −20 −15 −10 −5 0 5 100

5

10

15

20

25

30

35

40

45P

AE

[%]

Input Power [dBm]

fOP

= 2.45 GHz ZL= 13 − j2 Ω RF−off currents: Driver stage: 2 x 12 mA Output stage: 2 x 100 mA

3V2.4V1.2V

Figure 3.17: Measured power added efficiency (PAE) versus input power

In Tab. 3.2 the typical usage parameters of the power amplifier are shown. It hasto be mentioned, that also other biases can be selected to have more PAE oroutput power. It is well possible to achieve PAE values up to 44 %. For exampleat 2.9V power-supply voltage with RF off currents of 2 x 6mA for the driver stageand 2 x 75mA for the output stage, an output power of 28.1 dBm is achieved witha PAE of 43.5%. The small-signal gain is maximum 31 dB at 2.4V power supplyvoltage, for higher voltages it decreases, as well as for lower ones. E.g. for 3V thegain is 30 dB. The absolute maximum power achieved is 29.1 dBm at 3V with2 x 120mA RF off currents for the output collectors and 2 x 13mA for the driverstage. As can be seen in Tab. 3.2 the optimum output load is about 13 Ω witha little imaginary part. This can be verified in the 3-dimensional plots as it liesdirectly between the 12 and 14 Ω grid.

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CHAPTER3. OPTIMUM LOAD IMPEDANCE 19

Ch.1 Ch.2

V1 V2 V3 V4

HP8753E

Zopt

Zopt

Pulsed Power Supply

Network Analyser

Reference Plane

Figure 3.18: Input impedance measurement configuration using a network ana-lyzer in pulsed mode operation.

3.3.3 Input matching

For the stages in front of the power amplifier, it is necessary to have a defined loadof 50Ω. The deviation from that value depends mainly on the input matchingnetwork of the power amplifier. In addition the load impedance of the poweramplifier input depends on the input power, but there are two interesting statesthat happen during the operation: Power-on and power-down. While power-downis easily determined by just attaching the power amplifier without a power supplyto a network analyzer, power on requires triggering to the pulsed operation of thepower amplifier. The configuration of the measurement can be symbolically seenin Fig. 3.18.

The use of 577 ms long power-on pulses caused problems with the visualization ofthe used network analyzer. It was necessary to change the power-on time of theamplifier to a length, so that the network analyzer with its measuring time of 250µs could get a time window that has enough length. To prevent the destructiondue to thermal overload, the repetition time is increased by the same factor. Inthis case the power-on time was set to 1.5ms and the repetition frequency to33.3Hz. To distinguish between power-on and power-down, the network analyzerwas set to a constant frequency (CW-Mode) to record the change of the reflectionfactor ρ. On the screen of the network analyzer the areas of power-on and power-down could be distinguished easily, as the power-down mode is nine times longer.The problem of calibrating for every little frequency step was solved by the use of

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CHAPTER3. OPTIMUM LOAD IMPEDANCE 20

VSWR = 2

Figure 3.19: Measured input reflection coefficient S11.

a Matlab-routine doing the calibration afterwards. This was done by a calibrationrun with a short-circuit, an open-circuit and a 50 Ω load for the same frequenciesas in the measurement. To warrant the use of right reference plane, a PCB was cutdirectly at the pad of the chip. With a short circuit soldering, the electrical delaywas calibrated into the Matlab routine. While the measurement has been made,the outputs of the load-pull test PCB were loaded with Zopt = 13 - j2Ω. Thisvalue was taken from the output matching using the slide screw tuners (Section3.3.1).

As a result one can see Fig. 3.19 and Fig. 3.20. The amplifier satisfies theVSWR< 2. The VSWR=2 implies that the S11 is -9.54 dB. That is in the fre-quency range from 2.2 GHz to 2.5GHz, the operating frequency spectrum of theISM3A power amplifier chip. A look at the smith-chart shows that the amplifier isin the capacity area, and in operating mode very close to the real valued axis. Asthe input reflection condition (the VSWR) is satisfied, no further input matchingwas necessary. The input impedance is 37-j3Ω at 2.45GHz in the power-on modeand 64 - j20Ω for the power-down mode.

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CHAPTER3. OPTIMUM LOAD IMPEDANCE 21

Input Power: 10dBm Supply Voltage: 2.4V Driver bias current: 13 mA Output bias current: 20mA

RF off currents: Driver stage: 2 x 20 mA Output stage: 2 x 90 mA

Powerdown modef=2.44GHzPoweron mode

64 - j20 W37 - j3 W

Figure 3.20: Measured complex input reflection coefficient S11 sketched in thesmith-chart.

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Chapter 4

Output matching network

4.1 Lumped LC-balun

Fig. 4.1 shows a lumped LC-balun, which was originally used as an antenna balun[Cripps 99, Krischke 95, Vizmuller 95]. It is also known as the Lattice-type balun[Johnson, Ric 84]. The bridge-type circuit consists of two inductors L1 = L2 andtwo capacitors C1 = C2. A RF-choke coil and a DC-block capacitor are used tofeed the supply voltage.

R1 is the balanced input impedance of the bridge. Each collector is loaded byR1/2. RL is the load resistor, 50 Ω usually. L and C can be calculated by

L1 = L2 =Z1

ω1

(4.1)

C1 = C2 =1

ω1Z1

(4.2)

where Z1 =√

R1 ·RL is the characteristic impedance of the bridge-type circuit.ω1 = 2πf1 is the frequency of operation. R1 and Z1 are assumed to be real valued.If R1 should be complex valued, matching is possible, but then the bridge becomesmore or less imbalanced (C1 6= C2 and L1 6= L2). Further, at the harmonicfrequencies the balun becomes also imbalanced.

4.2 Dual band LC-balun

For dual band applications an extension can be made: If the inductors are re-placed by a parallel resonant circuit and the capacitors are replaced by a seriesresonant circuit in Fig. 4.1, then a lumped dual-band LC-balun, shown in Fig. 4.2,is available. The circuit provides a balanced input impedance R1 at ω1 = 2πf1

and R2 at ω2 = 2πf2. Independent matching and balun conversion at two different

22

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CHAPTER4. OUTPUT MATCHING NETWORK 23

VCC

L1

RFchoke coil

C1

L2

DC-block

DC-block

Push-PullOutput Stage

RL

C2

R1

1ww =

Figure 4.1: Lumped LC-balun network.

frequencies can be done. LS, CS, LP and CP can be calculated by

LS =ω1 · Z1 + ω2 · Z2

ω22 − ω2

1

(4.3)

CS =ω2

ω1− ω1

ω2

ω1 · Z2 + ω2 · Z1

(4.4)

LP =

(ω2

ω1− ω1

ω2

)· Z1 · Z2

ω1 · Z1 + ω2 · Z2

(4.5)

CP =ω1 · Z2 + ω2 · Z1

(ω22 − ω2

1) · Z1 · Z2

(4.6)

where Z1 =√

R1 ·RL and Z2 =√

R2 ·RL are the characteristic impedances ofthe bridge at ω1 and ω2. R1, R2, Z1 and Z2 are assumed to be real valued. Note,that

ω2 > ω1 (4.7)

is a must, using the design equations above.

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CHAPTER4. OUTPUT MATCHING NETWORK 24

LP

LP

LS

LS

RFChoke coil

CS

CP

CP

DC-block

DC-block

Push-PullOutput Stage

RL

CS

Vcc

R1

R2

1ww =

2ww =

Figure 4.2: Dual-band lumped LC-balun.

4.3 Microstrip line balun

A distributed balun can be derived from the lumped LC-balun in Fig. 4.1 bysubstituting the lumped components with transmission lines. The microstrip linebalun in Fig. 4.3 is derived by the lumped LC-balun in this way.

The balun presented here uses transmission lines as substitutes for three lumpedcomponents. There are several advantages of this solution:

• The transmission lines are used as DC power supply feeding as well.

• The amount of lumped elements is reduced to a DC-block capacitor andjust one capacitor for the balun bridge. This is a significant advantage inmass production use.

• The layout is much smaller compared to other microstrip balun structuressuch as the single-layer microwave balun proposed by [Raicu 98].

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CHAPTER4. OUTPUT MATCHING NETWORK 25

DC-block

BALANCED

INPUT

radial stub

OUTPUT

L1

l/4-transformer

L2

C2

C2

VCC

10 mm

e

mr= 3.38

h= 510 m

Figure 4.3: Layout of the 2.45 GHz microstrip line balun.

In addition to the standard microstrip equations such as the Hammerstad [Hammerstad 75]formulas, there are five equations used to substitute the lumped elements of thelumped LC-balun [Mongia, R. 99]:

1. Bulk wavelength λ: For the calculation of the transmission line lengths it isnecessary to know the wavelength. It is determined by

λ =1

fOP√

εr,effε0µ0

(4.8)

with εr,eff as the effective permittivity of the substrate, ε0 as the permittiv-ity constant, µ0 as the permeability constant and fOP for the used opera-tion frequency. For the estimation of start up values for the simulation, it isenough to calculate with the relative permittivity εr, the calculated lengthwill be a bit shorter than the real length. See [Bonek, Ernst 00] for furtherdetails on calculating εr,eff .

2. Lumped Inductance replaced by a transmission Line: (Fig. 4.4)

An inductance can be replaced by a microstrip transmission line. Its induc-tance is defined by the length and the width of the distributed element. The

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CHAPTER4. OUTPUT MATCHING NETWORK 26

Z0Lz

q

lumped inductivity transmission line

Figure 4.4: Substitution of a lumped inductance by a transmission line.

width represents the transmission line impedance Z0. For a given impedancethe length depends on the operating wavelength λ. With Eqn. 4.9 the lengthof the line can be calculated by the angle θ. In general, the more thin thetransmission line (high Z0) is, the shorter will be the transmission line.

ωL2 = Z0 sin θ , θ ≤ 45o (90o=λ/4) (4.9)

3. Grounded lumped inductance connected replaced by a short circuit transmis-sion line: (Fig. 4.5)

Z0L z

transmission linelumped inductivity

q

Figure 4.5: Substitution of a lumped inductance by a short circuit transmissionline.

The RF ground connection could be either made by a radial stub or shortcircuit (also for DC) the line. While a radial stub warrants a low impedance,the direct connection using a wire or a via results in an additional induc-tance. The radial stub can be substituted by a lumped capacitor as well.

Eqn. 4.10 gives the needed length and/or width.

ωL1 = Z0 tan θ , θ ≤ 90o (90o=λ/4) (4.10)

4. Grounded lumped capacitor replaced by an open transmission line: (Fig. 4.6)Using an open ended transmission line gives a capacitor. The capacity at agiven frequency is defined as a function of θ and Z0:

ωC2 =tan θ

Z0

, θ ≤ 90o (90o=λ/4) (4.11)

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CHAPTER4. OUTPUT MATCHING NETWORK 27

Z0zC

open transmission linegrounded capacitor

q

Figure 4.6: Substitution of a lumped capacitor by an open circuit transmissionline.

5. Lumped capacitor replaced by a transmission line:

A lumped capacitor can only be substituted by a λ/4 - long transmission linein series of a inductance. This inductance can be replaced by a transmissionline as well. The idea is to turn the inductance one half rotation in the smithchart to arrive in the capacitive area. This solution has got two significantdisadvantages:

• The outer dimensions of the balun are extremly enlarged.

• A long transmission line like that will narrow the bandwidth so ex-treme, that a usage is hardly possible.

Because of these reasons a capacitor is kept in the balun. The use of sucha capacitor implies the simulation of the capacitors inductance as well asbond wire inductances. In the power amplifier module an AVX ACCU-Ptype capacitor was used (Fig. 4.18) but chip-capacitors could be used aswell.

Using those equations to substitute the lumped elements lead to the balun sketchedin Fig. 4.3.

4.3.1 Design

It is quite easy to see that every distributed element has got two basic variablesdefining it. Usually a certain impedance is desired so the necessary length willbe calculated. So in the end there will be six variables for the distributed ele-ments plus a discrete variable for the capacity (standardized capacity values).This makes the balun structure difficult to optimize, as two input impedanceshave to be symmetrical to warrant the optimum matching [Heinz 99].

The following example shows the way how the balun structure is designed suc-cessfully:

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CHAPTER4. OUTPUT MATCHING NETWORK 28

1. The basic LC-balun design:

With 4.1 we can calculate the values of L1 = L2 = L and C1 = C2 = C forthe desired balanced impedance. The realized ISM3A-LC power amplifierwill now be the example for such a design. The input impedance shouldbe about 13 to 14Ω per collector. That means the balanced impedance R1

from Fig. 4.1 is then 2 · 14Ω =28Ω. For a load RL of 50Ω Z1 =√

R1RL =37.4 Ω. The selected frequency is 2.45GHz so the angular frequency will beω = 2πf = 15.4 · 109 1

s. Using Eqn. 4.1 will give

L1 = L2 = 2.43 nH and C1 = C2 = 1.73 pF.

Port 1

Port 2

Port 3

Z = 280

W

Z = 140

W

Z = 140

W

Figure 4.7: Ansoft Serenade simulation schematics for the ideal LC-balun.

Fig. 4.7 shows the simulation schematics of this LC-balun structure andFig. 4.8 the results. The port named S33 was constructed using ideal trans-formers to calculate the balanced input impedance. As the input may bematched for very asymmetric loads it is very important to check the sym-metry. This is done by the ports 1 and 2 named S11 and S22. To approvethat the simulation is done in the right way, the port impedances have tobe set the right way. That means, when the balun should work for a 14Ωload it is a must to set the input ports to 14Ω. The simulation uses theinput ports loaded with 14Ω. The loads may be checked also by the use of50Ω loads, but then ideal transformers have to be used additionally. Fig. 4.8shows the resulting refleciotn coefficients in a smith chart. The reason forthe crossing of S11 and S22 in the area between 2 and 5 at the real axisis quite simple: The balun achieves its 180o phase difference by a delay of±90o for each port. This simulation is done without any choke coils forpower supply feeding, as it changes by the use of distributed elements. For

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CHAPTER4. OUTPUT MATCHING NETWORK 29

0

10

20

30

40

50

60

708090100

110

120

130

140

150

160

170

180

-170

-160

-150

-140

-130

-120

-110-100 -90 -80

-70

-60

-50

-40

-30

-20

-10

5.00

-5.00

2.00

-2.00

1.00

-1.00

0.50

-0.50

0.20

-0.20

0.0

5.002.001.000.500.200.000.000.000.000.000.000.000.000.00

1.0 1.00.0

S33

S22

S11

S11 : Z = 140

W

S22 : Z =140

W

S33 : Z = 280

W

Figure 4.8: Reflection coefficients of the ideal LC-balun according the schematicin Fig. 4.7. The frequency range is 2.2GHz to 2.6GHz.

example the ground connection of the inductance is replaced by a radialstub.

2. Substitution of the lumped components:

The next step consists of the substitution of the lumped elements. Asexplained above, three elements are substituted. For the further calcula-tions the knowledge of the used wavelength is necessary: With Eqn. 4.8the wavelength can be estimated with εr =3.38 > εr,eff for a ROGERSRO4003 substrate to λ> 67mm. The real bulk wavelength depends on thefrequency, the substrate height and the impedance of the transmission line.See [Bonek, Ernst 00] for further details.

The first lumped element in order to Fig. 4.1 is L1:

Setting for the impedance the value of 38 Ω simplifies the equation 4.10 to

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CHAPTER4. OUTPUT MATCHING NETWORK 30

Port 3

Z = 280

W

Port 1

Port 2

Z = 140

W

Z = 140

W

Figure 4.9: Ansoft Serenade simulation schematics for the LC-balun with dis-tributed elements.

tan(θ) = 2π2.45 GHz 2.43 nH38Ω

≈ 1 with tan(45o) = 1. As 45 o is about λ8

thelength would be 67 mm

8= 8mm. This is the start parameter for the simula-

tion, as the estimation of the wavelength did not imply a exact calculationof εr,eff as well as the conductivity and the substrate loss angle tan δ.

The next element is the capacitor C1. It stays lumped, as the substitu-tion for this frequency would lead to a long transmission line and a verysmall bandwidth. The use of the capacitor requires its S-parameters for thesimulation.

The inductance L2 has got the same value as L1, the difference is now, thatthe angle is now limited to 45o. The consequence is a higher impedanceZ0. The transmission line width therefore was set to 0.6mm ∼= 72Ω. WithEqn. 4.9 the resulting angle θ is found by sin θ = 2π2.45 GHz 2.43 nH

72Ω≈ 0.5 and

sin−1(0.5) = 30 o. The resulting start parameter for the length is 5.6mm.

The last lumped element is the capacitor C2. It is replaced by an opentransmission line. The impedance is set to 38Ω as the Eqn. 4.11 simplifiesto tan θ = 2π · 2.45GHz ·1.73 pF· 38Ω ≈ 1. Like for the inductance L1 thelength to start with will be 8mm.

3. The next step is to verify the substitutions by simulation and to adjustthe impedances as exactly as possible to the ideal LC- balun. The bestmethod for optimizing in this step is to change L1 and C2 first into atransmission line, first optimizing for example L1 and then C2, and thenL2. The reason for this is, that the input impedance symmetry has got itsstrongest influence from the lumped capacitor and L2. In addition it is notnecessary to invest too much time in optimizing the lengthes as they willchange when the tees and bonding capacities were added. Fig. 4.9 shows

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CHAPTER4. OUTPUT MATCHING NETWORK 31

0

10

20

30

40

50

60

708090100

110

120

130

140

150

160

170

180

-170

-160

-150

-140

-130

-120

-110-100 -90 -80

-70

-60

-50

-40

-30

-20

-10

5.00

-5.00

2.00

-2.00

1.00

-1.00

0.50

-0.50

0.20

-0.20

0.0

5.002.001.000.500.200.000.000.000.000.000.000.000.000.00

1.0 1.00.0

S33

S22

S11

S11 : Z = 140

W

S22 : Z =140

W

S33 : Z = 280

W

Figure 4.10: Reflection coefficients of the LC-balun with distributed elementsaccording the schematic in Fig. 4.9.The frequency range is 2.2GHz to 2.6 GHz.

the Serenade simulation schematic after the optimization and Fig. 4.10 theresults. They should be as near as possible to the results of the ideal LC-balun.

4. The most difficult part in the design is coming now: The tee elements have tobe added, as they change the transmission line length. In addition, it shouldbe thought of the basic outlines of the real balun. It is now of importanceto know the side where the power supply voltage should be attached as thisis the location where the inductance is set to an RF ground. The best wayto go will be the following:

• Insertion of each tee followed by a separate optimization run. Thishelps to keep the matching as the optimization of all three tees at onetime might fail. In addition the tees at the balanced input should be

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CHAPTER4. OUTPUT MATCHING NETWORK 32

placed in that way, that the shortest possible connection is done. Thishelps to keep the input inductance low.

• The use of small connection pads for the bond wires improves thebehavior, as the bond wires can be kept short.

• When using chip capacitors, the capacity has to be simulated with in-ductances in series. They represent the bond wire inductance. 100 pH/ 100 µmis a good estimation. This implies that the pad for the chip capacitorhas to be designed to fit the capacitors’ outlines as good as possible.

• Input bond wires have to be included in the simulated.

• For all types of lumped capacitors the S-parameter files have to beused.

• The outer dimension of the balun could be minimized by folding andthe use of bends. The use of optimally mitered bends is a must towarrant best performance, but their length has to be considered.

• For the RF ground of L1 a radial stub would be a great solution. Firstthe stub itself has to be simulated to work as an RF short circuit beforeit is added to the balun circuit.

• The radial stub is also used for the power supply feeding of the bothoutput transistors. As the lumped capacitor is used, a λ/4 - trans-former has to be added between the stub and the output transmis-sion line. So the stub will fulfil the grounding function as well as RF-blocking.

• after all the simulations have been done, a location for the DC-blockcapacitor has to be added at the output transmission line.

The full Serenade schematic is shown in Fig.4.11. The input reflection coefficientsimulation result is shown in Fig. 4.12. Unfortunately the balun tends to behaveinductive. There are three reasons:

• Bond wire inductances.

• The width of the input tees figure as a transmission line. As seen in Eqn. 4.4this is an input inductance.

The tendency to have a inductive behavior can be compensated by designing thelumped LC-balun with a capacitive input impedance, so that the inductancesare compensated later. The performance is mainly dependent on the real loadimpedance. So the power and efficiency loss due to inductive behavior will not bethat high, and thus the operation bandwidth will be quite large. A great advan-tage of the balun is its second and the third harmonic frequency characteristic(Fig. 4.13 and Fig. 4.14). For the second harmonic frequency a short circuit isgreatly achieved and the impedance for the third harmonic frequency is quite

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CHAPTER4. OUTPUT MATCHING NETWORK 33

Port 1

Port 2

Port 3

Z = 280

W

Z = 140

W

Z = 140

W

Figure 4.11: Ansoft Serenade simulation schematics for the finished microstripline balun.

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CHAPTER4. OUTPUT MATCHING NETWORK 34

0

10

20

30

40

50

60

708090100

110

120

130

140

150

160

170

180

-170

-160

-150

-140

-130

-120

-110-100 -90 -80

-70

-60

-50

-40

-30

-20

-10

5.00

-5.00

2.00

-2.00

1.00

-1.00

0.50

-0.50

0.20

-0.20

0.0

5.002.001.000.500.200.000.000.000.000.000.000.000.000.00

1.0 1.00.0

S33

S22

S11

S11 : Z = 140

W

S22 : Z =140

W

S33 : Z = 280

W

Figure 4.12: Smith chart of the output matchings of the finished LC-balun withdistributed elements according the schematic in Fig. 4.11. The frequency range is2.2GHz to 2.6 GHz.

high. This is a great advantage compared to load-pull matching or other balunstructures, as it helps to achieve a good PAE. Fig. 4.15 shows the quite acceptablesimulated transmission coefficient of the balun.

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CHAPTER4. OUTPUT MATCHING NETWORK 35

0

10

20

30

40

50

60

708090100

110

120

130

140

150

160

170

180

-170

-160

-150

-140

-130

-120

-110-100 -90 -80

-70

-60

-50

-40

-30

-20

-10

5.00

-5.00

2.00

-2.00

1.00

-1.00

0.50

-0.50

0.20

-0.20

0.0

5.002.001.000.500.200.000.000.000.000.000.000.000.000.00

1.0 1.00.0

S11 : Z = 140

W

S22 : Z =140

W

S33 : Z = 280

W

S33S11

S33

Figure 4.13: Smith chart for load impedances for the second harmonic frequencyband (4.4GHz - 5.2 GHz) according the schematic in Fig. 4.11.

4.3.2 Radial stubs

In microwave circuits, transmission lines normally have two functions: First, totransmit RF signals and the DC power supply. As it is not always desired that aDC connection leads also RF signals, it is necessary to block the RF by capacitors(until max. 1 GHz applicable) or in microwave circuits by the use of stubs.

A stub is used to realize a RF ground. A ground connection is usually defined byits resistance at the observed frequency toward the ground potential and should beas low as possible. Usually a resistance below 5Ω is seen as RF ground [Kraus 99].

Fig. 4.16 shows such a radial stub with its characteristic dimensions: The angleα of the stub, the radius RL and the inner radius Ri (Fig. 4.16).

[Agilent 88] and [Vinding 67] have shown, that the reactance X of such a stub isgiven by

X =Z0d

2πRi

cos(θi − ψL)

sin(ψi − ψL)

360

α(4.12)

The variable d is the height of the substrate dielectric and

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CHAPTER4. OUTPUT MATCHING NETWORK 36

0

10

20

30

40

50

60

708090100

110

120

130

140

150

160

170

180

-170

-160

-150

-140

-130

-120

-110-100 -90 -80

-70

-60

-50

-40

-30

-20

-10

5.00

-5.00

2.00

-2.00

1.00

-1.00

0.50

-0.50

0.20

-0.20

0.0

5.002.001.000.500.200.000.000.000.000.000.000.000.000.00

1.0 1.00.0

S11 : Z = 140

W

S22 : Z =140

W

S33 : Z = 280

W

S11

S33

S22

Figure 4.14: Smith chart for load impedances for the second harmonic frequencyband (6.6GHz - 7.8 GHz) according the schematic in Fig. 4.11.

Z0 = 120π√εr

√J20 (kRi)+N2

0 (kRi)

J21 (kRi)+N2

1 (kRi)

k = 2π√

εr

λ0(approximate for microstrip)

θx = tan−1(N0(kRi)J0(kRi)

)

ψx = tan−1 J1(kRi,L)

−N1(kRi,L)

x = i or L

inserted into 4.12 with the letter J for the Bessel and N for the Hankel function. εr

is taken from the microstrip expression εeff = εr+12

+ εr−12

(1 + 10 dw)−

12 with d as

the dielectric thickness and w as the line width. [Agilent 88] use for W the widthcorresponding to the half-splitted stub area. As these equations are not simpleto use, a simulation tool has to handle them. A simpler method is described in[Kraus 99]: The radial stub is cut into a lot of transmission lines in series withthe width of the lines taken as small as possible to get the original radial stubstructure. The radius is about λ/4. This structure can be simulated by simplersimulation tools.

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CHAPTER4. OUTPUT MATCHING NETWORK 37

2.0 2.1 2.2 2.3 2.4 2.5 2.6-0.60

-0.55

-0.50

-0.45

-0.40

Frequency [GHz]

Tra

nsm

issio

n c

oeff

icie

nt

[dB

][dB]

Figure 4.15: Simulated microstrip line balun power loss.

a

RL

Ri

Figure 4.16: Characteristic dimensions for the equations of a radial stub.

The way to design such a DC-stub can be seen as a two steps procedure: First, aradial stub is designed to act as a shunt. This is done by fixing Ri and the angle,and then optimizing the radius. The larger the angle is, the larger the bandwidthwill be. A radial stub does a good work for angles above 45o.

The main usage of a radial stub is the power supply feeding. In combinationwith a λ/4 - transformer the short circuit is transformed into an open circuit. Thepoint the stub is meeting the choke is the port where the DC supply has to be

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CHAPTER4. OUTPUT MATCHING NETWORK 38

DC-blockAVX ACCU-P12pF 06035J120GBT

OUTPUT

1.2 pF ACCU-P08051J1R2BBT

50 MicrostripW

VCC

RFO+

VCCD

DB

EB

VEE

RFI

RFO-

INPUT

Driver StageBias Control

ISM3A 2.45 GHzPower Amplifier

Output StageBias Control

VCC

Figure 4.17: 2.45 GHz power amplifer with microstrip line balun schematic dia-gramm

connected. At this position, the RF signal is short circuited. On the other end ofthe choke an open circuit is seen, so that the RF signal is not affected from thepower supply feeding.

4.4 Power amplifier module with microstrip line

balun

To verify the calculated and simulated characteristics of the balun, a power am-plifier module was designed. The test-board was realized in ROGERS RO4003substrate material. The conducting layer consists of three material layers: Cop-per, nickel and gold. The first layer on the substrate is copper with a thicknessof 18µm. On this layer a very thin 1 µm nickel layer is added to stop diffusioneffects between the gold and the copper layer [Nicolics, Jo 97]. The top layer isa 5µm gold layer necessary for bonding the chip on. The realized PCB with itsbalun structure is shown in Fig. 4.18.

The module is based on the ISM3A chip, which is attached on the PCB andafterwards bonded. The bias and the driver power supply lines are RF-blockedwith chip capacitors attached on the PCB and bonded with the chip. On thedown side of the bond photograph Fig. 4.20 such a chip capacitor is shown. Inaddition there are several ground pads for RF block capacitors to be solderedon. The input transmission line is designed for an impedance of 50Ω with awidth of 1.15 mm. Due to the on-chip input transformer (Fig. 2.1), no input DC-

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CHAPTER4. OUTPUT MATCHING NETWORK 39

Figure 4.18: 2.45 GHz power amplifier PCB with microstrip line balun. (size:36 x 29mm)

RF - INPUT RF - OUTPUT

++--

Output StagePower Supply

Driver StageBias

+

-

++

+

- -

Output StageBias

Driver StagePower Supply

Figure 4.19: 2.45GHz power amplifier module with microstrip line balun (1.2 pFcapacitor). PCB size: 36 x 29mm

block capacitor is needed. The capacitor used for the balun is an AVX ACCU-Ptype 08051J1R2BBT 1.2 pF capacitor and the output DC-block is a ACCU-P06035J120GBT 12 pF capacitor known from the load-pull test-board (Fig. 3.3).To see the influence of capacity variations also a module with a 1.5 pF ACCU-P08051J1R5BBT was realized (see Fig. 4.25). Fig. 4.19 shows the 1.2 pF type withits terminal assignment and Fig. 4.17 the schematic diagramm.

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CHAPTER4. OUTPUT MATCHING NETWORK 40

Figure 4.20: Bonding photograph of the power amplifier chip.

4.5 Measurement results

For a comparison with the load-pull measurement setup results see Tab. 3.2. Thebasic characteristics of the power amplifier modules can be found in Tab. 4.2 andTab. 4.1. The achieved output power rises up to 29 dBm at 2.45GHz (Fig. 4.24)and the maximum PAE is about 46%. (Fig. 4.23). This has several reasons:

• The real impedance is matched well to the load-pull measurements.

• The slight imaginary impedance mismatch for higher frequencies does notaffect the output power capabilities that strong so a huge bandwidth isachieved (Fig. 4.24).

• The realized balun structures delivers a high load impedance at the thirdharmonic frequency and an extreme low load impedance at the second har-monic frequency.

The power characteristics is the first measurement which was done (Fig. 4.21).As already described in chapter 3, it shows several interesting properties :

• The amplifier arrives at the 1 dB compression point much later for highersupply voltages. For lower supply voltages the output transistors becomesaturated earlier, as the necessary output current to achieve the same outputpower is much higher. In addition the transistors saturate always at thesame output current. The result is an output power limitation and a reducedefficiency. The 1 dB compression point for this module is reached at an

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CHAPTER4. OUTPUT MATCHING NETWORK 41

−30 −25 −20 −15 −10 −5 0 5 100

5

10

15

20

25

30

Out

put P

ower

[dB

m]

Input Power [dBm]

Input Power: 10dBm fOP

= 2.45 GHz RF off currents: Output stage: 2 x 130 mA Driver stage: 2 x 25 mA

Vcc = 1 VVcc = 1.2 VVcc = 1.5 V Vcc = 2 VVcc = 2.4 VVcc = 3 V

Figure 4.21: Microstrip line balun power amplifier module output power transfercharacteristics.

input power of -12 dBm for 2.4V and 3 V. For a supply voltage of 1.2V thecompression point is reached at -17 dBm.

• Small signal gain is taken from the area under the compression point. Forthe module, the maximum gain is 37 dB at f = 2.45GHz. Depending on thebias settings, it can be lowered to 30 dB as in the load pull configuration.

• As the curve behaves very linear under the compression point, probablyoccuring oscillation can’t be strong. Of course the output spectrum hasbeen measured and no oscillations were present.

• The saturation effect can be seen quite well. Above the input power therewill not be higher output power values reachable.

In Fig. 4.22 the power added efficiency is shown for the same supply voltages. Dueto the transistor saturation the 1.2V operation can’t be that efficient as for thesupply voltage the amplifier was designed for. In addition, the necessary outputimpedance for lower voltages varies from the optimum impedance measured inthe load-pull configuration.

The figures 4.23 and 4.24 show the frequency characteristics of the power ampli-fier module. It is quite easy to see that the power amplifier works with a quiteacceptable PAE for a very large bandwidth. In addition the maximum output

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CHAPTER4. OUTPUT MATCHING NETWORK 42

−30 −25 −20 −15 −10 −5 0 5 100

5

10

15

20

25

30

35

40

45

50P

ower

Add

ed E

ffici

ency

[%]

Input Power [dBm]

Input Power: 10dBm fOP

= 2.45 GHz RF off currents: 2 x 130mA (output stage) 2 x 25mA (driver stage)

Vcc = 1 VVcc = 1.2 VVcc = 1.5 V Vcc = 2 VVcc = 2.4 VVcc = 3 V

Figure 4.22: Microstrip line balun power amplifier module PAE.

2000 2100 2200 2300 2400 2500 260010

15

20

25

30

35

40

45

50

PA

E [%

]

Frequency [MHz]

Input Power: 10dBm fOP

= 2.45 GHz RF off currents: Output stage: 2 x 130mA Driver stage: 2 x 25mA

Vcc = 1 VVcc = 1.2 VVcc = 1.5 V Vcc = 2 VVcc = 2.4 VVcc = 3 V

Figure 4.23: Microstrip line balun power amplifier module PAE versus frequencycharacteristic.

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CHAPTER4. OUTPUT MATCHING NETWORK 43

2000 2100 2200 2300 2400 2500 260016

18

20

22

24

26

28

30O

utpu

t Pow

er [d

Bm

]

Frequency [MHz]

Input Power: 10dBm fOP

= 2.45 GHz RF off currents: Output stage: 2 x 130mA Driver stage: 2 x 25mA

Vcc = 1 VVcc = 1.2 VVcc = 1.5 V Vcc = 2 VVcc = 2.4 VVcc = 3 V

Figure 4.24: Microstrip line balun power amplifier module frequency characteris-tic.

power shifts to lower frequency for lower power supply voltages. The reason forthis is the dependency of the optimum load impedance from the power supplyvoltage.

The bandwidth may vary with the variations of the used capacitor type. For massproduction use, it will be of interest which influence a deviation in the capacitywould have. Therefore same module was constructed for two capacitors:

• 1.2 pF 08051J1R2BBT AVX ACCU-P SMD microwave capacitor

• 1.5 pF 08051J1R5BBT AVX ACCU-P SMD microwave capacitor

A comparison of the bandwidth shows a frequency shift, the output power itselfstays almost constant (Fig. 4.25). The bandwidth is now limited and shifted bythe balun for the 1.5 pF capacitor.

Fig. 4.26 shows the output spectrum for the maximum output power at a powersupply of 3V and an input power level of 10 dBm.

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CHAPTER4. OUTPUT MATCHING NETWORK 44

Ou

tpu

t P

ow

er

[dB

m]

Frequency [MHz]2000 2100 2200 2400 2500 260024

25

26

27

28

Input Power: 10 dBm Power Supply Voltage: 2.4 VRF off currents: Output stage: 2 x 130mA Driver stage: 2 x 25mA

Figure 4.25: Comparison of the output power for the balun capacitor variation.

29.13 dBm

2.4505 GHz

MKR

RBW 1.0MHz *VBW 1.0MHz *SWP 7.00sec

SPAN 100.0MHzCENTER 2.4500GHz

RL 34.3dBm

ATTEN 30dB

10dB/

MKR 29.13dBm

2.4505GHz

D

R

Figure 4.26: Microstrip line balun power amplifier module output spectrum (3VPower supply voltage; 10 dBm input power).

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CHAPTER4. OUTPUT MATCHING NETWORK 45

Operating frequency 2.0GHz – 2.6GHzSupply voltage 1V – 3 VSmall-signal gain (2.45GHz) 37 dBInput VSWR ≤ 2(2.45GHz, Pin=10 dBm)Chip size 1.5mm × 0.95mmTechnology B6HFC, Si bipolar 0.8µm, fT =25GHz

Substrate 0.51mm ROGERS RO4003 (εr = 3.38)

PCB size 36 x 29mm

Output network Microstrip line balun

Supply voltage 1 1.2 1.5 2 2.4 3.0 V

Maximum output power 80 129 219 398 550 760 mWat 2.45 GHz and Pin=10 dBm (19) (21.1) (23.4) (26) (27.4) (28.8) (dBm)Power-added efficiencyat 2.45 GHz Pin=10 dBm 20 26.3 35 40.4 43.5 44.5 %Output stage collector efficiencyat 2.45 GHz and Pin=10 dBm 26.6 33.5 42.2 45 47 47 %

Output stage collector current 2 x 122 2 x 128 2 x 151 2 x 187 2 x 197 2 x 217 mA(RF on)Output stage collector current 2 x 130 2 x 130 2 x 130 2 x 130 2 x 130 2 x 130 mA(RF off)Driver stage current (RF on) 2 x 43 2 x 45 2 x 46 2 x 48 2 x 53 2 x 58 mADriver stage current (RF off) 2 x 25 2 x 25 2 x 25 2 x 25 2 x 25 2 x 25 mABias-current (driver stage) 14.8 16 15 14 13.2 12.5 mABias-current (output stage) 38 36 35.7 33.7 32 30 mA

Table 4.1: Performance summary for the microstrip line balun power amplifiermodule (T=300 K, 12.5% duty cycle, 0.577ms pulse width.)

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CHAPTER4. OUTPUT MATCHING NETWORK 46

Supply voltage 1.2 2.4 3 V

Maximum output power 141 560 813 mWat 2.45GHz and Pin=10 dBm (21.5) (27.5) (29.1) (dBm)Power-added efficiencyat 2.45GHz Pin=10 dBm 38 45 46 %Output-Stage collector efficiencyat 2.45GHz and Pin=10 dBm 42 48 49 %

Output stage collector current 2 x 98 2 x 190 2 x 234 mA(RF on)Output stage collector current 2 x 64 2 x 120 2 x 170 mA(RF off)Driver stage current (RF on) 2 x 23 2 x 37 2 x 39 mADriver stage current (RF off) 2 x 11 2 x 22 2 x 23 mABias-current (driver stage) 3 4 4 mABias-current (output stage) 18 30 44 mA

Table 4.2: Maximum output power ratings of the microstrip line balun poweramplifier module (T=300 K, 12.5% duty cycle, 0.577ms pulse width.)

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Conclusion

A balanced monolithic integrated transformer-coupled 2.45GHz RF power am-plifier has been characterized by load-pull measurements. With the results fromload-pull measurements, a balun for 2.45 GHz and the optimum load impedanceof the power amplifier was designed.

A new type of microstrip line balun was derived from the lumped Lattice-typeLC balun. The number of lumped components is reduced significantly. The designwas realized as a power amplifier module based on a ROGERS RO4003 substrate.

The module and thus the balun showed excellent results: The maximum outputpower for 2.45GHz is 29.1 dBm, the PAE is 46% at 3V operation voltage. Thesmall signal gain is up to 37 dB. The operation bandwidth covers a frequencyrange of about 600MHz with an output power over 27 dBm and a PAE alwaysover 35 %.

47

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Acknowledgements

The work presented was supported by INFINEON Technologies AG, CorporateResearch, Department for High Frequency Circuits (CPR HF), Munich.

Special thanks to my colleague Dr.Werner Simburger for the initial ideas. Con-tinuous support by Dr. Hans-Dieter Wohlmuth is also gratefully acknowledged.

I would like to take this opportunity to thank my parents and my brother Rolandwho helped me in any situation during my studies.

49

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Bibliography

[Agilent 88] Agilent, “Broadband microstrip mixer design - the butterflymixer”, Agilent Technologies Application Note, vol. 976, pp.4–6, 1988.

[Bonek, Ernst 00] Bonek, Ernst, “Wellenausbreitung 1”, Script for the courseWellenausbreitung 1 at the Technical University of Vienna,october 2000.

[Cripps 99] Steve C. Cripps, RF Power Amplifiers for Wireless Commu-nications, Artech House, Norwood, MA 02062, first edition,1999.

[El-Hamamsy 94] S. A. El-Hamamsy, “Design of High-Efficiency RF Class-DPower Amplifier”, IEEE Transactions on Power Electronics,vol. 9, pp. 297–308, May 1994.

[Gonzales 84] G. Gonzales, Microwave Transistor Amplifiers Analysis andDesign, Prentice Hall, Englewood Cliffs, NJ 07632, 1984.

[Hammerstad 75] E.O. Hammerstad, “Equations for microstrip circuit design”,Proc. of the European Microwave Conference, vol. , pp. 261–272, 1975.

[Heinz 99] Alexander Heinz, “Anpaßnetzwerke fur monolithisch integri-erte HF-Leistungsverstarker fur den Mobilfunk”, Master’s the-sis, Technical University of Vienna, january 1999.

[Jochen 95] Peter Jochen, “Die neue c-klasse: Schalterbetrieb von transis-toren in senderendstufen mit lc-kreisen”, ELRAD, vol. 12, pp.80–85, 1995.

[Johnson, Ric 84] Johnson, RichardC. and Jasik, Henry, Antenna EnineeringHandbook, McGraw-Hill, New York, second edition, 1984.

[Kehrer 00] Daniel Kehrer, “Design of Monolithic Integrated Transformersin Silicon-based Technologies up to 20 GHz”, Master’s thesis,Technical University of Vienna, december 2000.

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