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INTERFACE ENGINEERING OF CAPACITIVE MICROMACHINED ULTRASONIC TRANSDUCERS FOR MEDICAL APPLICATIONS A DISSERTATION SUBMITTED TO THE DEPARTMENT OF MECHANICAL ENGINEERING AND THE COMMITTEE ON GRADUATE STUDIES OF STANFORD UNIVERSITY IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF DOCTOR OF PHILOSOPHY Der-Song Lin June 2011

INTERFACE ENGINEERING OF CAPACITIVE …xk708cv9822/DS Lin thesis... · interface engineering of capacitive micromachined ultrasonic transducers for medical applications a dissertation

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Page 1: INTERFACE ENGINEERING OF CAPACITIVE …xk708cv9822/DS Lin thesis... · interface engineering of capacitive micromachined ultrasonic transducers for medical applications a dissertation

INTERFACE ENGINEERING OF CAPACITIVE MICROMACHINED ULTRASONIC TRANSDUCERS FOR

MEDICAL APPLICATIONS

A DISSERTATION

SUBMITTED TO THE DEPARTMENT OF MECHANICAL ENGINEERING

AND THE COMMITTEE ON GRADUATE STUDIES

OF STANFORD UNIVERSITY

IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE

OF

DOCTOR OF PHILOSOPHY

Der-Song Lin

June 2011

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http://creativecommons.org/licenses/by-nc/3.0/us/

This dissertation is online at: http://purl.stanford.edu/xk708cv9822

© 2011 by Der-Song Lin. All Rights Reserved.

Re-distributed by Stanford University under license with the author.

This work is licensed under a Creative Commons Attribution-Noncommercial 3.0 United States License.

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I certify that I have read this dissertation and that, in my opinion, it is fully adequatein scope and quality as a dissertation for the degree of Doctor of Philosophy.

Butrus Khuri-Yakub, Primary Adviser

I certify that I have read this dissertation and that, in my opinion, it is fully adequatein scope and quality as a dissertation for the degree of Doctor of Philosophy.

Roger Howe

I certify that I have read this dissertation and that, in my opinion, it is fully adequatein scope and quality as a dissertation for the degree of Doctor of Philosophy.

Thomas Kenny

Approved for the Stanford University Committee on Graduate Studies.

Patricia J. Gumport, Vice Provost Graduate Education

This signature page was generated electronically upon submission of this dissertation in electronic format. An original signed hard copy of the signature page is on file inUniversity Archives.

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ABSTRACT

Capacitive micromachined ultrasonic transducers (CMUTs), have been widely

studied in academia and industry over the last decade. CMUTs provide many benefits

over traditional piezoelectric transducers including improvement in performance through

wide bandwidth, and ease of electronics integration, with the potential to batch fabricate

very large 2D arrays with low-cost and high-yield. Though many aspects of CMUT

technology have been studied over the years, packaging the CMUT into a fully practical

system has not been thoroughly explored. Two important interfaces of packaging that

this thesis explores are device encapsulation (the interface between CMUTs and patients)

and full electronic integration of large scale 2D arrays (the interface between CMUTs and

electronics).

In the first part of the work, I investigate the requirements for the CMUT

encapsulation. For medical usage, encapsulation is needed to electrically insulate the

device, mechanically protect the device, and maintain transducer performance, especially

the access of the ultrasound energy. While hermetic sealing can protect many other

MEMS devices, CMUTs require mechanical interaction to a fluid, which makes fulfilling

the previous criterion very challenging. The proposed solution is to use a viscoelastic

material with the glass-transition-temperature lower than room temperature, such as

Polydimethylsiloxane (PDMS), to preserve the CMUT static and dynamic performance.

Experimental implementation of the encapsulated imaging CMUT arrays shows the

device performance was maintained; 95 % of efficiency, 85% of the maximum output

pressure, and 91% of the fractional bandwidth (FBW) can be preserved. A viscoelastic

finite element model was also developed and shows the performance effects of the

coating can be accurately predicted. Four designs, providing acoustic crosstalk

suppression, flexible substrate, lens focusing, and blood flow monitoring using PDMS

layer were also demonstrated.

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The second part of the work, presents contributions towards the electronic

integration and packaging of large-area 2-D arrays. A very large 2D array is appealing for

it can enable advanced novel imaging applications, such as a reconfigurable array, and a

compression plate for breast cancer screening. With these goals in mind, I developed the

first large-scale fully populated and integrated 2D CMUTs array with 32 by 192

elements. In this study, I demonstrate a flexible and reliable integration approach by

successfully combining a simple UBM preparation technique and a CMUTs-interposer-

ASICs sandwich design. The results show high shear strength of the UBM (26.5 g),

100% yield of the interconnections, and excellent CMUT resonance uniformity (σ = 0.02

MHz). As demonstrated, this allows for a large-scale assembly of a tile-able array by

using an interposer.

Interface engineering is crucial towards the development of CMUTs into a practical

ultrasound system. With the advances in encapsulation technique with a viscoelastic

polymer and the combination of the UBM technique to the TSV fabrication for

electronics integration, a fully integrated CMUT system can be realized.

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ACKNOWLEDGEMENTS

The work presented in this thesis would not have been possible without the vision,

guidance, collaboration, and support of many people. They have together made my life at

Stanford an educational, enjoyable, and exceptional experience.

First, I would like to thank my Ph.D. principal advisor, Professor Butrus (Pierre)

T. Khuri-Yakub, for granting me the privilege to work under his supervision so that I

could pursuit a research topic I have dreamed for years. Through all my Ph.D. study,

Pierre offered continuous instruction and insights that he has never hesitated to share his

wealth of knowledge in any occasions. He is always accessible for advice no matter in

town or on the trip. I would like to express my great appreciation for his support,

understanding, and responsiveness during my time at Stanford.

I would like to thank the other members of my committee, Professor Thomas

Kenny, Professor Roger T. Howe, and Professor Mark Brongersma. I would like to

convey my appreciation to Professor Kenny for guiding me the research resources when I

first came to Stanford. The opportunity of working closely with his group on an MEMS

temperature regulator project has been one of the most enjoyable and educational

summers during my days at Stanford. I was honored to know him technically and

personally. Professor Howe is always passionate in sharing his knowledge. His EE312

course was particularly useful to me in learning about MEMS and my research topic in

broader points of view. I also am indebted to Professor Brongersma, who served in my

Ph.D. qualification exam committee and as the chair of my Ph.D. defense committee. I

would also like to extend my thanks to Professor Beth Pruitt for training me about

MEMS through my early days at Stanford. Her teaching was truly inspiring and

ultimately led me to the research of using MEMS for biomedical applications.

This work would not have been possible without the funding provided by the

National Institutes of Health (NIH) under Grant Number 1R01CA1152677. The majority

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of this work made use of the National Nanofabrication Users Network (NNUN) facilities

funded by the National Science Foundation (NSF) under award number ECS-9731294.

I have learned valuable lessons through the collaborations with Robert Wodnicki,

Dr. Charley Woychik, and Dr. Kai Thomenius from GE Global Research Center, and

Bernd Otto of Pac Tech USA Inc. They provided me tremendous resources and

introduced me to the industry practices. They have helped to enrich my research scope

and equip me for future career.

I was fortunate to have worked closely with Dr. Xuefeng (Steve) Zhuang,

Professor A. Sanli Ergun, Professor Mario Kupnik, and Dr. Serena H. Wong in different

stages of my Ph.D. Sanli is my first personal fabrication mentor at Stanford. He spent

considerable time training me in the field of CMUTs technology. He showed much

patience during my first learning of CMUT design, clean room activity and

characterization. I worked with Steve together for many projects and shared most of my

research with him. The work presented in this thesis would not be possible without his

continuous and timely support technically and mentally. I am deeply indebted to him for

his mentorship and friendship inside and out of the lab. My discussions with Mario were

always encouraging and inspiring my research to the next level. His distinct high

standards for the quality of research and publication has contributed one of the most to

the successful completion of my Ph.D. work. Our time together with his sense of humor

has kept our friendship after his return to Europe. Also special thanks to Serena, who is

very technically resourceful friend to me. She is extremely helpful in many aspects

including troubleshooting of my experiments as well as revisions to papers. I was lucky

to know her technically and personally.

I would like to express my gratitude for the great conversations and valuable

friendship from other former and current members of the Khuri-Yakub group: Dr. David

Yeh, Dr. Goksen Yaralioglu, Herb Te-Jen Ma, Dr. Amin Nikoozadeh, Dr. Omer Oralkan,

Dr. Ira O. Wygant, Prof. Ching-Hsiang Cheng, Dr. Yongli Huang, Prof. Baris Bayram,

Srikant Vaithilingam, Kazutoshi Torashima, Kwan-Kyu Park, Hyunjoo Jenny Lee, Min-

Chieh Ho, Amr Ahmed Essawi Saleh, Georgios Papadimitriou, Jessica Faruque, Yukio

Furukawa, Ron Watkins, Dr. Yukihide Tsuji, and Jung Woo Choe. I would like to thank

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for the assistances from Ginzton Lab staffs: Larry Randall, Tim Brand, Pauline Prather

and Heber Taina. In particular, Tom Carver has spent tremendous time contributing to the

development of PDMS encapsulation and UBM pads for CMUTs. The discussion with

him was always informative and extremely helpful.

I would like to thank SNF staff team for their assistance in training me and

keeping my works smoothly in the clean room. My special appreciation to many lab

members, especially, Eric Perozziello for many helpful processing advice and urgent

wafer rescue during the nights.

I was honored to know a number of MEMS professionals who inspired me for the

research in this field before my study in U.S. and advised me even until this day.

Professor Long-Sun Huang from National Taiwan University (NTU) was the first teacher

to initiate me into BioMEMS study. Professor Cheng-Hsien Liu from National Tsing-

Hua University provided me invaluable guidance on how to survive at Stanford.

Professor Tsung-Tsong Wu has provided me solid training of Ultrasonics in the early

years of my study at NTU, which in turn becomes the important foundations of the

successful completion of my Ph.D. study.

I would like to reserve my special thanks for many wonderful friends who have

enriched my life at Stanford in many ways. I would like to thank all the brothers and

sisters from South Bay Bible Church (SBBC) for being my physical and mental support

through all my struggles and spiritual growth. I am indebted to them for being like a true

family to me. My appreciation is also to the friends from Stanford Taiwanese Student

Association (STSA) and STSA softball team for sharing all the happy time. In particular,

I am grateful to Dr. Yu-Chi Chang, Prof. Pei-Chen Su, and Dr. Po-Ta (Joseph) Chen for

their life sharing and encouragement at all times.

Finally, I would like to express my deepest gratitude to my family. I was deeply

indebted to my parents, both teachers, for their teaching about disciplines and

responsibilities to the society. I thanks for their unconditional love, sacrifices and the

utmost support from the very beginning.

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I was especially indebted to my spiritual companion, my wife, Yachen (Nina) Liu,

for being exceptionally understanding, and extremely supportive and encouraging

throughout the years. She joked sometimes she is truly a Ph.D. short for “Push Husband

to Doctor”. I cannot express my deepest appreciation for her constant mental companion

by volunteering countless sleepless nights to be with me in the lab or aside the fab. By

sharing all the years together, I fully understand how well she completes me. Our little

angel daughter, Koen Elyse Lin, was born on 04/27/’10 exactly one month before my

defense exam. The new family member has made our family full of love and blessing

since then. I dedicate this thesis to my wife, parents and my daughter, to whom I owe all I

have ever accomplished.

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TABLE OF CONTENTS

Abstract ................................................................................................................. iv  

Acknowledgements .............................................................................................. vi  

Table of Contents .................................................................................................. x  

List of Tables ...................................................................................................... xiii  

List of Figures ..................................................................................................... xiv  

Chapter 1   Introduction ...................................................................................... 1  1.1   Motivations ............................................................................................. 1  

1.2   Contributions ........................................................................................... 5  

1.3   Thesis Structure ...................................................................................... 8  

Chapter 2   CMUT Basics and Characterization ............................................ 10  

2.1   Background of CMUTs ......................................................................... 10  

2.2   Modeling for CMUTs ........................................................................... 13  

2.2.1   Parallel-plate capacitor model ........................................................... 13  

2.2.2   Equivalent circuit model ................................................................... 19  

2.3   Characterization methods for CMUTs .................................................. 21  

2.3.1   Characterization in air ....................................................................... 21  

2.3.2   Characterization in immersion .......................................................... 22  

2.4   Static Operating Point Evaluation ......................................................... 24  

2.4.1   Background and Motivation ............................................................. 24  

2.4.2   Materials and Methods ...................................................................... 25  

2.4.3   Results and Discussion ..................................................................... 29  

2.4.4   Conclusions ....................................................................................... 34  

Chapter 3   Frontside Interface Engineering of CMUTs ............................... 35  3.1   Encapsulation Design ............................................................................ 35  

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3.1.1   Static operation and dynamic performance of encapsulated CMUTs

36  

3.1.2   Viscoelasticity of polymer ................................................................ 37  

3.2   Fabrication Process ............................................................................... 40  

3.2.1   CMUT Fabrication ............................................................................ 40  

3.2.2   PDMS encapsulation ......................................................................... 42  

3.3   Viscoelastic Finite Element Model ....................................................... 48  

3.4   Results and Discussion ......................................................................... 51  

3.4.1   Characterization for static behavior .................................................. 51  

3.4.2   Model parameter studies ................................................................... 54  

3.4.3   Characterization for dynamic performance ...................................... 58  

3.5   Conclusion ............................................................................................ 67  

Chapter 4   PDMS-Encapsulated CMUTs ....................................................... 69  

4.1   Crosstalk Suppression ........................................................................... 69  

4.1.1   Overview ........................................................................................... 69  

4.1.2   Coating thickness design ................................................................... 71  

4.1.3   Experimental method and results ...................................................... 73  

4.2   Flexible CMUTs ................................................................................... 79  

4.2.1   Overview ........................................................................................... 79  

4.2.2   Design and fabrication ...................................................................... 80  

4.2.3   Test results and discussion ................................................................ 82  

4.3   PDMS Coating as Lens Material for Focusing ..................................... 85  

4.3.1   Overview ........................................................................................... 85  

4.3.2   Lens design ....................................................................................... 86  

4.3.3   Materials and methods ...................................................................... 87  

4.3.4   Results and discussion ...................................................................... 91  

4.4   Ultrasound Beam Tilting for Blood Flow Imaging ............................... 93  

4.4.1   Introduction ....................................................................................... 93  

4.4.2   Methods and results .......................................................................... 94  

Chapter 5   Backside Interface Engineering of CMUTs .............................. 101  

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5.1   Large Scale 2D Arrays ........................................................................ 101  

5.1.1   Motivations ..................................................................................... 101  

5.1.2   Reconfigurable array ....................................................................... 102  

5.2   2D CMUT interconnection and 3D CMUT/IC Intergrations ............. 104  

5.2.1   Surface micromachining through-wafer via ................................... 105  

5.2.2   Through-wafer trench-framed interconnections ............................. 106  

5.3   Interposer Design and UBM Preparation for Large Scale 2D Array .. 107  

5.3.1   Single large die versus array-tiling assembly ................................. 108  

5.3.2   CMUT design and fabrication ........................................................ 111  

5.3.3   Under-bump-metallurgy design and fabrication ............................. 116  

5.4   Large Scale Tiling CMUTs ................................................................. 126  

5.4.1   Tiling assembly module design ...................................................... 127  

5.4.2   Tiling assembly results ................................................................... 128  

5.4.3   Acoustic measurement results ........................................................ 129  

5.5   Small Pitch Design .............................................................................. 130  

5.6   Conclusion .......................................................................................... 133  

Chapter 6   Current and Future Work .......................................................... 134  

Bibliography ...................................................................................................... 136  

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LIST OF TABLES

Table 1-1. Comparison of transducer technologies. ........................................................... 1  

Table 1-2. Requirements of the encapsulation for a medical imaging ultrasonic

transducer. ................................................................................................................... 2  

Table 2-1. Performance index as functions of gap-height ................................................ 24  

Table 2-2. Design parameters and values ......................................................................... 25  

Table 2-3. RMS surface roughness measured by AFM .................................................... 31  

Table 3-1. Properties of various polymer materials commonly used for MEMS

applications [19], [21]. .............................................................................................. 39  

Table 3-2. Parameters of the CMUTs for imaging and HIFU. ......................................... 40  

Table 3-3. Acoustic properties of PDMS. ......................................................................... 51  

Table 3-4. CMUTs for imaging. ....................................................................................... 60  

Table 3-5. The coating effect of the CMUTs for imaging. ............................................... 60  

Table 3-6. CMUTs for HIFU (radius of 70 µm and 50 µm). ............................................ 61  

Table 4-1. Physical parameters of the CMUT array for crosstalk study .......................... 75  

Table 4-2. Device parameters of flexible CMUTs. ........................................................... 80  

Table 4-3. Attenuation of Sylgard 160 compared with various doped RTV or HTV ...... 88  

Table 4-4. Physical parameters of the CMUT array for lens study. ................................. 89  

Table 5-1. Device parameters of CMUT for breast cancer screening. ........................... 114  

Table 5-2. CMUT fabrication process flow. ................................................................... 115  

Table 5-3. Bump shear test results of various UBM metal stacks. ................................. 123  

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LIST OF FIGURES

Figure 1-1. The roadmap of CMUT integration with electronics. ...................................... 4  

Figure 2-1. Basic CMUT structure: a cross-section diagram of a CMUT cell. ................ 11  

Figure 2-2. CMUT anatomy in cell, element and array level. .......................................... 12  

Figure 2-3. CMUT parallel plate capacitor model ............................................................ 13  

Figure 2-5. Equivalent circuit model of CMUT (F=0 in transmit and V=0 in receive). C0:

device capacitance, n: electromechanical coupling coefficient, Zp: plate mechanical

impedance, Zm: medium impedance, Rs: source impedance, Cp: parasitic

capacitance, Rp: parasitic resistance. ........................................................................ 19  

Figure 2-6. Experimental setup for input impedance measurements. ............................... 22  

Figure 2-7. Typical electrical input impedance of a CMUT element. .............................. 22  

Figure 2-8. Experimental setup for pulse-echo measurements. ........................................ 23  

Figure 2-9. Typical pulse-echo wave-form and band shape for a 185-um by 185-um

CMUT element in a 2D array. .................................................................................. 23  

Figure 2-10. The comparison of the surface roughness from the bottom side of the gap

between (a) The CMUTs with and without sealing, and (b) The CMUT with doped

polysilicon and thermal oxide and the one with doped substrate ............................. 27  

Figure 2-11. The methodology to quantify the roughness of each layer. ......................... 28  

Figure 2-12. Behavior of center deflection versus DC bias and real part of input

impedance versus DC bias: (a) Theoretical part, and (b). Measurements part. ........ 29  

Figure 2-13. (a) SEM photograph (cross-section) of one CMUT cell showing the gap-

height, and (b) SEM photograph of surface roughness from the bottom side of the

gap ............................................................................................................................. 30  

Figure 2-14. Thermal Oxide is roughened due to imprinting by overlying polysilicon

layer ........................................................................................................................... 32  

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Figure 2-15. Doping reduces surface roughness of polysilicon ........................................ 33  

Figure 2-16. Roughness contributed from doped polysilicon. .......................................... 33  

Figure 3-1. Encapsulation approach for various MEMS devices. .................................... 36  

Figure 3-2. Viscoelastic curves of PDMS in terms of the Young’s modulus and acoustic

impedance over (a) loading frequency, or (b) temperature based on the theory of

time-temperature superposition. Tg and fg represent the glass-transition temperature

under static loading, and the glass-transition loading frequency in room temperature,

respectively. .............................................................................................................. 38  

Figure 3-3. CMUT device fabrication using wafer bonding technique for (a) imaging

CMUTs and (b) HIFU CMUTs. The process flow include (1) first oxidation and

BOE oxide etch, (2) second oxidation and dry etching, (3) wafer bonding, (4) handle

wafer and BOX removal and etch back for substrate access, (5) top electrode

deposition and patterning, and (6) PDMS coating. ................................................... 41  

Figure 3-4. Imaging CMUTs pictures of (a) SEM cross sectional view of a cell, (b) 6

elements of one array with wire bonding, and (c) CMUT cells with plate deflection

under DC bias of 80% of pull-in voltage measured by white light interferometer.

Similarly, HIFU CMUTs pictures are shown in (d)-(f). ........................................... 42  

Figure 3-5. Chemical structure of PDMS ......................................................................... 43  

Figure 3-6. SEM of PDMS surface (a). before plasma treatment, and (b). after plasma

treatment (after [40]). ................................................................................................ 44  

Figure 3-7. Relationship between the surface topography in micro scale and hydrophilic

behavior in macro scale (after [40]). ......................................................................... 44  

Figure 3-8. Silanol group of PDMS surface treatment (after [40]). .................................. 44  

Figure 3-9. HEMA grafted PDMS: creation of the hydroxyl terminated function group

(after [40]). ................................................................................................................ 44  

Figure 3-10. Aging induced hydrophobicity recovery effect on PDMS with various

surface treatments (after [40]). .................................................................................. 45  

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Figure 3-11. Surface energy of various solids and liquids. ............................................... 46  

Figure 3-12. Four biasing schemes for CMUT operation. ................................................ 47  

Figure 3-13. Electrical input impedance results and the optical microscopic images of the

CMUTs before and after the surface-conductivity-induced interconnection failure. 47  

Figure 3-14. Schematic of (a) the non-viscoelastic and (b) the viscoelastic FEM. FLUID

29, PLANE 42, PLANE 182, and TRANS 126 represent the element types used in

the ANSYS model. The plots also show the roller boundary conditions (constrained

to x-direction), and the anchor boundary conditions (constrained to both x and y

directions). (c) The Prony Series expansion used for PLANE 182 element in the

viscoelastic FEM can be represented by a spring in parallel with a series set of a

spring and a dashpot. ................................................................................................. 51  

Figure 3-15. Static behavior verification: capacitance vs. DC bias voltage for the imaging

CMUTs: (a) The experimental data, and (b) the modeling data. The measured

capacitance larger than the modeling is due to the parasitics from the electrical

interconnections of the experimental setup. .............................................................. 52  

Figure 3-16. The electrical impedance measurement of the CMUTs without coating,

showing the (a) real parts, and (b) imaginary parts at DC bias before and after the

pull-in. ....................................................................................................................... 53  

Figure 3-17. The electrical impedance measurement of the CMUTs with 150µm PDMS

coating, showing the (a) real parts and (b) imaginary parts at DC bias before and

after the pull-in. ......................................................................................................... 54  

Figure 3-18. The real part of the electrical impedance versus the DC bias measured from

the CMUTs (a) without and (b) with PDMS coating. ............................................... 54  

Figure 3-19. The viscoelastic FEM results showing the effect of different PDMS coating

thicknesses: (a) 200-µm, and (b) 75-µm of GE RTV 615 PDMS coating. t = 0 s

corresponds to the beginning of the 50-ns pulse. The data were retrieved from the

PDMS-water interface. ............................................................................................. 56  

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Figure 3-20. The viscoelastic FEM results showing the effect from different types of

PDMS: (a) 150 µm of GE RTV 615, and (b) 150 µm of Sylgard 160 on the CMUT

for imaging. The average displacement from plate-PDMS and PDMS-water

interface were both shown with a 1-nm offset apart in Y-scale for clearer

visualization. The main signals (a-1, b-1) arrive at time zero, and then the excitations

propagate upward into the PDMS-water interfaces. The transmission parts were

shown at the PDMS-water interfaces at the arrival time of 139 ns (a-2), and 158 ns

(b-2) individually. The reflection part (a-3) travels back to the plate-PDMS interface

and arrives at the time of 278 ns, while there is no reflection for the Sylgard 160

case (b-3). .................................................................................................................. 57  

Figure 3-21. Comparison between the measurements (with and without the 150 µm of GE

RTV 615 coating) and the viscoelastic FEM (with the 150 µm of GE RTV 615

coating) results for imaging CMUTs: (a) and (b) the time domain, and (b) and (c) the

frequency domain. The data were retrieved from the PDMS-water interface. ......... 59  

Figure 3-22. The results from the non-viscoelastic FEM with sE for imaging CMUTs

with 150 µm of GE RTV 615 coating. The data were retrieved from the plate-PDMS

interface. sE leads to the slower speed of sound, so there was no data from PDMS-

water interface before 1.2 µs. .................................................................................... 60  

Figure 3-23. Comparison between the (a) measurements and (b) the results from

viscoelastic model in time domain, and (c) those in frequency domain for HIFU

device with CMUT cell radius of 70 µm with 150 µm of GE RTV 615 coating. The

data was retrieved from the plate-PDMS interface. .................................................. 62  

Figure 3-24. Comparison between the (a) measurements and (b) the results from

viscoelastic model in time domain, and (c) those in frequency domain for HIFU

device with CMUT cell radius of 50 µm with 150 µm of GE RTV 615 coating. The

data was retrieved from the plate-PDMS interface. .................................................. 63  

Figure 3-25. Displacement and output pressure at CMUT surface: surface area

displacement results for the devices (a) without and (b) with PDMS coating;

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comparison of the (c) average displacement and (b) average pressure between the

cases with and without PDMS coating. .................................................................... 65  

Figure 3-26. Total output pressure from the CMUT with and without PDMS coating. ... 67  

Figure 4-1. Schematic of surface-guided-mode crosstalk with energy guided at the

transducers surface. ................................................................................................... 71  

Figure 4-2. Suggested PDMS coating thickness for the crosstalk-suppression. (a) The

energy envelop, )1exp(0 −⋅= pp in oil without coating. (b) The energy envelop

with coating by using Ccoating =1080 m/s (from GE RTV 615 PDMS). .................... 72  

Figure 4-3. Experimental setup of optical and electrical measurement for crosstalk

characterization. ........................................................................................................ 74  

Figure 4-4. Inter- and intra-element crosstalk measurement. ........................................... 76  

Figure 4-5. The crosstalk measurement comparison between the CMUTs (a) without and

(b) with a lossy PDMS coating for the frequency of interest. .................................. 77  

Figure 4-6. The impulse response comparison between PDMS coatings with different

attenuation. ................................................................................................................ 78  

Figure 4-7. Schematic of (a) a catheter for intravascular ultrasound imaging and (b) the

detail of a catherter-based side-looking probe. ......................................................... 79  

Figure 4-8. PDMS thickness as a function of spin speed. ................................................ 81  

Figure 4-9. Schematic cross-section of CMUT elements with PDMS encapsulation and

trenches-refilling substrate. ....................................................................................... 82  

Figure 4-10. Device photographs: (a) front side view, (b) back side view showing the

flexibility pushed by a wire, (c) magnified view of through-wafer PDMS dispensing

holes, (d) cross-sectional view showing the trench, the membrane, and the PDMS

coating and filling. .................................................................................................... 82  

Figure 4-11. Test results: (a) electrical input impedance in air, (b) resonant frequency. . 83  

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Figure 4-12. (a) A photograph of cracks aside the mechanical linking bridge, (b)

Schematic of current linking design, (c) Schematic of proposed ribbons (springs)

design. ....................................................................................................................... 84  

Figure 4-13. Schematic acoustic pressure profile of comparison between CMUT arrays

(a) without lens coating, and (b) with lens coating. .................................................. 85  

Figure 4-14. Design of lens focusing. ............................................................................... 87  

Figure 4-15. Lens mold manufactured by using mold-transfer technique. ....................... 89  

Figure 4-16. A 1D 128 elements linear CMUT array (a) before lens coating, and (b-c)

after lens coating. ...................................................................................................... 90  

Figure 4-17. Pressure field measurement for CMUTs with (a) conformal PDMS coating,

and (b) lens PDMS coating. ...................................................................................... 92  

Figure 4-18. System concept for a new carotid screening tool based on a 5-plane CMUT

array. (a) CMUT array and the interface board. (b) Asymmetric acoustic lens on

each 1D array for fixed angle off-axis beam steering in the elevation direction. (c)

Diagram of cross-sectional carotid images obtained using the proposed scheme. ... 95  

Figure 4-19. Active array area illustration. ....................................................................... 96  

Figure 4-20. (a) A 4-inch silicon wafer after the completion of fabrication. The center two

devices are 5-plane CMUT arrays; the periphery contains test devices. (b) A 5-plane

CMUT array diced off from the wafer. ..................................................................... 96  

Figure 4-21. Resonant frequency distribution across a 1D array. ..................................... 97  

Figure 4-22. Pulse-echo signal, and corresponding spectrum. ......................................... 98  

Figure 4-23. Normalized output pressure as a function of DC bias and AC excitation

voltages. .................................................................................................................... 98  

Figure 4-24. (a) Illustration of off-axis beam steering using an off-centered cylindrical

lens. (b) Tilt angle as a function of the ratio of acoustic velocities in the lens material

and in water (n = Cwater/Clens). .................................................................................... 99  

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Figure 4-25. Setup of using a 1D array to obtain five cross-sectional color flow Doppler

images of a phantom. .............................................................................................. 100  

Figure 5-1. Schematic of the dual ultrasonic imaging plates on the current mammography

setup. ....................................................................................................................... 102  

Figure 5-2. Reconfigurable 2D CMUT arrays. ............................................................... 103  

Figure 5-3. Different approaches for through-wafer interconnect. (a) Through-wafer via,

(b) through-wafer trenches. ..................................................................................... 105  

Figure 5-4. 3D schematic of the trench-isolated CMUT with a supporting frame. ........ 107  

Figure 5-5. Large-scale CMUT arrays can be made of (a) a single large die, or (b) an

array tiling assembly. .............................................................................................. 109  

Figure 5-6. 9-layer HyperBGA® substrate ..................................................................... 110  

Figure 5-7. Illustration of signal routing in the interposer. ............................................. 111  

Figure 5-8. Serial resistance versus the resistivity of the SOI substrate [93]. ................ 112  

Figure 5-9. Temperature profile in CZ Silicon growth [94]. The freezing interface of the

Silicon crystal is concave into the melt. .................................................................. 113  

Figure 5-10. Fusion bonding yields comparison between the SOI with resistivities of (a)

0.01~0.025 Ω-cm, and (b) 0.001~0.004 Ω-cm. Bonding yield of (a) is 100% for all

21 arrays, and down to (b) 66.7% (14 out of 21 arrays). ........................................ 113  

Figure 5-11. Schematic comparison between the previous single-die UBM technique and

the proposed pre-trench UBM for tile able sandwich structure. ............................. 117  

Figure 5-12. Schematic process of the pre-trench UBM using electroplating (a) before

and (b) after oven reflow. ........................................................................................ 118  

Figure 5-13. Plating process steps .................................................................................. 119  

Figure 5-14. Comparison between the pillars (a) with and (b) without footing. ............ 119  

Figure 5-15. Schematic of the post-trench UBM with (a) straight sidewalls of trenches,

and (b) trenches with negative sidewall slope and footing. .................................... 120  

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Figure 5-16. Post-trench UBM and solder-bumping in the area with and without BCB

trench-filling. .......................................................................................................... 120  

Figure 5-17. An optical microscopy showing the crack through the photoresist layer after

the e-beam evaporation of UBM metal stacks. The crack was due to the intrinsic

compressive stress of the 0.5-µm Ni film. .............................................................. 122  

Figure 5-18. SEM pictures show the UBM pad with 0.03µm Au and 0.5um Ni has huge

surface roughness by observing the grain size around tens of nanometers. ........... 122  

Figure 5-19. SEM pictures show the UBM pad shear interface of the brittle failure mode.

................................................................................................................................. 123  

Figure 5-20. Suggested bump shear strength and the results from the pre-trench UBM

using evaporated Al/Ti/Ni/Au. ................................................................................ 124  

Figure 5-21. A SEM pictures of the first trenched CMUT arrays with excellent quality

solder bumps showing (a) an excellent yield on a 16 by 16 2D array with excellent

solder-ball-height uniformity. (b) A close-up of a signal pad shows the solder ball on

top of the trench-isolated 90x90-µm-wide and 255-µm-tall pillar. ........................ 125  

Figure 5-22. (a) Electrical input impedance of one element, and (b) resonance frequency

distribution across the 16x16 array. ........................................................................ 126  

Figure 5-23. Schematic cross-section of the modular package design. .......................... 127  

Figure 5-24. Schematic signal routing scheme for a multi-row linear imaging array. ... 128  

Figure 5-25. Top view photograph of the first large-scale tile-able CMUT array assembly.

................................................................................................................................. 128  

Figure 5-26. Cross-section SEM of the assembled CMUTs-interposer-ASICs sandwich

structure. .................................................................................................................. 129  

Figure 5-27. Photograph showing topside view of the 1x2 functional CMUT array on a

laminate interposer solder attached to a board. ....................................................... 129  

Figure 5-28. Photograph showing the cross-sectional view of the functional prototype.130  

Figure 5-29. The pulse/echo results from the CMUT-interposer assembly module. ...... 130  

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Figure 5-30. Beam theory calculated induced maximum tensile and shear stress at the

bottom of the signal pillar under the bump-shear force acting on the top of the pillar.

................................................................................................................................. 131  

Figure 5-31. Finite element analysis agrees with the beam theory calculation with only

6.7% error. .............................................................................................................. 131  

Figure 5-32. Design guideline for pitch (pillar width) and substrate thickness (pillar

length) with experimental-determined fusion-bonding strength. The tensile fusion

bonding strength was based on the bump-shear test of 3.5 g results with the beam

theory calculation. The yellow region indicates the verified safe zone for various

pillar width and length designs. .............................................................................. 132  

Figure 5-33. (a) Cartoon showing the bump-shear test on a signal pillar. (b) SEM on the

bottom of a post-shear-failure pillar showing the presence of a BOX layer. The shear

failure interface is through the Si-BOX interface but not the Si pillar. (c)

Microscopic optical picture shows the bottom of the trench with the fringing patterns

within the 90x90 µm square. The fringing pattern indicates the delaminated BOX

from device Si layer. ............................................................................................... 132  

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CHAPTER 1 INTRODUCTION

1.1 MOTIVATIONS

Capacitive micromachined ultrasonic transducers (CMUTs) have been widely

studied in academia and industry over the last decade. CMUTs provide many benefits

over traditional piezoelectric transducers including improvement in performance through

wide bandwidth, and ease of electronics integration, with the potential to batch fabricate

very large 2D arrays with low-cost and high-yield (Table 1-1). Though many aspects of

CMUT technology have been studied over the years, packaging the CMUT into a fully

practical system has not been thoroughly explored. Two important interfaces of

packaging that this thesis explores are device encapsulation (the interface between

CMUTs and patients) and full electronic integration of large-scale 2D arrays (the

interface between CMUTs and electronics).

Table 1-1. Comparison of transducer technologies.

Piezoelectric transducer CMUT

Fabrication method Ceramic technology MEMS technology

Array fabrication Difficult and high cost,

very difficult for 2D array, ring array

Easy and low cost, arrays with through-wafer

interconnects Frequency range Relatively narrow Broad

Bandwidth Moderate, matching layers required Wide

Array uniformity Moderate High

Thermal stability Low High

IC integration No Yes

Output pressure High Relatively low but improving

For the front-side interface, the requirements for the CMUT packaging in terms of

encapsulation were investigated. For medical usage, this packaging material should

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electrically insulate the device from the environment, protect the device against humidity

and other corrosive substances, and also be biocompatible (Table 1-2). At the same time,

this encapsulation should maintain transducer performance, especially the transfer of

energy to and from the medium. While other microelectromechanical system (MEMS)

devices such as accelerometers and gyroscopes are typically protected from the

environment by hermetic sealing, CMUTs require mechanical interaction to a fluid,

which makes fulfilling the previous criteria very challenging. Operation of a CMUT

requires both a DC and AC voltage, such that attributes a static and dynamic behavior.

Figures of merit for CMUTs include the reception sensitivity and transmit efficiency,

which are determined as the static operation point; it also includes the dynamic

performance, i.e. total output pressure and fractional bandwidth (FBW) (Table 1-2). A

solution by using a viscoelastic polymer to address the encapsulation challenges and

fulfills the AC and DC requirements is presented. By using this approach, four designs,

providing acoustic crosstalk suppression, flexible substrate, lens focusing, and blood flow

monitoring using PDMS layer is also demonstrated.

Table 1-2. Desirable attributes of the encapsulation material of a medical imaging ultrasonic transducer.

Provide  protection

Maintain  performance

Provide  other  benefits

p Electrical  insulationp Humidity  &  corrosive  substance  barrierp Ablation  resistancep Biocompatibility

Figures  of  Merit  :p Sensitivity  &  efficiencyp Max  output  pressurep Fractional  bandwidth  (FBW)

p Acoustic  crosstalk  suppressionp Lens  focusingp Flexible  substratep Blood  flow  imaging

A full packaging towards the CMUT development into a practical ultrasound

system requires also the full electronic integration (the interface between CMUTs and

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electronics). The second part of the thesis, presents works on the electronic integration

and packaging of CMUT arrays, specifically on the large-area 2-D arrays. A very large

2D array is appealing for it can enable advanced novel imaging applications. A number

of specific applications exist in which large area ultrasound transducer arrays can be

used. These include cancer screening and continuous non-invasive blood pressure

monitoring [1]. A novel breast cancer screening can be realized by placing very large

ultrasonic transducer arrays on both upper and lower compression plates in a manner

similar to X-ray based mammography. By using the dual ultrasonic imaging plates,

compound images of a lesion using data from both the upper and lower plates can

minimize shadowing artifacts. Two-way projection formed 3D data set can provide

through-transmission measurements including the speed of sound and attenuation.

Complete 3D data sets can be acquired in renderings made with 3D compounding to

optimize achievable contrast and maximize speckle suppression. Imaging techniques such

as elastography can be applied in a more rigorous manner than before including use of

3D [7, 8].

Another motivation of developing large area ultrasound transducer arrays using

CMUT technology is to enable advanced novel interconnection technique for a mosaic

annular reconfigurable array. A major challenge in large area transducers is the large

number of interconnects existing between the signal processing electronics and the

transducer array. With the large number of transducer elements (10,000 to >1,000,000),

each with its own respective signal processing circuitry, significant power, cost, and area

penalties exist. One attractive way to reduce the number of signal processing channels for

such a large area array is through the use of a mosaic annular reconfigurable array [4][5].

The mosaic array architecture groups a number of sub-elements together along iso-phase

lines to form larger transducer elements which are then each connected to a single system

channel. In this way, an array that has tens of thousands of active acoustic sub-elements

can be reduced to a much smaller number of system processing channels (e.g. 20-100). In

order to realize such array architecture, it is necessary to integrate switching electronics

immediately behind the acoustic array. Compared to traditional PZT-based ultrasonic

transducers, CMUTs were made by adopting MEMS technology. It allows CMUTs to be

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processed in a similar way to the ASICs, which makes them more amenable to standard

packaging flows.

CMUTs  Interface  with  Electronics

1D  array  using  wire-­‐bonding

2D  CMUT  arrays  using  through-­‐wafer-­‐via

2D  CMUT  arrays  using  trench-­‐frame  technology

Integration  w/  electronics

Interconnections

2004 2006 2008 2010

16  x  16 M  x  N1  x  N 16  x  16

Wire-­‐bonding Via-­‐first  TSV Via-­‐last  TSV

(C.  Cheng  ’04)

(X.  Zhuang ’08)

Large  scale  2D  CMUT  arrays  using    trench-­‐frame  technology

CMUT

interposer

C CMUT

interposer

C

Interposer

 Figure 1-1. The roadmap of CMUT integration with electronics.

CMUT interconnections and integration with electronics have been improving

over the past few years (Figure 1-1). Following the 1D CMUT array, the first successful

2D interconnections for 2D CMUT array was demonstrated by Cheng et al. [6] by using a

“through-wafer-via” technology. However, this via-first through-silicon-via (TSV)

technique is not compatible with the fusion bonding for CMUT cell formation. Because

the via has to be processed first, the change of wafer surface condition make it extremely

difficult for a good wafer bonding. As the fusion-bonding technique has been

demonstrated to provide many advantages on CMUT design flexibility and fabrication

simplifications, a 2D interconnection technology compatible with fusion bonding was

required. This issue was addressed by Zhuang et al. [7] by demonstrating a via-last 2D

interconnection technology using a trench-frame structure. However, the challenge is

how to extend this approach to a larger scale, and with smaller pitch-size. An enabling

technology for a large-scale 2D array requires a simple, flexible and reliable

interconnection and IC integration technique. As an example of fabricating a large-scale

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2D CMUT array using wafer bonding, a tile-able CMUT array assembly and a CMUT-

interposer-ASIC sandwich structure were proposed in this work.

Interface engineering is crucial towards the development of CMUTs into a

practical ultrasound system. With the advances in encapsulation technique with a

viscoelastic polymer and the combination of the UBM technique to the TSV fabrication

for electronics integration, a fully integrated CMUT system can be realized.

1.2 CONTRIBUTIONS

The primary contributions of this thesis include two parts. First, for the front side

interface engineering (the interface between CMUTs and patients):

• A viscoelastic polymer with Tg lower than room temperature, such as PDMS,

was proposed as a solution for CMUT encapsulation, which preserves the

static operation and maintains the dynamic performance.

• A viscoelastic finite element model was developed which can predict both

the DC and AC behavior of a PDMS-coated CMUT.

• Various CMUT applications by using PDMS encapsulation were

demonstrated, including acoustic crosstalk suppression, a flexible substrate,

lens focusing, and a blood flow imaging.

Second, for the backside interface engineering (the interface between CMUTs and

electronics):

• The first successful tile-able assembly module of CMUTs-interposer-ASICs

sandwich with flexible pitch sizes (185 µm for CMUTs and 150 µm for

ASICs ).

• The first large-scale fully populated 2D CMUTs array (32 by192 elements).

• A design guideline for finer element-pitch design: pillar interface strength

(fusion bonding strength and BOX strength) and the length of pillars.

• A simple pre-trench UBM compatible with trench-frame interconnect

technology, which provides great and uniform shear strength, and enables the

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100% yield of the solder bumping and the interconnections of CMUTs-

interposer-ASICs module.

Most of the work contained in this dissertation has been previously published.

The publication related to Chapter 2 is:

1. D.-S. Lin, X. Zhuang, S. H. Wong, A. S. Ergun, M. Kupnik, and B. T.

Khuri-Yakub, "Characterization of fabrication related gap-height variations in capacitive micromachined ultrasonic transducers," in Proc. IEEE Ultrason. Symp., 2007, pp. 523-526.

The publications related to Chapter 3 include:

2. D.-S. Lin, X. Zhuang, S. Wong, M. Kupnik, and B. T. Khuri-Yakub, "Encapsulation of Capacitive Micromachined Ultrasonic Transducers using Viscoelastic Polymer," IEEE/ASME J. Microelectromech. Syst., in press.

3. D.-S. Lin, X. Zhuang, S. H. Wong, M. Kupnik, and B. T. Khuri-Yakub, “A Viscoelastic Finite Element Model for Polymer Coatings on CMUTs,” presented at the IEEE Ultrasonics Symposium, Beijing, China, Nov. 2008.

The publications related to Chapter 4 include:

4. B. Bayram, M. Kupnik, G. G. Yaralioglu, O. Oralkan, D.-S. Lin, X. Zhuang, A. S. Ergun, A. Sarioglu, S. H. Wong, and B. T. Khuri-Yakub, "Characterization of cross-coupling in capacitive micromachined ultrasonic transducers," in Proc. IEEE Ultrason. Symp., 2005, pp. 601-604.

5. B. Bayram, M. Kupnik, G. G. Yaralioglu, Ö. Oralkan, A. S. Ergun, D. Lin, S. H. Wong, and B. T. Khuri-Yakub, "Finite element modeling and experimental characterization of crosstalk in 1-D CMUT arrays," Ultrasonics, Ferroelectrics and Frequency Control, IEEE Transactions on, vol. 54, no. 2, pp. 418- 430, Feb. 2007.

6. X. Zhuang, D.-S Lin, O. Oralkan, and B. T. Khuri-Yakub, “Fabrication of flexible transducer arrays with through-wafer electrical interconnects based on trench refilling with PDMS,” IEEE/ASME J. Microelectromech. Syst., vol. 17, pp. 446-452, Apr. 2008.

7. X. Zhuang, D.-S. Lin, O. Oralkan, and B. T. Khuri-Yakub, "Flexible transducer arrays with through-wafer electrical interconnects based on trench refilling with PDMS," in Proc. IEEE MEMS Conference, 2007, pp. 73-76.

8. X. Zhuang, D.-S. Lin, O. Oralkan, and B. T. Khuri-Yakub, “Flexible CMUT Arrays with Through-Wafer Electrical Interconnects Based on Trench Refilling with PDMS”, presented at the Transducer Conference, Los Angeles, CA, Apr. 2007.

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9. D.-S Lin, X. Zhuang, J. Faruque, O. Oralkan, S. Napel, R. B. Jeffrey, and B. T. Khuri-Yakub, “Carotid Peak Blood Velocity Detection using a 5-Plane CMUT Array with Asymmetric Acoustic Lens: Initial Results,” to be published in Proc. IEEE Ultrason. Symp., 2009.

The publications related to Chapter 5 include:

10. D.-S. Lin, X. Zhuang, R. Wodnicki, C. G. Woychik, O. Oralkan, M. Kupnik, and B. T. Khuri-Yakub, “Packaging of Large and Low-Pitch Size 2D Ultrasonic Transducer Arrays,” to be published in Proc. IEEE MEMS Conference, Hong Kong, 2010 (in print).

11. R. Wodnicki, D.-S Lin, K. Thomenius, R. Fisher, C. Woychik, A. Byun, X. Zhuang, O. Oralkan, S. Vaithilinigam, and B. Khuri-Yakub , “Multi-row linear array using cMUTs and multiplexing electronics,” to be published in Proc. IEEE Ultrason. Symp., 2009 (in print).

12. X. Zhuang, I. O. Wygant, D.-S Lin, O. Oralkan, M. Kupnik, and B. T. Khuri-Yakub, “Wafer-bonded 2-D CMUT arrays incorporating through-wafer trench-isolated interconnects with a supporting frame,” IEEE Trans. Ultrason., Ferroelect., Freq. Contr. , vol. 56, pp. 182-192, Jan. 2009.

13. X. Zhuang, D.-S. Lin, A. S. Ergun, O. Oralkan, and B. T. Khuri-Yakub, "Trench-isolated CMUT arrays with a supporting frame," in Proc. IEEE Ultrason. Symp., 2006, pp. 1955-1958.

14. X. Zhuang, I. O. Wygant, D.-S. Lin, M. Kupnik, O. Oralkan, and B. T. Khuri-Yakub, "Trench-Isolated CMUT Arrays with a Supporting Frame: Characterization and Imaging Results," in Proc. IEEE Ultrason. Symp., 2007, pp. 507-510.

I also had the opportunity to coauthor a number of papers prior to my work in

CMUT technology:

1. A. Nikoozadeh, I. O. Wygant, D.-S Lin, Ö. Oralkan, A. S. Ergun, D. N. Stephens, K. E. Thomenius, A. M. Dentinger, D. Wildes, G. Akopyan, K. Shivkumar, A. Mahajan, D. J. Sahn, and B. T. Khuri-Yakub, "Forward-looking intracardiac ultrasound imaging using a 1-D CMUT array integrated with custom front-end electronics," Ultrasonics, Ferroelectrics and Frequency Control, IEEE Transactions on, vol. 55, no. 12, pp. 2651-2660, Dec. 2008.

2. S. H. Wong, M. Kupnik, X. Zhuang, D.-S Lin, K Butts-Pauly, and B.T. Khuri-Yakub, “Evaluation of wafer bonded CMUTs with rectangular membranes featuring high fill factor,” IEEE Trans. Ultrason., Ferroelect., Freq. Contr. , vol. 55, pp. 2053-2064, Sep. 2008.

The contributions presented in this thesis have widespread applications in many

other transducer arrays, including gas, bio/medical, and imaging sensor array and many

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other actuator arrays. The work presented in this dissertation will be presented from the

perspective of micromachined ultrasound imaging array for medical applications.

1.3 THESIS STRUCTURE

In Chapter 2 of this thesis, it is first presented a brief theoretical analysis and

experimental characterization of CMUTs. A parallel-plate model of CMUTs is used for

the analysis. Important device operation parameters, such as plate pull-in voltage, center

frequency, fractional bandwidth, output pressure and receive sensitivity are analyzed.

Many experimental characterization techniques are introduced, utilizing the design

feedback during and after the fabrication. The gap-height variation as one of the most

critical issues from the CMUTs fabricated by a sacrificial-release process was addressed.

Using the experimental characterization techniques, the fabrication-related gap-height

variation was identified which suggest the wafer-bonding fabrication technique is

advantageous.

In Chapter 3, the requirements for the CMUT encapsulation are investigated. A

solution is proposed using a viscoelastic material with the glass-transition-temperature

lower than the room temperature, such as Polydimethylsiloxane (PDMS), to preserve the

CMUT static and dynamic performance. Experimental implementations of the

encapsulated CMUT arrays are demonstrated (for both imaging and high-intensity-

focused-ultrasound CMUTs). Both the experimental results of the maximum output

pressure, and the fractional bandwidth (FBW) are presented. A finite element model

addressing the viscoelastic polymer coating was also developed; the performance effects

of the coating are predicted and compared to the experimental results.

In Chapter 4, demonstrations of four PDMS encapsulated CMUT designs,

providing acoustic crosstalk suppression, flexible substrate, lens focusing, and blood flow

monitoring follow. In the first part of this chapter, a lossy top coating by using PDMS

was proposed to feature the encapsulation and the crosstalk suppression at the same time.

The coating thickness and material attenuation are designed. The crosstalk reduction is

demonstrated experimentally for two kinds of PDMS. The second part is to design the

low Young’s modulus from PDMS into the substrate to provide the flexibility of CMUT

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arrays. By using a PDMS encapsulation and refilling trenches, a flexible CMUT array

was demonstrated for side-looking intravascular ultrasound imaging. Then the PDMS

was used as a lens material featuring a mechanical focusing for a 1D CMUT array.

PDMS selection in terms of the acoustic impedance, attenuation, and viscosity is

discussed. The pressure fields and beam profiles from the CMUTs with conformal

coating and lens coating are measured for comparison. Last, a new screening method for

carotid stenosis is proposed. The key components of the system include a 5-plane CMUT

array and asymmetric acoustic lenses using PDMS are designed, fabricated and tested.

Chapter 5 presents works on the backside interface engineering of CMUTs,

specifically on the electronic integration and packaging of large-area 2-D arrays. First,

the background of the 2D CMUT interconnections and 3D CMUT/IC intergrations are

discussed. Next, the interposer design is introduced and a simple UBM preparation for

large scale 2D array is presented. Then, the first large-scale fully populated and

integrated 2D CMUTs array with 32 by 192 elements is demonstrated. The results show a

flexible and reliable integration approach by successfully combining a simple UBM

preparation technique and a CMUTs-interposer-ASICs sandwich design. The results

show high shear strength of the UBM, great yield of the interconnections, and excellent

CMUT resonance uniformity. As demonstrated, this allows for a large-scale assembly of

a tile-able array by using an interposer.

Significant contributions have been made towards the fields of the encapsulation

and large-scale packaging of CMUTs. The results obtained suggest a number of areas

where CMUT encapsulation/packaging can be further improved are summarized in

Chapter 6.

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CHAPTER 2 CMUT BASICS AND CHARACTERIZATION

In this chapter, a basic introduction to CMUT technology will be presented, starting with the basic structure and operation of a conventional CMUT cell. Important CMUT characteristics and the figure of merit are introduced. Simple analytical models are also presented to develop intuition concerning the design and operation of the device. Then, characterization methods are discussed which are essential for fabrication in-field

feedback and post-fabrication comparison with the theory and modeling results. A

fabrication-induced gap-height variation is evaluated as an example.

2.1 BACKGROUND OF CMUTS

Ultrasonic transducers can be classified according to the physical mechanism

upon which they are based to convert electrical energy into ultrasonic energy, and vice

versa. Magnetostriction, piezoelectricity and electrostatics are some of the physical

mechanisms used to generate and detect ultrasound. With the advent and maturation of

silicon micromachining, new possibilities for making ultrasonic transducers have

emerged, both for piezoelectric based and capacitor based devices, and for both airborne

and immersion applications. Thin vibrating plates of silicon, silicon nitride, alumina,

diamond, and other materials can be easily made and vibrated with piezoelectric,

capacitive, magnetic, thermal, and other types of driving mechanisms.

Historically, piezoelectric crystals, ceramics, polymers and recently

piezocomposite materials have been predominantly used to generate and detect

ultrasound. Although the idea of electrostatic transducers is as old as the early

piezoelectric transducers, piezoelectric materials have dominated ultrasonic transducer

technology. F. V. Hunt writes in his book Electroacoustics: The Analysis of

Transduction, and its Historical Background [8]: “After a month of careful study, during

which both magnetostriction and piezoelectricity were considered and then rejected,

Langevin decided that it would be better to fall back on the “singing condenser”... (March

1915) Numerical estimates indicated that, if electric field strengths on the order of a

million volts per centimeter (108 V/m) could be maintained, electrostatic forces as large

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as a kilogram per square centimeter would come into play...” The reason why

electrostatic or capacitive transducers have not been popular is the high electric fields that

need to be maintained to achieve acceptable efficiencies.

Recent advances in microfabrication technology have made it possible to build

capacitive ultrasound transducers competing with piezoelectric transducers. With the use

of integrated circuit manufacturing techniques it is possible to make capacitors with sub-

micron gaps where electric fields of over 108 V/m can be sustained. The merit of such a

high electric field is that it results in transducers where the electromechanical coupling

coefficient can get close to unity, and thus be very competitive with the best piezoelectric

materials.

A CMUT is simply a device with two plate-like electrodes biased with a DC

voltage and driven with an additional AC signal to harmonically move one of the plates.

The main components are the cavity, the plate, and the electrode. The plate is clamped on

side posts (Figure 2-1), with size and thickness determined by the frequency requirement

of the specific application. The cavities underneath the plates are usually sealed to

enhance device performance and reliability by preventing environmental hazards, such as

moisture and dust particles, from either mechanically hampering the plate motion, or

electrically shorting the capacitor structure. A dielectric insulation layer is often

presented in the cavity to prevent electrical shorting between the two electrodes of the

CMUT.

Bottom Electrode

Substrate

Vacuum

Plate

Bottom Electrode

Substrate

Top ElectrodePlate

Vacuum

DC

AC

 Figure 2-1. Basic CMUT structure: a cross-section diagram of a CMUT cell.

The CMUT plates deflect when subjected to an electrostatic or mechanical

actuation force. Thus, they serve to couple energy between the electrical and mechanical

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domains. In the transmit mode, an AC actuation voltage superimposed on an optional DC

bias voltage is applied on the electrodes residing on the CMUT plates. The resulting

electrostatic force causes the plates to vibrate in the ultrasonic frequency range. The plate

vibration couples acoustic energy into the surrounding medium. In the receive mode, a

DC bias voltage is first applied on the capacitor structure of the CMUT. The impinging

ultrasound waves cause the plates to vibrate, resulting in an AC current that can be

detected by an external circuit.

2D array with 16x16 elements

1D linear array with 64 elements

Four CMUT elements with 35cells per element

100 cells per element

Element level

Nine CMUT cells

Five CMUT cells

Cell levelArray level

 Figure 2-2. CMUT anatomy in cell, element and array level.

CMUTs provide several advantages over piezoelectric transducers: they can be

batch-produced with micromachining processes to tight parameter specifications, which

is difficult for piezoelectrics; they are easier to fabricate than piezoelectric transducers;

batch processing also enables the fabrication of transducer arrays with different

geometries and operating frequencies on a single wafer. Added to this advantage is the

broad bandwidth resulting from using over-damped plates in immersion applications, the

control afforded by integrated circuit manufacturing techniques in making single element,

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1-D, 1.5-D, and 2-D arrays, and the ease of integration of the transducers with electronic

circuits.

2.2 MODELING FOR CMUTS

2.2.1 PARALLEL-PLATE CAPACITOR MODEL

A simple model is introduced in this section that allows the derivation of simple

formulas for some of the important CMUT parameters, such as the pull-in voltage, center

frequency, fractional bandwidth (FBW), maximum achievable output pressure, and

receive sensitivity. In this model, the CMUT top plate is constraint to only a piston-like

displacement (i.e., no deflection), and it forms a parallel-plate capacitor with the fixed

bottom electrode (Figure 2-3). The piston (top plate) is held over an effective electrostatic

gap, 0g , by a spring, k .

top electrode

bottom electrode

x

tp

g0

V

movable plate

Spring, kDamper, b

 Figure 2-3. CMUT parallel plate capacitor model

In this model, the plate is simplified as a rigid plate with an equivalent mass m

supported by a spring with an equivalent spring constant k anchored on a substrate. A

damping factor b is used to represent all mechanical and acoustical damping mechanisms

in the CMUT. V represents the voltage that is applied between the plate and substrate.

One of the major assumptions in this model is that the plates endure a piston-like motion.

In reality, the plate displacement profile is non-uniform, with the center having the

maximum displacement and the side posts having zero displacement. Further, the piston-

like motion assumption also neglects higher order vibration modes of the plate that are

inherent in actual devices. Another assumption is the linear spring, which may also

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deviate from reality especially when the plate displacement is significant when compared

to the thickness of the plate. Despite these limitations, this simple model provides us with

an understanding of the most important characteristics of a CMUT.

2.2.1.1 Plate pull-in voltage

A pull-in voltage exists for the CMUT plate, which occurs when the electrostatic

force overcomes the mechanical restoring force, and the plate abruptly snaps down to the

substrate. Usually a CMUT is designed to operate at a bias voltage less than the pull-in

voltage.

First, the equilibrium exists between the electrostatic force, eF , and the

mechanical restoring force, mF , exerted by the spring as long as the bias voltage not

larger than the pull-in voltage.

0=+=∑ em FFF , (2-1)

where =mF )( ggk eff − , 2

20

2gAV

F dce

ε−= , 0ε is the permittivity of free space and

A denotes the piston electrode area. Then the pull-in voltage can be obtained by knowing

the pull-in occurs when the electrostatic force gradient overcomes the gradient of the

mechanical restoring force.

Akg

VkgAV

gF pi

pipi

pi

Vg pipi0

3

3

20

,

0)(

εε

=⇒=−=∂

∂ ∑ . (2-2)

From (Equation 2-1) and (Equation 2-2), one can show that the pig is 2/3 of the

effective electrostatic gap, independent of other parameters.

effpipi

effpi

pieffpi

pi

pi ggg

gkgAV

gggAV

k32

22 2

20

3

20 =⇒−=−=⇒=

εε. (2-3)

By plugging this result into (Equation 2-2), the pull-in voltage can be expressed

as:

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0

3

278

εAkg

V effpi = . (2-4)

The pull-in voltage is an important design parameter. In many applications, a

CMUT is used for both transmission and reception of acoustic waves; the pull-in voltage

is a trade-off between transmission and reception performances. Details of this tradeoff

will be discussed in sections 2.2.1.5.

2.2.1.2 Center frequency

The center frequency of a mass-spring-damper system is determined by the

equivalent mass meq and the spring keq as eqeqo mk /=ω while operating in air or

vacuum. This is equivalent to the natural resonant frequency of the plate because the

damping effect from air or vacuum can be ignored. Once the system is operating in

immersion, the center frequency is also determined by the complex damping factor

ir bbb += . Analytical formulae exist in some special cases, e.g. thin circular or square

plate that 10<< a/t <<100, where a is the lateral dimension of the plate (e.g., width,

diameter), and t is the plate thickness [9].

Using the general assumptions of Kirchhoff’s plate bending theory, the governing

differential equation for the motion of a thin plate is given by

Pt

ttD =∂∂+∇−∇ 2

224 ωρωσω , (2-5)

where σ , t , ρ , P and ω denote the stress within the plate, plate thickness, plate

density, the external pressure applied on the plate, and the plate displacement [9], [10],

[11]; In addition, D denotes the flexural rigidity of the plate given by

)1(12)(2

3

υσ−+= tED , (2-6)

where E and υ are the Young’s modulus and Poisson’s ratio of the top plate

material, respectively.

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By simplifying the case, 0=σ , and following the derivations in [12], it can be

shown that, for a clamped circular plate, the first harmonic frequency (i.e., lowest

resonant frequency) in air or vacuum can be expressed as:

eq

eqo m

kEat =

−=

)1(95.2

22 νρω . (2-7)

While the damping effect from the medium is not negligible, assuming <<a the

acoustic wavelength (λ ), the resonant frequency of the system becomes:

ta

Eah

mo

ρρ

νρω

67.01

)1(95.2

22

+

−= , (2-8)

where mρ is the density of the medium. The equation refers to a more general

expression of the resonant frequency, implying the resonance shifts down with the

presence of the damping.

2.2.1.3 Fractional bandwidth

A wide bandwidth is preferred for better axial resolution. For a second order

spring-mass-dashpot resonant system, one can identify the higher and lower 3-dB cutoff

frequencies [13] as:

⎟⎟⎟

⎜⎜⎜

⎛+⎟⎟⎠

⎞⎜⎜⎝

⎛+= 1

21

21

2

QQoH ωω , (2-9)

and ⎟⎟⎟

⎜⎜⎜

⎛+⎟⎟⎠

⎞⎜⎜⎝

⎛+−= 1

21

21

2

QQoL ωω , (2-10)

where r

i

b)bm(k

Q+

= is the quality factor of the system, which is proportional

to the ratio of the stored energy over dissipated energy at the operating frequency. Based

on the definition of a fractional bandwidth, one can obtain:

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)(1

0 i

rLH

bmkb

QFBW

+==

−=

ωωω . (2-11)

The complex damping factor b is contributed by the loss within the CMUT

structure as well as the medium loss. For CMUTs operating in immersion, medium loss

dominates, which the loss can be represented by the medium load impedance [14]:

om ZaKjKaaKZ 22

22

1++= , (2-12)

where λπ /2=K . It is seen from Equation 2-11 and Equation 2-12 that ib can be

minimized as Ka becomes very large (a >>λ ), such that a preferred large FBW can be

obtained. It implies the post area between vibrating plates should be minimized to limit

the imaginary part of the medium loading.

2.2.1.4 Transmission efficiency and maximum output pressure

The transmission efficiency, TXS , is expressed as the ratio of the pressure output

delivered to the medium through the piston movement of the plate to the electrical

actuation voltage. As the AC voltage excitation )t(Vac applies on the plate introduces an

electrostatic force, the equilibrium can be written as:

( ))(2)(22

))(( 222

02

20 tVVtVV

gA

gtVVA

F acdcacdcacdc

e ++=+

=−εε

(2-13)

The 2)(tVac term can be decomposed into a second harmonic term and a DC term.

The second harmonic term can be ignored for analysis at the fundamental frequency. The

resulting DC terms with the 2dcV set the static operation point. Thus, at a given DC

operation point, the )(2 tVV acdc term contributes to the acoustic pressure output:

)()()(

)()( 20 tnVtCEVg

tVAVtFAtP acac

acdc ≡=−==⋅ε , (2-14)

where g/AC 0ε= and g/VE dc= are the capacitance of the parallel plate

capacitor and the electrical field strength in the gap between the two electrodes. The

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equation leads to the transmission efficiency, AntVtPS acTX == )()( (in units of Pa/V)

showing that CMUTs with a larger capacitance and stronger electric field (i.e. a small gap

g and larger bias voltage Vdc) have better coupling efficiency between the electrical and

acoustic domains in transmission.

Another essential parameter is the maximum output pressure. The output pressure

of a CMUT with frequency ω can be written as:

xZxZP mm ω)Re()Re( == , (2-15)

where x is the amplitude of the acoustic wave, which is equivalent to the CMUT

plate displacement. The maximum displacement, hence the maximum output pressure, is

limited by the gap between the two electrodes. Moreover, the pull-in effect of a parallel-

plate capacitor may further limit plate displacement. As a result, a large electrode gap is

desirable for higher output pressure; however, a small gap is needed for better

transduction efficiency. Thus there is a trade-off in terms of the gap-height for CMUT

design.

2.2.1.5 Receive sensitivity

In receiving mode, the input is the incident acoustic pressure impinging on the

plate, and the output is the current through the capacitance change (in units of A/Pa). The

electrostatic force is introduced by a bias voltage Vdc, which is used to set the operation

point of the device. The bias voltage applied on the CMUT also converts the capacitance

change into electric current, which is detected by the front-end circuit of the CMUT. The

receive current can be written as:

xgAV

tCVI dc

20)( ε

=∂

∂= . (2-16)

By plugging g/AC 0ε= , g/VE dc= , and )Re( xZP m = into (Equation 2-16), we

can find the formula for receive current becomes:

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19

AZPCExCEIm

⋅⋅=⋅= . (2-17)

Thus, the receive sensitivity mm

RX ZnAA

ZCE

PIS =⋅== can be obtained. It is seen

from the expressions of TXS and RXS that both are proportional to the electromechanical

transformer ratio, n. A two-way sensitivity, RXTXS / in units of A/V, can be defined by the

product of TXS and RXS :

mRXTX Z

nS2

/ = . (2-18)

Therefore, for CMUTs sensitivity design, a small gap is desired. However, a large

gap is desired for maximum achievable output pressure. Thus, the gap height is one of

most critical device parameters and good control over it is required in manufacturing

CMUTs to avoid significant deviation of the device performance from the design target.

2.2.2 EQUIVALENT CIRCUIT MODEL

Mechanical systems can be converted into electrical circuits by using the analogy

between the mechanical and the electrical domains. One way to implement this analogy is

to replace the forces in the mechanical domain by voltage sources and velocities by

electrical currents. Then, an equivalent circuit of the system is constructed. This method

becomes an even more powerful tool for the analysis of electromechanical systems where

some parts of the system are already in the electrical domain. In addition, it will be

possible to use circuit simulation tools, like SPICE, to simulate the behavior of the

CMUT, individually or in connection with supporting electronic circuits.

mp Rloss mm

Rm

1/kp-1/ksoft

C0Cp

Rp

RS

V FZp

1 : n

+

- x

Q

Zm

 Figure 2-4. Equivalent circuit model of CMUT (F=0 in transmit and V=0 in receive). C0: device capacitance, n: electromechanical coupling coefficient, Zp: plate mechanical

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impedance, Zm: medium impedance, Rs: source impedance, Cp: parasitic capacitance, Rp: parasitic resistance.

Figure 2-4 shows the equivalent circuit for a CMUT transducer. In the electrical

part, C0 is the clamped capacitance of the device at the bias voltage. Spring softening

capacitance and the mechanical plate impedance constitute the mechanical part. The two

parts are coupled together through an electromechanical transformer (1:n). The lumped

elements representing a CMUT in the mechanical port can be obtained from the mass-

spring-damper system model. The CMUT top plate is modeled with a spring, pk , and a

mass, pm . The medium impedance is simply modeled using a damper, mR , and a mass,

mm . We can derive the transfer function of the CMUT in TX mode by setting F = 0 and

in RX mode by setting V=0 in Figure 2-4. The voltage across mR represents the force on

the top plate. Assuming that sR , pR , and pC are zero, and lossR and mm can be ignored,

the magnitude of the TX and RX transfer function are given by

21

22

202 )1()(1

⎥⎦

⎤⎢⎣

⎡−+== ∑ωωω

mTX R

mAn

VPS , (2-19)

and 21

22

202 )1()(1

⎥⎥⎦

⎢⎢⎣

⎡−+== ∑ωωω

mmRX R

mRAn

PIS , (2-20)

where ∑∑=mk

0ω , psoft kkk +=∑ , mpt mmm +=∑ , and 0

2

Cnksoft =

It is seen from the expression for the transfer function in Equation 2-19 and

Equation 2-20 that both the maximum sensitivities in TX and RX occur at 0ωω = . By

plugging 0ωω = into Equation 2-19 and Equation 2-20, it is not surprising the results are

the same as those derived from the parallel-plate capacitor model:

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AnSTX =max, , and m

RX RnAS =max, (2-21)

2.3 CHARACTERIZATION METHODS FOR CMUTS

2.3.1 CHARACTERIZATION IN AIR

In air or vacuum, the medium loading on CMUT plates is negligible, and the

plates show good resonance behavior. The input impedance measurements, in these

cases, are helpful in determining the following parameters: resonant frequency, quality

factor, device capacitance, static collapse voltage, leakage resistance and series

resistance. These parameters, together with the plate and gap dimension measurements,

provide valuable insights to parameters that are more difficult to measure on finished

devices, such as Young’s modulus and residual stress in the plates.

The input impedance can be directly measured using an impedance analyzer, or

by measuring the scattering parameter (S11) using a network analyzer and converting to

impedance. In either case, a bias T is needed to enable the superimposition of an AC

voltage on top of a DC bias on the CMUT while protecting the measurement instrument

from being exposed to the DC voltage (Figure 2-5).

The real part of the input impedance peaks at the open circuit resonant frequency

(Figure 2-6). This frequency decreases with increasing DC bias voltage. This

phenomenon is due to the presence of parasitic capacitance. The amplitude of the

resonance peak will increase with increasing bias voltage due to the higher transduction

efficiency. When the electrostatic force surpasses mechanical restoring force from the

plate spring, the plate pull-in occurs. When this happens, the resonant frequency

increases significantly because of much stiffened plate spring [15], [16]. The pull-in

voltage can therefore be determined experimentally by noticing this sudden change in the

resonant frequency.

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High voltage power supply

Bias “T”Network Anaslyzer

CMUT  

Figure 2-5. Experimental setup for input impedance measurements.

Rea

l par

t of i

mpe

danc

e (Ω

)

Frequency (MHz)Im

agin

ary

part

of im

peda

nce

(Ω)

Frequency (MHz)  Figure 2-6. Typical electrical input impedance of a CMUT element.

2.3.2 CHARACTERIZATION IN IMMERSION

For many applications, such as medical imaging, the CMUT is operated in

immersion or in contact with tissue. For these applications, some of the key

characteristics for the transducer are output pressure, receive sensitivity, center frequency

and fractional bandwidth. The output pressure and the receive sensitivity determine the

penetration depth; center frequency is determined by the application; the frequency

response determines the resolution of the system.

The transmit/receive behavior of a CMUT can be characterized in the pulse-echo

measurement (Figure 2-7). Usually, the transducer is biased at a certain DC voltage, and

a broadband electrical excitation pulse is superimposed on top of the DC voltage. A plane

reflector or the fluid-air interface is located in the far field of the transducer element. The

acoustic wave that bounces back from the reflector will change the CMUT capacitance,

causing a voltage change across the CMUT. This electrical signal is amplified and read

out onto an oscilloscope. A Fourier Transform can be performed on the received

waveform to determine the band shape (Figure 2-8). This band shape can be corrected for

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the medium attenuation and diffraction as well as the excitation pulse shape to yield the

true transducer frequency response of the transducer [17].

The absolute value of the total output pressure can be measured with a needle type

hydrophone. Instead of a plane reflector, a hydrophone is placed perpendicular to the

transducer surface in far field. The hydrophone gives a pressure reading. The pressure at

the surface of the transducer can be inferred from this pressure level, after taking into

consideration of the medium attenuation and diffraction.

Oscilloscope Preamplifier

DC bias network

Function generator

High voltage power supply

CMUT

Water/oil tank

Use fluid/air interface as a reflector

 Figure 2-7. Experimental setup for pulse-echo measurements.

5 10 15 20-30

-25

-20

-15

-10

-5

0

Frequency [MHz]

Nor

mal

ized

pre

ssur

e [d

B]

Impulse Frequency Response

1.6 1.8 2 2.2 2.4 2.6x 10-6

-4

-2

0

2

4

6 x 10-4

volta

ge (V

)

time (sec)

Pulse Signal

 Figure 2-8. Typical pulse-echo waveform and band shape for a 185-um by 185-um CMUT element in a 2D array.

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Other dynamic performance methods including a laser-interferometry for CMUT

plate displacement measurement is introduced in section 4.1. More static characterization

methods, such as SEM, AFM and a white-light interferometry, are discussed in detail in

section 2.4 as ways to evaluate the gap-height variation.

2.4 STATIC OPERATING POINT EVALUATION

It was discussed in section 2.2 the gap-height directly affects the static operation

point of the CMUT which in turn affects the receive sensitivity and the total possible

output pressure. In this section, the characterization of fabrication related gap-height

variations in CMUTs using sacrificial release process is reported (Figure 2-9). The

CMUTs under investigation were found to have lower pull-in voltage, smaller maximum

plate deflection and missing pull-in behavior as compared to theory. The in-cavity

deposition was examined by SEM and the surface topography on the bottom side of the

gap by AFM. The AFM measurements were evaluated for devices with and without in-

cavity-deposition as well as devices fabricated with doped polysilicon film or doped bulk

silicon for the bottom electrode. A methodology to determine the contribution of each

layer in the fabrication process to surface roughness is presented. The results show that

surface roughness reduces the actual gap-height, and the polysilicon layer is the main

contributor.

2.4.1 BACKGROUND AND MOTIVATION

To design CMUTs arrays for medical imaging, we optimize gap height, plate

radius, and plate thickness for the optimum total acoustic output pressure, transmission

efficiency, and reception sensitivity. All of those are strong functions of gap-height

(Table 2-1).

Table 2-1. Performance index as functions of gap-height

Performance Index Function of gap Acoustic output pressure ∝ gap Transmission efficiency ∝ 1/gap2 Reception sensitivity ∝ 1/gap2

For high frequency designs, a small gap height, as small as 50nm, is needed to

maintain a reasonable pull-in voltage. Fabricating such a small gap with the sacrificial

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release process is very challenging. Any deviation from the expected gap-height could

lead to large changes in performance.

2.4.2 MATERIALS AND METHODS

Fabricating a CMUT using sacrificial release process is widely used because the

surface micromachining approach is compatible with the IC fabrication process. In

addition, the through-wafer-via, a well-established technology for the electronics

integration, can be easily incorporated into the process to enable a 2D array. Using a

CMUT array fabricated by this technology with a 10MHz center frequency design, a gap

of 120nm was chosen to maintain a reasonable pull-in voltage. The transducer’s

specifications are given in Table 2-2.

Table 2-2. Design parameters and values

Design parameter Target value

Center frequency 10MHz Radius 15.5µm Plate thickness 650nm Gap height 120nm Insulator thickness 180nm

To investigate the pull-in behavior and compare with the models, the frequency

response of the transducer and the deflection of the plate were measured under applied

DC voltage. The frequency response was measured using a vector network analyzer (HP

8751A) under applied DC voltage (SRS PS 310 high voltage power supply, Stanford,

CA). The static deflection was also measured using a white light interferometer (Zygo

NewView 2000) under applied voltage. The static deflection measurement enables the

detection of not only the plate pull-in but also the total maximum deflection that should

be equivalent to the gap height.

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Si substrate

Poly-silicon

Doped polysilicon

LPCVD Si3N4

Thermal oxide

LTO

Aluminum

Through wafer via etch and thermal oxidation

Conductive poly-silicon deposition and doping

Poly-silicon fill

Doped poly-silicon and patterning

Si3N4 (etch stop layer) deposition

Poly-silicon deposition and active area patterning

Membrane deposition and etch hole opening

KOH release of the membranes

Seal the etch hole

Sputter and pattern the metal

 Figure 2-9. Sacrificial release process: (a) Substrate doping, etch-stop layer deposition (LPCVD silicon nitride), first sacrificial layer deposition (LPCVD poly-silicon) and patterning, (b) second sacrificial layer deposition for reduced etch channel height regions, (c) active area definition, (d) plate deposition, (e) define sacrificial release etch holes and etch silicon nitride, (f) plate release in KOH, (g) plate sealing with more silicon nitride deposition, (h) top electrode deposition and patterning

It was verified that the process produced the desired gap-height by using a

scanning electron microscope (FEI XL30 Sirion SEM) to view the cross-section of a cell.

The gap-height was confirmed by measuring the height at the edge of the cell. This is

because other points at the center of the plate are deflected downwards from stress in the

nitride, so only the edge is the correct measurement of the gap-height. A SEM

measurement was also performed to view the surface roughness of the bottom side of the

gap by peeling off the CMUT plate.

In order to identify the source of the surface roughness, a Digital Instruments

Nanoscope 3000 Atomic Force Microscope (AFM) was used to compare devices with

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and without in-cavity-deposition as well as devices with heavily doped polysilicon film

versus heavily doped bulk silicon as bottom electrode (Figure 2-10).

Unsealed-cavity CMUTs Sealed-cavity CMUTs

Doped-substrate CMUTsDoped-polysilicon CMUTs

vs.

vs.

(b)

(a)

 Figure 2-10. The comparison of the surface roughness from the bottom side of the gap between (a) The CMUTs with and without sealing, and (b) The CMUT with doped polysilicon and thermal oxide and the one with doped substrate

Si substrate

Amorphous-silicon

Doped polysilicon

Silicon-nitride

Thermal oxide

A

B

C

D

E

�  

Figure 2-11. A comprehensive surface topography characterization for each material layer at different process step. This approach start from five wafers (A, B, C, D, and E)

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with one deposition step behind compared to each wafer process run (starting from step 1, 2, 3, 4, or 5).

Si substrate

Amorphous-silicon

Doped polysilicon

Silicon-nitride

Thermal oxide  Figure 2-12. The methodology to quantify the topography/roughness change due to each layer from the full run device.

The results of the AFM on the actual device motivated us to do a more systematic

study using the AFM to measure the surface topography of different material layers at

different points in the process (Figure 2-12). Starting from five wafers, every wafer starts

from each offset process step. This approach enabled us to measure the roughness of

individually new-deposited layers (wafer A1, B2, C3, D4, and E5), and also to monitor

the surface roughness change through the real process run (wafer A1~A6).

In addition, the contribution of surface roughness from each layer is available

from the comparison as shown in Figure 2-12. Since the roughness is the combination of

the material itself in association with the experienced thermal cycles, the surface

roughness of interest has to include the effects of the neighboring layers during thermal

cycling. It is difficult to etch back layer by layer without altering the surface topography,

so we compared the difference of the results between the case with and without the layer

of interest.

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2.4.3 RESULTS AND DISCUSSION

2.4.3.1 Static deflection and impedance measurements

Static deflection measurements and the frequency response were used to verify

the response of our designed plate with the model. According to the design, a pull-in

behavior around 65 V and a deflection of 120 nm was expected. Instead, it was found

that the pull-in behaviors were missing and the deflection saturated at 80 nm instead of

120 nm of the gap-height (Figure 2-13), which motivated to study the gap-height

variations.

Center Deflection V.S. Bias (P14-RingTest)

0

20

40

60

80

100

0 5 10 15 20 25 30 35 40

Bias Voltage (V)

Cen

ter

Defl

ecti

on

(n

m)

Real Part of Impedance (Ω)

Bias Voltage (V)

Frequency (MHz)

0 5 10 15 20 25 30 35 40

10

15

20

25

30 50

100

150

200

250

300

350

Bias Voltage (V)

Frequency (MHz)

Sign of the Imaginary Part of Impedance (Ω)

0 5 10 15 20 25 30 35 40

10

15

20

25

30

-0.8

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

0.8

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

Bias Voltage [V]

30

20

10

Peak

freq

uenc

y [M

Hz]

Bias Voltage

Peak

freq

uenc

y

Bias Voltage

Cen

ter D

efle

ctio

n

Bias Voltage [V]

0 40

0 40

Missing gap

Cen

ter D

efle

ctio

n (n

m)

No frequency jump

No deflection jump

Deflection jump

Frequency jump

 Figure 2-13. Behavior of center deflection versus DC bias and real part of input impedance versus DC bias: (a) Theoretical part, and (b). Measurements part.

2.4.3.2 SEM measurements

The gap height from the edge of the cell was measured to be 120±10 nm from the

SEM picture [Figure 2-14(a)], which is very close to the design. The measurement

showed that the total in-cavity deposition was well controlled by the reduced-height

sealing channel.

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In addition, SEM was used to view the bottom side of the gap [Figure 2-14(b)]

and a roughness was observed the same order as gap-height, which may account for the

gap-height variations.

120 ± 10 µm

 Figure 2-14. (a) SEM photograph (cross-section) of one CMUT cell showing the gap-height, and (b) SEM photograph of surface roughness from the bottom side of the gap

2.4.3.3 AFM comparisons of various CMUTs

There are two sources of the roughness at the bottom of the cavity: in-cavity

deposition and individual roughness of various layers.

First it was compared the surface roughness of an unsealed and sealed cavity and

found very close surface roughness of 3.8 nm and 3.9 nm RMS [Figure 2-10(a)],

respectively. This indicates the sealant does not contribute to the surface roughness. Next,

it was investigated whether roughness of the underlying layers contributed to the

roughness by comparing the cases in Figure 2-10(b). CMUTs with doped polysilicon and

underlying thermal oxide showed 9.5 nm RMS, which is much higher than 3.9 nm RMS

of CMUTs with doped bulk silicon substrate. It means the cumulative roughness from

underlying layers significantly contributes to gap-height variation.

2.4.3.4 AFM differential comparisons of a process mimicking the real fabrication run

Given that the underlying layers contributed to the surface roughness, the

roughness of each individual deposited layer as well as combinations of layers through

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thermal cycles in the process were investigated. First the contribution of individual layers

were investigated (Table 2-3: wafer A-1a, B-2a, C-3, D-4, and E-5). It was found that the

polysilicon produces the most roughness, 108±24 nm, which is 16-120 times greater than

the roughness of any other individual layer.

Table 2-3. RMS surface roughness measured by AFM

Process step Temp. Time

A B C D E

0 Prime wafer - 0.1 nm 0.1 nm 0.1 nm 0.1 nm 0.1 nm 1a Thermal oxide 1000oC

4h.50m 0.2 nm - - - -

1b Thermal cycles - - - - - - 1c Etch-backh to the

oxide - 3.0 nm - - - -

2a LPCVD polysilicon 620oC 1h.20m

17.5 nm 23.9 nm

- - -

2b P diffusion doping 900oC 1h.30m

10.4 nm 13.9 nm

- - -

3 LPCVD low-stress nitride

785oC 1h

9.7 nm 11.8 nm

1.2 nm - -

4 LPCVD amorphous silicon

560oC 57m

8.0 nm 10.5 nm

1.4 nm 0.3 nm -

5 LPCVD low-stress nitride

785oC 5h.05m

8.4 nm 9.9 nm 1.7 nm 1.5 nm 1.5 nm

6 TMAH wet-release - 9.2 nm - - - -

Next, it was investigated the roughness of successive layers during processing

(Table 2-3: wafer A0~A6). A-1a shows that the oxide layer itself does not add roughness,

and then the surface became rougher with 3 nm RMS (Figure 2-15) in A-1c. The reason

is that the oxide has glass transition temperature is between 900 oC to 1100 oC [18]. The

oxide was softened due to the much lower viscosity at 1000 oC. Meanwhile, the grain

growth of the polysilicon layer punctures the oxide. Consequently, the oxide is imprinted

by polysilicon during high temperature and left with a higher roughness.

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 Figure 2-15. Thermal Oxide is roughened due to imprinting by overlying polysilicon

layer

In Table 2-3: A-2a, the deposition of LPCVD polysilicon and doping with

phosphorus increases surface roughness from 3 to 17.5 nm RMS. It is the largest

roughness rise through the whole process. In contrast, the largest reduction of surface

roughness occurred after the doping step, which reduced the value from 17.5 nm RMS to

10.4 nm RMS (Table 2-3: A-2b). This reduction may be a result of the 900 °C annealing

used to dope the polysilicon, which not only joined and enlarged the grain size in x-y

direction but also relaxed the high surface energy from columnar grain structure [19] to

the typical hemisphere grain shape (Figure 2-16) [20].

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 Figure 2-16. Doping reduces surface roughness of polysilicon

The relative smooth nitride layer was grown after the doping, which provide a

conformal deposition and results in a smoother surface from 10.4 nm RMS to 9.7 nm

RMS [Table 2-3: A-3]. Through steps A-4~6, the nitride shows a surface roughness

value of 9.2nm RMS, which is very close to our measurement from actual devices.

 Figure 2-17. Roughness contributed from doped polysilicon.

2.4.3.5 Roughness contribution from various layers

In order to see the contribution of surface roughness from each layer, it was

compared three pairs of wafers with and without the layer of nitride, thermal oxide and

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polysilicon. Both of the cases with and without nitride and oxide [Figure 2-14(b-I, III)],

were similar in surface roughness, measuring 1.7 nm RMS versus 1.5nm RMS and 8.4

nm RMS versus 9.9 nm RMS (Table III: C-5 vs. D-5 and A-5 vs. B-5), respectively.

Compared to the case shown in figure 4b-II, the roughness 9.9 nm RMS with polysilicon

layer compared to 1.7 nm RMS without polysilicon (Table 2-3: B5 vs. C5) proves that

the doped polysilicon layer is the main contributor to the final surface roughness.

2.4.4 CONCLUSIONS

The characterization of fabrication related gap-height variations in CMUTs was

studied in this section. The results show that the surface roughness reduces the actual

gap-height, and the polysilicon is the layer most responsible for the increased surface

roughness. Therefore, surface roughness should be accounted for in small gap designs if

the nitride sacrificial release method is used. Otherwise, an SOI wafer bonding for thin

gap devices is preferred for CMUTs with small gap height design.

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CHAPTER 3 FRONTSIDE INTERFACE ENGINEERING

OF CMUTS

The packaging of a medical imaging or therapeutic ultrasound transducer should

provide protective insulation while maintaining high performance. For a capacitive

micromachined ultrasonic transducer (CMUT), an ideal encapsulation coating would

therefore require a limited and predictable change on the static operation point and the

dynamic performance, while insulating the high DC and AC actuation voltages from the

environment. To fulfill these requirements, viscoelastic materials, such as

Polydimethylsiloxane (PDMS), were investigated for an encapsulation material. In

addition, PDMS, with a glass-transition temperature below room temperature, provides a

low Young’s modulus that preserves the static behavior; at higher frequencies for

ultrasonic operation, this material becomes stiffer and acoustically matches to water. This

chapter presents the modeling and implementation of the viscoelastic polymer as the

encapsulation material. A finite element model (FEM) is introduced that addresses

viscoelasticity. This enables a correct calculation both the static operation point and the

dynamic behavior of the CMUT. CMUTs designed for medical imaging and therapeutic

ultrasound were fabricated and encapsulated. Static and dynamic measurements were

used to verify the FEM, and show excellent agreement. This work will help in the design

process for optimizing the static and the dynamic behavior of viscoelastic-polymer-

coated CMUTs.

3.1 ENCAPSULATION DESIGN

The packaging of a micromachined ultrasonic transducer is crucial for medical

applications. This packaging material should electrically insulate the device from the

environment, protect the device against humidity and other corrosive substances, and also

be biocompatible. At the same time, this encapsulation should maintain transducer

performance, especially the transfer of energy to and from the medium. While other

microelectromechanical system (MEMS) devices such as accelerometers and gyroscopes

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are typically protected from the environment by hermetic sealing, CMUTs require

mechanical interaction to a fluid (Figure 3-1), which makes fulfilling the previous criteria

very challenging. In this work, it was discussed the requirements on such a coating

material for a CMUT used in immersion applications. Then it was presented a model of a

viscoelastic material (e.g. PDMS), and the model was verified using experiments.

l Accelerometerl Gyro

?Immersion

Hermetic sealing

Air window l Pressure sensorl Microphone

l Optical sensorl Micromirrorarray

Glass plate Optical fiber

l Ultrasonic transducer− Medical imaging− Therapeutic ultrasound

(a)

(b)

(c)

(d)  

Figure 3-1. Encapsulation approach for various MEMS devices.

3.1.1 STATIC OPERATION AND DYNAMIC PERFORMANCE OF ENCAPSULATED CMUTS

CMUTs have demonstrated promising performance, ease and flexibility of

fabrication, and ease of electronics integration, which makes them advantageous over

conventional piezoelectronic transducers [21], [22]. The encapsulation material of

CMUTs should provide the matching acoustic impedance to the medium (1.5 MRayl for

water or 1.63 MRayl for average human soft tissue [23]) to enable maximum

transmission of energy into the medium. Based on transmission line theory (Equation

3-1), the incident wave transmit efficiency is strongly related to the acoustic impedance

matching condition [14].

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2)(1cm

cmenergy ZZ

ZZT+−

−= (3-1)

where energyT , cZ , and mZ are the energy transmission ratio, and the acoustic

impedance of the coating material and the medium respectively. The matching acoustic

impedance can be further related to the Young’s modulus based on the elasticity theory

[14].

)1()21)(1(12

υυυ

ρ −−+⋅⋅= ZE , (3-2)

where E , υ , Z , ρ represent the Young’s modulus, Poisson’s ratio, acoustic

impedance, and density, respectively. In order to match the acoustic impedance of 1.5

MRayl, a Young’s modulus on the order of GPa (with a Poisson’s ratio of 0.40 and

density of 1000 kg/m3) is needed (Equation 3-2).

Operation of a CMUT requires both a DC and AC voltage. The DC voltage sets

the operation point of the device, and establishes the transmit and receive sensitivities

[24] and the electromechanical coupling efficiency [25]. Since this point determines the

performance of the device, it is important to predict and limit the impact of the

encapsulation material on the pull-in voltage variation. In addition, a practical thickness

of the coating should be of the order of hundreds of microns to protect the device against

the regular contact ablation force and the electrical breakdown. Considering these factors

and the Young’s modulus of the CMUT plate material, a Young’s modulus for the

coating material on the order of MPa is essential to limit the pull-in voltage variation.

Fulfilling the AC and DC requirements of this encapsulation material are

challenging unless the coating materials are used that exhibit viscoelasticity. This work

presents the first modeling and verification of the viscoelasticity of polymers for CMUT

immersion imaging applications.

3.1.2 VISCOELASTICITY OF POLYMER

Many polymers used for MEMS applications exhibit viscoelastic behavior [26],

[27], [28]. The Young’s modulus and Poisson’s ratio change as functions of loading

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38

frequency. This occurs because a relaxation time is needed under a corresponding strain

rate. As the loading frequency increases, the behavior of the polymer changes from

rubbery to glassy [26], resulting in a change in the Young’s modulus and the Poisson’s

ratio from the slow limit values ( sE , sυ ) to the fast limit ones ( fE , fυ ). The Young’s

modulus can differ up to several orders of magnitude, with the modulus being stiffer at

higher frequencies [27]. Poisson’s ratio decreases from close to 0.5 down to 0.35~0.4

[29], leading the )21)(1()1(υυ

υ−+

− part of Equation (3-2) to reduce by one order of magnitude.

Due to these changes, the acoustic impedance increases from hundreds of kRayl up to

MRayl range as the loading frequency is increased.

For CMUTs that operate in the MHz range, a preferred rubber to glassy transition

frequency should be smaller than 1 MHz [Figure 3-2(a)]. At low frequencies, the

Young’s modulus is in the MPa range; as the loading frequency is increased to the

ultrasonic region, the Young’s modulus [Figure 3-2(a)] approaches GPa, which translates

to a good matching acoustic impedance. In terms of temperature, a material should be

chosen so that it is in the rubbery state at room temperature for static loading and a glass

transition temperature that is lower than room temperature [Figure 3-2(b)] [26], [27].

(a)

100 kRayl

Loading frequency

Fast

Slow

E Z

1 MRayl

MPa

GPa

1MHzStatic

(b)

Rubbery

Glassy1 MRayl

100 kRaylMPa

GPa

Temperature Room Temperature

E Z

Tgfg

 Figure 3-2. Viscoelastic curves of PDMS in terms of the Young’s modulus and acoustic impedance over (a) loading frequency, or (b) temperature based on the theory of time-temperature superposition. Tg and fg represent the glass-transition temperature under static loading, and the glass-transition loading frequency in room temperature, respectively.

Among the polymers listed in Table 3-1 [28], PDMS fulfills the needed

requirements because its glass transition temperature ( gT ) is much lower than the room

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temperature. This characteristic provides the low static Young’s modulus for preserving

the CMUT’s pull-in voltage; at the same time it offers the matching acoustic impedance

needed for efficient acoustic transmission. Finally, PDMS is a biocompatible substance

that provides protection against biofouling, thermal instability, and dielectric breakdown

[9]. However, since it is not photo-patternable and plasma-etchable, a mold-casting

technique will be utilized to fabricate these encapsulation layers.

Table 3-1. Properties of various polymer materials commonly used for MEMS applications [28], [30].

Glass transition Modulus Density Temperature

(oC) (GPa) (g/cm3)

PDMS -125 ~0.001 1.00~1.64 Polyimide 390 ~3.3 1.42~1.53 EPON SU-8 194 ~4.5 1.2 PMMA 105 ~2.5 0.9 Parylene 160 ~2.5 1.1~1.4

PDMS has been routinely used as a lens material for piezo-electric ultrasound

transducers [31]; processing techniques and material properties of PDMS are well

understood. Previously, polymer coatings including PDMS were used to electrically

insulate CMUTs in immersion applications [32][33][34][35]; to create flexible arrays

[36][37] and to improve acoustic crosstalk suppression [38][39][40][41]. However, the

study of using polymer coatings on a CMUT has been based on a “go and redesign” base

such that a fundamental and systematic study providing a design rule has been absent. In

addition, while analytical and FEM modeling of CMUTs with different shapes, gap

heights, plate topologies, plate stress have been used to optimize bandwidth, output

pressure and sensitivity [42][43][44], none of these studies have considered the effects of

the viscoelasticity of coating material layers on the CMUT’s performance. In order to

successfully perform a CMUT design that accounts for the effects of PDMS coating

layers, a FEM was introduced that considers viscoelasticity and can be used to analyze

the pull-in voltage and frequency response of CMUT for immersion.

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3.2 FABRICATION PROCESS

3.2.1 CMUT FABRICATION

The bandwidth and transmission efficiency of CMUTs can be optimized for

diagnostic and therapeutic ultrasound, e.g. high intensity focused ultrasound (HIFU), by

changing the cell size, gap height and plate thickness. A PDMS coating on different

geometry CMUT cells has different effects. In order to demonstrate the implementation

of PDMS encapsulation on CMUTs designed for different applications, both imaging and

HIFU CMUTs were modeled, designed, and fabricated.

An imaging CMUT should be designed to provide high center frequency with

wide bandwidth. A relatively thinner plate thickness and gap height with a smaller cell

size were used. HIFU CMUTs are required to operate at single frequency but generate

high output pressure, so a thicker plate and larger gap height were used (Table 3-2) [45].

Table 3-2. Parameters of the CMUTs for imaging and HIFU.

Device Imaging HIFU Configuration 1D linear array Single element Radius of CMUT cell 21.5 µm 50/ 70 µm Thickness of Si plate 2.0 µm 6.0 µm Gap height 0.15 µm 0.40 µm Thickness of SiO2 insulator 0.30 µm 0.60 µm

Among the two developed CMUT fabrication technologies available, wafer

bonding and sacrificial-release techniques [46][47], the fusion-bonding approach was

chosen since the plate thickness was 6 microns. In the sacrificial release process, forming

such a thick plate using chemical vapor deposition (CVD) is not possible due to residual

stress and deposition time for cells of those lateral dimensions. Figure 3-3 shows the

process used for fabricating the CMUT arrays based on a wafer bonding technique. First,

the highly conductive Si wafers (0.01-0.025 ohm-cm) are selected. Then 400-nm and

150-nm-high cavities are formed by a two-step thermal oxidation-and-etch, a buffered

oxide etch (BOE) and then a dry plasma etch. The second step etching is to remove the

bird beak formed by the second oxidation step. Next, two kinds of silicon-on-insulator

(SOI) wafers are selected, with the device layer thicknesses of 6 µm and 2 µm,

respectively. The SOI wafers are then bonded on top of the etched wafers using fusion

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bonding. The handle wafers are then removed using wafer grinding (Silicon Quest

International, Inc., Santa Clara, California) and then wet etching in a hot

tetramethylammonium hydroxide (TMAH) solution. The buried oxide layer is then

removed by BOE, leaving the 6-μm and 2-μm plate covering the cavities. For the

imaging CMUT, elements within an array are defined by separating the silicon plates

with a dry plasma etch step. Then aluminum is deposited, and hot and ground electrodes

are defined on the plate and the silicon substrate, respectively. Figure 3-4 shows various

views of the finished devices. The last step of the fabrication is the PDMS encapsulation

of CMUTs. To optimize the PDMS coating in terms of the coupling efficiency, the

adhesion issue was discussed in detail in section 3.2.2, and various coating techniques

were covered in section 4.2 and 4.3.

Si SiO2 Al PDMS

(1)

(2)

(3)

(4)

(6)

(a) (b)

(5)

 Figure 3-3. CMUT device fabrication using wafer bonding technique for (a) imaging CMUTs and (b) HIFU CMUTs. The process flow include (1) first oxidation and BOE oxide etch, (2) second oxidation and dry etching, (3) wafer bonding, (4) handle wafer and BOX removal and etch back for substrate access, (5) top electrode deposition and patterning, and (6) PDMS coating.

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(a) (b) (c)

(d) (e) (f)

Silicon plate

Vacuum cavity

SiO2 insulator

Vacuum cavity

Silicon plate

SiO2 insulator

Aluminum

Aluminum

Si substrate

Si substrate

x (µm)

y (µm)

x (µm) y (µm)

Disp

. (nm

)

Disp

. (nm

)

Ground wire

Signal wire

Ground wireSignal wire

One array element

One CMUT cell

One CMUT cell

 Figure 3-4. Imaging CMUTs pictures of (a) SEM cross sectional view of a cell, (b) 6 elements of one array with wire bonding, and (c) CMUT cells with plate deflection under DC bias of 80% of pull-in voltage measured by white light interferometer. Similarly, HIFU CMUTs pictures are shown in (d)-(f).

3.2.2 PDMS ENCAPSULATION

Polydimethylsiloxane (PDMS) is known for its useful properties, such as

flexibility, low Tg, and low surface energy [48]. These characteristics are associated with

the requirements for CMUT encapsulation; a Tg lower than room temperature was

required to maintain both static and dynamic performance of CMUTs. Good adhesion,

through the modification of surface energy, was essential for the energy coupling

between the CMUT/PDMS interface. To better utilize those characteristics, it is

important to understand the chemistry of the individual elements of the polymer as well

as the behavior of the functional group.

PDMS is formed by alternating silicon and oxygen atoms as backbone with

functional group of methyl (Figure 3-5). The flexibility comes from the bendable Si-O-Si

bond, which can vary between 135o and 180o. Bending flexibility occurs when there is a

large hindrance between non-bonded atoms, where there are unfavorable torsion angles.

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Flexibility has an important role in the low Tg; the higher the flexibility, the lower the Tg.

These polymers can be made less flexible for better abrasion resistance by adding bulky

side groups, while resulting in a higher Tg.

 Figure 3-5. Chemical structure of PDMS

Low surface energy, or surface tension, is another key feature of PDMS,

influencing the surface wettability and thus the adhesion. The mechanism for the low

surface energy is that the methyl groups have virtually no interactions with each other.

Alternatively, the low surface energy can be related to the low boiling point.

The adhesion is essential for an efficient ultrasonic energy coupling through the

CMUT/PDMS interface. PDMS can be surface treated to be hydrophilic for better

adhesion. Adhesion studies for two scenarios, the cross linked PDMS and the semi liquid

form of PDMS, were discussed in the following sections.

3.2.2.1 Adhesion on cross-linked PDMS

An efficient microfluidics device, with PDMS-formed microchannel, requires

sidewall wettability. Researches on microfludics have demonstrated knowledge to

improve the hydrophilicity of PDMS surface, through the roughness manipulation or the

functional group grafting [49]. A plasma treatment, roughening the surface (Figure 3-6),

can increase the local contact angel, and enable the hydrophilicity in macro behavior

(Figure 3-7). A formation of silanol group serves the same purpose to increase the

wettability of PDMS surface (Figure 3-8). The aging induced hydrophobicity recovery

(Figure 3-10) can be prevented with a further HEMA grafting, creation of the hydroxyl

terminated function group (Figure 3-9).

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 Figure 3-6. SEM of PDMS surface (a). Before plasma treatment, and (b). After plasma treatment (after [49]).

 

 Figure 3-7. Relationship between the surface topography in micro scale and hydrophilic behavior in macro scale (after [49]).

 

 Figure 3-8. Silanol group of PDMS surface treatment (after [49]).

   

 Figure 3-9. HEMA grafted PDMS: creation of the hydroxyl terminated function group

(after [49]).

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   Figure 3-10. Aging induced hydrophobicity recovery effect on PDMS with various surface treatments (after [49]).

3.2.2.2 Adhesion on semi liquid PDMS

Researches on adhesive bonding have studied the adhesion of the semi liquid

form of PDMS to the substrate. PDMS was utilized as a bonding agent for the benefits of

low bonding temperatures and insensitivity to the topology [50]. Adhesion between the

semi liquid PDMS adhesive and the substrate is from the covalent and Van Der Waals

bonds, where the atoms of two opposing surfaces must be less than 0.3–0.5 nm apart

[50]. In light of the proximity requirement, the wetting of the surfaces is critical; the solid

surface must have a greater surface energy than the liquid for wetting to occur. Typically,

a primer, silicone powder content mixed in a methanol and ethanol solvent, was required

to improve the wettability. The solvent provides low viscosity with less than 10

centipoises (cP) compared to over thousands of cP of semiliquid PDMS. Low viscosity,

along with the ultralow surface energy (Figure 3-11) versus the solid substrate, helps the

silicone content to fill with the troughs of the surface profile for closer contact distance.

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46

TungstenDiamond

PlatinumSilicon

AluminumTin

Glass

Ice

Epoxies

PolyethyleneTeflon Ethanol/ Methanol

EpoxiesPolyurethanes

Water Glycerol

Surface Energy (mJ/m2)

 Figure 3-11. Surface energy of various solids and liquids.

3.2.2.3 Primer induced metal interconnections failure

CMUT behaves like a parallel plate capacitor, where a DC bias was required

between two electrodes. There are four possible biasing schemes: electrically grounding

the top or bottom electrode, and biasing another electrode with positive or negative

polarity (Figure 3-12). It was reported thermal decomposition of ethanol could increase

the surface conductivity [51]. Consequently, the biasing scheme needs to be carefully

selected to prevent from the current leakage induced interconnection failure.

Electrical input impedance was performed with all four biasing schemes. DC bias

was swept from 0 to 190 V, while the CMUT cells and interconnections were inspected

under the optical microscope for integrity. It was observed only the case with biased top

electrode and positive polarity suffers the interconnection failure due to the loss of

Aluminum at DC of 190 V (Figure 3-13). Cause to failure was suspected due to an

electrochemical reaction comparable to electromigration, because the failure only

happens with positive polarity when the top electrode is biased.

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47

Conductive polysilicon

NitrideAluminum

Primer

Conductive polysilicon

NitrideAluminum

Primer

Conductive polysilicon

NitrideAluminum

Primer

Conductive polysilicon

NitrideAluminum

Primer

 Figure 3-12. Four biasing schemes for CMUT operation.

Real Part of Impedance (Ω)

Bias Voltage (V)

Freq

uenc

y (M

Hz)

60 80 100 120 140 160 180

2

4

6

8

10

12

14 -8

-6

-4

-2

0

2

4

6

8

10

x 105

Bias Voltage (V)

Freq

uenc

y (M

Hz)

Sign of the Imaginary Part of Impedance (Ω)

60 80 100 120 140 160 180

2

4

6

8

10

12

14-1

-0.5

0

0.5

1

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10

0.2

0.4

0.6

0.8

1

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10

0.2

0.4

0.6

0.8

1

Bias Voltage (V)

Freq

uenc

y (M

Hz)

Real part of impedance (Ω)

Bias =0~180V Bias >190V

 Figure 3-13. Electrical input impedance results and the optical microscopic images of the CMUTs before and after the surface-conductivity-induced interconnection failure.

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48

3.2.2.4 Plasma etching for surface treatment

Alternatively to the primer, a plasma etch on the substrate can activate the surface

to be hydrophilic. Treatments in oxygen plasma can remove organic residue to improve

the surface wetting while forming a thin oxide layer at the bonding interface [52], [53].

Surfaces etched in an Ar/H2 plasma showed an appreciable increase in the bonding

strength after a thermal desorption of hydrogen at temperatures between 400 °C and 600

°C [54], [55]. SF6/O2 mixtures plasma etching can result in a surface layer of silicic acid

(SiO2⋅nH2O), with the presence of moisture, which leads to the formation of Si-OH bond,

behaving hydrophilic [56].

Among the plasma etching options, Ar/H2 is not favorable because the presence of

the aluminum for the current design. Hence, the oxygen plasma and SF6/O2 will be

utilized for contamination removal and surface modification to improve the adhesion.

3.2.2.5 Encapsulation assembly

To encapsulate CMUT with PDMS, the devices were diced and then wire bonded

to a custom-designed printed circuit board (PCB) after device level fabrication. Before

application of the encapsulation material, we performed an oxygen plasma cleaning step

on the CMUTs surface and applied a primer (GE SS4120) on the PCB to increase the

interface adhesion. Then a 150-μm-thick layer of GE RTV 615 PDMS was mold casted

by pressing a Polystyrene plate on the CMUTs with a spacer. This was followed by a

vacuum chamber degassing step, a curing cycle at 50oC for 12 hours, and a mold-

releasing step. Finally, the exposed wires for interconnections were encapsulated by

epoxy for water-immersion tests. The CMUTs for imaging without PDMS coating layers

were also prepared for comparison.

3.3 VISCOELASTIC FINITE ELEMENT MODEL

In order to properly account for the viscoelastic property of the PDMS on the

CMUT plates, a FEM was developed (ANSYS 11.0, ANSYS Inc., Canonsburg, PA).

Previously, Lohfink et al. demonstrated an axial symmetric model of a single circular

CMUT plate with a wave-guide liquid column [43]. However, they did not consider the

PDMS coating. This modeling approach was extended by adding a PDMS layer on top of

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49

the CMUT plate, and by accounting for the viscoelastic effects by creating two variations

of FEMs.

The first FEM (non-viscoelastic FEM) considers the CMUT with the coating

material without viscoelasticity. We used PLANE42 elements [57] for both the plate and

the PDMS layer [Figure 3-14(a)], using either sE or fE as an appropriate material

property for static or frequency response simulation, respectively. In a second FEM

(viscoelastic FEM), which considers the viscoelasticity, we used the element type

PLANE 182 [57]. PLANE 182 is a 2-D 4-node structural solid element as PLANE 42,

but has special feature to address viscoelasticity.

PLANE182 can feature a linear viscoelastic model based on the generalized

Maxwell elements, a viscous damper and a purely elastic spring connected in series.

Bergstrom, et al. [58] introduced a micro-mechanism about this model by illustrating the

relaxation of the free chains within the polymer network. This model adequately

describes the constitutive model of many amorphous polymers by decomposing the

mechanical behavior into two parts: an equilibrium network under long time stress

relaxation and a second network capturing the rate-dependent deviation from the

equilibrium state. The Prony series expansion was used in ANSYS to express this model

mathematically. The series constants were implemented in ANSYS code by using “TB,

PRONY” command to determine the viscoelastic moduli as functions of time, )(tE and

)(tυ [57], [59]:

)exp()()(0Tt

sfs EEEtE −⋅−+= ; (3-3a)

)exp()()(0Tt

sfst −⋅−+= υυυυ ; and (3-4b)

11)1()21)(1(CE

f

fff ⋅

−−+

υυ, (3-5c)

where 4.6=sE MPa [30], 48.0=sυ , 40.0=fυ [29], 211 lVC ⋅= ρ , lV is the

longitudinal wave velocity, and 0T =1e-4 second, the relaxation time constant selected

based on the glass-transition loading frequency in room temperature [27]. The equivalent

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50

mechanical model of the Prony Series expansion used in our model comprises a spring in

parallel with a series set of a spring and a dashpot [Figure 3-14(c)].

Depending on the loading condition (DC or AC superimposed on DC) of the

CMUT plate, a static analysis and transient response analysis was developed. From the

static analysis the pull-in voltage was obtained, which then was compared to the

measured pull-in voltages of the fabricated devices with and without PDMS coating. The

transient response analysis was used to calculate both the time-history and frequency

response. A transient analysis rather than a harmonic analysis was chosen to analyze the

effect of the echoes from the PDMS-water interface due to the acoustic impedance

mismatch. Voltage loading was applied in two steps. First, a voltage step with a ratio of

the calculated pull-in voltage (80% for the imaging CMUTs and 60% for the HIFU

CMUTs) was used. Then, after waiting for one second, a unipolar 10-Vpp 50-ns square

pulse was superimposed. The ambient pressure of 101,325 Pa was applied before the

voltage load to consider the fact that the CMUTs feature an evacuated gap. The

displacements from the plate and the PDMS surface were retrieved. The time derivative

of the average displacement of the CMUT plate was calculated and then multiplied by the

medium acoustic impedance to calculate the average surface pressure response. A FFT

was performed on the Gaussian-windowed pressure pulse to calculate the frequency

response. The attenuation from the PDMS layer was then compensated based on the loss

[60]:

Loss in dB = rf ⋅⋅ βα , (3-6)

where α = 0.4 dB/MHz/cm for GE RTV 615, β = 1.4, f is the frequency in

MHz and r is the PDMS thickness in cm.

First, evaluating the differences between the reflected echoes from the PDMS-

water interface of a 75-μm thick coating and a 200-μm thick coating tested the transient

model. Then the effect of the acoustic impedance mismatch from different types of

PDMS (GE RTV 615 and Sylgard 160, Table 3-3) was analyzed. Next, the simulation

results were compared to measurement results obtained from fabricated devices with

different designs (Table 3-2). To demonstrate how the coating material without

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51

viscoelasticity fails to preserve the CMUT operation point and performance, we

processed the same calculations with the FEM that considers the coating without

viscoelasticity.

Table 3-3. Acoustic properties of PDMS.

Type Vl (m/s) ρ (kg/m3) Z (MRayls) GE® RTV 615 1080 1020 1.1 Sylgard® 160 950 1580 1.5

(b) (c)(a)

ssE υ,),( sf EE −

FLUID 29

PLANE 42

PLANE 42

spring

dashpot

)( sf υυ −

TRANS126

Perfect absorbing boundary

Fluid-structural coupling layer

FLUID 29

PLANE 182

PLANE 42

TRANS126

Perfect absorbing boundary

Fluid-structural coupling layer

 Figure 3-14. Schematic of (a) the non-viscoelastic and (b) the viscoelastic FEM. FLUID 29, PLANE 42, PLANE 182, and TRANS 126 represent the element types used in the ANSYS model. The plots also show the roller boundary conditions (constrained to x-direction), and the anchor boundary conditions (constrained to both x and y directions). (c) The Prony Series expansion used for PLANE 182 element in the viscoelastic FEM can be represented by a spring in parallel with a series set of a spring and a dashpot.

3.4 RESULTS AND DISCUSSION

3.4.1 CHARACTERIZATION FOR STATIC BEHAVIOR

The pull-in voltage can be measured by sweeping the electrical impedance

frequency for resonance shift or capacitance change [61], or by observing the plate

deflection under white light interferometer. By using the impedance analyzer (Model

4294A, Agilent Co., Palo Alto, CA), both real part and imaginary part of the electrical

impedance can be measured for pull-in voltage characterization.

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52

According to the CMUT equivalent circuit model, the CMUT cell capacitance,

active part along with the parasitic, can be retrieved from the imaginary part of the

impedance at the frequency away from the resonance. The capacitance-bias voltage

measurement was selected when the thick PDMS layer damps the resonance and opaque

type of PDMS blocks the optical access. The pull-in of the plate causes a discontinuity in

the capacitance bias-voltage curve (Figure 3-15).

Compared to the capacitance calculated from the imaginary part of the

impedance, resonance from the real part can also be used to characterize the pull-in

voltage by showing the resonance shift. The pull-in voltage measurement results were

compared with the results from the FEM models with and without the coating layer.

50 100 1509

9.5

10

10.5

11

50 100 1509

9.5

10

10.5

11

50 100 1506.5

7

7.5

8

8.5

50 100 1506.5

7

7.5

8

8.5

Measurement: No coating

Measurement: 150-mm coating

Cap

acita

nce

(pF)

Cap

acita

nce

(pF)

Bias voltage (V)

Pull-in at 142 V

Pull-in at 142 V

Previous FEM : No coating

150-mm coating

Viscoelastic FEM ornon-viscoelastic FEM with Es: Pull-in at 142 V

Pull-in at 142 V

Cap

acita

nce

(pF)

Cap

acita

nce

(pF)

(a)Bias voltage (V)

(b)

non-viscoelastic FEM with Ef: Pull-in at 155 V

 Figure 3-15. Static behavior verification: capacitance vs. DC bias voltage for the imaging CMUTs: (a) The experimental data, and (b) the modeling data. The measured capacitance larger than the modeling is due to the parasitic capacitance from the electrical interconnections of the experimental setup.

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53

The capacitance and the resonance were measured with and without the 150-μm

PDMS coating to verify the prediction of static operating point. The pull-in voltage of the

device without PDMS was 142 V [Figure 3-15(a), Figure 3-16]. With PDMS, a group of

resonances were observed instead of a single one (Figure 3-17). First, capacitance was

calculated from the imaginary impedance value at the frequency away from the

resonance. The pull-in voltage was found at 142 V [Figure 3-15(a)]. Then, the real part of

the impedance was examined, showing the multi-resonance peaks, which come from the

reverberations within the PDMS layer. The pull-in of the plate causes a discontinuity to

the multi-resonances at 142 V [Figure 3-18(b)]. A pull-in voltage of 142 V was found in

both approaches, thus demonstrating that the PDMS coating is significantly less stiff than

the plate at DC and does not affect the pull-in voltage. For non-viscoelastic FEM, only

the model with sE can fit the measurement while fE provides overestimated stiffness

and results in higher pull-in voltage [Figure 3-15(b)]. The viscoelastic static modeling

result [Figure 3-15(b)] is consistent with the measurements by showing the same pull-in

voltage of 142 V. This confirms that the model can simulate the PDMS modulus as the

slow limit under a static loading and correctly predicts that a 150-μm PDMS coating does

not alter the pull-in voltage.

5 10 15 20 25 30 35 400

1

2

3

4

5

Impe

danc

e [kΩ

]

Frequency [MHz]5 10 15 20 25 30 35 40

-5

-4

-3

-2

-1

0

1

2

Impe

danc

e [kΩ

]

Frequency [MHz]

Pull-in at 142 V

(a) (b)  Figure 3-16. The electrical impedance measurement of the CMUTs without coating, showing the (a) real parts, and (b) imaginary parts at DC bias before and after the pull-in.

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54

5 10 15 20 25 30-3

-2.5

-2

-1.5

-1

-0.5

0

Impe

danc

e [kΩ

]

Frequency [MHz]5 10 15 20 25 30

0

0.1

0.2

0.3

0.4

0.5

Impe

danc

e [kΩ

]

Frequency [MHz]

Pull-in at 142 V

(a) (b)  Figure 3-17. The electrical impedance measurement of the CMUTs with 150µm PDMS coating, showing the (a) real parts and (b) imaginary parts at DC bias before and after the pull-in.

20 40 60 80 100 120 140

5

10

15

20

25

30

50

100

150

200

250

300

350

400

450

500

550

Freq

uenc

y [M

Hz]

Bias voltage [V]

With Coating

20 40 60 80 100 120 140

5

10

15

20

25

30

35

0

500

1000

1500

2000

2500

3000

3500

4000

Freq

uenc

y [M

Hz]

Bias voltage [V]

Without coating

(a) (b)  Figure 3-18. The real part of the electrical impedance versus the DC bias measured from the CMUTs (a) without and (b) with PDMS coating.

3.4.2 MODEL PARAMETER STUDIES

First, the design parameter study by using the viscoelastic FEM was

demonstrated. It was first verified the speed of sound and the effects from mismatched

acoustic impedance in the transient model. This model uses the design parameters from

the CMUT for imaging as an example.

3.4.2.1 Effects from different PDMS coating thicknesses

The arrival times of the first impulse response wavelets (main signals) [Figure

3-19(a) and (b)] are 185 ns and 69 ns for the 200-μm and 75-μm thick coatings,

respectively. For both cases, 1080 m/s of the speed of sound of PDMS was calculated, by

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55

using the travel time and the distance from the CMUT surface (plate-PDMS interface) to

the PDMS-water interface, i.e., coating thickness. This speed matches with the input

parameter, the longitudinal wave velocity of GE RTV 615 PDMS. The speed also

confirms that the excited wave is traveling as the longitudinal wave instead of the higher

order, extensional wave.

Because of the acoustic impedance mismatch between the GE RTV 615 PDMS

(1.1 MRayl) and water (1.5 MRayl), echoes from the PDMS-water interface are present

after the main signals [Figure 3-19(a) and (b)]. The arrival time of the echo is exactly

three times of the one-way traveling time through the PDMS layer. Except for the

presence of the echoes, the main signals from both cases are identical to each other,

indicating that the thickness of the coating does not change the CMUT plate

characteristics and it does not alter the main signal.

From the comparison between these two different coating thicknesses [Figure

3-19(a) and (b)], the main effect on the impulse response is the relative location of the

secondary echo signal. For the 200-μm coating, a time window can be applied to filter

away the echo safely. For the 75-μm coating, the echo overlaps with the main signal and

filtering is impossible. Consequently, the presence of the echo alters the frequency

spectrum [Figure 3-19(b)]. For many ultrasound applications, such as imaging, the

application of the time window is not practical. This is because the echo from the PDMS-

water interface may arrive at the same time as the real signal, similar to the case of Figure

3-19(b). Therefore, to design a good encapsulation, it is preferred to use a PDMS material

that has good acoustic impedance matching to the medium. This point will be illustrated

further in the following subsection.

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56

-0.4 -0.2 0 0.2 0.4 0.6 0.8-3

-2

-1

0

1

2

3

Time [µs]

Dis

plac

emen

t [nm

]

-0.4 -0.2 0 0.2 0.4 0.6 0.8-3

-2

-1

0

1

2

3

Time [µs]

Dis

plac

emen

t [nm

]

75 µm of coating200 µm of coating

2 4 6 8 10 12 14-25

-20

-15

-10

-5

0

dB re

Pre

ssur

e/V

Frequency [Hz]2 4 6 8 10 12 14

-30

-25

-20

-15

-10

-5

0

Time [µs]

Dis

plac

emen

t [nm

]5.8 MHz 12.2 MHz5.5 MHz 11.9 MHz

Frequency (MHz) Frequency (MHz)

Time (µs) Time (µs)

Dis

plac

emen

t (nm

)N

orm

aliz

ed p

ress

ure

(dB)

Dis

plac

emen

t (nm

)N

orm

aliz

ed p

ress

ure

(dB)

(a) (b)

185 ns 69 ns

Main signal Main signal

EchoEcho

-3 -3

 Figure 3-19. The viscoelastic FEM results showing the effect of different PDMS coating thicknesses: (a) 200-μm, and (b) 75-μm of GE RTV 615 PDMS coating. t = 0 s corresponds to the beginning of the 50-ns pulse. The data were retrieved from the PDMS-water interface.

3.4.2.2 Effects from different types of PDMS

We also demonstrate that the model could accurately reflect the influence of

different types of PDMS (Figure 3-20). Because Sylgard 160 is better matched to water

than GE RTV 615, the return echo from the PDMS-water interface disappears [Figure

3-20(b)].

The transmission and reflection coefficient of GE RTV 615 PDMS (1.1 MRayl)

to water (1.5 MRayl) is 84.6% and 15.4%, respectively. The peak amplitude of the main

signal [Figure 3-20(a)-1] is 2.79 nm. The measured transmitted [Figure 3-20(a)-2] and

the reflected waves [Figure 3-20(a)-3] are 2.33 nm and 0.37 nm, respectively. This

matches with the calculated transmitted and reflected wave, which had amplitude of 2.36

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57

nm and 0.43 nm, respectively. The minor difference comes from the fact that we compare

only the peak amplitude of the signal instead of the full energy.

Similarly, in the case using Sylgard 160 PDMS whose acoustic impedance closely

matches that of water, the reflection coefficient is zero, which means there is no reflected

wave [Figure 3-20(b)-3, and (b)-4]. Therefore, the transmitted wave [Figure 3-20(b)-2]

has the same amplitude (2.3 nm) as the main signal from CMUT surface [Figure 3-20(b)-

1].

We also compared the peak amplitude of the main signals and the transmitted

waves between both types of PDMS. Due to the heavier mass loading of Sylgard 160

(1580 3mkg ) compared to GE RTV 615 (1020 3mkg , Table 3-3), the main signal of

the Sylgard 160 coated device is smaller (2.48 nm of peak amplitude [Figure 3-20(b)-1])

than the GE RTV 615 coated device (2.79 nm [Figure 3-20(a)-1]). However, because of

matched acoustic impedances, the transmitted wave from the Sylgard 160 case has a

higher peak amplitude (2.48 nm [Figure 3-20(b)-2]), compared to the GE RTV 615 case

(2.33 nm [Figure 3-20(a)-2]). Therefore, to design a coating without compromising the

amplitude, the acoustic impedance matching is important to maximize the transmitted

energy; moreover, it has to be optimized by considering the tradeoff from the effect of the

increased PDMS density.

-5 0 5 10x 10-7

-4

-3

-2

-1

0

1 x 10-9

Time [s]

Dis

plac

emen

t [m

]

-5 0 5 10x 10-7

-4

-3

-2

-1

0

1 x 10-9

Time [s]

Dis

plac

emen

t [m

]D

ispl

acem

ent (

nm)

Dis

plac

emen

t (nm

)

Time (µs)-0.5 0 0.5 1.0

Time (µs)-0.5 0 0.5 1.0

PDMS-waterinterface

Plate-PDMSinterface

-5 0 5 10x 10-7

-4

-3

-2

-1

0

1 x 10-9

Time [s]

Disp

lace

men

t [m

]

-5 0 5 10x 10-7

-4

-3

-2

-1

0

1 x 10-9

Time [s]

Dis

plac

emen

t [m

]

(a) (b)

(1)

(2)

(3)

(4)

Plate-PDMSinterface

(1) (3)

PDMS-waterinterface

(2)

(4)

 Figure 3-20. The viscoelastic FEM results showing the effect from different types of PDMS: (a) 150 µm of GE RTV 615, and (b) 150 µm of Sylgard 160 on the CMUT for imaging. The average displacement from plate-PDMS and PDMS-water interface were

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58

both shown with a 1-nm offset apart in Y-scale for clearer visualization. The main signals (a-1, b-1) arrive at time zero, and then the excitations propagate upward into the PDMS-water interfaces. The transmission parts were shown at the PDMS-water interfaces at the arrival time of 139 ns (a-2), and 158 ns (b-2) individually. The reflection part (a-3) travels back to the plate-PDMS interface and arrives at the time of 278 ns, while there is no reflection for the Sylgard 160 case (b-3).

3.4.3 CHARACTERIZATION FOR DYNAMIC PERFORMANCE

The frequency response was measured in vegetable oil that is electrically

insulating for devices without coating and in water for devices with coating. The CMUTs

are biased at a ratio of the pull-in voltage (80% for imaging CMUTs and 60% for HIFU

CMUTs) and excited by a unipolar 10-Vpp 50-ns square pulse, generated by a function

generator (Model HP 8116, Hewlett Packard Corp., Palo Alto, CA). Next, the pressure

was measured using a calibrated hydrophone (Model HNP-0400, Onda Corp., Sunnyvale,

CA 94089) in the far field (2.25 mm for the imaging CMUTs and 10 mm for HIFU

CMUTs). A fast Fourier transform (FFT) was then performed on the Gaussian-windowed

pressure signal. The pressure at the CMUT surface was calculated by compensating for

attenuation and diffraction [25]. The time domain pressure waveform and the frequency

spectra were compared to the modeling results.

3.4.3.1 Encapsulation effect on FBW

To address the coating effect, the measurement with 150 µm GE-RTV-615 PDMS

coating was compared to the one without coating (Figure 3-21). Because of acoustic

impedance mismatch between the PDMS-water interface, the additional echo was

observed comparing the coating case to the no-coating one [Figure 3-21(a)]. For the same

reason, the signal amplitude was decreased due to the reflection loss. The measurements

show that the coating increases the center frequency by 5%, and which agrees with the

viscoelastic FEM predicted increase of 6% [Figure 3-21(d), and Table 3-5]. The

fractional bandwidth (FBW) was decreased by 21% after the coating based on the

measurement and was 14% based on the modeling [Figure 3-21(c) and (d), and Table

3-5].

The viscoelastic FEM results of the 150 µm coated devices were compared to the

measurement (Figure 3-21). The comparison shows that the center frequencies of

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59

measured and simulated devices differ by only 1% (Table 3-4). In addition, the FBW is

only overestimated by 9% in the model. The agreement can be further improved by using

a real 3D model that includes the element-to-element crosstalk and the effect of the finite

element size of the CMUT.

5 10 15-30

-25

-20

-15

-10

-5

0

Nor

mal

ized

pre

ssur

e (d

B)

Frequency (MHz)

-0.2 0 0.2 0.4 0.6-150

-100

-50

0

50

100

150

200

Pres

sure

(kPa

)

Measurement:no coating

Time (µs)

Measurement:150-µm coating

-0.2 0 0.2 0.4 0.6-150

-100

-50

0

50

100

150

200

Pres

sure

(kPa

)Time (µs)

Modeling:150 µm coating

Measurement:150-µm coating

Viscoelastic model 150-µm coating

Measurement:150-µm coating

5 10 15-30

-25

-20

-15

-10

-5

0

Nor

mal

ized

pre

ssur

e (d

B)

Frequency (MHz)

Measurement: no coating

Measurement: 150-µm coating

(a) (b)

(c) (d)Frequency (MHz)Frequency (MHz)

 Figure 3-21. Comparison between the measurements (with and without the 150 µm of GE RTV 615 coating) and the viscoelastic FEM (with the 150 µm of GE RTV 615 coating) results for imaging CMUTs: (a) and (b) the time domain, and (b) and (c) the frequency domain. The data were retrieved from the PDMS-water interface.

For further comparison, the transmit impulse response from the non-viscoelastic

FEM was also performed. The sE was selected to preserve the static operation point

(Figure 3-22). Compared with the viscoelastic results, the response is under damped

which results in a smaller FBW in frequency domain. This occurs because sE leads to

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60

the smaller acoustic impedance of PDMS (2) and lower speed of sound ( ρZVl = ). The

lower speed of sound also translates into the longer echo time, so we cannot see the slow

echo in the figure.

Table 3-4. CMUTs for imaging.

Modeling Experiment Error flower-3dB 6.1 MHz 6.3 MHz 3% fupper-3dB 12.7 MHz 12.3 MHz 3% fcenter 9.4 MHz 9.3 MHz 1% FBW 70% 64% 9%

 

Table 3-5. The coating effect of the CMUTs for imaging.

No coating 150-µm coating Coating effect Experiment Experiment

Modeling

fcenter 8.9 MHz 9.3 MHz 5% 9.4 MHz 6%

FBW 81% 64% -21% 70% -14%

 

-0.5 0 0.5 1-60

-40

-20

0

20

40

60

80

5 10 15-30

-25

-20

-15

-10

-5

0

dB re

Pre

ssur

e/V

Frequency [Hz]

Nor

mal

ized

pre

ssur

e (d

B)

Pres

sure

(kPa

)

Frequency (MHz)

-3

Time (µs)  Figure 3-22. The results from the non-viscoelastic FEM with sE for imaging CMUTs with 150 µm of GE RTV 615 coating. The data were retrieved from the plate-PDMS interface. sE leads to the slower speed of sound, so there was no data from PDMS-water interface before 1.2 µs.

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61

For the HIFU CMUTs comparison between the measurement and the modeling

results, we evaluated the low frequency design (radius = 70 µm) (Figure 3-23) and the

high frequency design (radius = 50 µm) (Figure 3-24). For the design with 70 µm radius,

the characteristic of the impulse response in time domain was simulated well; A 50-ns

pulse makes the discontinuity of the waveform from measurement [Figure 3-23(a)] that

we also found in the modeling result [Figure 3-23(b)]. For the design with 50-µm radius,

the 50-ns pulse does not result in any discontinuity as the case in low frequency design in

both the measurement and modeling results [Figure 3-24(a) and (b)]. The characteristics

of the impulse response from measurement and modeling, including the ringing, are

comparable.

Table 3-6. CMUTs for HIFU (radius of 70 µm and 50 µm).

Radius Modeling Experiment Error

70 µm flower-3dB 2.2 MHz 2.2 MHz 0% fupper-3dB 5.3 MHz 4.7 MHz 13% fcenter 3.7 MHz 3.4 MHz 8%

50 µm flower-3dB 5.4 MHz 4.7 MHz 15% fupper-3dB 8.5 MHz 7.7 MHz 10% fcenter 6.9 MHz 6.2 MHz 11%

The simulated results agree with the measurements in frequency domains as well

as in time domain. The center frequency was measured at 3.4 MHz compared to the

modeling at 3.7 MHz, which is only 8% of difference for the low frequency design

(Table 3-6). Similarly, the measured center frequency shows 6.2 MHz versus 6.9 MHz

from the modeling, reflecting only 11% of difference for the high frequency design

[Figure 3-24(c), and Table 3-6]. In addition to the center frequency, the modeled

frequency spectrum pattern matches the measurement very well. The only minor

discrepancy is the frequency offset. Possible causes for this discrepancy include: the

imperfect boundary constrain of the HIFU CMUT plate edge due to the thicker plate

thickness; the excitation pulse in the experiment might not be exactly the same as

simulation. Nevertheless, the HIFU device was always tuned to operate at a single

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62

frequency and the off-resonance spectrum is much less important than that for imaging

CMUTs.

-0.5 0 0.5 1-20

-15

-10

-5

0

5

10

15

20

-0.5 0 0.5 1-20

-15

-10

-5

0

5

10

15

20

Pres

sure

[kPa

]

Time [µs]

Pres

sure

(kPa

)

Time (µs)

Pres

sure

(kPa

)

Time (µs)(a) (b)

- Measurement - Modeling

 

5 10 15-30

-25

-20

-15

-10

-5

0

Nor

mal

ized

pre

ssur

e [d

B]

Nor

mal

ized

pre

ssur

e (d

B)

Frequency (MHz)(c)

— Measurement

— Modeling

-3

 Figure 3-23. Comparison between the (a) measurements and (b) the results from viscoelastic model in time domain, and (c) those in frequency domain for HIFU device with CMUT cell radius of 70 μm with 150 μm of GE RTV 615 coating. The data was retrieved from the plate-PDMS interface.

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63

-0.5 0 0.5 1-15

-10

-5

0

5

10

15

20

-0.5 0 0.5 1-15

-10

-5

0

5

10

15

20

Pres

sure

[kPa

]

Time [µs]

Pres

sure

(kPa

)

Time (µs)

Pres

sure

(kPa

)

Time (µs)(a) (b)

- Measurement - Modeling

 

5 10 15-30

-25

-20

-15

-10

-5

0

dB re

Pre

ssur

e / V

olt

Frequency [Hz]

Nor

mal

ized

pre

ssur

e [d

B]

Nor

mal

ized

pre

ssur

e (d

B)

… Measurement

— Modeling

-3

Frequency (MHz)(c)  

Figure 3-24. Comparison between the (a) measurements and (b) the results from viscoelastic model in time domain, and (c) those in frequency domain for HIFU device with CMUT cell radius of 50 μm with 150 μm of GE RTV 615 coating. The data was retrieved from the plate-PDMS interface.

3.4.3.2 Encapsulation effect on output pressure

To ensure the PDMS encapsulation can maintain the transmit efficiency and total

output pressure, the plate displacement at CMUT surface and output pressure in far-field

were measured individually for the devices with and without PDMS coating.

There are two different coating effects on the output pressure: first, a top coating

with the CMUT plate behaves as a compound plate, and second, the coating layer with

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64

the medium behaves as multilayer medium for wave propagation. Coating layer as

medium could introduce attenuation and impedance-mismatch-induced reverberation. To

characterize the coating effect purely from the compound plate effect, the surface output

pressure can be measured first. Then the output pressure in far-field can be characterized

as an accumulative effect due to the compound plate and the multilayer medium.

In order to measure the dynamic response at CMUT plate surface, i.e.,

CMUT/PDMS interface, a clear type of PDMS, GE RTV 615, was chosen for optical

measurement. As the clear PDMS has acoustic impedance not perfectly matched to that

of medium, a thick 1-mm PDMS coating was selected to prevent overlap of the echo

from the PDMS/water interface. The output pressure was measured in vegetable oil for

devices without coating and in water for devices with coating. Similar to the setup for

frequency response measurement, the CMUTs were biased at 80% of the pull-in voltage

(PS300, Stanford Research Systems, Sunnyvale, CA, USA) and excited by a unipolar 10-

Vpp 50-ns square pulse, generated by a function generator (Model HP 8116, Hewlett

Packard Corp., Palo Alto, CA). Next, the transient response displacement was measured

using an optical fiber interferometer OFV-511 (Polytec GmbH, Waldbronn, Germany)

connected to a vibrometer controller OFV-2700/2 (Polytec) that contained a modified

wideband displacement decoder OVD-30 (Polytec) with an extended frequency range (50

kHz-30 MHz). It was measured at the CMUT surface by focusing at the plate/PDMS

interface and plate/oil interface, for devices with coating and without coating

individually. Surface area scan of 150 by 150 microns was performed to cover around 9

cells with the step size of 2 microns. The average displacement-time data was then

calculated, and transformed into output pressure according to (Equation 3-7).

ZtuP ⋅∂∂⋅= π2 , (3-7)

where P is output pressure, u is displacement, and Z is the acoustic impedance of

medium. Both time domain displacement and pressure waveform from the device with

coating were compared to that without coating.

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65

No coatingWith coating

Dis

plac

emen

t (nm

)

x (µm)y (µm)

Dis

plac

emen

t (nm

)

x (µm)y (µm)(a) (b)

2 2.5 3 3.5x 10-6

-3

-2.5

-2

-1.5

-1

-0.5

0

0.5

Time [µs]

Dis

plac

emen

t [nm

]

Out

put p

ress

ure

[Pa]

2 2.2 2.4 2.6x 10-6

-10

-5

0

5

x 104

Time [µs](c) (d)

− no coating− with coating

− no coating− with coating

 Figure 3-25. Displacement and output pressure at CMUT surface: surface area displacement results for the devices (a) without and (b) with PDMS coating; comparison of the (c) average displacement and (b) average pressure between the cases with and without PDMS coating.

Figure 3-25(a) and (b) show the displacements of the area scan retrieved from an

arbitrary time point for the cases with and without the 1-mm PDMS coating. The

averaged displacement comparison shows the one with the coating responses larger

[Figure 3-25(c)]. It was expected because the medium load for CMUT with coating is

smaller because of the smaller acoustic impedance (1.1 MRayl from PDMS instead of 1.5

MRayl from oil). Then the output pressure was compared and shown comparable

amplitudes [Figure 3-25(d)]. The peak-to-peak output pressure from the case with coating

is only 5% smaller than the one without coating. The result indicates the transmit

efficiency at CMUT surface can be maintained up to 95% with a 1-mm RTV 615 PDMS

coating.

Next, to study the effect on output pressure from the coating as a multi-layer

medium, the output pressure measurement in the far field was performed. The coating

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66

effects on the loss include the impedance-mismatch-induced reflection and the

attenuation within the coating.

Previously in the setup for frequency response measurement, the CMUTs were

biased and excited by a relatively small AC excitation; the small AC setup was to

measure the linear response, and characterize the static operating point. As the gap height

was shared by the DC static deflection and the plate vibration, the dynamic response in

terms of the total output pressure was determined by the optimized combination of DC

bias and AC excitation.

To study the coating effect on the total output pressure, CMUTs with and without

a 150 microns of GE RTV 615 PDMS were measured under applied DC bias (DC bias

supply: PS300, Stanford Research Systems, Sunnyvale, CA, USA) and AC excitation

(generated by a function generator HP8112A, Agilent Technologies Inc., Palo Alto, CA,

USA). The DC and AC were swept through 50% to 90% and 50% to 100% of the pull-in

voltage (93V) respectively. Next, the pressure was measured using a calibrated

hydrophone (Model HNP-0400, Onda Corp., Sunnyvale, CA 94089) in the far field at

2.25 mm. The pressure at the CMUT surface was calculated by compensating for the

medium attenuation and diffraction [25]. Finally, the peak-to-peak output pressure

corresponding to various DC and AC in a step of 5V was illustrated (Figure 3-26).

Figure 3-26 shows the output pressure increased along with the DC and AC. One

minor distortion under high AC/DC [Figure 3-26(a)] is due to the charging which reduce

the effective DC bias and the transmit efficiency. The maximum total output pressure was

measured at 84 V of DC bias and 93V of peak-to-peak AC excitation. The device with

coating shows 1.02 MPa compared to 1.21 MPa from the device without coating. The

pressure was maintained 84.3%, versus 95% maintained at the CMUT surface before the

coating (Figure 3-25).

150 microns of GE RTV 615 PDMS introduces the attenuation less than 0.1 dB

(Equation 3-6), equivalent to 1%. The reflection introduces 15.4 % of loss (Equation

2)(1cm

cmenergy ZZ

ZZT+−

−= (3-1). The total loss from these two effect combined is

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67

16.4% matched with the experimental result, 15.7%. Therefore, CMUT with PDMS

coating can feature high output pressure with a careful selection of the attenuation and

acoustic impedance as two of the main design parameters.

4050

6070

80 40

60

800

200

400

600

800

1000

1200

200

300

400

500

600

700

800

900

1000

1100

1200

4050

6070

80 40

60

800

200

400

600

800

1000

1200

200

300

400

500

600

700

800

900

1000[kPa] [kPa]

Out

put p

ress

ure

[kpa

]

Out

put p

ress

ure

[kP

a]

DC Bias [V]AC excitation [V] AC excitation [V]

DC Bias [V]

Measurement:Without coating

Meaurement:With 150-µm coating

1.21 MPa 1.02 MPa

 Figure 3-26. Total output pressure from the CMUT with and without PDMS coating.

3.5 CONCLUSION

PDMS exhibits viscoelasticity with a glass-transition-temperature lower than

room temperature that makes it an ideal coating material for CMUT operation. PDMS

coating preserves the static operation point due to the low Young’s modulus at DC. The

low modulus value comes from the rubbery state under static loading at room

temperature. At the same time, it fulfills the acoustic matching requirement in ultrasonic

operating frequency region. The matching helps to secure the transmission efficiency and

prevent from echo reverberations.

A viscoelastic FEM was developed which can predict both the DC and AC

behavior of a PDMS-coated CMUT. The viscoelastic FEM has been demonstrated to

have good agreement with the measurement results. The model can correctly simulate the

static operation point, frequency-dependent stiffness, mass loading, and results in the

correct acoustic impedance. Based upon the correct static and dynamic parameters, the

hydrodynamic and acoustic behavior can be simulated. The model and measurements of

static results match perfectly. The center frequencies and FBW match within 1% and 9%

for imaging CMUTs, and 8~11% for HIFU CMUTs. The discrepancy occurred because

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68

of the difference of the CMUT plate boundary constrain condition and the excitation

pulse between the model and experiments.

It was also demonstrated additive effects on performance due to the presence of

this encapsulation. The measurements show that a 150-µm coating of GE RTV 615

PDMS preserves the pull-in voltage of CMUTs at 142 V, and offset the center frequency

by only 5%. The FBW was decreased by 21% and is due to the echo from the acoustic

mismatch at the PDMS-water interface. A coating material with a better matching to

water and limited attenuation can be used to reduce the effect on FBW.

Finally, the output pressure was measured on the PDMS-encapsulated CMUTs.

The result indicates the transmit efficiency at CMUT surface can be maintained up to

95% with a 1-mm RTV 615 PDMS coating; while the total loss was addressed from the

attenuation and the energy reflection due to acoustic impedance mismatch. With the

experimental demonstration and the correct modeling, the study provides the

encapsulation strategy of CMUTs, and will help in the design process for optimizing the

static and the dynamic behavior of viscoelastic-polymer-coated CMUTs.

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69

CHAPTER 4 PDMS-ENCAPSULATED CMUTS

This chapter, following the front side interface engineering discussion, presents

the applications of PDMS-encapsulated CMUTs. PDMS is a viscoelastic polymer with Tg

lower than room temperature, represents one of the optimized encapsulation materials for

CMUTs to achieve large output pressure, and maintain high sensitivity. By taking

advantages of PDMS properties, such as the speed of sound, attenuation and flexibility,

applications are demonstrated, such as crosstalk reduction, forming a flexible array, lens

focusing, and blood flow measurement capability.

4.1 CROSSTALK SUPPRESSION

4.1.1 OVERVIEW

Ultrasound transducers in immersion are subject to the crosstalk between the

neighboring array elements. This crosstalk degrades the transducer performance; the

issue was previously addressed for piezoelectric transducers [62], [63] and capacitive

micromachined ultrasonic transducers [17]. In general, crosstalk increases the effective

element aperture and the ringdown time of a transducer, resulting in a poor angular

response and range resolution [64]. In imaging experiments using CMUTs, degradation

in the axial resolution and bright patterns in the near field were observed due to crosstalk

[22]. HIFU applications require the precise control of the focal point for power deposition

to the pathological regions without destroying the surrounding healthy tissues [65].

However, because of a wider beam width and higher side lobes, the crosstalk impairs the

transducer’s capability to focus the ultrasound tightly [66].

Experimental, analytical, and finite element methods are used to determine the

causes and effects of crosstalk in CMUTs. Common experimental methods are optical

displacement and electrical received signal measurements. Other methods such as pulse-

echo and radiation pattern measurements are also employed to analyze crosstalk [17].

The dispersive guided mode wave was categorized as the main contributor (-22 dBs

normalized to the maximum transmitter displacement) compared to other mode, e.g., 0S

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Lamb wave mode (-65 dBs), and 0A Lamb wave mode (-40 dBs) [38]. One of the

characteristics of the surface guided mode is that most of the energy is restricted to the

transducer surface (Figure 4-1).

Different approaches have been studied for crosstalk suppression. Previously,

Bayram et al. introduced a pull-in mode operation, effectively increasing the center

frequency, as a way to tweak the energy spectrums for crosstalk reduction [38], [67].

Berg, et al. proposed a second periodicity of the CMUT cell spatial configuration [68].

Certain periodicity provides an energy band gap such that the unwanted crosstalk wave

can be blocked. A different way to modify the element-element boundary condition was

studied by Bayram et al. [69]. By using a physical separation approach, a lossy wall

between elements was studied as a reflective/absorbing interface for crosstalk reduction

[70]. Another numerical study shows that a transfer-function-matrix approach can be

used to derive modified transmit waveforms on adjacent elements to reduce the acoustic

crosstalk [71]. However, this technique relies on programmable waveforms, which

introduce circuitry complexity.

All of the above studies address the change of CMUT design rule or impose

additional fabrication steps. It is advantageous for a simple crosstalk suppression

approach immune from major design modifications that might cause a tradeoff. A lossy

top thin coating with optimized thickness can effectively suppress the crosstalk wave

[39]. A PDMS top coating was proposed to feature the encapsulation and to suppress the

crosstalk at the same time. Thanks to the thin coating, the attenuation of the

transmit/receive energy normal to the transducer surface can be limited. This section

introduces the design and calculation of the lossy top coating. Experimental results

showing the crosstalk suppression effect due to coating was demonstrated.

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 Figure 4-1. Schematic of surface-guided-mode crosstalk with energy guided at the transducers surface.

4.1.2 COATING THICKNESS DESIGN

The thickness of the lossy top coating is the main design parameter for crosstalk

reduction while limiting the transmit/receive energy attenuation. Previously, a thin

coating (7 µms) of PDMS (Dow-Corning 4105 RTV) was coated on CMUTs for the

study of the crosstalk suppression [38]. The result shows that the thin PDMS coating is

ineffective in reducing crosstalk. Crosstalk suppression is only -1 dB or negligible. This

result, suggesting a thicker or a more lossy type of PDMS, was the main motivation for

this study.

To obtain the required coating thickness, the energy distribution along z direction

(normal to transducer surface) of the surface acoustic wave should be calculated. The

pressure of the surface acoustic wave ( p ) in a simplest form is

)exp(0 tjxjzpp ωξα −+−⋅= (4-1)

, where α is the decay constant in z direction, 22 αξ += k is the wave number

along the surface, ck ω= is the wave number for free space sound propagation, and c is

the speed of sound in the fluid. Thus, the phase velocity of this surface wave ( phc ) is

given by

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72

2

2

2

2 222 11ω

α αω

αω

ξω

ck

phc

kkc

+=

+=

+== (4-2)

As the surface wave is exponentially decayed in z direction (Equation 4-1), the

energy envelope confined by )1exp(0 −⋅= pp refers to that the energy is mostly within

the thickness, α1=z . Given the phc and c, the relationship between the suggested coating

thickness (in terms of α1 ) and the frequency,

πω2

=f can be created (Equation 4-2).

Figure 4-2 shows the suggested PDMS coating thickness as a function of frequency for

each given phase velocity.

According to Eccardt, et. al. [72], phase velocity can be approximated by using

the effective stiffness density s (units: 2mmN ) and mass density m (units: 2mkg ) at

the interface,

cccccc

mscph ≤

+=

+=

−22 )(1)(1 *2ω

ωρ (4-3)

(a)

2 4 6 8 100

100

200

300

Frequency [MHz]

Thick

ness

[ µm

]

Without coatingCoil=1430 m/s

Cphase=1300 m/s

Cphase=1000 m/s

Cphase=700 m/s

)( 1α

)( 2πω

(b)

2 4 6 8 100

100

200

300

Frequency [MHz]

Thick

ness

[ µm

]

)( 1α

)( 2πω

With PDMS coatingCcoating=1080 m/s

Cphase=1000 m/s

Cphase=700 m/s

 Figure 4-2. Suggested PDMS coating thickness for the crosstalk-suppression. (a) The energy envelop, )1exp(0 −⋅= pp in oil without coating. (b) The energy envelop with coating by using Ccoating =1080 m/s (from GE RTV 615 PDMS).

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In addition to the interface stiffness and mass dependence, the phase velocity

decreases along with the frequency; this frequency dependence comes from the

dispersion of the interface acoustic wave. For various CMUT designs (affecting s and

m , and thus phc ) and frequencies of interest, Figure 4-2(b) indicates a useful guideline

for coating thickness. For example, the curve shows a 150 µm coating of PDMS can

effectively attenuate the frequency component larger than 3 MHz of the surface acoustic

wave with a ≤phc 1000 m/s. Considering all the encapsulation requirements from

Chapter 3, a 150 µm coating thickness was selected to provide dielectric/abrasive

protection while minimizing the transmit/receive attenuation, and offer sufficient

crosstalk reduction at the same time.

To enable an optical measurement, a clear type of PDMS, GE RTV 615 PDMS,

was selected for this study. GE RTV 615, with an attenuation of 0.8 dB/MHz/cm

(Equation 3-1), is one of the less lossy PDMS among various other opaque types. Thus,

the study with RTV 615 PDMS was intended to provide a lower bound of crosstalk

suppression effect. A lossier type of PDMS, Dow-Corning Sylgard 160 PDMS, was also

studied; more crosstalk reduction was expected although an optical measurement is

impossible such that a pitch-catch pressure measurement was performed instead.

4.1.3 EXPERIMENTAL METHOD AND RESULTS

The experimental setup (Figure 4-3) enabled both optical and electrical

measurements to be performed simultaneously. A DC bias supply (PS300, Stanford

Research Systems, Sunnyvale, CA, USA) was used to bias all the elements of the array,

and a function generator (HP8112A, Agilent Technologies Inc., Palo Alto, CA, USA)

was used to excite the transmit element with a 20-ns 10Vpp unipolar pulse. Electrical

signals were measured on a digital oscilloscope (Infiniium 500 MHz, 2 GS/s, Agilent

Technologies Inc., Palo Alto, CA, USA) by probing individual array elements. The

optical measurements were made using an optical fiber interferometer OFV-511 (Polytec

GmbH, Waldbronn, Germany) connected to a vibrometer controller OFV-2700/2

(Polytec) that contained a modified wideband displacement decoder OVD-30 (Polytec)

with an extended frequency range (50 kHz-30 MHz). A common personal computer (PC)

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74

was used to process the data transferred over a GPIB-IEEE 488 bus from the

oscilloscope. LabViewTM Version 7.6 software (National Instruments, Austin, TX, USA)

was used to control the x-y stage and gather the optical and electrical data.

 

VibrometerController &

Decoder

Microscope&

Interferometer

AC Coupler

Digital OscilloscopeHP Infiniium

500 MHz, 250MS/s

Personal Computerwith

LabViewTM

DC BiasSupply

&FunctionGenerator

XY-Stage

Received signal u(x,t)

Lens (20x)

Laser

RS-232

 Figure 4-3. Experimental setup of optical and electrical measurement for crosstalk characterization.

The 1D 132-element CMUT arrays with the design parameters listed in Figure 4-3

were used for this study. The CMUTs with and without PDMS coating were immersed in

vegetable oil for comparison. Using the microscope and the x-y stage, the CMUT surface

was aligned with the laser light. As the optical measurements spatial resolution is around

5 μm, determined by the laser spot diameter, the uniform 10 μm sampled data were used

by performing a piecewise linear approximation. Considering the acousto-optical

correction, the actual plate displacements are obtained by using the refractive index of

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75

soybean oil (noil = 1.47) in the optical path calculation. For the case of CMUTs with

PDMS coating, the refractive index of the PDMS, 1.46, was used instead for the

correction.

Table 4-1. Physical parameters of the CMUT array for crosstalk study

Plate width, µm 40 by 40 (square) Plate thickness, µm 1.50 Vacuum cavity height, µm 0.15 SiO2 insulation layer thickness, µm 0.3 Element pitch, µm 300 Number of plate/element 6 by 120 Number of elements in an array 132 (4 dummies) Array dimension, mm 3 by 30 PDMS coating thickness, µm 150 Center frequency, MHz (in immersion)

7.5

Pull-in voltage, V 92

First, the optical surface displacement scan was performed on the edge 300 by

300 µm of the excited element and the same area of the neighboring element (Figure

4-4). This measurement was designed to demonstrate the inter- and intra-element

crosstalk. As the stationary area have different separations between cells within the

element (40 µm) and between elements (10 µm), the different stiffness and mass density

result in an impedance-discontinuity interface for wave to transmit and reflect [72]. These

out-of-phase displacements were considered to add the tail ringing to the main pulse (in

time domain), thus deteriorate the bandwidth (in frequency domain).

Then, the center 41 elements of the CMUTs with and without GE RTV 615

PDMS coating were biased, and the center element was excited. The optical

measurements were performed over the center of the 6-cells of each element. These plate

displacements on the line scan were averaged over each cell. Retrieving the data

neighboring to the excited one, the plate displacement was plotted in frequency-spatial

(ω-k) domain (Figure 4-5). The results show the maximum crosstalk amplitude happened

at the frequency of 2.8 MHz with a phase velocity of 1350 m/s ( mMHz 120808.2 ). The

energy ranges up to 6.2 MHz (-40 dB normalized to the peak amplitude from the excited

element) with an energy band gap at around 4 MHz. Thus, the second relative maximum

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76

amplitude was observed, located at the frequency of 4.6 MHz with a phase velocity of

1210 m/s ( mMHz 138006.4 ). The energy band gap comes from the arrangement of the

plates within/between the array elements that influences the preferred frequency of the

guided mode [73]. The CMUT design for this study has a center frequency of 7.5 MHz

and a 90% FBW, which represent the frequency of interest between ~4.1 MHz to 10.9

MHz. Therefore, the crosstalk energy below 4.1 MHz is less harmful. As the attenuation

of PDMS increases along with the frequency ( 4.1floss ∝ ), the PDMS coating for

crosstalk suppression was expected to be efficient within the frequency of interest.

T=0.32 µs T=0.39 µs T=0.47 µs

T=0.55 µs

inter-element crosstalk

intra-element crosstalkx (µm)

y (µ

m)

 Figure 4-4. Inter- and intra-element crosstalk measurement.

Figure 4-5(b) shows the ω-k result from the CMUTs with coating. The maximum

amplitude was shifted to lower frequency (1.85 MHz) with a slower phase velocity

(1011m/s) compared to that in Figure 4-5(a). The frequency shift is because of the

increasing PDMS attenuation along with the frequency; the slower phase velocity comes

from the lower speed of sound within the coating (Equation 4-3). The crosstalk amplitude

within the frequency of interest (the second relative maximum at around 4 MHz) is 5.6

dB lower compared to the counterpart in Figure 4-5(a). The results show that a thin

PDMS coating with optimized thickness can suppress the crosstalk frequency within the

frequency of interest.

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k, W

aven

umbe

r[1/

m]

k, W

aven

umbe

r[1/

m]

0 1 2 3 4 5 6 7-9000

-8000

-7000

-6000

-5000

-4000

-3000

-2000

-1000

0

0 1 2 3 4 5 6 7-9000

-8000

-7000

-6000

-5000

-4000

-3000

-2000

-1000

0

Frequency (MHz) Frequency (MHz)

Without coating With coating

(a) (b)

Coating

reverberations

 Figure 4-5. The crosstalk measurement comparison between the CMUTs (a) without and (b) with a lossy PDMS coating for the frequency of interest.

Compared to GE RTV 615 PDMS, a lossier type of PDMS was expected to

provide a more effective crosstalk reduction. Dow Corning Sylgard 160 PDMS with

attenuation (3.7 dB/MHz/cm) was selected and coated on a consistent 1D CMUT array

for comparison. Because a lossier type of PDMS is opaque that prohibits the optical

CMUT surface measurement, instead a hydrophone pressure measurement in the far field

was performed. The results show that a lossy thin coating attenuates the tail (-4.5 dB)

more effectively than the main pulse (-1.4 dB) (Figure 4-6). As the tail, effectively

increasing the ring down time, can be attributed to the out-of-phase plate displacements

due to crosstalk, a lossier thin PDMS coating was observed to be effective in crosstalk

suppression with an acceptable main signal loss.

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1.2 1.4 1.6 1.8 2-2

-1

0

1

2

3

Time (µs)

Volta

ge (m

V)-1.4dB

-4.5dB

α=0.8 dB/MHz/cm α=3.7 dB/MHz/cm

Volta

ge (m

V)

Time (µs)  Figure 4-6. The impulse response comparison between PDMS coatings with different attenuation.

In conclusion, a lossy top coating by using PDMS was proposed to feature the

encapsulation and the crosstalk suppression at the same time. The PDMS coating

thickness and material attenuation were identified as the design parameters. The

optimized coating thickness was suggested and a guideline for various phase velocity of

the surface crosstalk wave was provided. A 150 µm coating of PDMS was selected and

demonstrated to be effective in crosstalk suppression through an optical surface

displacement measurement. The result demonstrates the first PDMS encapsulated CMUT

with the crosstalk reduction effect. The impulse response for a lossier and opaque PDMS

coated CMUTs was demonstrated, showing the tail attenuation is more effective than the

main-pulse attenuation. To study further the crosstalk reduction with a lossier opaque

PDMS coating by using an optical displacement measurement is appealing for future

research.

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4.2 FLEXIBLE CMUTS

4.2.1 OVERVIEW

Flexible transducer arrays allow conformal coverage of an object in applications

such as medical imaging, ultrasound therapy, and nondestructive evaluation. Among the

medical imaging applications, intravascular ultrasound imaging (IVUS) requires side-

looking capability, which can be offered by flexible transducer arrays wrapping around

catheter tips (Figure 4-7). Using IVUS imaging, the degree of narrowing in blood vessels

can be determined; plaque composition can be analyzed; and stent placements can be

visually guided.

side-looking

forward-looking

Transducer array

Frontend ICs

Coaxial guide wire

Microcoaxial cable bundles

(a) (b)  Figure 4-7. Schematic of (a) a catheter for intravascular ultrasound imaging and (b) the detail of a catherter-based side-looking probe.

In Chapter 3, PDMS, a viscoelastic polymer with Tg lower than room temperature,

was studied as the CMUT encapsulation material to maintain performance while

providing electrical insulation. The low Tg of PDMS (-125 oC) comes with its high

flexibility at room temperature, i.e. a Young’s modulus of only couples of MPa. The low

Young’s modulus, compared to that of Si (~168 GPa), can be designed into the substrate

to provide the flexibility of CMUT arrays. By using a PDMS encapsulation and refilling

trenches, a flexible CMUT array was demonstrated in this section for side-looking

intravascular ultrasound imaging. Most of the work contained in section 4.2 has been

previously published in [36].

How to fabricate a flexible transducer array has been studied in recent years. For

example, one method to achieve a flexible array is by aggressively thinning down the

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silicon substrate (thickness < 100 µm) [74]. The thin substrate provides flexibility,

however also imposes reliability issue and handling difficulties [75]. Polymer-based

structures have also been used as a flexible carrier for MEMS sensors [76], [77], [78],

[79]. An easy flexible substrate preparation, which is compatible to the present CMUT

process, is based on polymer-coated trenches [80], [81]. The selected approach to achieve

flexible CMUTs is by etching through-wafer trenches to isolate array elements, and

refilling the trenches with PDMS while using PDMS as the encapsulation material.

4.2.2 DESIGN AND FABRICATION

To demonstrate the flexibility of CMUTs in the x and y axes, 2D arrays were

designed and fabricated. The physical parameters of the CMUT designed in this study are

summarized in Table 4-2.

Table 4-2. Device parameters of flexible CMUTs.

Plate length, µm 220 Plate width, µm 35 Plate thickness, µm 1.83 Vacuum cavity height, µm 0.15 SiO2 insulation layer thickness, µm 0.3 Element pitch, µm 250 Number of plate/element 8 Metal coverage on plate 100% Number of elements in an array 256 (16 by 16) Array dimension 4 mm by 4 mm PDMS coating thickness, µm 30

The PDMS coating technique was selected between spin coating, mold casting,

dip flowing, and precast-then-transferring. To incorporate with the trench-refilling

process, it is not suitable for any precast approach. While dip flowing offers a quick-and-

dirty way for PDMS coating, yet thickness is not well controlled; spin coating and mold

casting were suggested. A clear type of PDMS, i.e. one-part 1-4105 (Dow Corning

Corporation, Midland, MI) was used for further CMUT surface inspection. The spin-

coating thickness versus spinning speed was characterized (Figure 4-8). As the final

substrate thicknesses were tested among 50-200 µm, a 30 µm PDMS thickness was

selected to provide a reasonable flexibility. Thus, the spin-coating technique was

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81

suggested for this thickness design, because the mold casting involved mold-releasing

step, which is not favorable for thickness less than 50 µm.

To build flexible CMUT arrays, the fabrication process was modified from the

regular CMUT wafer bonding process. First, a highly conductive Si wafer was used, and

thermal oxide was patterned to form the cavities. Before the fusion bonding for CMUT

plates, deep trenches were patterned and etched into the silicon substrate using DRIE.

These trenches are for electrical isolation and the PDMS-refilling for substrate separation.

The widths varied between 6 µm and 20 µm, and the depth was about 150 µm. The wafer

was then fusion bonded to an SOI wafer to form the CMUT plate. After sputtering an

aluminum layer metalized the plate, holes with diameters of 4 µm to 10 µm were opened

to the trenches as inlets for the PDMS refilling. Then it was performed the PDMS

dispensing, degassing, and curing, followed by the substrate etch back. The array

elements were electrically isolated from one another, but mechanically linked by the

PDMS in the trenches and on top of the plate. Finally, the metal pads were patterned on

the backside for interconnections. The finished flexible 2D CMUT array was

demonstrated in Figure 4-10.

Empirical fitMeasurement

Spin speed (rpm)

PDM

S th

ickn

ess (µm

)

 Figure 4-8. PDMS thickness as a function of spin speed.

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Si SiO2 Al PDMS Au  Figure 4-9. Schematic cross-section of CMUT elements with PDMS encapsulation and trenches-refilling substrate.

1 mm

PDMS (30 mm)

Si membrane (1.83 mm)

Trench filled with PDMS

(15 mm)

1 mm

PDMS(30 µm thick)

Si membrane(1.83 µm thick)

Trench filled with PDMS

(15 µm wide)

(a) (b)

(c) (d)  Figure 4-10. Device photographs: (a) front side view, (b) back side view showing the flexibility pushed by a wire, (c) magnified view of through-wafer PDMS dispensing holes, (d) cross-sectional view showing the trench, the plate, and the PDMS coating and filling.

4.2.3 TEST RESULTS AND DISCUSSION

The transducer arrays were characterized in air. The CMUT was biased at various

DC voltages and a network analyzer (Model 8751, Hewlett-Packard Company, Palo Alto,

CA) was used to measure the electrical input impedance. A micro-probe (Model ACP40-

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W-GS-150, Cascade Microtech, Inc., Beaverton, OR) was used to make electrical contact

on the backside of the CMUT array. Real and imaginary parts of the impedance are

shown in Figure 4-11(a). It was expected the PDMS coating over damps the CMUT and

results in the low quality factor of the resonance. The resonant frequency in air was then

extracted along with various DC voltages. Figure 4-11(c) shows the dependence of the

open circuit resonant frequency on the DC bias voltage. The decreased resonant

frequency is attributed to the spring softening effect of an electrostatically actuated

system with increased DC bias voltage.

(a) (b)  Figure 4-11. Test results: (a) electrical input impedance in air, (b) resonant frequency.

These arrays were flexible as demonstrated [Figure 4-10 (b)], however, the

bending force generated cracks aside the mechanical linking parts [Figure 4-12(a)]. The

defects were suggesting a better stress released mechanical linking structures rather than

the continuous blanket with holes [Figure 4-12 (b)]. Silicon ribbons (springs) have been

used as interconnects for MEMS devices to provide better compliance without

interrupting electrical continuity [82], [83], [84]. Such ribbons were suggested to

incorporate into future designs [Figure 4-12 (c)].

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84

(a) (b) (c)

50 µm

 Figure 4-12. (a) A photograph of cracks aside the mechanical linking bridge, (b) Schematic of current linking design, (c) Schematic of proposed ribbons (springs) design.

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4.3 PDMS COATING AS LENS MATERIAL FOR FOCUSING

4.3.1 OVERVIEW

1D linear array is widely used in today’s diagnostic medical imaging providing a

2D B-mode sonography. While 1D array was attributed the electronic focusing in

azimuth direction, a lens coating is required to enable the mechanical focusing in

elevation (Figure 4-13). The benefit is to improve the elevation resolution, i.e. thinner

slice thickness.

A conventional 1D piezoelectric transducer array requires matching layers in

addition to the lens coating. The encapsulation material optimized for CMUT operation

can be a viscoelastic polymer with Tg lower than room temperature. PDMS features the

required specifications, and attributes different speed of sound from that of the medium,

e.g. 1530 m/s for soft tissue. In light of all the considerations for encapsulation and

mechanical focusing, PDMS was chosen as a lens material.

Azimuth

Depth

Elevation(a) (b)  Figure 4-13. Schematic acoustic pressure profile of comparison between CMUT arrays (a) without lens coating, and (b) with lens coating.

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4.3.2 LENS DESIGN

Lens design starts from the calculation for determining the radius of curvature

(ROC) of a convex acoustic lens:

)1( −⋅=lens

mediumgeo C

CFROC , (4-4)

where geoF is the geometric focal point, mediumC is the speed of sound of the

medium, e.g. human tissue, and lensC is the speed of sound of lens material ( lensC <

mediumC for a convex lens in this study). Compared to a concave lens, a convex

counterpart serves for an ideal ergonomic contact and hence a better acoustic energy

coupling through the lens/ human tissue interfaces. To determine geoF , given the center

frequency ( λmediumCf = ) and aperture size (D), several design tradeoff need to be

considered, such as resolution (slice thickness), depth of view (DOV), and focal gain,

DOV = 22)(1.7 geogeo FDF

∝⋅⋅λ , (4-5)

Resolution = geogeo FDF

∝⋅λ , and (4-6)

Focal gain = geogeo FF

apertureofArea 1∝⋅λ

. (4-7)

Among the three design parameters, focal gain is less concerned because the

azimuth electronic focusing provides the primary gain. Therefore, resolution and DOV

are tradeoff to each other in terms of geoF . As an example of a 6.5 MHz array design and

D of 3 mm, 11.3 mm of geoF was selected resulting a resolution of 1.1 mm and DOV of

around 23.2 mm. Thus, ROC was calculated as 6.55 mm given the other parameters as

illustrated in Figure 4-14.

Given the geoF and D, S parameter was calculated,

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87

S = λ⋅⋅ 422.1 D

geoF = ~1.2, (4-8)

where S > 1 indicating a weak focusing, and resulting in a shorter DOV [14].

D=3.0mm

ROC=6.55mm

Fgeo=11.3mm

Clens=947 m/s

Cmedium=1497 m/s

F# = 3.8λ=230 µm

Fresnel’s limit = 9.8mm

 Figure 4-14. Design of lens focusing.

4.3.3 MATERIALS AND METHODS

PDMS was carefully selected considering several parameters. First, the

impedance of the lens material should be close to that of the medium, similar to the

encapsulation discussion in chapter 3. Second, the attenuation of the lens material should

be low to maintain high sensitivity. Last, a low viscosity was required for the better

workability during the mixing, mold, and degassing processes. The attenuation loss can

be expressed as follow:

Loss in dB = 24.1 ⋅⋅⋅ TLfα , (4-9)

where α is the lens material attenuation, f is the operational frequency, and

22 )2(DROCROCTL −−= , the thickness of the lens. The total loss is proportional to

TL, which can be reduced by lowering lensC . Consequently, a low lensC (apart from

mediumC ) was preferred for an efficient focusing to limit the lens thickness and hence the

total attenuation.

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The attributes of the base silicone rubber without dopants include clear color,

density of ~1000 kg/m3 and speed of sound at ~1000 m/s. The off-the-shelf products are

available, e.g. GE RTV 615, and Dow Corning Sylgard 182/184. The base silicon rubber

usually addresses low attenuation, < 0.1 dB/mm/MHz, which is preferable as the lens

material. As the acoustic impedance is around 1 MRayl (1000 kg/m3 x 1000 m/s)

mismatched to that of the medium, matching acoustic impedance could be achieved by

adding dopants to increase the density. It was studied that different types of inorganic,

metal particles (TiO2, Pt, and Yb2O3 etc.), in different sizes (10 nm to 2 µm) mixed into

the base RTV or HTV to achieve matching impedance and obtaining low attenuation

[85], [60]. By mixing with high-density material, particle size and dopant volume ratio

can be minimized, and hence the attenuation increase was limited.

Among several commercially available RTV formulations, Dow Corning®

Sylgard 160 was selected for its matching acoustic impedance (Z=1.5 MRayls), and

workable viscosity (8800 cps). The attenuation was measured at 0.38 dB/mm/MHz by

using a commercial calibrated piezoelectric transducer probe. This low attenuation figure

is comparable to the state of the art attenuation obtained from recently reported doped

RTV or doped HTV (Table 4-3) [85], [60].

Table 4-3. Attenuation of Sylgard 160 compared with various doped RTV or HTV

Attenuation Acoustic impedance (dB/mm/MHz) (MRayls) Dow Corning® Sylgard 160 0.38 1.5 10 nm of Pt within base RTV 0.71 1.26 16 nm of Yb2O3 within base RTV 0.93 1.35 16 nm of Yb2O3 within base HTV 0.73 1.43

For mold manufacturing, the machinability, mold-releasing feasibility, and

toughness were considered into the design. To fulfill the requirements, a mold transfer

technique was used: from aluminum to silicon rubber mold, and then from silicon rubber

to polyurethane mold (Figure 4-15). Aluminum was chosen for machining easiness.

Polyurethane is inert to silicon rubber easing the mold-release; at the same time

polyurethane is tough enough to prevent from distortion and abrasion during the mold

casting and releasing.

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 Figure 4-15. Lens mold manufactured by using mold-transfer technique.

To minimize the total thickness of the lens coating, it was essential to limit the

bonding wire profile, e.g. to be less than 150 µm. While the curvature part (TL)

contributes around 174 µm, the total thickness was measured at 345 µm above the

transducer surface. In order to study the lens focusing effect, another 1D array was coated

with a conformal PDMS layer of the same thickness for comparison.

A 1D 132 elements (128 active elements plus 2 dummies on both sides) 300 µm

pitch CMUT array was fabricated using fusion bonding technique. The key physical

parameters of the CMUT array are summarized in Table 4-4. After the fabrication, the

array was attached to a printed circuit board (PCB) for further wire bonding and lens

coating. The same array and the PCB design were also used for the blood flow study

described in section 4.4, that the board was connected to higher-level interconnections.

Table 4-4. Physical parameters of the CMUT array for lens study.

Number of elements 132 Azimuth element pitch (µm) 200 Elevational element pitch (mm) 5 Elevational element size (mm) 4 Square plate width (µm) 40 Vacuum cavity height (µm) 0.15 Insulation layer thickness (µm) 0.3 Plate thickness (µm) 1.5 Aluminum layer thickness (µm) 0.3 Silicon substrate thickness (µm) 400 Chip length (mm) 53 Chip width (mm) 37

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(a)

(b) (c)

39.6 mm

300 µm

 Figure 4-16. A 1D 128 elements linear CMUT array (a) before lens coating, and (b-c) after lens coating.

The pressure response was measured in DI water, which sat for 4 hours for

degassing. One CMUT element was biased at 73V, 80% of the pull-in voltage and

excited by a 15-cycles 10-Vpp continuous wave (CW) at 6.5 MHz, generated by a function

generator (Model HP 8116, Hewlett Packard Corp., Palo Alto, CA). Next, the pressure

was measured using a calibrated hydrophone (Model HNP-0400, Onda Corp., Sunnyvale,

CA 94089) at the depth ranging from 5 mm to 20 mm. The step of the depth

measurement is 250 µm considering the hydrophone tip size 300 µm, and the signal

wavelength of around 230 µm. At each depth, an elevation line scan from -2 cm to +2 cm

with a step of 150 µm was performed, controlled by a computerized linear stage. As the

measurement covered large area including the near field, where rapid phase changes, the

alignment is very critical for an accurate pressure field result. The alignment was

performed through a loop crosscheck between an optical alignment and an acoustic

pressure measurement feedback. The optical way was using an optical microscope to

focus on the PCB; the measurement feedback was to find the maximum pressure point

from the elevation line-scan at three different depths.

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To be noted that this study was to characterize one CMUT element with lens

focusing. A practical scheme of 1D linear array operation requires a group of elements,

e.g. 32 elements, with or without electronic focusing along azimuth. The azimuth

electronic phase focusing was not available, such that the geometric diffraction was

expected along the azimuth direction. For the same reason, the intensity of the pressure

field decreases along with the depth.

4.3.4 RESULTS AND DISCUSSION

Figure 4-17 demonstrates the pressure fields and beam profiles from the CMUTs

with conformal coating and lens coating. Compared to the conformal coated CMUTs

[Figure 4-17(a)], it was expected that the lens coated CMUTs show more significant

focusing and the focal point is at around 9 mm. The relative peak amplitude around the

focal point was measured at 10.8 kPa, versus 9.0 kPa measured for the conformal case.

The limited focusing gain was expected for the weak focusing design.

The main design purpose for lens on a 1D array is the elevation resolution

improvement, i.e. thinner slice thickness. With conformal coating, the slice thinness, i.e.

elevation resolution, is 2.0 mm at F# of 3, and 1.4 mm at F# of 7 [Figure 4-17(b)]. With

lens coating, the results show that the slice thickness is reduced to only 8mm at F# of 3,

and 1.2 mm at F# of 7. These results demonstrate a direct PDMS lens coating can provide

encapsulation and mechanical focusing on CMUTs.

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x [mm]

y [m

m]

-2 -1.5 -1 -0.5 0 0.5 1 1.5 2

5

10

15

20

-12

-11

-10

-9

-8

-7

-6

-5

-4

-3x [mm]

y [m

m]

-2 -1 0 1 2

5

10

15

20

2

3

4

5

6

7

8

9

10

11

12

x [mm]

y [mm

]

-2 -1.5 -1 -0.5 0 0.5 1 1.5 25

10

15

20

2

3

4

5

6

7

8

9

10

11

12

x [mm]

y [mm

]

-2 -1.5 -1 -0.5 0 0.5 1 1.5 25

10

15

20

2

3

4

5

6

7

8

9

10

11

12

x [mm]

y [m

m]

-2 -1.5 -1 -0.5 0 0.5 1 1.5 25

10

15

20

-12

-11

-10

-9

-8

-7

-6

-5

-4

-3

x [mm]

y [m

m]

-2 -1.5 -1 -0.5 0 0.5 1 1.5 25

10

15

20

-12

-11

-10

-9

-8

-7

-6

-5

-4

-3

kPa

dB

Dep

th (m

m)

Dep

th (m

m)

Dep

th (m

m)

Dept

h (m

m)

dB

kPa

F# = 7

F# = 3

10.5 kPa

DO

VElevation (mm) Elevation (mm)

 (a) (b)

Figure 4-17. Pressure field measurement for CMUTs with (a) conformal PDMS coating, and (b) lens PDMS coating.

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4.4 ULTRASOUND BEAM TILTING FOR BLOOD FLOW IMAGING

One application of PDMS encapsulated CMUTs is an operator-independent

carotid artery screening by using asymmetric lenses coating on a 5-plane CMUT array.

The array is used for color flow Doppler detection of peak blood velocity (PBV), which

is correlated with carotid stenosis. Asymmetric acoustic lenses provide fixed angle off-

axis beam steering for color flow Doppler. In the proposed system, first, five parallel

short-axis B-mode and color flow images of the carotid artery are obtained. Then, a

custom software package automatically finds the center points of the blood flow,

computes the vessel trajectory, Doppler angle and angle-corrected peak velocities. The

fabricated CMUT arrays showed a center frequency of 8.1 MHz and a fractional

bandwidth of 103% in immersion. In resonant frequency measurement in air, the

uniformity across the array is excellent, with a standard deviation of 0.18% of the mean.

Initial experiments on asymmetric acoustic lenses verified the off-axis steering capability.

Using the in-house software package and a commercial 1D array, the calculated peak

blood velocity has an error of less than 6%, when the Doppler angle is less than 45o.

4.4.1 INTRODUCTION

Stroke is the third leading cause of death in the United States [86]. In many cases,

atherosclerotic stroke is caused by carotid stenosis (narrowing of the carotid artery due to

fatty deposits on the artery side walls). Doppler ultrasound is a widely available screening

tool for carotid stenosis. In the screening procedure, the peak blood velocity (PBV) in the

carotid artery, which is correlated to carotid stenosis, is measured. However, in the

current procedure, the technologist needs to align the ultrasound probe longitudinally

with the carotid artery, and carefully position the probe in order to locate the peak blood

velocity. Then, the technologist needs to manually position cursors on the ultrasound

machine to determine the Doppler angle, which is essential for the accurate calculation of

the PBV. Thus, the current procedure is highly dependent on the technologist. It not only

requires a highly trained professional, but also makes the procedure lengthy (15-30 min).

Moreover, the measurement results are prone to intra- and inter-operator variability.

An asymmetric lens was proposed to use on each of the five parallel 1D CMUT

arrays on a single substrate to obtain five parallel B-mode and color flow images of the

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carotid artery. Custom-built board-level electronics interface the 5-plane array with a

commercial ultrasound imaging system. In the elevation direction asymmetric acoustic

lenses steer the acoustic beam at fixed angles for color flow Doppler measurements. A

custom software package automatically computes the vessel trajectory, Doppler angle

and angle-corrected peak velocities for the 5-plane transducer array.

4.4.2 METHODS AND RESULTS

4.4.2.1 System overview

The goal of the proposed carotid screening system is to eliminate operator

dependence, thus making it more reproducible and clinically accessible than the

conventional method. This goal can be achieved by using five 1D transducer arrays

located on a single substrate. CMUTs are well suited for this application because of the

demonstrated performance advantages for carotid imaging [87], and the ease of array

manufacturing, due to parallel micro-fabrication. Asymmetric acoustic lenses are formed

on each array in the elevation direction. A custom-designed circuit board interfaces the

CMUT array with a commercial ultrasound system (in this case a Siemens Antares

system) via a standard probe cable. The board provides the needed DC biasing network,

and the electronic circuits to switch between the five individual arrays. Minimal

modifications to the existing ultrasound systems are needed to accommodate the CMUT

arrays and the interface board. Thus, five cross-sectional B-mode and color flow images

of the carotid artery can be obtained. A software package developed in-house then

determines the center point of each cross-sectional slice of the vessel in the color flow

image. The program uses this information to automatically compute the vessel trajectory,

Doppler angle and angle-corrected peak velocities for the 5-plane transducer array. The

system concept is illustrated in Figure 4-18.

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(a)

(b)

(c)  Figure 4-18. System concept for a new carotid screening tool based on a 5-plane CMUT array. (a) CMUT array and the interface board. (b) Asymmetric acoustic lens on each 1D array for fixed angle off-axis beam steering in the elevation direction. (c) Diagram of cross-sectional carotid images obtained using the proposed scheme.

4.4.2.2 5-Plane CMUT arrays

CMUT arrays are designed to be interchangeable with a Siemens VF 13-5 SP

ultrasound probe to minimize modification to the ultrasound system. Thus, the geometry

of each 1D array (200 µm by 4 mm element size) as well as the center frequency (7.5

MHz) is determined by those of the VF 13-5 SP probes. To improve the device

uniformity, two additional dummy CMUT elements are included on either side of the 128

active elements. The active array area is roughly 25 mm by 26.4 mm (Figure 4-19). The

CMUT cavities are square shaped, with a side length of 40 µm. The plate is made of 1.5-

µm-thick single-crystal silicon. The vacuum cavity is 0.15 µm, over a 0.3 µm thick

silicon oxide insulation layer. For such a design, the expected plate resonant frequency is

12.11 MHz in air at 40 V DC bias, and the collapse voltage is 91 V. The key physical

parameters of the CMUT arrays are the same as summarized in section 4.3.

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 Figure 4-19. Active array area illustration.

The arrays are fabricated using SOI wafer-to-wafer fusion bonding [47]. Device

pictures after the completion of fabrication are shown in Figure 4-20. In the first

demonstration, a simple fan-out structure is used for electrical connections to the array

elements from the front side of the substrate. The total chip size is enlarged to 53 mm x

37 mm due to the electrical connection traces. In future designs, through-wafer trench-

isolated interconnects will be used to realize a reduced chip size. This will not only result

in a more ergonomic ultrasound probe, but also result in more chips on a silicon wafer,

thus reducing the cost.

(a) (b)  Figure 4-20. (a) A 4-inch silicon wafer after the completion of fabrication. The center two devices are 5-plane CMUT arrays; the periphery contains test devices. (b) A 5-plane CMUT array diced off from the wafer.

First, the CMUTs were tested in air using an impedance analyzer (Model 8751,

Hewlett-Packard Company, Palo Alto, CA). The measured resonant frequency is 11.98

MHz at 40 Vdc, 0.13 MHz (1.1%) less than design target of 12.11 MHz. Across a 1D

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array, the resonant frequency showed a uniform distribution, with a standard deviation of

0.18% of the mean (Figure 4-21). Therefore, in air testing, the fabricated CMUTs showed

excellent match to design targets.

 Figure 4-21. Resonant frequency distribution across a 1D array.

Pulse-echo experiments were performed using a pulser-receiver (Model 5058PR,

Olympus NDT, Waltham, MA 02254) with arrays immersed in soybean oil. The oil-air

interface was used as a plane reflector. The CMUT showed a center frequency of 8.1

MHz, and a 6-dB fractional bandwidth of 103% (Figure 4-22). The notch in the

frequency spectrum at around 11 MHz is due to acoustic reverberation in the 400-µm

silicon substrate. It can be pushed out of the operating spectrum by making the substrate

thinner, or by attaching the substrate to a backing with matched impedance and with high

attenuation. The acoustic output pressure increased as the DC bias voltage and the AC

excitation voltage increased (Figure 4-23). Using an 80-V DC bias and a 100-V, 50-ns

AC excitation, the output pressure on the CMUT surface was measured to be 1.6 MPa

peak-peak.

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 Figure 4-22. Pulse-echo signal, and corresponding spectrum.

 Figure 4-23. Normalized output pressure as a function of DC bias and AC excitation voltages.

4.4.2.3 Asymmetric acoustic lenses

For five parallel 1D arrays built on a single substrate, asymmetric acoustic lenses

can provide an ergonomic means of achieving off-axis steering. Such off-axis beam

steering is needed for Doppler measurements. Similar to section 4.3, PDMS was used as

the lens material. The off-centered cylindrical acoustic lens was investigated in this

section. The basic principle of off-axis steering is illustrated in [Figure 4-24(a)]. A simple

calculation yields that, to achieve as large of a steering angle as possible (small Doppler

angle), the ratio between the acoustic velocity in the lens material and that in water,

should be as large as possible [Figure 4-24(b)]. Common types of PDMS possess acoustic

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velocities that would yield maximum steering angles of 20o-25o. In a first experiment, an

off-centered cylindrical lens was formed on a 1D CMUT element. A four-degree steering

angle was measured. A better lens material with a slower acoustic velocity is desired to

achieve a larger steering angle.

(a) (b)  Figure 4-24. (a) Illustration of off-axis beam steering using an off-centered cylindrical lens. (b) Tilt angle as a function of the ratio of acoustic velocities in the lens material and in water (n = Cwater/Clens).

4.4.2.4 Peak blood velocity calculation

By cooperating with Jessica Faruque from Professor Sandy Napel’s group at

Stanford University, we developed a software package, which allows the peak blood

velocity (PBV) calculation. The PBV is automatically computed once color flow images

are obtained from the five parallel 1D arrays. The computation is carried out using a

software package developed in-house. In our preliminary experiments, the five color flow

Doppler images, overlaid on B-mode images, are obtained using a commercial 1D array.

A mechanical fixture is built so that the 1D array is tilted at a fixed angle, and can slide

along a rail. A straight tube vessel phantom was imaged with pumping blood-mimicking

fluid through the tube to simulate blood flow in an artery (Figure 4-25). The software first

removes the background B-mode images from the color flow Doppler images extracted

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from the ultrasound imaging system. Then, the software determines the center points of

the vessel cross sections in the color flow images. Using this information, the vessel

trajectory and thereby the angle between the transducer and the vessel is calculated. The

PBV can then be found out by correcting for the Doppler angle. When the Doppler angle

is less than 45°, the PBV calculated using the proposed scheme has an error of less than

6% when compared to that determined by the conventional method.

 Figure 4-25. Setup of using a 1D array to obtain five cross-sectional color flow Doppler images of a phantom.

4.4.2.5 Summary and future work

A new screening method for carotid stenosis is proposed. The key components of

the system include a 5-plane CMUT array, asymmetric acoustic lenses, an electronic

interface board, and a software package for automatic PBV calculation. The design,

fabrication and testing of the first generation 5-plane CMUT arrays were completed. The

arrays showed uniform element-to-element performance, and are suitable for the

proposed application. Preliminary experimental results validate the viability of the

asymmetric acoustic lenses. An in-house software package has been developed for PBV

calculation once the five color flow Doppler images are obtained. For future work, a 5-

plane CMUT arrays with through-wafer interconnects can be developed for compact

packaging. Different types of PDMS were suggested to find the best lens material for

improved steering angle.

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CHAPTER 5 BACKSIDE INTERFACE ENGINEERING

OF CMUTS

The work on the backside interface engineering of CMUTs presents contributions

towards the electronic integration and packaging of large-area 2-D arrays. A very large

2D array is appealing for it can enable advanced novel imaging applications, such as a

reconfigurable array, and a compression plate for breast cancer screening. To achieve

these goals, the first large-scale fully populated and integrated 2D CMUTs array with 32

by 192 elements was developed. In this study, I demonstrate a flexible and reliable

integration approach by successfully combining a simple UBM preparation technique and

a CMUTs-interposer-ASICs sandwich design. The results show high shear strength of the

UBM (26.5 g), 100% yield of the interconnections, and excellent CMUT resonance

uniformity (σ = 0.02 MHz). As demonstrated, this allows for a large-scale assembly of a

tile-able array by using an interposer.

5.1 LARGE SCALE 2D ARRAYS

5.1.1 MOTIVATION

Ultrasonic imaging, shared with other imaging modalities, can be benefited by

large aperture size in terms of lateral resolution (5-1).

Lateral resolution ∝ 1 / Aperture size (5-1)

In addition, a number of specific applications exist in which large area ultrasound

transducer arrays can be used. These include cancer screening and continuous non-

invasive blood pressure monitoring [1]. A novel breast cancer screening can be realized

by placing very large ultrasonic transducer arrays on both upper and lower compression

plates in a manner similar to X-ray based mammography. A screening mammography

every 1-2 year was recommended by the “U.S. Preventive Services Task Force” for

women aged 40 and older. Although, mammography is the most commonly used

modality for early detection of breast cancer, there exists 15% of false-positive require

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further ultrasound testing, and at least 10% of false-negative due to dense tissues

obscuring the cancer. One-way projection manner and poor resolution of mammography

cause the high false-positive and -negative rate, and results in unnecessary biopsy. By

using the dual ultrasonic imaging plates (Figure 5-1), compound images of a lesion using

data from both the upper and lower plates can minimize shadowing artifacts. Two-way

projection formed 3D data set can provide through-transmission measurements including

the speed of sound and attenuation. Complete 3D data sets can be acquired in renderings

made with 3D compounding to optimize achievable contrast and maximize speckle

suppression. Imaging techniques such as elastography can be applied in a more rigorous

manner than before including use of 3D [7, 8].

Bottom CMUTplate

Top CMUT plate

Camera unit

X-ray beam

Film plate

 Figure 5-1. Schematic of the dual ultrasonic imaging plates on the current mammography setup.

5.1.2 RECONFIGURABLE ARRAY

A major challenge in future ultrasound imaging systems that features large area

transducers is the large number of interconnects existing between the signal processing

electronics and the transducer array. As systems move to larger and larger 2D arrays at

finer pitches, existing technologies for interconnect are increasingly inadequate.

Depending on the application, the element count for the large area transducer will range

from 10,000 to >1,000,000. Given the large number of transducer elements, each with its

own respective signal processing circuitry, significant power, cost, and area penalties

exist.

One attractive way to reduce the number of signal processing channels for such a

large area array is through the use of a mosaic annular reconfigurable array [4][5].

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Ultrasound systems using reconfigurable array architectures can benefit from good image

quality with a significant reduction in the number of system channels. As illustrated in

Figure 5-2, the mosaic array architecture groups a number of sub elements together along

iso-phase lines to form larger transducer elements which are then each connected to a

single system channel. In this way, an array that has tens of thousands of active acoustic

sub elements can be reduced to a much smaller number of system processing channels

(e.g. 20-100). This greatly reduces the requirements on the system and makes possible

low power and low complexity electronics systems for large area arrays. For example, the

entire surface of both compression plates can be made to function as reconfigurable

transducer arrays. The reconfigurabilty provides the capability to form larger arrays in

any desired configuration such as an annular array; the annular array aperture will result

in the thinnest possible slice thickness, which, unlike existing devices, will be

dynamically focused over the entire depth.

In order to realize such array architecture, it is necessary to integrate switching

electronics immediately behind the acoustic array. These switching circuits, which are

realized using dedicated ASICs, connect directly to each respective sub element and can

be programmed to short these elements to one another in a reconfigurable manner. One of

the main challenges, which exist with such a system, is how to interconnect the large

number of transducers with a respective switching circuit on the adjacent ASICs.

Compared to traditional PZT-based ultrasonic transducers, CMUTs were made by

adopting MEMS technology. It allows CMUTs to be processed in a similar way to the

ASICs, which makes them more amenable to standard packaging flows.

 Figure 5-2. Reconfigurable 2D CMUT arrays.

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5.2 2D CMUT INTERCONNECTION AND 3D CMUT/IC INTERGRATIONS

The packaging regarding to CMUT interconnection and CMUT/ IC integration

can adopt the efforts developed in IC industry. The goal is to achieve a high density, and

high fill-factor 2D integration between CMUTs and ICs. One way of achieving this

integration is using System-on-a-Chip (SOC) to make both the electronics and CMUTs

on the same substrate (monolithic integration) [88][89][90]. SOC, featuring a complete

system built on a single chip, was expected to offer small product size, high speed, and

good reliability. Because CMUT is directly built on the substrate with the IC using a post

IC fabrication process, thermal, material, and processing method choices of the CMUT

are strictly limited [91]. Therefore, monolithically integrating IC and CMUT processing

generally compromise the CMUT performance, increases the process complexity, and

thus reduces device yield, which in turn increases cost.

The multichip module (MCM) or 2D System-in-Package (SIP) technology, on the

other hand, simply puts IC and CMUT chips together in a single package. In this case,

CMUTs and ICs are fabricated from each separated substrates, such that the performance

can be optimized. In 2D SIP, wire bonding can be used to connect 1D CMUT array

elements to ICs. However, direct wire bonding is not feasible for arrays with tight space

constraints, e.g., those for catheter-based applications. In addition, wire bonding is

difficult to apply on 2D CMUT arrays. First, the bonding wires cannot span over the

active surface, which causes interference with the acoustic performance. Second, the

routing of the electrical connection, from all elements to the bonding pads on device

edges, may cause huge area penalty, which in turn degrade CMUT performance, and

increase the parasitic capacitance. Thus, it is advantageous to interconnect the CMUT

elements by flip-chip bonding with through silicon via (TSV) using 3D SIP technology.

The main benefits of 3D SIP over other alternatives, e.g. SOC or 2D SIP, are

performance, form factor and cost [92]. Flip-chip assembly provides much shorter

interconnections through solder bumping. Thus, parasitic was greatly reduced, allowing

higher-speed signals. Because of the nature of ultrasonic transducer, CMUT surface are

required to interact with the outside world. This is in contrast to many popular MEMS

devices such as accelerometers and MEMS resonators, which can be isolated

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hermetically. Therefore, it is necessary to provide electrical contact to CMUT elements

from the backside of the substrate. Developing proper through-wafer interconnect

methods is essential in this approach.

5.2.1 SURFACE MICROMACHINING THROUGH-WAFER VIA

Through-wafer interconnects can be implemented using two different approaches:

through-wafer vias (Figure 5-3). In the through-wafer via implementation, a conductive

material is used to fill the vias through the several-hundred-micron-thick silicon

substrate. The vias connect the front side of a silicon wafer, where the CMUT elements

reside, to the backside, where the flip-chip bond pads are located. In the IC industry, the

popular material for the conductor in the vias is copper (by electroplating), a standard

interconnect material [92]. However, copper becomes inappropriate for the high

temperature steps necessary for the CMUT fabrication processes. Polysilicon-filled

through-wafer vias are high-temperature compatible, as demonstrated by Chow et. al. in

2002 [93]. The method was first adopted for CMUTs by Cheng et. al. [6][94][95]. The

polysilicon is deposited using low pressure chemical vapor deposition (LPCVD), and is

heavily doped to reduce resistivity. The resulting resistance and parasitic capacitance are

suitable for CMUT applications. A surface micromachined CMUT array successfully

integrated with IC has been demonstrated [6][94][95]. By using this approach, a 16 by 16

array size can be realized [6][94][95].

(a) (b)

InsulatorConductor

 Figure 5-3. Different approaches for through-wafer interconnect. (a) Through-wafer via, (b) through-wafer trenches.

In the meantime, wafer-bonded 1D CMUT array was developed showing superior

performance, simpler process, better plate uniformity, and allowing more flexible

geometry over the surface micromachined counterparts [47]. For example, large area

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plates can be reliably made using wafer bonding, because the SOI provides stress free

film and the wet releasing step is no longer required. Wafer bonding offers the freedom to

choose the plate geometry in both the thickness and lateral directions. Wafer bonding also

ensures well-controlled plate and cavity quality, which improves device performance and

uniformity.

In order to realize a wafer-bonded 2D CMUT array, a through-wafer-via

technology compatible with the wafer bonding technique is required. However, the

through-wafer via method involves complex front and back side processes, including

multiple thin film depositions, doping and etching before the wafer bonding step.

Particularly, it is a “via-first” approach, such that the fusion-bonding step was proceeded

after the via processes. These processes introduce surface roughness, induce stress

imbalance on the wafer and cause wafer warping. As fusion bonding is extremely

sensitive to the substrate surface condition, so far no successful fusion bonded CMUTs

with through-wafer via was reported. To address this issue, Zhuang et al, have presented

a new TSV technology, through-wafer trench-isolated interconnections with a supporting

frame [7].

5.2.2 THROUGH-WAFER TRENCH-FRAMED INTERCONNECTIONS

In the through-wafer trench isolation approach, the silicon substrate is used as the

conductive material, while the trenches between array elements providing electrical

isolation. One such implementation was demonstrated by Lemmerhirt et al [96], however,

each interconnect is with a large footprint which becomes incompatible with CMUTs for

small pitches. Also, an extra connector structure is needed to hold each interconnect,

making the fabrication more complex.

Zhuang et al, developed a trench-isolated through-wafer interconnects on a

supporting frame successfully integrated with a wafer-bonded, fully populated 2D CMUT

arrays [7]. In this approach, the CMUT arrays are built on an SOI wafer and all electrical

connections to the array elements are brought to the backside of the wafer through the

highly conductive silicon substrate. Neighboring array elements are separated by trenches

on both the device layer and the bulk silicon (Figure 5-4). A mesh frame structure,

providing mechanical support, is embedded between silicon pillars, which electrically

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connect to individual elements. A contact via on the device layer was opened by using

DRIE, and filled by doped polysilicon to build up the conductivity. In this way, a limited

size of via footprint, smaller than one CMUT cell, can be provided. The major benefits

over the through-wafer via technique is that the via was build after the fusion bonding

step. This “via-last” TSV technique, comparing to the “via-first” TSV, can be

successfully integrated to the wafer bonding process.

Backside trench

Frontside trench

Contact viaOne CMUT element

 Figure 5-4. 3D schematic of the trench-isolated CMUT with a supporting frame.

A 16x16-element CMUT array with 250-µm-pitch was successfully fabricated

with good yield (100%), and great uniformity of pulse-echo amplitude (σ= 6.6%). This

results shows that through-wafer trench-isolation with a supporting frame is a viable 2D

interconnection solution to integrate with wafer bonding for delivering good

performance. Yet, the challenge is how to extend this approach to a larger scale, and with

smaller pitch-size.

5.3 INTERPOSER DESIGN AND UBM PREPARATION FOR LARGE SCALE 2D

ARRAY

An enabling technology for a large scale 2D array requires a simple, flexible and

reliable interconnection and IC integration technique. As an example of fabricating a

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large scale 2D CMUT array using wafer-bonding, an interposer sandwich structure and a

pre-trench UBM preparation were proposed in this section. First, the approaches between

a single large die versus an array tiling assembly were discussed. The study introduced an

interposer design, which provides a flexible assembly scheme for various pitches

combination while enabling a large scale array with high yield. Second, the material and

fabrication of CMUTs considering the large-scale assembly was addressed. Last, a pre-

trench UBM preparation compatible to the trench-frame interconnection technique was

demonstrated. As the key parameter for enabling large-scale array tiling through flip-chip

bonding is the excellent uniformity of the solder height, the first solder-bumped trenched

2D CMUT array using the new UBM preparation was demonstrated.

5.3.1 SINGLE LARGE DIE VERSUS ARRAY-TILING ASSEMBLY

To fabricate a large-scale CMUT arrays, it can be realized as a single large die

[Figure 5-5(a)] or a tiling assembly module consisting of many smaller dies [Figure

5-5(b)]. Single large 2D array fabrication and assembly introduce several new challenges,

which are absent for small 2D array such as a 16x16 array. For example, to fabricate

100% yield on single large array is challenging. Moreover, under filling is more difficult

for larger die. The flatness requirement for an IC assembly integration is more

challenging as the die size becomes larger. Besides, it is not practical for ASIC die pitch

size being the same as of CMUT arrays.

Alternatively, array assembly by tiling provides high yield from more 100% yield

small arrays. The flexible size and pitch for both CMUT and ASIC sides are available. It

is also easy for bumping, soldering, and under filling. In addition, the flatness of CMUT

die is not as critical as of large single die.

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ASIC ASIC

Interposer

ASIC

CMUT die #1 CMUT die #2

CMUT die

(a)

(b)  Figure 5-5. Large-scale CMUT arrays can be made of (a) a single large die, or (b) an array tiling assembly.

To achieve an array tiling assembly module, several challenges were first

introduced. Upon using tiling array, sectioning of the sensor might affect the acoustic

performance depending on the die separation. The current center frequency design needs

this space to go down to 50 µm as the total non-active distance (separation plus the die

boundaries, ~22 µm) to be less than half of the wavelength (185 µm). Array assembly by

tiling requires an interposer featuring low dielectric loss, ease of integration, and flatness

fulfilling the imaging and assembly requirements.

A high-density Teflon interposer, HyperBGA® technology, produced by Endicott

Interconnect (EI) was used to design a modular package in which the sensor CMUT array

is on the topside and the supporting electronics on the backside. HyperBGA technology is

to use a PTFE-based (Teflon) interposer by laminating multiple layers for signal routing.

PTFE provides a low dielectric constant (εr = 2.7) and low dielectric loss (tan δ = 0.003),

which translates to superior electrical performance [97].

A standard HyperBGA® is composed of nine low loss copper metallization layers

(Figure 5-6). Specifically, the laminate contains two signal layers utilized for a majority

of the signal routing, Signal 1 and Signal 2. Both of these layers are completely

embedded in a true strip line environment (sandwiched between either Voltage 1 or

Voltage 2 and the center copper-invar-copper (CIC) ground plane). In addition to the

signal routing layers, are two redistribution signal layers, top surface redistribution (TSR)

and bottom surface redistribution (BSR). The redistribution layers are designed to

establish wiring channels, which allow the signal routing layers to efficiently match the

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C4 footprint to the desired Ball Grid Array (BGA) footprint. The C4 layer on the very top

of the substrate contains only the C4 pads while the BGA layer on the very bottom of the

laminate contains only the BGA pads. Interlayer connections are accomplished with

microvias and plated through-holes (PTHs).

C4 padTSRVoltage 1Signal 1CICSignal 2Voltage 2BSRBGA pad  

Figure 5-6. 9-layer HyperBGA® substrate

EI’s existing 9-layer HyperBGA® substrate was used for the assembly evaluation

and as a testing vehicle for signal routing to an imaging board through BGA. The pitch-

size difference between CMUT array and ASIC together with interconnection line width

and array size determine the total number of the routing layers. While 9 layers are

sufficient for this evaluation step, more signal routing layers can be added as a

modification enhancement to this existing 9-layered interposer substrate.

In general, with element pitch difference, one extra routing layer was added once

every “one element fall behind” (Figure 5-7). At CMUT pitch of 185 µm and ASIC pitch

of 150 µm (35µm difference for each cell), ASIC side falls behind by one element every

5.3 elements (185 µm / 35 µm = 5.3). The required routing layer count can be calculated

in two steps by first considering in one dimension (on the page), and then the second

dimension (into the page). For an array with 32 elements (mirrored 64 elements), 7

routing layers are calculated for one dimension:

32 elements / 5.3 elements = 6.1 layers; 6+1 = 7 routing layers. (5-2)

Then, for the second dimension (dimension into the page of Figure 5-7),

considering 25 µm for both the line width and line space, a 185 µm wide column can fit

around 3 routing channels:

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columnchannelsmm

mspacelinewidthline

pitchCMUT /7.32525

185 =+

=+ µµ

µ . (5-3)

The routing layers can be reduced from 7 layers to 3 layers (7/3=2.3; 2+1=3) by

considering the second dimension. In this case, 4 routing layers will be used for

symmetry resulting totally 11 layers for future functional 150 µm-pitch ASIC/ interposer/

functional 185 µm-pitch CMUT assembly.

ASIC array with 150µm pitch

CMUT transducer array with 185 µm pitch

Interposer with signal routing layers

Mirrored

“one element fall behind”  

Figure 5-7. Illustration of signal routing in the interposer.

5.3.2 CMUT DESIGN AND FABRICATION

The design goal of CMUT for breast cancer screening requires around 8 MHz

center frequency in immersion with 100% of FBW and 1 MPa minimum output pressure.

Based on the center frequency, 185 µm pitch was selected to prevent from a grating lobe.

To achieve the design criteria, an enhanced equivalent circuit model using MATLAB

script [8][10] was used, that includes imaginary part of mass loading effect [43]. Square

shaped plates, over circular shape, were chosen to achieve higher device fill factor.

Compared to rectangular plates, square plates yield a smaller fill factor, but increase the

separation between the adjacent modal frequencies, which reduced acoustic crosstalk.

The electrical contact via was located at the center of each element, and occupies one cell

per element.

Wafer-level yield was studied because the large-scale tiling assembly module

requires much more functional CMUT dies. Several SOI wafer specifications were

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discussed as follow for yield improvement, including resistivity (doping concentration),

and the Si device layer and BOX layer thicknesses.

Previously, the interconnect resistance as a function of the silicon wafer resistivity

was calculated to be just a few ohms if the silicon wafer resistivity is below 0.05 Ω-cm

[Figure 5-8]. Low interconnect resistance benefits the output efficiency and receiving

sensitivity, however, there is a tradeoff between the resistance and the fusion-bonding

yield. As superior fusion bonding requires close bonding surfaces proximity (< ~10Å),

variation of surface topography greatly reduces the bonding yield. The thermal oxidation

growth rate differs due to “dopant enhanced oxidation” effect. The lower the resistivity,

the higher variation of the thermal oxide thickness. The commercially available SOI

wafer usually specifies resistivity variation, such as 0.01~0.025 Ω-cm. This axial

variation comes from the nature of CZ crystal growth that has freezing interface concave

into the melt [98] (Figure 5-9). While targeting the insulation layer of 3000 Å, the SOI

with resistivity of 0.01~0.025 Ω-cm (doping concentration of 3.3e18~8.1e18 cm-3) results

in 3000 Å ~ 3005 Å of oxide thickness variation over the wafer. However, as the

resistivity was lowered one order to 0.001~0.004 Ω-cm, the oxide thickness

nonuniformity increases up to 36 nm (3000 Å ~ 3354 Å). A short loop run comparing

two resistivities with all other parameters controlled was performed. The results show the

fusion-bonding yield largely was reduced by using the SOI with lower resistivity [Figure

5-10]. Taking the tradeoff into consideration, the SOI with resistivity of 0.01~0.025 Ω-

cm was selected.

 Figure 5-8. Serial resistance versus the resistivity of the SOI substrate [99].

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seedSilica crucible

Si-crystal

Si-melt

heater

 Figure 5-9. Temperature profile in CZ Silicon growth [100]. The freezing interface of the Silicon crystal is concave into the melt.

(a) (b)

Good bonding yield across the wafer

Poor bonding arrays

 Figure 5-10. Fusion bonding yields comparison between the SOI with resistivities of (a) 0.01~0.025 Ω-cm, and (b) 0.001~0.004 Ω-cm. Bonding yield of (a) is 100% for all 21 arrays, and down to (b) 66.7% (14 out of 21 arrays).

An increased BOX layer thickness is desired for a reduced parasitic capacitance.

The total parasitic capacitance as a function of the BOX layer thickness is calculated

indicating that a BOX layer of 2 µm results in a parasitic capacitance that is less than 0.4

pF. Compared to a typical device capacitance of ~ 2 pF for such an element, this is a

good compromise (< 20%). In addition, an increased Si device layer is desired for

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assembly rigidity and yield. Regarding to the trench-frame-pillar structure, the frame

provides the rigidity of the CMUT array, while the device and BOX layers, where the

pillars attached, provides the rigidity to the flip-chip bonded module. The thicker the

device layer, the higher of the rigidity of the attached assembly module. This rigidity

becomes crucial for a good yield of the sandwich-assembly process. However, there is a

fabrication limitation of using very thick device and BOX layers. The thicker the Si

device/ BOX layers, the slower and longer is the BOX layer etching (Table 5-2-4). A test

run showed a multi-coated 2 µm baked Shipley 3612 photoresist provides sufficient

masking for the etching (~2 hour) of the 2 µm BOX layer at bottom of the 20 µm device

layer. For the same etching, a single coated Shipley 3612 resist is too thin and thick

Shipley SPR220 resist without baking suffered from burning during the etching. By using

this modified recipe, the device layer thickness can be increased from 10 µm to 20 µm,

which is essential for the assembly feasibility reported in section 5.4. An even thicker

device layer design will require a HF vapor etching of the BOX layer.

Table 5-1. Device parameters of CMUT for breast cancer screening.

Number of elements 256 (16x16) Element pitch, µm 185 Number of plates/element 24 Insulating layer thickness, µm 0.3 Vacuum cavity height, µm 0.15 Plate width, µm 28 Plate length, µm 28 Plate thickness, µm 1.0 Device layer thickness, µm 20

BOX layer thickness, µm 2.0 Silicon substrate thickness, µm 255 Front side trench width, µm 4 Backside trench width, µm 27.5 Frame width, µm 40

With all the design parameters (Table 5-1), the CMUT elements were first

fabricated on an SOI wafer with a 20-µm thick silicon device layer. Then, the electrical

contact vias were formed in each element. In a subsequent fabrication step, the backside

isolation trenches and the embedded silicon supporting frame were fabricated

simultaneously. The detailed fabrication steps are described below (Table 5-2).

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Table 5-2. CMUT fabrication process flow.

Cartoon of process flow Description of the fabrication I.

CM

UT

cel

ls fo

rmat

ion

(1~3

) 1. Define cavities on an SOI wafer

Silicon Oxide

CMUT cavities (0.15µm of gap) with 0.3µm of insulation layer were defined on the device layer of a double-side-polished SOI wafer using double thermal-oxidation and BOE techniques.

2. Separate elements on device layer

The front electrical pads (element scale) were electrically separated by forming the frontside trenches (4µm wide) using a DRIE “Bosch process” step.

3. Wafer bonding and Remove handle wafer

Second SOI wafer carrying a silicon plate (1µm thick) was fusion bonded to the patterned oxide of the first SOI wafer and annealed at 1000oC for 2.5 hours. The handle layer of the second SOI wafer was removed in a heated TMAH solution.

II. F

ront

side

inte

rcon

nect

ions

(4~7

)

4. Contact via opening

Nitride

The nitride layer deposited atop of the BOX layer acts as a diffusion barrier in the upcoming doping step. Contact vias were opened in the center cell of each element by DRIE “Bosch process” with the BOX layer as etch stop. A dry plasma etcher was used to remove the BOX layer to open the access to the substrate layer.

5. Poly deposition, & doping

Doped polysilicon

A conformal deposition of a conductive material , phosphorus doped polysilicon, was used in the contact via to provide electrical continuity between the CMUT device layer and the silicon substrate.

6. Via protection and etch back to plate

It was etched back to the CMUT plates by removing doped polysilicon, nitride, and BOX layers. The via areas were protected during the etch-back.

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7. Front side metallization and electrical isolation

Aluminum

The CMUT plates were remetallized with aluminum. The aluminum with plates, top electrodes of CMUT cells, were then isolated from the contact vias by etching back the surrounding trenches to the oxide insulation layer.

III.

Bac

ksid

e in

terc

onne

ctio

ns (8

~9)

8. Back side grinding and polishing

The silicon substrate was thinned down from the back side to 255 µm by mechanical grinding and polishing. Thinning down the silicon substrate reduced the series resistance and parasitic capacitance. In addition, this benefited a shortened back side trench etching time.

9. UBM, backside trench opening, and IC intergration

Interposer

ASIC

UBM Solder bump

A newly developed process steps including the under-bump metallurgy (UBM), backside trench and the IC integration will be discussed in detail in section 5.3.3.

5.3.3 UNDER-BUMP-METALLURGY DESIGN AND FABRICATION

In previous work, an UBM was implemented to enable the integration of a 16x16

2D CMUT array with ASIC. This was accomplished by using a post-trench UBM formed

by a 45o-tilting metal evaporation (Figure 5-11). This approach was for demonstration

purpose for a relatively small 2D array. Because the UBM pad is unconfined, the use of

solder is limited to the IC side during solder installation. For the same reason, it also

degrades the uniformity of the solder ball height, which makes large scale assembly

impossible. A large-scale tiling sandwich assembly requires a flexible, simple, and

reliable UBM preparation, which is compatible to the trench-frame process. In the

following sections, the design, fabrication, and test results of the newly developed post-

trench and pre-trench UBMs are described. The first solder-bumped trench-framed

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functional 16x16 2D CMUT array using the new pre-trench UBM is demonstrated. The

first successful large-scale tiling CMUT assembly is shown in section 5.4.

b-2. Back side etch.

b-3. Dicing and solder bumping.

interposer

ASIC

a-1. Backside grinding and etching.

a-2. UBM patterning, and dicing (solder bump on IC).

ASIC

SiO2Si

Doped polysilicon

UBM

Al

b-1. Backside grinding and UBM patterning.

b-2. Back side etch.

b-3. Dicing and solder bumping.

interposer

ASIC

a-1. Backside grinding and etching.

a-2. UBM patterning, and dicing (solder bump on IC).

ASIC

SiO2Si

Doped polysilicon

UBM

Al

b-1. Backside grinding and UBM patterning.

 Figure 5-11. Schematic comparison between the previous single-die UBM technique and the proposed pre-trench UBM for tile able sandwich structure.

There is a new IBM C4NP Cu-cored Pb-free flip chip process [101]. This process

is currently being used for fine pitch solder bumps on large die with thousands of I/Os

with great success. The C4NP Cu-cored process offers the advantages of stress reduction

and improvement in electrical performance. The center Cu sphere encased in the solder

enables a higher stand-off, especially for fine pitch interconnects, helping to facilitate the

possible further under fill process and improve the overall mechanical fatigue life of the

interconnect. The Cu sphere, which comprise a large percentage of the volume of the flip

chip interconnect, has a low resistivity which can therefore increase the current carrying

capacity for the interconnect. The Cu sphere can be selectively placed to only those

interconnections designed for optimum electrical performance. The highly stressed

interconnects can be electrically connected without any Cu spheres to maximize their

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reliability. An adapted plating process was used at Fraunhofer IZM, Berlin, Germany to

deposit solder on the trenched 4” CMUT wafers. The process step (Figure 5-12) is first

sputtering of TiW/Cu as plating base. After applying the lamination of dry film resist and

patterning by lithography, electroplating of Cu UBM and Sn-Pb solder was performed. At

last, the dry film resist was stripped away, and plating base was removed by wet etching.

electroplated solder

electroplated UBM

Sputtered Cu as plating base

Sputtered Ti/W as adhesion layer and diffusion barrier

Al chip pad with overlapped passivation(a) (b)  

Figure 5-12. Schematic process of the pre-trench UBM using electroplating (a) before and (b) after oven reflow.

A challenging part of this process is to form a continuous plating seed layer by

sputtering into the trench-frame structure. In order to study this issue, a mechanical test

vehicle (a trench-framed SOI wafer without front side active device) was used for

Fraunhofer’s plating process development. After the trenched CMUT wafers were

processed, the deposition of TiW/Cu plating seed layer [Figure 5-13(a)], the resist

lamination and lithography [Figure 5-13(b)] were performed accordingly. Then, after

electroplating, it was observed not all of the bump positions were plated and variation

presents in solder heights [Figure 5-13(c)]. Cross sectioning was performed for both a

non-bumped and a bumped pillar after plating in order to correlate any feature of the

trench with a possible cause for the inability to plate a solder bump. It was determined

that the suspected cause for the poor bump plating resulted from an interrupted plating

base in the trench. Upon cross-sectioning a trenched CMUT with no bumps, one can

clearly identify the problematic area as an undercut of the Si pillar [Figure 5-14(b)]. This

is due to the etching no uniformity within the wafer. The over etching causes charging of

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the etch-stop layer (oxide), that redirects the etchant to attack laterally. Figure 5-15 also

shows schematically how the negative slopes of the side walls, and footing of the pillars

cause the discontinuity of the plating seed layer, and fail the electroplating.

(a) (b) (c)  Figure 5-13. Plating process steps

(a) (b)  Figure 5-14. Comparison between the pillars (a) with and (b) without footing.

In order to verify the cause and provide a possible solution for the seed layer

discontinuity, a process has been developed to fill the base of the trenches with

Benzocyclobutene-based polymers (BCB). The bumping results in the areas with and

without the BCB trench filling was shown in Figure 5-16. Successful bumping was

observed while the trench was filled with BCB polymer; in the contrast, the missing

bumping happened, as the trench has no filling BCB polymer. The process provides

possible solution, however, introduces additional step. Due to the nature of the

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complexity of the post-trench UBM, pre-trench UBMs were studied and described in the

following sections.

Dry film

•UBM/Solder

Plating baseFooting Negative

trench slope  Figure 5-15. Schematic of the post-trench UBM with (a) straight sidewalls of trenches, and (b) trenches with negative sidewall slope and footing.

 Figure 5-16. Post-trench UBM and solder-bumping in the area with and without BCB trench-filling.

A commercially available pre-trench UBM is available at Pac-Tech, Santa Clara,

USA. By using a solder-jetting technique, versus the electroplating, UBM step is

independent of the solder bumping and can be deposited before the trench opening. Then

the solder bumping was performed as a last step after the trench deep etching. However,

this chemical plating techniques requires passivation layer for UBM pad definition.

Passivation layer, such as oxide, can be grown at as low as 450oC, e.g. low temperature

oxide (LTO), or 425oC, e.g. spin-on glass. Because the presence of the aluminum as the

top electrode of CMUT, the thermal cycle introduced by the oxide make this chemical

plating UBM technique become incompatible to the existing CMUT process.

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In order to provide a simple and reliable UBM to incorporate the trench-frame

interconnection technology, a pre-trench UBM was developed by e-beam evaporation of

an Al/Ti/Ni/Au metal stack. Among the metal stack, Ti serves as an adhesion layer and

diffusion barrier. While Au provides wettability to the solder, Ni acts as additional

standoff and diffusion barrier, and becomes the intermetallic layer for the primary

bonding. The e-beam evaporated Ni provides better quality in terms of voids, which

minimizes the solid-solubility induced reliability issue. The Ni thickness was chosen to

be thin enough to minimize stress, yet sufficiently thick to endure double reflow of the

solder. Three different metal stacks in terms of the thicknesses of Ni (0.5µm, 0.4µm, and

0.3µm,) and Au (0.03µm and 0.1µm,) were studied. The process step was first the wafer

substrate cleanness to secure the UBM/substrate and resist/substrate adhesion. Then the

pad was defined by using lift-off bi-layer resist stack (LOR, MicroChem Corp., Newton,

MA), where LOR 5B was used according to the total UBM thickness. After the

lithography, a sequence of Al, Ti, Ni and Au were evaporated without breaking vacuum.

The UBM pads were released following the Acetone bath as a lift-off process step. At

last, the wafers were performed solder bumping and bump shear test at Pac-Tech, Santa

Clara, USA.

Among various Ni/Au thicknesses, the wafer with 0.5 µm Ni/ 0.03 µm Au was

observed showing the cracks through the photoresist layer after the metal evaporation

(Figure 5-17). This is due to an intrinsic tensile stress within the Ni film over the

adhesion strength of resist/ substrate interface. As a result, a misalignment of the metal

pad was introduced through the movement of the resist. It suggests a thinner Ni layer

should be used to minimize the intrinsic stress. After performing the bump shear test, the

strength results show only 8.4 g along with a brittle failure mode (Table 5-3). The bump

shear strength is much lower than the suggested value, 26 g, according to a 70 µm pad

size (Figure 5-20). A second oven reflow was tested to see if a larger shear strength can

be achieved, though only a very limited strength was increased (8.4g to 11.4g). Upon

examining a SEM, the pad before bumping shows the surface roughness with the grain

size around tens of nanometers (Figure 5-18). Nickel surface oxidize fairly quickly if a

noble metal, Au, is not thick enough to protect the surface from oxidation. The Au layer

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thickness, 0.03 µm, compared to the grain size implies a thicker Au was needed to

maintain the wettability. Another SEM shows the bump shear failure interface (Figure

5-19). The nickel layer shows a full-pad intermetallic layer is not present, and implies the

non-wettability of Ni causes a brittle failure and low bump shear strength.

Pad

Photoresist

Exposed Si substrate

Crack through photoresist layer

100 µm  

Figure 5-17. An optical microscopy showing the crack through the photoresist layer after the e-beam evaporation of UBM metal stacks. The crack was due to the intrinsic compressive stress of the 0.5-µm Ni film.

(a) (b)

(b)

 Figure 5-18. SEM pictures show the UBM pad with 0.03µm Au and 0.5um Ni has huge surface roughness by observing the grain size around tens of nanometers.

Then a 0.4 µm Ni/ 0.1 µm Au UBM was studied by taking advantages of a thinner

Ni to reduce the intrinsic stress and thicker Au for better wettability protection. Though

the intrinsic stress induced resist cracking still presented, the shear strength demonstrated

a promising improvement. The average shear strength was increased to 24.3 g along with

a ductile shear failure mode indicating the preferable failure interface through the solder.

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A large deviation, 5.8 g of standard deviation, and the substrate failure mode simply

suggested a more powerful substrate cleaning preparation.

(a) (b)

(b)

Solder ball

UBM pad after shear test

UBM pad underneath was not shown

 Figure 5-19. SEM pictures show the UBM pad shear interface of the brittle failure mode.

Table 5-3. Bump shear test results of various UBM metal stacks.

UBM* 0.5 µm Ni/ 0.03µm Au

0.4 µm Ni/ 0.1µm Au

0.3 µm Ni/ 0.1µm Au

Shear mode Brittle mode

Ni

Partial ductile mode

Solder

Substrate mode

Si substrate

Partial ductile mode

Solder

Ductile mode

Solder

Number of test 30 30 60 60

Bump shear strength (g)

Mean 8.4 11.4** 24.3 26.5

StdDev 1.7 0.8** 5.8 1.3

* UBM includes 0.3µm Al/ 0.015µm Ti before Ni and Au. ** Two oven reflows.

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40 60 80 100 1200

20

40

60

80

100 Minimum sample averageMinimum individual shear reading

Shea

r st

reng

th (g

)

Ball bond diameter (µm) 0.3 µm Al0.015 µm Ti

0.5 µm Ni

0.03 µm AuBrittlemodex

Ductile mode

0.3 µm Al0.015 µm Ti0.3 µm Ni

0.1 µm Au

x

Before reflowAfter reflow

Failure interface

Before reflowAfter reflow

Failure interface

 Figure 5-20. Suggested bump shear strength and the results from the pre-trench UBM using evaporated Al/Ti/Ni/Au.

After all the aforementioned studies, the 0.3 µm Al/ 0.015 µm Ti/ 0.3 µm Ni/ 0.1

µm Au was finally used and provides the strongest bump shear strength (µ = 26.5 g) with

a preferred ductile shear failure mode. It also shows an excellent uniformity (σ = 1.3 g)

after using a standard RCA substrate cleaning with double dump-rinse and spin-dry. The

0.3 µm Ni limits the intrinsic stress and prevents from the resist-cracking induced pad-

misalignment. Only 80 nm of the Ni layer was consumed after the second oven-reflow,

indicating that 0.3 µm of Ni is adequate for a double-reflow flip-chip-bonding

application, which was used in our final assembly with the interposer. After solder

bumping, the first trenched CMUT arrays with excellent quality solder bumps were

demonstrated (Figure 5-21). The solder balls showed accurate height (µ = 59.7 µm versus

the target of 60 µm) and excellent uniformity (σ = 0.9 µm), which is essential for large-

scale tiling assembly. In conclusion, this simple UBM preparation, compatible with the

trench- frame technology, does not require electro plating or chemical plating techniques

with passivation layer for UBM pad definition; by optimizing the metal stack thicknesses,

a 0.3 µm Al/ 0.015 µm Ti/ 0.3 µm Ni/ 0.1 µm Au UBM can meet the flip-chip bonding

design criteria.

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90  µm

Ground pad

(a)

(b)

 Figure 5-21. A SEM pictures of the first trenched CMUT arrays with excellent quality solder bumps showing (a) an excellent yield on a 16 by 16 2D array with excellent solder-ball-height uniformity. (b) A close-up of a signal pad shows the solder ball on top of the trench-isolated 90x90-µm-wide and 255-µm-tall pillar.

The electrical input impedance was measured to determine the interconnection

yield and the performance of the ultrasonic transducers after solder bumping. An

impedance analyzer (Model 4294A, Agilent Co., Palo Alto, CA) was performed to carry

out this measurement in air (Figure 5-22). The probing was on the solders of one ground

element and sweeping across all 255 signal elements through the solder-UBM-pillar-via-

transducer interconnect. At the same time the impedance was measured by sweeping the

frequencies of a small AC excitation (50 mV) superimposed on top of a DC bias of 80 V

(80% of the plate pull-in voltage) [Figure 5-22(a)]. The results show 100% yield of the

interconnections from all 255 elements and great uniformity of the resonant frequency of

the ultrasonic transducers (µ = 15.4 MHz, σ = 0.02 MHz) [Figure 5-22(b)]. These

promising results indicate the new UBM preparation is compatible to the trench-framed

process, and suitable for developing large-scale tiling assembly.

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5 10 15 20-40

-20

0

20

40

Frequency (MHz)

Inpu

t im

peda

nce

(kΩ)

Real partImaginary part

 (a)  

 

510

15

5

10

155

10

15

20

Reso

nant

freq

uenc

y (M

Hz)

Element numberElement number 1

µ= 15.4 MHzσ= 0.02 MHz

510

15

5

10

155

10

15

20

Reso

nant

freq

uenc

y (M

Hz)

Element numberElement number 1

µ= 15.4 MHzσ= 0.02 MHz

 (b)  

Figure 5-22. (a) Electrical input impedance of one element, and (b) resonance frequency distribution across the 16x16 array.

5.4 LARGE SCALE TILING CMUTS

This section discusses the results of the tiling CMUT arrays. By using the newly

developed UBM technique with the interposer technology, a flip-chip bonded CMUTs-

interposer-ASICs sandwich assembly module can be realized. First, the design of a 4x12

tiling assembly module featuring a multi-row linear imaging array was discussed. Then a

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test assembly of a 2x12 tiling CMUT assembly was demonstrated. Finally, a full

functional 1x2 tiling assembly module was built and a pulse-echo acoustic measurement

was realized.

5.4.1 TILING ASSEMBLY MODULE DESIGN

In the design of the final functional module, there is a 4 x 12 array of die closely

spaced on an organic interposer substrate to create a 12 mm x 36 mm CMUT transducer

probe. The main purpose of this package was to test the functionality of a large CMUT

sensor array for various medical applications. As one of an example for demonstration,

the interposer was designed with a routing scheme for a multi-row linear array. For this

design, a 40 mm HyperBGA® interposer was used that accommodated a 4x12 array of

CMUT devices in the center of the module (Figure 5-23). The routing scheme, as a 1.5D

linear array requires, features three groups of elements to address the phase focusing

capability in elevation direction (Figure 5-24). Essentially the functional CMUT region

covers an area of about 6 mm x 36 mm. Two internal rows of functional CMUT devices

were required while the two outer rows are dummy CMUT die for boundary condition

continuity. On the backside of this functional CMUT assembly module, three non-

functional ASIC chips were attached to simulate the stresses generated along with the

packaging. Each ASIC die has ~4100 I/O pads with a pitch down to 150 µm. Both

eutectic Sn-Pb and Pb-rich solder bumps will be evaluated. The module backside also

features 648 1.0-mm-pitch BGA pads. The BGA pads use a eutectic Sn-Pb solder alloy.

The module was attached to an imaging motherboard using a standard BGA solder attach

process.

Interposer

Imaging board

Functional CMUTs : 2 inner rows (yellow) Mechanical CMUTs

: 2 outer rows (blue)

 Figure 5-23. Schematic cross-section of the modular package design.

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One 16x16 CMUT array

Signal routingSignal routing

 Figure 5-24. Schematic signal routing scheme for a multi-row linear imaging array.

5.4.2 TILING ASSEMBLY RESULTS

To demonstrate the feasibility of the large-scale tile-able array assembly, 2x12

solder-bumped trench-framed dummy CMUT arrays were flip-chip bonded to an

interposer. 1x3 non-functional ASIC chips were attached on the backside of the

interposer by flip-chip bonding. The results show the successful assembly with CMUT

arrays placed only 100 µm in separation (Figure 5-25). The whole module was

maintained at the specified coplanarity requirement of ±10 µm. Assembled CMUTs have

totally 6144 (2x12x256) interconnections with pitch down to 185 µm, and each ASIC die

has ~4100 I/O pads with a pitch of 150 µm. This promising results demonstrate the first

viable large-scale tiling CMUT assembly and enable many advanced imaging modalities.

Ultimately, this would be the building block to create not only CMUT sensor arrays, but

also a generic packaging solution for any type of sensor array with the backside support

electronics.

interposer

CMUT

 Figure 5-25. Top view photograph of the first large-scale tile-able CMUT array assembly.

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CMUT

interposer

C CMUT

interposer

C

0.2 mm  Figure 5-26. Cross-section SEM of the assembled CMUTs-interposer-ASICs sandwich structure.

5.4.3 ACOUSTIC MEASUREMENT RESULTS

In cooperation with GE Global Research, Niskayuna, NY, a functional module

having a 1x2 CMUT array was attached to an imaging motherboard for initial acoustic

measurements. The imaging board provides connection to the system for acoustic testing

and imaging. Figure 5-27 shows a topside view of the 1x2 functional trenched CMUT

arrays flip-chip bonded to an interposer. Figure 5-28 demonstrates the whole module was

bonded to the imaging board using a standard BGA solder attach. The functional CMUT-

interposer module was tested for pulse/echo response in order to generate the time

domain impulse response as shown in Figure 5-29(a). The resulting spectrum is shown in

Figure 5-29(b). This promising results demonstrate the success of the packaging and

electronics integration method for a large-scale tile-able 2D array.

Interposer

CMUTs

Imaging board  

Figure 5-27. Photograph showing topside view of the 1x2 functional CMUT array on a laminate interposer solder attached to a board.

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Interposer CMUTs

Imaging board  

Figure 5-28. Photograph showing the cross-sectional view of the functional prototype.

Frequency (MHz)Time (µs)

Volta

ge (m

V)

Nor

mal

ized

pre

ssur

e (d

B)

0 5 10 15 20-60

-50

-40

-30

-20

-10

0

0 0.5 1 1.5 2-100

-50

0

50

100

150

(a) (b)  Figure 5-29. The pulse/echo results from the CMUT-interposer assembly module.

5.5 SMALL PITCH DESIGN

It was demonstrated the 185-µm tall 90x90-µm wide pillar could endure the

interposer assembly process. For finer element pitch sizes and wafer thicknesses, a design

guideline was developed by using a beam theory calculation and finite element analysis

(FEA). First, the induced maximum tensile and shear stress were calculated at the bottom

of the signal pillar under the bump-shear force acting on the top of the pillar (Figure

5-30). The pillar bottom reflects the Si-BOX interface or the interface within the BOX

layer. The analysis predicted less than 4.5 g of bump shear force can result in a tensile

stress level of tens of MPa, which reflects the fusion bonding strength [102] and the

tensile strength of thermal-grown silicon dioxide. The FEA result shows the same stress

level thus agrees with the calculation (Figure 5-31).

This analysis was further verified by a shear strength test on the solder-bump-

pillar [Figure 5-33(a)]. Five sample data all show between 3.4 g and 3.6 g (µ = 3.5 g, σ =

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0.1 g), which agree with our prediction. The post-failure patterns [Figure 5-33(b), and

(c)], showing the remaining oxide on the bottom of the trench, indicated that the failure is

through the BOX-Si interface and/or the BOX layer of the silicon on insulator (SOI)

wafer. For even finer pitch designs, the fusion bonding adhesion should be enhanced,

and/or the pillar length should be shortened.

Pillar width (µm)

150 180 210 240 270 3000

20

40

60

80

100

Pitch (µm)

Tens

il st

ress

& s

hear

stre

ss (M

Pa)

55 85 115 145 175 205

0

20

40

60

80

100

Width (µm)

1 g

3 g5 g

10 g

20 g30 g

5 g10 g

30 g

Current designElement pitch (µm)

Indu

ced

max

imum

stre

ss at

the

pilla

r bot

tom

(MPa

)

*Bump shear test result

- Tensile- Shear

 Figure 5-30. Beam theory calculated induced maximum tensile and shear stress at the bottom of the signal pillar under the bump-shear force acting on the top of the pillar.

 Figure 5-31. Finite element analysis agrees with the beam theory calculation with only 6.7% error.

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1

11

3.5

3.5

3.5

3.5

5

5

5

5

10

10

10

1020

20

20

20

3.5 3.5 3.5

5 5 5 5

10 10 10

20 20 20

Pillar length (µm)

Pilla

r wid

th ( µ

m)

50 100 150 200 250 300

40

60

80

100

120

140

160 Shear test (g) for tensile failureShear test (g) for shear failure

Assuming tensile bonding strength = 80MPa& shear bonding strength = 10MPa [3]

*

x

* 185-µm pitch designx 250-µm pitch design  

Figure 5-32. Design guideline for pitch (pillar width) and substrate thickness (pillar length) with experimental-determined fusion-bonding strength. The tensile fusion bonding strength was based on the bump-shear test of 3.5 g results with the beam theory calculation. The yellow region indicates the verified safe zone for various pillar width and length designs.

Shear force

A A

A A BB BOX

pilla

r

fram

e

pilla

r

B B

Delaminated BOX

Contact via

Device Si

Frame

BOX

90 µmContact via

(a) (b) (c)  

Figure 5-33. (a) Cartoon showing the bump-shear test on a signal pillar. (b) SEM on the bottom of a post-shear-failure pillar showing the presence of a BOX layer. The shear failure interface is through the Si-BOX interface but not the Si pillar. (c) Microscopic optical picture shows the bottom of the trench with the fringing patterns within the 90x90 µm square. The fringing pattern indicates the delaminated BOX from device Si layer.

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5.6 CONCLUSION

The work on a packaging and electronics integration method of large-scale tile-

able 2D array devices with small pitch-sizes has been demonstrated. A pre-trench UBM,

by e-beam evaporating Al/Ti/Ni/Au metal stacks, was developed to incorporate to the

trench-frame interconnect technology. This simple UBM was proved to provide good

bump shear strength and excellent solder ball height uniformity along with a preferred

ductile shear failure mode. Test results show 100% yield of the interconnections and

great integration uniformity as indicated by the air resonance performance over 255

transducer elements.

A tile-able module assembly was demonstrated and the CMUTs-interposer-ASICs

sandwich by a complete flip-chip attach. Future work includes the assembly of large-

scale functional CMUT chips by tiling and the acoustic tests on such assemblies.

A design guideline for various element-pitch and wafer-thickness based on

trench-frame interconnection technology was developed. In the current design, the 185-

µm tall 90x90-µm wide pillar can endure the interposer assembly process. The bump-

shear test shows that the failure is through the Si-Box interface and/or the BOX layer. For

designs with smaller pitch, the fusion bonding adhesion should be enhanced (if possible),

and/or the pillar length should be shortened.

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CHAPTER 6 CURRENT AND FUTURE WORK

The frontside interface study in this thesis indicates the encapsulation material

optimized for CMUT requires a viscoelastic polymer with Tg lower than room

temperature. Various polymer alternatives other than PDMS exist, such as polypropylene

(PP), polybutane (PB), polyisobutylene (PIB), and polyethylene (PE) etc. Investigation of

these polymers regarding to a lower attenuation and better abrasion resistance is another

topic of research for the future.

As CMUT has been used as a platform technology, featuring many applications in

addition to medical imaging [103], [104], different encapsulation requirements exist.

Several applications require the close interaction of the CMUT surface with the

substance. For example, CMUTs can be designed as the actuator arrays for particle

transportation in immersion by utilizing the surface acoustic wave. In that case, a thick

polymer coating with attenuation property becomes unsuitable. Encapsulation material

other than polymer is also required for a CMUT as a high-temperature gas-flow sensor.

For all the above applications, coating by the atomic layer deposition (ALD) technique is

appealing because of the capability of pinhole free quality with thickness of only tens of

nanometers. A related topic is the ALD passivated CMUTs for specific sensor or actuator

applications.

Currently, integration of functional 16x16 2D CMUT array dies into the bigger

tiling assembly (256 by 128) and the CMUT-interposer-ASIC sandwich module is under

way. The next goal is to demonstrate the wire-phantom imaging compared with that from

a commercial imaging system. To achieve this goal, a CMUT-element-level defect-free

or a defect-immune assembly module is required. A CMUT sensitivity achieved by the

optimized DC bias is lost if one defect results in a short circuit. The short circuit drains

current from the DC supply and at least reduces the optimum bias operating voltage. Two

approaches are being investigated to reduce the dependence on short circuits: 1) the

capability of the batch characterization of the CMUT element yield and next the isolation

of the defective elements from the system-level interconnections; 2) a defect-immune

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design by incorporating a fuse-like interconnections to each CMUT element to prevent

DC leakage.

To expand the current design (7.5 MHz) to a higher frequency is another topic of

research for the future. One of the challenges following the smaller-pitch design is a

tighter tiling assembly, i.e., a smaller dead area of a CMUT die. In the current design, the

conventional wafer saw dicing was used to achieve a 25 µm chipping level. It is desired

to use a chipping-free technique to result in a dead-boundary free CMUT die. One of the

solutions is to use the deep etching for die separation. Another option is to use a novel

laser dicing technique. The internal absorption laser process, versus the conventional

surface absorption one, generates no debris by creating the cracks within the substrate.

The following crack extension is expected to provide a chipping-free singulation of the

CMUT die. Incorporation with these methods into the CMUT fabrication steps and the

tiling assembly process is the research topic for the future high frequency design.

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