InterruptsCML-12C32

Lecture L4.2

ReferencesS12CPUV2Reference ManualSection 7

S12CPUV2.pdf

CRGBlock User GuideV04.05

S12CRGV4.pdf

Interrupt (INT)Module V1

S12INTV1.pdf

CML-12C32Development Board for Motorola MC9S12C32

CML12C32_UG.pdf

Interrupts

• 68HC12 Interrupts

• Real-Time Interrupts

HCS12 Interrupts

Register Stacking for Interrupts

Ret Addr H

YL

YH

XL

XH

ACCA

ACCB

CCR

SP before interrupt

SP after interrupt

Ret Addr L

Interrupt Vector TableRef: MC9S12C Family Device User Guide

9S12C128DGV1.pdf

Interrupt Vector Table (cont.)

Interrupt Vector Table (cont.)

Interrupt (INT)Module V1

S12INTV1.pdf

Monitor Interrupt Vector Table

Off by 2

S12MEBIV3.pdf

Multiplexed ExternalBus Interface (MEBI)Block User GuideModule V3

S12MEBIV3.pdf

Interrupts

• 68HC12 Interrupts

• Real-Time Interrupts

Real-Time Interrupt Registers

$0037

$0038

$003B

; RTI testouta equ $FF4Frti_ivec equ $0FF2crgflg equ $0037crgint equ $0038rtictl equ $003b

org $800ticks dw 0

Note: Should be$0FF0. Monitor error

Interrupt routineincrements ticks

rti_init sei ;disable interruptsldaa #$59staa rtictl ;set rti to 10.24 msldaa #$80staa crgint ;enable rtildx #rti_intserstx rti_ivec ;store rti int vectorcli ;enable interruptsrts

rti_intser ldd ticksaddd #1 ;inc ticksstd ticksldaa #$80staa crgflg ;clear rti flagrti

ORG $4000

mainjsr rti_initldab #10

mn1 tbajsr hexascjsr outabsr sec_delaydecbbne mn1swi

sec_delaypshb ;save Bldd ticksstd 2,-sp ;store tick0

sd1 ldd ticks ;read tickssubd 0,sp ;diff = ticks-ticks0cpd #100 ;repeat until 100 ticksblo sd1leas 2,sp ;fix stackpulb ;restore Brts