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V 0.1 3
PIC24 Core (Simplified Block Diagram)
17 x 17 Multiplier not shown
Program Counter23
addressProgram Memory,non-volatile, up to 4M words (4M x 24)
DOUT
24
ALU
Data MemInst. Reg
16
16
16
Data16 address
16
16
16The instruction register contains the machine code of the instruction currently being executed.
ALU (Arithmetic Logic Unit) is 16 bits wide, can accept as operands working registers or data memory.
16 x 16 WorkingReg array
Data Transfer Instruction
Copies data from Source (src) location to Destination (dst) Location
(src) → dst ‘()’ read as ‘contents of’
This operation uses two operands.
The method by which an operand ADDRESS is specified is called the addressing mode.
There are many different addressing modes for the PIC24.
We will use a very limited number of addressing modes in our initial examples.
Data Transfer Instruction SummaryDest
Source Memory Register direct Register indirect
Literal X MOV{.B} #lit8/16, Wndlit → Wnd X
Memory XMOV fALL, WndMOV{.B} f, {WREG}(f{ALL}) → Wnd/WREG
X
Register direct
MOV Wns, fALLMOV{.B} WREG, f(Wns/WREG) → f{ALL}
MOV{.B} Wso, Wdo(Wso) → Wdo
MOV{.B} Wso, [Wdo](Wso) → (Wdo)
Register indirect X MOV{.B} [Wso], Wdo
((Wso)) → WdoMOV{.B} [Wso], [Wdo]((Wso)) → (Wdo)
Key:MOV{.B} #lit8/16, Wnd PIC24 assemblylit → Wnd Data transfer
Yellow shows varying forms of the same instruction
f: near memory (0…8095) fALL: all of memory (0…65534)
V 0.1 12
MOV{.B} Wso, Wdo Instruction“Copy contents of Wso register to Wdo register”. General form:
mov{.b} Wso, Wdo (Wso) → WdoWso is one of the 16 working registers W0 through W15 (‘s’ indicates Wso is an operand source register for the operation).
Wdo is one of the 16 working registers W0 through W15 (‘d’ indicates Wdo is an operand destination register for the operation).
mov W3, W5 (W3) → W5 (word operation)mov.b W3, W5 (W3.LSB) → W5.LSB (byte operation)
Contents of working register W3 copied to working register W5.
This can either be a word or byte operation. The term ‘copy’ is used here instead of ‘move’ to emphasize that Wso is left unaffected by the operation.
The addressing mode used for both the source and destination operands is called register direct. The mov instruction supports other addressing modes which are not shown.
MOV Wso, Wdo Instruction Execution
Copyright Delmar Cengage Learning 2008. All Rights Reserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
MOV Wso, Wdo Instruction Format
Copyright Delmar Cengage Learning 2008. All Rights Reserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
V 0.1 15
MOV Wns, f Instruction“Copy contents of Wns register to data memory location f.” General form:
MOV Wns, f (Wns) → ff is a memory location in data memory, Wns is one of the 16 working registers W0 through W15 (‘s’ indicates Wns is an operand source register for the operation)
MOV W3, 0x1000 (W3) → 0x1000
Contents of register W3 copied to data memory location 0x1000. This instruction form only supports WORD operations.
The addressing mode used for both the source operand is register direct.
The address mode use for the destination operand is called register direct.
V 0.1 16
MOV Wns, f Instruction Execution
Copyright Delmar Cengage Learning 2008. All Rights Reserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
V 0.1 17
MOV Wns, f Instruction Format
Copyright Delmar Cengage Learning 2008. All Rights Reserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
V 0.1 18
MOV f, Wnd Instruction“Copy contents of data memory location f to register Wnd”. General form:
MOV f, Wnd (f) → Wnd
f is a memory location in data memory, Wnd is one of the 16 working registers W0 through W15 (‘d’ indicates Wnd is an operand destination register for the operation).
MOV 0x1000, W3 (0x1000) → W3
Contents of data memory location 0x1000 copied to W3.
() is read as “Contents of”.
This is a 16-bit (WORD) operation.
V 0.1 19
MOV f, Wnd Instruction Execution
Copyright Delmar Cengage Learning 2008. All Rights Reserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
V 0.1 21
MOV{.B} WREG, f Instruction“Copy content of WREG (default working register) to data memory location f”. General form:
MOV{.B} WREG, f (WREG) → f
This instruction provides upward compatibility with earlier PIC μC. WREG is register W0, and f is a location within the first 8192 bytes of data memory (near data memory)
MOV WREG, 0x1000 (W0) → 0x1000
Contents of register W0 copied to data memory location 0x1000.
Can be used for either WORD or BYTE operations:
MOV WREG, 0x1000 word operation
MOV.B WREG, 0x1001 lower 8-bits of W0 copied to 0x1001
Word copy must be to even (word-aligned) location.
Note: The previously covered MOV Wns, f instruction cannot be used for byte operations!
V 0.1 22
MOV.B WREG, f Instruction Execution
A byte copy operation is shown.
Copyright Delmar Cengage Learning 2008. All Rights Reserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
V 0.1 23
MOV{.B} WREG, f Instruction Format
Copyright Delmar Cengage Learning 2008. All Rights Reserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
V 0.1 24
MOV{.B} f {,WREG} Instruction“Copy contents of data memory location f to WREG (default working register) . General form:
MOV{.B} f, WREG (f )→ WREG
MOV{.B} f (f )→ f
This instruction provides upward compatibility with earlier PIC μC. WREG is register W0, and f is a location within the first 8192 bytes of data memory (near data memory)
Can be used for either WORD or BYTE operations:
MOV 0x1000, WREG word operation
MOV.B 0x1001, WREG only lower 8-bits of W0 are affected.
MOV 0x1000
Word copy must be from even (word-aligned) data memory location.
Note: The MOV f,Wnd instruction cannot be used for byte operations!
Copies contents of 0x1000 back to itself, will see usefulness of this later
MOV{.B} f {,WREG} Format
V 0.1 25Copyright Delmar Cengage Learning 2008. All Rights Reserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
V 0.1 26
MOV.{B} f, WREG Instruction Execution
Copyright Delmar Cengage Learning 2008. All Rights Reserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
V 0.1 27
Move a literal into a Working RegisterMoves a literal into a working register. The ‘#’ indicates the numeric value is a literal, and NOT a memory address.
General form:
MOV #lit16, Wnd lit16 → Wnd (word operation)
MOV.B #lit8, Wnd lit8 → Wnd.lsb (byte operation)
The source operand in these examples use the immediateaddressing mode.
Examples:
MOV #0x1000, W2 0x1000 → W2
MOV.B #0xAB, W3 0xAB → W3.lsb
More on Literals
Observe that the following two instructions are very different!
MOV #0x1000, W2 after execution, W2=0x1000
after execution, W2 = (0x1000), the contents of memory location 0x1000
MOV 0x1000,W2
MOV Literal Execution
29V 0.1Copyright Delmar Cengage Learning 2008. All Rights Reserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
MOV Literal Instruction Formats
30V 0.1Copyright Delmar Cengage Learning 2008. All Rights Reserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
Indirect AddressingMov with indirect Addressing:
mov{.b} [Wso], [Wdo] ((Wso)) → (Wdo)
[] (brackets) indicate indirect addressing.Source Effective Address (EAs) is the content of Wso, or (Wso).Destination Effective Address (EAd) is the content of Wdo, or (Wdo).
The MOV instruction copies the content of the Source Effective Address to the Destination Effect Address, or:
(EAs) → EAd
which is:
((Wso)) → (Wdo)
Copyright Delmar Cengage Learning 2008. All Rights Reserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
Indirect AddressingMOV Example
Indirect Addressing Coverage• There are six forms of indirect addressing• The need for Indirect addressing makes the most
sense when covered in the context of C pointers– This is done in Chapter 5
• At this time, you will only need to understand the simplest form of indirect addressing, which is register indirect as shown on the previous two slides.
• Most instructions that support register direct for an operand, also support indirect addressing as well for the same operand– However, must check PIC24 datasheet and book to
confirm.
V 0.1 34
ADD{.B} Wb, Ws, Wd InstructionThree operand addition, register-to-register form:
ADD{.B} Wb, Ws, Wd (Wb) + (Ws) → Wd
Wb, Ws, Wd are any of the 16 working registers W0-W15
ADD W0, W1, W2 (W0) + (W1) → W2
ADD W2, W2, W2 W2 = W2 + W2 = W2*2
ADD.B W0, W1, W2 Lower 8 bits of W0, W1 are added and placed in the lower 8 bits of W2
V 0.1 35
ADD{.B} Wb, Ws, Wd Execution
Copyright Delmar Cengage Learning 2008. All Rights Reserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
V 0.9 36
SUB{.B} Wb, Ws, Wd InstructionThree operand subtraction, register-to-register form:
SUB{.B} Wb, Ws, Wd (Wb) – (Ws) → Wd
Wb, Ws, Wd are any of the 16 working registers W0-W15.Be careful:
while ADD Wx, Wy, Wz gives the same result as ADD Wy, Wx, Wz
The same is not true for
SUB Wx, Wy, Wz versus SUB Wy, Wx, Wz
SUB W0, W1, W2 (W0) – (W1) → W2
SUB W1,W0, W2 (W1) – (W0) → W2
SUB.B W0, W1, W2 Lower 8 bits of W0, W1 are subtracted and placed in the lower 8-bits of W2
36
V 0.9 37
SUB{.B} Wb, Ws, Wd Execution
37Copyright Delmar Cengage Learning 2008. All Rights Reserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
Subtraction/Addition with Literals
Three operand addition/subtraction with literals:
ADD{.B} Wb, #lit5, Wd (Wb) – #lit5 → WdSUB{.B} Wb, #lit5, Wd (Wb) – #lit5 → Wd
#lit5 is a 5-bit unsigned literal; the range 0-31. Provides a convenient method of adding/subtracting a small constant using a single instructionExamples
ADD W0, #4, W2 (W0) + 4 → W2
SUB.B W1,#8, W3 (W1) – 8 → W3
ADD W0, #60, W1 illegal, 60 is greater than 31!
V 0.1 39
ADD{.B} f {,WREG} InstructionTwo operand addition form:
ADD{.B} f (f) + (WREG) → f
ADD{.B} f, WREG (f) + (WREG) → WREG
WREG is W0, f is limited to first 8192 bytes of memory.
One of the operands, either f or WREG is always destroyed!
ADD 0x1000 (0x1000) + (WREG) → 0x1000
ADD 0x1000,WREG (0x1000) + (WREG) → WREG
ADD.B 0x1001, WREG (0x1001) + (WREG.lsb) → WREG.lsb
V 0.1 40
ADD{.B} f {,WREG} Execution
Copyright Delmar Cengage Learning 2008. All Rights Reserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
V 0.9 41
SUB{.B} f {,WREG} InstructionTwo operand subtraction form:
SUB{.B} f (f) – (WREG) → f
SUB{.B} f, WREG (f) – (WREG) → WREG
WREG is W0, f is limited to first 8192 bytes of memory.
One of the operands, either f or WREG is always destroyed!
SUB 0x1000 (0x1000) – (WREG) → 0x1000
SUB 0x1000,WREG (0x1000) – (WREG) → WREG
SUB.B 0x1001, WREG (0x1001) – (WREG.lsb) → WREG.lsb
41V 0.1
V 0.1 42
IncrementIncrement operation, register-to-register form:
INC{.B} Ws, Wd (Ws) +1 → Wd
Increment operation, memory to memory/WREG form:
INC{.B} f (f) + 1 → f
INC{.B} f, WREG (f) + 1 → WREG
(f must be in first 8192 locations of data memory)
Examples:
INC W2, W4 (W2) + 1 → W4
INC.B W3, W3 (W3.lsb) + 1 → W3.lsb
INC 0x1000 (0x1000) +1 → 0x1000
INC.B 0x1001,WREG (0x1001)+1 → WREG.lsb
V 0.9 43
DecrementDecrement operation, register-to-register form:
DEC{.B} Ws, Wd (Ws) – 1 → Wd
Increment operation, memory to memory/WREG form:
DEC{.B} f (f) – 1 → f
DEC{.B} f, WREG (f) – 1 → WREG
(f must be in first 8192 locations of data memory)
Examples:
DEC W2, W4 (W2) – 1 → W4
DEC.B W3, W3 (W3.lsb) – 1 → W3.lsb
DEC 0x1000 (0x1000) – 1 → 0x1000
DEC.B 0x1001,WREG (0x1001) – 1 → WREG.lsb 43
V 0.9 44
How is the instruction register loaded?
17 x 17 Multiplier not shown
Program Counter23
addressProgram Memory,non-volatile, up to 4M words (4M x 24)
DOUT
24
ALU
Data MemInst. Reg
16
16
16
Data16 address
16
16
16The Program counter contains the program memory address of the instruction that will be loaded into the instruction register . After reset, the first instruction fetched from location 0x000000 in program memory, i.e., the program counter is reset to 0x000000.
16 x 16 WorkingReg array
44V 0.1
Program Memory Organization
An instruction is 24 bits (3 bytes). Program memory should be viewed as words (16-bit addressable), with the upper byte of the upper word of an instruction always reading as ‘0’. Instructions must start on even-word boundaries. Instructions are addressed by the Program counter (PC).
45V 0.1 Figure adapted with permission of the copyright owner, Microchip Technology, Incorporated. All rights reserved.
V 0.1 46
Goto location (goto)How can the program counter be changed?
A GOTO instruction is an unconditional jump.Copyright Delmar Cengage Learning 2008. All Rights Reserved.
From: Reese/Bruce/Jones, “Microcontrollers: From Assembly to C with the PIC24 Family”.
V 0.1 47
Video tutorialsA number of videos illustrate important concepts; all are listed on the video page at http://www.reesemicro.com/site/pic24micro/Home/pic24-video-tutorials-1.
Available tutorials, which cover topics on the following pages of these lecture notes:
• MPLAB IDE introduction at http://www.ece.msstate.edu/courses/ece3724/main_pic24/videos/mplab_assem/index.htm
• A simple assembly language program at http://www.ece.msstate.edu/courses/ece3724/main_pic24/videos/assem_intro/index.htm
• Simulation of this program at http://www.ece.msstate.edu/courses/ece3724/main_pic24/videos/assem_intro2/index.htm
• Converting the program from 8 to 16 bits at http://www.ece.msstate.edu/courses/ece3724/main_pic24/videos/assem_intro3/index.htm