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Introduction to Computer Organization and Architecture
Lecture 1By Juthawut
Chantharamaleehttp://dusithost.dusit.ac.th/~juthawut_cha/home.htm
Introduction Introduction
Description Course Outline
Administrative Brief History of Computers Overview of Computer Organization Overview of Computer Performance Case Study: Intel Processors
2Introduction to Computer Organization and Architecture
Introduction Description from ISIS
Basic concepts; computer evolution, register transfer level design, simulation techniques, instruction sets (CISC and RISC), assembly language programming, ALU design, arithmetic algorithms and realization of arithmetic functions, hardwired and micro-programmed control, memory hierarchies, virtual memory, cache memory, interrupts and DMA, input/output; introduction to high-performance techniques, pipelining, multiprocessing; introduction to hardware description languages (Verilog, VHDL); students design and simulate a simple processor.
3Introduction to Computer Organization and Architecture
Introduction Course Outline
Introduction [chap 1] (2) Brief History Overview of Computer Organization
Architecture: Instruction Set Design [chap 2] (6) Information representation & arithmetic operations Instruction Formats, Addressing Modes Assembly language Programming Basic input/output operations Subroutine linkage
4Introduction to Computer Organization and Architecture
Introduction Course Outline, cont’d
Case Studies of Instruction Set Architecture [chap. 3] (4)
Motorola M68000 ARM Intel Pentium
Computer Arithmetic and ALU Design [chap. 6] (6) Addition (Subtraction) Multiplication (Division) Shifting and Rotating Floating Point Arithmetic
5Introduction to Computer Organization and Architecture
Introduction Course Outline, cont’d
Verilog / VHDL Tutorials [Supplemental material] (6) Memory [chap 5] (6)
Semiconductor Memory Technology Cache Memory Virtual Memory Memory Management and Case Studies
6Introduction to Computer Organization and Architecture
Introduction Course Outline, cont’d
Processor Design [chap 7] (6) Datapath design Control Unit Design Microprogramming Exception Handling
Input/Output [chap 4] (4) Device Interfacing and Addressing Interrupts Bus Design
Additional topics [selected from chapters 8-12]
7Introduction to Computer Organization and Architecture
Administrative Lectures
Time: M/W/F 8:30 - 9:20 AM Room: 4030 SC
Instructor James Maxted: [email protected] Design engineer for Rockwell Collins (35 years) Office: 1126 SC, hours M/W/F 9:30 - 10:20 AM
TA Dakai Jin: [email protected] Office: 1313 SC, hours
8Introduction to Computer Organization and Architecture
Administrative (cont’d) Grading
Approximately 1 homework per week 1 multi-part project 2 exams (1 mid-term, final) Weighting
Attendance 10% Project and Assignment 40% Midterm 20% Final 30%
9Introduction to Computer Organization and Architecture
Administrative (cont’d) Course webpage
Place to find syllabus, lecture notes, homework, etc http://dusithost.dusit.ac.th/~juthawut_cha/home.htm
Project Design and simulate a simple processor Mentor Graphics tools VerilogHDL
10Introduction to Computer Organization and Architecture
Administrative (cont’d) Collaboration
Discussion of the material is encouraged, but… All students are expected to do their own work
Disabilities Please contact me (office hours or email)
11Introduction to Computer Organization and Architecture
Brief History of Computers Computing Aids
Abacus and Counters Abacus: Greek for board or slab Probably originated in Middle East Invented 2000+ years ago
Napier’s Rods (Bones) Assisted multiplication, square roots, and
cube roots Invented around 1600
Chalk Board Interest Table
Shows interest for varying principles and periods of time
Introduction to Computer Organization and Architecture 12
Brief History of Computers Machines that Calculate or Control
Adding machines Blaise Pascal’s “Pascaline” 1642
Automatic loom Punch cards used to control a
manufacturing process 1800
Cash register “Incorruptible cashier” 1900
Introduction to Computer Organization and Architecture 13
Brief History of Computers Electromechanical Devices
Hollerith 1890 Census Tabulator Punch, tabulator and sorting box
International Business Machines (IBM) Accounting Machines Changed circuits by moving cables in
plugboards Early 1900s
Ciphering and deciphering Encode and decode secret messages
during World War II Enigma and Bombe
Introduction to Computer Organization and Architecture 14
Brief History of Computers Electronic Computers
Vacuum tube ENIAC: 17,000 tubes, 30 tons, 1800 ft2
1945 Transistor
IBM System/360 Family Compatible processors, Standardized
peripherals and connections 1962
Integrated circuit IBM PC Intel 8088 1981
Introduction to Computer Organization and Architecture 15
The First The First ProgrammerProgrammer
Ada Augusta or Charles Babbage Robert Campbell, Richard Bloch, Grace
Murray Hopper, or Howard Aiken
Brief History of Computers
16Introduction to Computer Organization and Architecture
John von Neumann - IAS
17Introduction to Computer Organization and Architecture
von Neumann Architecture Sequential operation Automatic (without human intervention) Five elements:
Input Output Memory Arithmetic Unit Control
18Introduction to Computer Organization and Architecture
Revised von Neumann Architecture
19Introduction to Computer Organization and Architecture
The Stored Program Concept Programming the Harvard Mark I was by
external paper tape The ENIAC was “programmed” by rewiring it
completely!
20Introduction to Computer Organization and Architecture
The First Business Computer LEO — Lyons Electronic Office — 1950
Modeled after the EDSAC
UNIVAC — Universal Automatic Computer — 1951 for the Census Bureau Perhaps the first mass produced machine
ERMA — Electronic Recording Means of Accounting —1957 for Bank of America
21Introduction to Computer Organization and Architecture
The First Bug
22Introduction to Computer Organization and Architecture
I/O Processor
Output
Memory
Input andArithmetic
logic
Control
Basic functional units of a computer
23Introduction to Computer Organization and Architecture
Connections between the processor and the memory
24Introduction to Computer Organization and Architecture
Processor
Memory
PC
IR
MDR
Control
ALUR
n 1-
R1
R0
MAR
n general purposeregisters
Single-bus structure
25Introduction to Computer Organization and Architecture
MemoryInput Output Processor
Printer
Disk
Program
routinesOS
Timet0
t 1 t 2 t 3 t 4 t 5
Sharing the processor
26Introduction to Computer Organization and Architecture
Mainmemory Processor
Bus
Cachememory
The processor cache
27Introduction to Computer Organization and Architecture
Basic Performance Equation
N ST
R
N is the actual number of instruction executionsS is the average number of basic steps needed to execute one machine instructionR is the clock rateT is the processor time required to execute a program that has been prepared in some high-level language
Instruction Sets: CISC and RISC
RISC – Reduced Instruction Set Computers (smaller S likely leads to larger N)
CISC – Complex Instruction Set Computers (larger S likely leads to smaller N)
N ST
R
Performance Measurement
Running time on the ethalon reference computer rating for a benchmark =
Running time on the computer under testSPEC
System Performance Evaluation Corporation
1
1
raitingn n
ii
SPEC SPEC
n is the number of the benchmarks programs in the suite
Intel Processors: 4004 First microprocessor (1971)
For Busicom calculator Characteristics
10 m process 2300 transistors 400 – 800 kHz 4-bit word size 16-pin DIP package
Masks hand cut from Rubylith Drawn with color pencils 1 metal, 1 poly (jumpers) Diagonal lines (!)
31Introduction to Computer Organization and Architecture
Intel Processors: 8008 8-bit follow-on (1972)
Dumb terminals Characteristics
10 m process 3500 transistors 500 – 800 kHz 8-bit word size 18-pin DIP package
Note 8-bit datapaths Individual transistors visible
32Introduction to Computer Organization and Architecture
Intel Processors: 8080 16-bit address bus (1974)
Used in Altair computer (early hobbyist PC)
Characteristics 6 m process 4500 transistors 2 MHz 8-bit word size 40-pin DIP package
33Introduction to Computer Organization and Architecture
Intel Processors: 8086 / 8088 16-bit processor (1978-9)
IBM PC and PC XT Revolutionary products Introduced x86 ISA
Characteristics 3 m process 29k transistors 5-10 MHz 16-bit word size 40-pin DIP package
Microcode ROM
34Introduction to Computer Organization and Architecture
Intel Processors: 80286 Virtual memory (1982)
IBM PC AT Characteristics
1.5 m process 134k transistors 6-12 MHz 16-bit word size 68-pin PGA
Regular datapaths and
ROMs
Bitslices clearly visible
35Introduction to Computer Organization and Architecture
Intel Processors: 80386 32-bit processor (1985)
Modern x86 ISA Characteristics
1.5-1 m process 275k transistors 16-33 MHz 32-bit word size 100-pin PGA
32-bit datapath,
microcode ROM,
synthesized control
36Introduction to Computer Organization and Architecture
Intel Processors: 80486 Pipelining (1989)
Floating point unit 8 KB cache
Characteristics 1-0.6 m process 1.2M transistors 25-100 MHz 32-bit word size 168-pin PGA
Cache, Integer datapath,
FPU, microcode,
synthesized control37Introduction to Computer Organization and Architecture
Intel Processors: Pentium Superscalar (1993)
2 instructions per cycle Separate 8KB I$ & D$
Characteristics 0.8-0.35 m process 3.2M transistors 60-300 MHz 32-bit word size 296-pin PGA
Caches, datapath,
FPU, control
38Introduction to Computer Organization and Architecture
Intel Processors: Pentium Pro/II/III Dynamic execution (1995-9)
3 micro-ops / cycle Out of order execution 16-32 KB I$ & D$ Multimedia instructions PIII adds 256+ KB L2$
Characteristics 0.6-0.18 m process 5.5M-28M transistors 166-1000 MHz 32-bit word size MCM / SECC
39Introduction to Computer Organization and Architecture
Intel Processors: Pentium 4 Deep pipeline (2001)
Very fast clock 256-1024 KB L2$
Characteristics 180 – 90 nm process 42-125M transistors 1.4-3.4 GHz 32-bit word size 478-pin PGA
Units start to become
invisible on this scale
40Introduction to Computer Organization and Architecture
Intel Processors: Core 2 Duo 2006 Characteristics
65nm and 45nm 291 million transistors 2.5 GHz+ operation 32-bit word size LGA775
Dual core 14 stage pipeline Each gets L1 instruction
and data caches Shared L2 cache
Source: Intel
41Introduction to Computer Organization and Architecture
Transistors in Intel Processors
42Introduction to Computer Organization and Architecture
Clock Frequencies of Intel uP
43Introduction to Computer Organization and Architecture
Intel Summary 104 increase in transistor count, clock frequency
over 30 years!
44Introduction to Computer Organization and Architecture
Clock Increases Have Slowed
45Introduction to Computer Organization and Architecture
Levels of Abstraction
n+n+S
GD
+
PHYSICAL
TRANSISTOR
GATE
RTL
DEVICE
A <= B + C;
Adapted from “Digital Integrated Circuits” copyright 2003 Prentice Hall/Pearson
46Introduction to Computer Organization and Architecture
Levels of Abstraction (cont’d)
47Introduction to Computer Organization and Architecture
The End Lecture 1