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Slide 1 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Microelectronic Circuits
Introduction to MOSFET MOSFET (Metal Oxide Semiconductor Field Effect Transistor)
Slide 2 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
MOSFET Construction
MOSFET (Metal Oxide Semiconductor Field Effect Transistor)
Slide 3 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
MOSFET Operation
n-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor)
Slide 4 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Source Drain
SiO2 Insulator (Glass)
Gate
holes
electrons
5 volts
electrons to be
transmitted
Step 1: Apply Gate Voltage
Step 2: Excess electrons surface in
channel, holes are repelled.
Step 3: Channel becomes saturated
with electrons. Electrons in source
are able to flow across channel to
Drain.
P
N N
MOSFET Operation
Slide 5 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
MOSFET
Slide 6 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
MOSFET Operation
MOSFET is operating as a linear resistance device whose value is controlled by vgs infinite resistance at vgs ≤ vt
The induced channel will be enhanced after gate voltage becomes more than the threshold voltage , hence the name enhanced type MOSFET
Slide 7 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
MOSFET Operation
When VDS is increased by keeping VGS constant > Vt
VDS appears as a voltage drop across the length of the channel. i.e when we traverse from the Source to Drain , the voltage drop increases from 0 to vDS
Slide 8 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
MOSFET Operation
Thus the voltage between gate and points along the channel decreases from vGS at the source and vGS-vDS at the drain end.
Due to this channel depth is no longer uniform, being deepest at the source and shallowest at the drain end
Slide 9 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
MOSFET Operation
As the vDS is increased , the channel becomes more tapered and its resistance increases correspondingly. Thus iD---vDS curve is not a straight line
Slide 10 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
MOSFET Operation
When the vDS is increased to a value such that , the voltage between the Gate and channel is reduced to Vt (vDS = vGS - vt )
At this moment , the channel width at the drain end almost zero and the channel is said to be pinched off
Increasing vDS beyond this value has no effect on the channel shape and current through the channel remains constant. (at vDS = vGS - vt )
Slide 11 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
MOSFET Operation
Drain current saturates and MOSFET is said to be in the saturation region .
vDS at which saturation occurs is denoted by vDSsat=vGS-vt
The Device operates in a saturation region if vDS > vDSsat
Slide 12 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
iD and vDS relationship
regionSaturationVvL
Wki
regiontriodevvVvL
Wki
tGSnD
DSDStGSnD
2'
2'
2
1
2
1
Where W= channel width, L = Channel length =Process transconductance parameter (Determines the value of MOSFET transconductance.)
'
nk
Slide 13 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
iD vs vDS characteristics
Slide 14 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
NMOS Symbol
Slide 15 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Equivalent Circuit
Slide 16 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
MOSFET as an Amplifier
Slide 17 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
MOSFET as an Amplifier
Slide 18 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Biasing of MOSFET
Two Supplies Method
Slide 19 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Biasing of MOSFET
Voltage Divider Bias Method
22
1tGSoxnD VV
L
WCI
SDGSG RIVV
Slide 20 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Numerical based on Biasing
It is required to design a circuit to establish a dc drain current ID = 0.5 mA. The MOSFET is specified to have Vt = 1V and . Use VDD = 15. calculate the percentage change in the value of ID obtained with the MOSFET threshold voltage Vt = 1.5 V
21 VmALWkn //'
Slide 21 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Biasing Using Drain to Gate Feedback
Biasing the MOSFET using a large drain-to-gate feedback resistance, RG.
DDGSDD
DDDDDSGS
RIVV
IRVVV