Journal-201403-Musavi, F-Control Strategies for Wide Output Voltage Range LLC Resonant DC–DC Converters in Battery Chargers

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  • 8/9/2019 Journal-201403-Musavi, F-Control Strategies for Wide Output Voltage Range LLC Resonant DCDC Converters in Bat

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    IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY, VOL. 63, NO. 3, MARCH 2014 1117

    Control Strategies for Wide Output Voltage

    Range LLC Resonant DCDC Converters

    in Battery ChargersFariborz Musavi,Senior Member, IEEE, Marian Craciun,Member, IEEE,

    Deepak S. Gautam,Student Member, IEEE, and Wilson Eberle, Member, IEEE

    AbstractIn this paper, a control strategy is presented for ahigh-performance capacitively loaded loop (LLC) multiresonantdcdc converter in a two-stage smart charger for neighborhoodelectric vehicle (NEV) applications. It addresses several aspectsand limitations of LLC resonant dcdc converters in batterycharging applications, such as very wide output voltage rangewhile keeping the efficiency maximized, implementation of thecurrent mode control at the secondary side, and optimization of

    burst mode operation for current regulation at very low outputvoltage. The proposed control scheme minimizes both low- andhigh-frequency current ripples on the battery while maintainingstability of the dcdc converter, thus maximizing battery life with-out penalizing the volume of the charger. Experimental results arepresented for a prototype unit converting 390 V from the inputdc link to an output voltage range of 372 V dc at 650 W. Theprototype achieves a peak efficiency value of 96%.

    Index TermsBattery charger, burst mode operation, controlstability, resonant converter.

    I. INTRODUCTION

    NEIGHBORHOOD electric vehicles (NEVs) are propelled

    by an electric motor that is supplied with power froma rechargeable battery [1], [2]. Currently, the performance

    characteristics required for many electric vehicle (EV) applica-

    tions far exceed the storage capabilities of conventional battery

    systems. However, battery technology is improving, and as

    this transition occurs, charging of these batteries becomes very

    complicated due to the high voltages and currents involved

    in the system and the sophisticated charging algorithms [3].

    Quick charging of high-capacity battery packs causes increased

    disturbances in the ac utility power system, thereby increasing

    the need for efficient low-distortion smart chargers. The ac-

    cepted charger power architecture includes an acdc converter

    Manuscript received May 15, 2013; revised August 20, 2013; acceptedSeptember 17, 2013. Date of publication January 29, 2014; date of current ver-sion March 14, 2014. This is a revised version of the paper that was presentedat the IEEE Applied Power Electronics Conference and Exposition 2013 inLong Beach, CA, USA. This work was supported and sponsored by Delta-QTechnologies Corporation. The review of this paper was coordinated byDr. C. C. Mi.

    F. Musavi, M. Craciun, and D. S. Gautam are with Delta-Q TechnologiesCorporation, Burnaby, BC V5G 3H3, Canada (e-mail: [email protected];[email protected]; [email protected]).

    W. Eberle is with the School of Engineering, The University of BritishColumbia Okanagan, Kelowna, BC V1V 1V7, Canada (e-mail: [email protected]).

    Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

    Digital Object Identifier 10.1109/TVT.2013.2283158

    Fig. 1. Typical battery charging power architecture.

    with power factor correction (PFC) [4], followed by an isolated

    dcdc converter, as shown in Fig. 1 [5].

    This architecture virtually eliminates both the low- and

    high-frequency current ripples on the battery, thus maximiz-

    ing battery life without penalizing the volume of the charger

    circuit. The front-end acdc PFC converter is a conventional

    CCM boost topology [6], [7]. The following dcdc section

    is a half-bridge multiresonant capacitively loaded loop (LLC)

    converter. The half-bridge resonant LLC converter is widely

    used in telecommunication industries for its high efficiency at

    the resonant frequency and its ability to regulate the output

    voltage during the hold-up time, where the output voltage is

    constant and the input voltage might drop significantly [8][11].However, its application for battery charging impacts the

    design criteria significantly to address the following.

    A. Uncontrolled Area Operation

    The output voltage requirement for a battery charger is dras-

    tically different and challenging compared with telecommuni-

    cation applications. Fig. 2 shows a simplified battery charging

    profile for a 48-V system. As it indicates, the battery voltage,

    at the dcdc converter output, can vary from as low as 36 V

    and to as high as 72 V. In addition, in the case of severely

    discharged batteries, it is required to control current down toalmost 0 A when the voltage is below about 50% of maximum

    output voltage in the Un-controlled Area in Fig. 3, where the

    LLC outputVIplane is shown [12].

    B. Beat Frequency Quadratic Pole Phenomenon

    Beat frequency quadratic pole phenomenon is a special char-

    acteristic for resonant converters [13][15]. The frequency-to-

    output transfer function of the LLC resonant converter contains

    a quadratic pole, as shown in [13] and [16]. Both the damping

    factor Q and of the quadratic pole vary with the converteroperating condition. This term could introduce either a pair

    0018-9545 2014IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

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    1118 IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY, VOL. 63, NO. 3, MARCH 2014

    Fig. 2. Simplified adaptive four-step leadacid battery charging profile.

    Fig. 3. LLC outputVIplane with uncontrolled area.

    of complex poles or two real poles affecting the power stage

    dynamics. When it results in complex poles, the frequency is

    approximately given by the difference between the switching

    and the resonant tank frequencies; therefore, it is called beat

    frequency double pole, as shown in Fig. 4. It is of particular

    importance for a battery charger as the operating conditions and

    load models vary widely, requiring current or voltage regulation

    in any point of the highlighted area in Fig. 3 with constant

    voltage or/and constant resistance load. To compensate for theadditional phase lag, it is required to reduce the bandwidth of

    the control loop. As a consequence, a voltage mode converter

    will have a slow transient and poor rejection of the line fre-

    quency ripple that needs to be addressed.

    C. Secondary Side Current Mode Control

    In a battery charger, it is desired to control the charge rate,

    which is in fact the charger current. In addition, rejecting the

    low-frequency ripple on the dc link bus is required. This means

    reducing the transconductance of the dcdc converter. In addi-

    tion, to satisfy these conditions, a current mode control with

    high current loop gain at twice the line frequency is desired.Current mode control can be implemented either in the primary

    Fig. 4. Typical dc transfer ratio of an LLC dc-to-dc converter obtained usingFHA.

    Fig. 5. Simplified secondary side current mode control.

    side or the secondary side [13], [15], [17][19]. Primary side

    control requires isolation of feedback control signal, which

    is usually accomplished by using an optocoupler. The main

    disadvantages of using an optocoupler would be significant

    variation of the control loop gain due to optocouplers poor

    current transfer ratio initial tolerance, reduced bandwidth, and

    degradation with the temperature and aging. To compensate for

    these variations, a larger gain margin, and in some cases phase

    margin, in control loop design is mandatory. Secondary side

    control removes optocouplers limitations, enabling more re-

    peatable performance. One implementation is shown in Fig. 5,where the gating signals are transferred to the primary side.

    However, the disadvantage is now sensing the input bus voltage

    across the isolation barrier for brownout and undervoltage

    protection of the dc-to-dc stage.

    II. BURSTM OD EO PERATION( NO L OAD , SHORTC IRCUIT)

    Burst mode operation [20] can be used for depleted batteries

    that require operation of the LLC converter in the uncontrolled

    area of the VI plane, as shown in Fig. 3. This method isused solely to revive neglected batteries. In this region, the

    charger voltage is below 1.5 V/cell (36 V) and the switching

    frequency has reached its maximum value (500 kHz). At thispoint of operation, the converter is switched to ON/OFF mode

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    MUSAVI et al.: CONTROL STRATEGIES FOR LLC RESONANT DCDC CONVERTERS IN BATTERY CHARGERS 1119

    Fig. 6. Startup soft switching consideration. Ch1 = MOSFET gate drive

    5 V/div. Ch2 = battery current 2 A/div. Ch3 = half-bridge node voltage50 V/div. Ch4 = ILr2 A/div.

    Fig. 7. Shutdown battery current consideration. Ch1 = half-bridge node volt-age 100 V/div. Ch2 = battery current 2 A/div. Ch4 = ILr2A/div.

    while operating at fixed frequency fsw_max. To reduce com-ponents stresses during repetitive ONOFF operation, several

    precautions have to be considered.

    1) Selecting half-bridge topology with split resonant capac-

    itor, as shown in Fig. 5, will ensure that the capacitors are

    already charged at the dc steady-state level prior to start

    switching, reducing the startup inrush currents.

    2) Shorter duration of the first gate drive pulse at startup en-

    sures soft switching condition of the MOSFET switches

    at power ON and allows fast transition to steady-state

    values of the resonant inductor current. As shown in

    Fig. 6, the resonant current reaches steady state in few

    switching cycles avoiding high peak current transitions.

    3) Energy stored in resonant tank creates minor battery

    current tail after gate pulses are stopped, as shown

    in Fig. 7, limiting choice of maximum burst frequencyand/or maximum burst duty cycle.

    Fig. 8. Depleted battery conditioning. Ch1 = battery voltage 5 V/div. Ch2 =battery current 2 A/div. Ch4 = ILr2 A/div.

    Fig. 9. (Top) FFVOT operation concept. (Bottom) Transition from FFVOT tocontinuous operation mode.

    Fig. 10. (Top) VFFOT operation concept. (Bottom) Transition from VFFOT

    to FFVOT.

    Battery manufacturers recommend less than C/20 (i.e.,

    5-A RMS for a 100-Ah battery) low-frequency ripple current

    (line frequency or double-line frequency) to minimize heat

    generation while charging. Tests performed on valve-regulated

    leadacid batteries for uninterruptible power systems with three

    times the recommended ripple current have demonstrated that

    the heating effect is minimal (

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    1120 IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY, VOL. 63, NO. 3, MARCH 2014

    Fig. 11. Flowchart of battery charging control.

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    MUSAVI et al.: CONTROL STRATEGIES FOR LLC RESONANT DCDC CONVERTERS IN BATTERY CHARGERS 1121

    Depleted batteries can be conditioned in burst mode with low

    RMS ripple current, as demonstrated in Fig. 8 showing 1.9-A

    RMS when charging at 1.5 ADC with 8 kHz/30% duty cycle

    burst mode.

    A. FFVOT

    As the name of the control method implies, operation inthe uncontrolled area occurs by varying the ON time and

    keeping the frequency constant. The converter hardware sets

    the maximum burst frequency, capable of supporting up to a

    maximum frequency of 30 kHz with no limit on minimum burst

    frequency. The choice of the burst frequency is based on the

    digital hardware limitations and battery ripple current tolerance

    given by battery manufacturer.

    Fig. 9 shows the fixed frequency variable on-time (FFVOT)

    operation concept. Moreover, when the battery voltage is in the

    normal range and the duty cycle is very large (e.g., 98%), the

    LLC controller is enabled, thereby reverting the converter to

    normal (low ripple) operation.

    B. VFFOT

    In addition to battery ripple current tolerance, battery man-

    ufacturers provide the minimum duty cycle for pulsed-current

    charging. Accordingly, the FFVOT control strategy enables op-

    eration at low output current ripple and high O N/OFF frequency

    with a minimum O Nduration.

    If in FFVOT, once the charger reaches the minimum ON

    duration limit, the frequency must begin to reduce and the

    converter enters variable frequency fixed on-time (VFFOT).

    This is the burst frequency, not the switching frequency of the

    converter, as the converter switching frequency is kept constantat this point to fsw_max. The purpose of switching the controlstrategy from FFVOT to VFFOT is to maintain the charge

    current at very low value. Fig. 10 shows the VFFOT operation

    concept and the transition from VFFOT to FFVOT modes.

    C. Control Principle and Implementation

    An example method of battery charging control is provided

    in Fig. 11.

    At the beginning, the battery charger detects if the battery

    voltage is less than 1.5 V/cell. If the battery voltage is equal

    to or more than 1.5 V/cell, the dc-to-dc can achieve charge

    rate regulation in the continuous operating area; therefore,continuous operation mode will be enabled.

    If the battery voltage is less than 1.5 V/cell, the VFFOT

    mode of operation is enabled. In this mode of operation, the

    battery is charged with a current pulse of duration tMIN andamplitude less than ISC, charge regulation being achieved bymeans of changing the repetition rate of the current pulses fON.Then, the battery current is measured, and the average value is

    compared with the reference current IREF from the chargingalgorithm. If the averaged battery current is less than IREF, thepulse repetition frequencyfON is increased by afincrementand the resulting new repetition frequency is compared to the

    current pulse duration. The result of these comparisons decides

    if the process is repeated or if the operation mode is changedto FFVOT mode. If a new value IREF is received from the

    Fig. 12. Implementation of FFVOT and VFFOT modes in batteryVIplane.

    charging algorithm, it is compared with the old value. If the

    new IREFvalue is less than the old one, the process is restarted.

    If the new IREF value is more or equal to the old value, themeasured battery voltage is compared with 1.5 V/cell. If thebattery voltage is less than 1.5 V/cell, the process is repeated; if

    the battery voltage is more or equal to 1.5 V/cell, the operation

    mode is changed to continuous operation mode.

    While operating in VFFOT mode, the battery current pulse

    duration tONis compared with the pulse repetition period. (Theperiod is the inverse function of the pulse repetition frequency,

    i.e., 1/fON.) If the pulse duration is more than half of therepetition period, the operation mode is changed to FFVOT.

    In FFVOT mode of operation, the battery is charged with a

    current pulse of an amplitude less thanISC at a fixed repetitionfrequencyfPWMwith variable durationtON, charge regulation

    being achieved by means of changing the current pulse durationtON. Then, the battery current is measured, and the averagevalue is compared with the reference current IREF from thecharging algorithm. If the averaged battery current is less than

    IREF, the pulse duration tON is increased by a t incrementand the resulting new pulse duration is compared with 98%

    of the pulse repetition period. The result of these comparisons

    decides if the process is repeated or if the operation mode is

    changed to continuous operation mode. If a new value IREF isreceived from the charging algorithm, it is compared with the

    old value. If the new IREF value is less than the old one, theprocess is restarted. If the new IREF value is more or equal to

    the old value, the measured battery voltage is compared with1.5 V/cell. If the battery voltage is less than 1.5 V/cell, the

    process is repeated; if the battery voltage is more or equal

    to 1.5 V/cell, the operation mode is changed to continuous

    operation mode. Fig. 12 shows the area of implementation of

    FFVOT and VFFOT modes in uncontrolled leadacid battery

    VIplane. In addition, Fig. 13 shows the area of implementa-tion of FFVOT and VFFOT modes in battery charging profile.

    III. CONTROL S TABILITY C ONSIDERATION

    To address beat frequency and verify the stability of the

    system, both current and voltage plant stability must be verified

    in the extreme operating conditions using the previous plantmodeling. Fig. 14 shows the block diagram representation of

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    1122 IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY, VOL. 63, NO. 3, MARCH 2014

    Fig. 13. Implementation of FFVOT and VFFOT modes in battery chargingprofile.

    Fig. 14. Block diagram representation of the system with an inner currentloop and an outer voltage loop.

    Fig. 15. Plant transfer function phase and magnitude at Vo = 48 V andVo = 72 V.

    the system with an inner current loop and an outer voltage

    loop. Fig. 15 shows the uncompensated plant phase and gain

    frequency responsesPi(s) at full load, i.e., 48- and 72-V out-puts. The beat frequencies could be observed at 10 and 20 kHz

    for 72 and 48 V, respectively. The closed-loop crossover fre-

    quency must be placed at least one octave below the beat

    frequencies due to excessive phase shift.

    An overall compensated current loop phase and gain at Vo=72 V and FL Pi(s)Ci(s) for resistive and battery loads isshown in Fig. 16. It can be observed that, with battery, the gain

    is increased to 25 dB, which will provide line frequency current

    ripple rejection.

    The closed looped compensated current plant is the uncom-pensated plant (power stage) for the voltage loop, as shown

    Fig. 16. Compensated current plant transfer function phase and magnitude atVo = 72 V and FL (resistive and battery loads).

    Fig. 17. Closed current loop (voltage plant transfer function) phase andmagnitude atVo = 72 V and FL (resistive and battery loads).

    Fig. 18. Compensated voltage plant transfer function phase and magnitude atVo = 72 V and FL (resistive load and battery loads).

    in Fig. 17. The compensated voltage loop transfer function is

    given in Fig. 18 at 72-V output and full load.

    However, the battery will reduce the gain of the voltage loop,

    as shown in Fig. 18. In addition, it is observed that the cutoff

    frequency drops by two decades (from 1.5 kHz to 16 Hz).

    IV. SIMULATION AND E XPERIMENTAL R ESULTS

    A prototype of the half-bridge LLC multiresonant converter

    was built to provide a proof-of-concept and verify the analytical

    work presented in this paper. Fig. 19 shows a picture of the LLC

    dcdc multiresonant converter prototype. Table I provides the

    design criteria for the prototype LLC converter. In Table II, thekey components used in the prototype converter are given.

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    MUSAVI et al.: CONTROL STRATEGIES FOR LLC RESONANT DCDC CONVERTERS IN BATTERY CHARGERS 1123

    Fig. 19. Prototype of LLC dcdc converter.

    TABLE IDESIGNS PECIFICATIONS

    TABLE II

    COMPONENTSU SED IN THE P ROTOTYPE C ONVERTER

    The measured efficiency values of the converter as a function

    of load are given in Fig. 20 at output voltages of 48, 60, and

    72 V. This clearly shows that the efficiency is kept almost

    constant and independent of output voltage at full load. These

    measurements were taken with the output relay, common mode

    electromagnetic interference inductor, and output fuse in the

    circuit.

    Simulation and experimental waveforms of the resonant tank

    current, resonant capacitor voltage, and voltage across bottom

    MOSFET Q2 are provided in Figs. 21 and 22 at Vin = 390 V

    andPo= 650 W. The waveforms in Fig. 21 are given at closethe unity gain resonant frequency fsw =211 kHz and output

    Fig. 20. Measured efficiency versus output power forVo = 48 V, Vo = 60 V,andVo = 72 V.

    Fig. 21. ILr, VCr, and VQ2 for Vo = 48 V, Po = 650 W; Ch1 = VQ2100 V/div. Ch2 = VCr 100 V/div. Ch4 = ILr 2A/div. (a) Simulation results.(b) Experimental results.

    voltage Vo= 48 V. The waveforms in Fig. 22 are given atfsw = 152 kHz and an output voltage ofVo = 72 V.

    Fig. 23 provides example waveforms of transition from

    FFVOT control to continuous operation mode. Fig. 24 shows

    example waveforms of the FFVOT control strategy. Fig. 25

    shows example waveforms of the VFFOT control strategy.

    Note that the overshoot shown in the current waveforms is

    due to the small impedance of the battery simulator. Real-lifedepleted batteries will have higher internal resistance; hence,

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    1124 IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY, VOL. 63, NO. 3, MARCH 2014

    Fig. 22. ILr, VCr, and VQ2 for Vo = 72 V, Po = 650 W; Ch1 = VQ2100 V/div. Ch2 = VCr 100 V/div. Ch4 = ILr 2A/div. (a) Simulation results.(b) Experimental results.

    Fig. 23. Transition from FFVOT control to continuous operation mode:Don = 98%,Io = 7 A, andVo = 20 V.

    a lossy damper was not deemed necessary for this mode of

    operation, and the waveforms looked more like those in Fig. 8.

    V. CONCLUSION

    A control strategy has been presented for a high-performance

    LLC multiresonant dcdc converter in a two-stage smart

    charger for NEV applications. It addresses several aspects

    and limitations of LLC resonant dcdc converters in battery

    charging applications, such as very wide output voltage range

    while keeping the efficiency maximized, the beat frequencydouble pole at frequencies close to resonant frequency, and the

    Fig. 24. FFVOT control strategy:fPWM = 1 kHz,Don = 60%,Io = 5 A,andVo = 5 V.

    Fig. 25. VFFOT control strategy: fBurst = 31 kHz, VBATT = 3 V,on duration = 1 resonant cycle, andIBATT = 1.3 A.

    implementation of the current mode control at the secondary

    side. The proposed control scheme minimizes both low- and

    high-frequency current ripples on the battery while maintaining

    stability of the dcdc converter, thus maximizing battery life

    without penalizing the volume of the charger. Experimental

    results are presented for a prototype unit converting 390 V from

    the input dc link to an output voltage range of 372 V dc at

    650 W. The prototype achieves a peak efficiency value of 96%.

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    Fariborz Musavi(S10M11SM12) received theB.Sc. degree from Iran University of Science and

    Technology, Tehran, Iran, in 1994; the M.Sc. degreefrom Concordia University, Montreal, QC, Canada,in 2001; and the Ph.D. degree in electrical engi-neering with emphasis in power electronics fromThe University of British Columbia, Vancouver, BC,Canada.

    Since 2001, he has been with several high-technology companies. Currently, he is with Delta-Q

    Technologies Corporation, Burnaby, BC, where heis a Manager of research and engineering and is engaged in research on thesimulation, analysis, and design of battery chargers for industrial and auto-motive applications. His current research interests include high-power high-efficiency converter topologies, high-power-factor rectifiers, electric vehicles,and sustainable and renewable energy sources.

    Dr. Musavi is a Registered Professional Engineer in the Province of BritishColumbia. He received the First Prize Paper Award from the IEEE Industry

    Applications Society Industrial Power Converter Committee in 2011. He hasalso won an award from the Power Source Manufacturers Association topresent papers at conferences.

    Marian Craciun (M00) received the B.Sc. degreein electronics engineering from the Polytechnic In-

    stitute of Bucharest, Bucharest, Romania.He has more than 20 years of experience in de-

    veloping telecommunication and industrial powerelectronic products and sustaining engineering. Hisindustrial experience includes positions with Ener-gorepairs RENEL and Asea Brown Boveri Ltd., in

    Bucharest and with Argus Technologies Ltd. andAlpha Technologies Ltd., in Burnaby, BC, Canada.He is currently a Power Electronics R&D Engineer

    with Delta-Q Technologies Corporation, Burnaby. His current research interestsinclude high-power high-efficiency converter topologies, high-power-factorrectifiers, resonant converters, electric vehicles, and sustainable and renewableenergy sources.

    Deepak S. Gautam (M09S11) received the B.E.degree in electronics engineering from the Universityof Mumbai, Mumbai, India, in 2000 and the M.A.Sc.

    degree in electrical engineering from the Universityof Victoria, Victoria, BC, Canada, in 2006. He is cur-rently working toward the Ph.D. degree in electricalengineering in thefield of power electronics with TheUniversity of British Columbia, Vancouver, BC.

    From 2000 to 2003, he was a Research and De-velopment Engineer with the Power Conversion andControl Division, Aplab Ltd., Mumbai,where he was

    involved in the development of linear, switch-mode, and programmable powersupplies for industrial and telecommunication industries. Since 2007, he hasbeen a Power Electronics Engineer with Delta-Q Technologies Corporation,Burnaby, BC, where his main responsibility is to develop high-frequencyswitch-mode battery chargers for automotive and industrial applications. His

    research interests are dcdc converters, acdc power factor correction convert-ers, resonant converters, and feedback control circuits.Mr. Gautam received the University of Victoria fellowship, the Andy

    Farquharson Award for Excellence in Graduate Student Teaching, and the BestPoster Presentation Award at the Applied Power Electronics Conference andExposition 2012 in Orlando, FL, USA. He also has won travel grants from thePower Source Manufacturers Association and the IEEE Industry Applicationand Power Electronics Societies to present papers at conferences.

    Wilson Eberle (S98M07) received the B.Sc.,M.Sc., and Ph.D. degrees from Queens University,Kingston, ON, Canada, in 2000, 2003, and 2008,respectively.

    His industrial experience includes positions withFord Motor Company, Windsor, ON, and with AstecAdvanced Power Systems, Nepean, ON. He is cur-

    rently an Assistant Professor with the School ofEngineering, The University of British ColumbiaOkanagan, Kelowna, BC, Canada. He is the authoror a coauthor of more than 50 technical papers

    published in various conferences and IEEE journals. He is the holder of oneU.S. patent. His current research interests include high-efficiency high-power-density dcdc converters and acdc power factor correction circuits.

    Dr. Eberle currently holds research grants from the Natural Sciences and En-

    gineering Research Council of Canada, the Canada Foundation for Innovation,the British Columbia Knowledge Development Fund, The University of BritishColumbia, and the Kaiser Foundation for Higher Education.