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www.intopix.comIP-COREPORTFOLIO-april11
JPEG 2000
www.intopix.com
intoPIX JPEG 2000 Encoder and Decoder IP-Cores respect and protect high value images. Handling simultaneously deep color, low and high data rates and extensive JPEG 2000 encoding know-how, intoPIX IP-Cores enable best-in-class picture quality. Amongst all the existing JPEG 2000 FPGA products, the intoPIX solution is currently the most widely adopted by the industry.
intoPIX IP-Cores achieve low and high frame rate and resolution with unprecedented performances. They are available and optimized for the most recent FPGA platforms.
intoPIX IP-Cores combine more power, more flexibility and more efficiency while ensuring lower consumption, lower temperature dissipation and lower bill of material.
Fully benefiting from a modular architecture and completed with a wide range of companion IP-Cores, the intoPIX solutions provide an easy, timely and cost-effective way to implement JPEG 2000 technology.
The most powerfuland flexible
JPEG 2000 solutionavailable today
FPGA IP-cores
Take IMAGING to the NEXT LEVEL
High Quality Picture> From Lossy to Lossless compression
Customizable Design> Single Chip FPGA> Altera Stratix IV & V> Altera Aria II & V> Altera Cyclone V
Cost Effective> Reduced BOM> Ultra dense> Optimized per application
Future-Proof> HD up to 120 fps> 4K & 8K up to 60 fps> Low and High bitrate up to pure Lossless> 3D ready> Zero-Latency capable (< 5 ms)
Companion IP-Cores> DDR2 / DDR 3 Memory Controller> Memory Arbiter> 3G-SDI Interface> Video Serializer / Deserializer> UDP Protocol Manager
Security IP-Cores> AES Security IP-Cores> RSA Security IP-Cores> Hash Function
Training and support for integration
IP-CORS-alteraflyer-jan.13
* EstimationlimitedtodeviceavailabilityintheAlteraQuartustool(August-2012). SpeedgradeisC4intheArriaVfamily
JPEG 2000
www.intopix.com
The HD FamilyJPEG 2000 for Content Production
TheJPEG2000HDFamilyallowsyoutoretain image quality throughout your complete production process.
TheseIP-Coreshaveadecodedbitraterangefrom250Mbpsupto1Gbps,andcanprocessupto120progressiveframespersecondinHDresolution(1920x1080).
Moreover,theIP-Coresflexibilityenablesthemtoaddressallknown broadcast standards in terms of resolution and frame rates.
• SingleChip• Broadcastprofilecompliant (JPEG2000Part1Amd3)• Anyresolutionupto1080p-120fps• Upto1GpsCompressedBitrates• Progressive/interlaced• 4:2:2/4:4:4• Easy3Dstereoscopy• Multistreamssupport• CBR/VBR
APPLICATIONSCamera on-board encoderField recorderPost-production video server
The Lossless FamilyJPEG 2000 for pristine content
TheintoPIXLosslessencodersanddecoderspreserve the origi-nal image quality and value. They support any image format up to 4K+(4096x3112)withcolordepthupto12bitpercomponentandJPEG2000Losslesscompression.
• SingleChip• Fullyflexibleimageformat upto4Ksingletile• LosslessEncoding APPLICATIONSArchivingStore and ForwardMedicalAerospaceGeospace
The Digital CinemaFamilyDCI compliant IP-Cores
TheintoPIXDigitalCinemaIP-Coresareoptimizedtomeetthe highest requirements of Digital Cinema including 2K-120 fps and 4K-3D formats.
TheDigitalCinemasolutionenablestheintegrationwithinasingle chip of a complete image processing chain, i.e. decryp-tion-decoding-watermarkingandencryption,togetherwithvideoI/Ointerfaces,systemcontrolandsysteminterfaces.
• SingleChip• DCIcompliant(JPEG2000 Part1Amd1)• 2Kresolutionatupto120fps• 4Kresolutionatupto30fps• Bitratesupto1000Mbps
APPLICATIONSEmbedded MediablockDigital Cinema ExhibitionDigital Cinema Post-ProductionFaster than real-time encoderTheme park advanced display
The Ultra HD4K/8K FamilyJPEG 2000 for extreme resolutions
TheintoPIXUltraHD4K&8KIP-Coresgoone step further interms of encoding power and high-end applications. This rangeofIP-Coresgivesyouaccesstothenewdefined ITU UHDTVstandards, 4K and 8K.
• SingleChip• 4Kresolutionatupto60fps• 8Kresolutionatupto60fps• Highbitrateflexibility
APPLICATIONSUHDTVDigtal signage, Shows & Theme parkAdvanced Cinema MediablockGeospace/Aerospace
Ultra Low Latency OptionJPEG 2000 for Live streams
TheHDfamilyalsooffersanUltraLowLatencyoptionthatenablesyoutocarryHDstreamswithinthenetworkwith a point-to-point latency below 5 milliseconds while guaranteeing high image quality.
•3/11ofaframeorfieldperiod•Verylowbitrateoverhead•Visuallylosslessquality
APPLICATIONSContribution transceiverLive events transmitterWireless TransmissionRemote control & Monitoring
FPGA IP-Cores
NEW
JPEG 2000
Take IMAGING to the NEXT LEVEL
FPGA IP-Cores
IP-CoreEvaluation KitThe full evaluation of a specific codec represents a critical stage in the technical decision process.
intoPIX offers the possibility to gain access to an evaluation license that allows assessment of the capabilities and characteristics of thefullyfunctionalCore.Inpartnershipwithboardmanufacturers,intoPIX can also provide potential customers with an ideal hard-ware platform upon which to complete this evaluation phase.
Formoreinformationontheavailablehardware,please contact [email protected]
Security IP-Cores
AES Encryption-Decryption CoresTheIPX-AESModulesareencryptor-decryptorIP-Coresprovi-ding an efficient FPGA implementation of the Advanced Encryption Standard (AES).
TheIPX-AESmodulescanbecustomizedforeachspecificapplication.Theysupportanextremelywiderangeofbitrates.Itsflexibilityallowscombiningseveralfunctionsandoperatingmodeson very small footprints.
Hash function CoreTheIPX-HMAC-SHA-1IP-Coreisthehashingfunctionrequiredforcontent integrity check and content identification as specified in DCIdocuments.Itenablescomputationofthekeyed-hashmes-sageauthenticationcode(HMAC)foraudioandvideoassets.
RSA Public Key CryptographyAccelerator CoreThemodularexponentiationacceleratorIPX-RSAisanefficientarithmeticcoprocessorfortheRSApublic-keycryptosystem.Itperformsthemodularexponentiationcalculationandthereforeoffloadsthemostcomputer-intensiveoperationofRSAfromthemainprocessor.TheRSAcryptosystemcanbeusedforpublickeyencryption,decryptionandsignature/authentication.
ThekeyadvantageoftheIPX-RSAIP-Coreisitslowfootprint,thankstoanefficientbalancebetweenlogicfabricandembeddedRAMsandMultipliers.
Companion IP-CoresintoPIXproposescompanionIP-Coresspecially designed to ease the integrationof JPEG 2000 and minimize your time-to-market.
DRAM Memory controller CoresThe IPX-DDR2 and IPX-DDR3 cores guarantee efficient memory accessesbetween the intoPIXJPEG2000 IP-CoresandexternalDDR2orDDR3DRAMmemory.
TheIPX-DDR2corerunsupto266MHzona64bitphysicalbusreachingpeak transferratesof34Gbit/s. Providinga low foot-print,highefficiencyDDR2memorycontroller,itsupportsvarioususerinterfacesof8,16,32or64bitandawidevarietyofDDR2chip vendors and memory chip configurations.
TheIPX-DDR3coreaddsfunctionalitytoFPGAvendorDDR3control-lersinordertoprovideaflexibleandefficientinterfacetowardstheintoPIXJPEG2000IP-Cores.Itrunstoupto800MHz,allowingyoutoreachpeaktransferratesof68Gbit/son64bitwideinterface.
Memory arbiter CoreTheIPX-MAmemoryarbiterenables the external memory to be sha-red between different processes i.e. frame buffers, watermarking etc.Itisa4-portarbiter.Eachportpresentsthesamewidthof32,64,128or256andrunsupto133MHz.
Stream Serializer-Deserializer CoreThe IPX-SERDES Serializer Companion Core transforms several parallel video streams into a single one.ThisserializedvideostreamcanthenbefedintooneoftheintoPIXCoresforhighspeedproces-sing.TheDeserializerCoreprocessestheoutputstreamintoseve-ral parallel video streams in order to recreate several independent video channels. These cores are typically used to implement 3Dstereoscopic or multi synchronous channel applications.
3G/HD-SDI CoreTheIPX-3G-SDIIP-Coresupportsdynamic switching between SD, HD and 3G-SDI standardsinbothTransmittingandReceivingmodes,withautomaticstandarddetectionandwithoutFPGAreprogramming.
Furthermore, the IPX-3G-SDI canalso handleDual3G-SDI chan-nels,allowingtheprocessingofmultiple3Glinks.TheIPX-3G-SDImeets1080p-60Hzaswellas4Kapplications.Thiscore is verycompact and very efficient.
UDP Protocol Manager CoreThe IPX-UDP IP-Core handles the reception of UDP packets on a gigabit Ethernet link. This link could be used to carry video, audio and subtitle assets.
TheIPX-UDPincludesaMACcontrollerandaprotocolhandler.TheMACcontroller isbasedontheTri-ModeMACcontroller,hard-co-ded within the Altera technology. intoPIX’ IP configures the MAC controllerandsetsuptheexternalPHYchip.
The protocol handler manages the user UDP protocol. It is res-ponsibleforreceivingvideo/audiopacketsaswellascheckingdataintegrity through IP/UDPchecksumandEthernetCRC.Finally, italso manages the connection integrity and error handling.
Information provided is accurate at the time of publication, however, no responsibility is assumed by intoPIX for its use, nor for any infringements of patents or other rightsof third parties that may result from its use. Specifications are subject to change without notice. No license is granted by implication or otherwise under any patent or patent rightsof intoPIX. Trademarks and registered trademarks are the property of their respective owners.
TECH
NIC
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SPECIF
ICATI
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SJPEG 2000 FPGA IP-Cores
HEADQUARTERS: intoPIX s.a.Place de l’Université 16B-1348 Louvain-la-Neuve - BelgiumTel.: +32 10 23 84 70Fax: +32 10 23 84 [email protected]
USA: intoPIX America inc.intoPIX America9201 Arboretum Parkway Suite 200Richmond, VA 23236 - [email protected]
JAPAN: intoPIX Island K.K.1-3-1-3F, Azabujuban, Minato-ku106-0045 Tokyo - JapanTel.: +81 3 6459 1066Fax: +81 3 6426 [email protected]
www.intopix.com
JPEG 2000Encoding/DecodingImage features• Bitdepth:8,10,12• ColorSpace:RGB,XYZandYCbCr• ColorSampling:4:2:2,4:4:4• interlacedfield,progressiveframe• Monochromeand3or4componentcolorimagesJPEG 2000 (ISO 15444-1)• Wavelettransforms:5/3and9/7• Reversibleandirreversiblecolortransforms• Decompositionlevels:upto6levels• Quantizationsteps:programmableperlevelandpercomponent• Qualitylayer:1layer• DigitalCinema(DCI)compliant-JPEG2000Part1Amd1• Broadcastprofilescompliant-JPEG2000Part1Amd3• Tiling:Singletile• ProgressionOrder:CPRL• CodeBlockSize:32x32,32x64,64x32,64x64,128x32• ContrastsensitivityfunctionQuality and Bit Rate Control• Maximumcodestreambitrate:250Mbps,500Mbps,1Gbps, 2Gbpsand8GbpsforLossycompressionandunlimitedfor Losslesscompression• Variablebitrate(VBR):Theoverallbitrateisvariablefora selectable constant quality• CappedVBR:9/7waveletfilter-Constantqualitybutvariablebit rateiscappedatagivenmaximumlimit
• VisuallyLosslessVBR:9/7waveletfilter-ConstantVisual Quality-Novisuallynoticeableartifact-8:1compression• NearlyMathematicallyLossless(NMLS):5/3waveletreversible transformwithanappliedmaximumbitrate-3:1to5:1 compression• TrueMathematicallyLossless(MLS):5/3waveletreversible transform-nomaxbitrate-bittobitlosslesscompression -2:1compressionLatency• Nominallatency:2frames/fieldsatencoding;1frame/fieldat decoding• Ultra-Lowlatency:downto2/16thofaframe/fieldatencoding andto1/16thofaframe/fieldatdecodingwithtileborder protectionControl• Encoder: - 8preloadedconfigurationsandframeperframecontrol -Configurationcontrol:throughOPBbusorthroughvideointerface - Real-timeaccesstostatusregistersformonitoringanddebug• Decoder: - Upto16preloadedchannelconfigurations - Configurationcontrol:throughOPBbusorthroughCode Stream control packets - Real-timeaccesstostatusregistersformonitoringanddebug - ontheflycodestreamintegritycheck - optionalautomaticframerepeaterExternal memory requirements -DDR2at250MHz -DDR3from400to800MHz -Physicaldatabusfrom16to64bitsforDDR2orDDR3
FPGA IP-CoreMATRIX
HDCI
NEM
AM
-LOSS
LESS
ULTR
A HD
4K/8
KNEW
TARGET ALTERA FPGA
Ip-core reference Encoder / Max Max Max Bitrate Startix IV Arria II Startix V Arria V Cyclone V Decoder resolution frame rate (fps) GT GX GX GT GX GS E GT GX E GX GT IPX-JP1HD-Enc Encoder 1920x1080 30p(60i) 250Mbps 40G2 110 95 C5 A3 D3 E9 C3* A1 A4* C4* D5*IPX-JP1HD-Dec Decoder 1920x1080 30p(60i) 250Mbps 40G2 110 95 C5 A3 D3 E9 C3* A1 A5* C5* D5*IPX-JP2HD-Enc Encoder 1920x1080 60p(120i) 500Mbps 40G2 110 125 C5 A3 D3 E9 C3* A3 A4* C4* D5*IPX-JP2HD-Dec Decoder 1920x1080 60p(120i) 500Mbps 40G2 110 125 C5 A3 D3 E9 C3* A3 A5* C5* D5*IPX-JP4HD-Enc Encoder 1920x1080 120p(240i) 1Gbps 40G2 110 125 C5 A3 D3 E9 C3* A3 A5* C5* D5*IPX-JP4HD-Dec Decoder 1920x1080 120p(240i) 1Gbps 40G2 180 190 C5 A3 D3 E9 C3* A3 A5* C5* D5*
IPX-JP2K-Enc Encoder 2048x1080 48p 250Mbps 40G2 110 95 C5 A3 D3 E9 C3* A3 A5* C5* D5*IPX-JP 2K-Dec Decoder 2048x1080 48p 250Mbps 40G2 70 65 C5 A3 D3 E9 C3* A3 A5* C5* D5*IPX-JP 2K-Plus-Enc Encoder 2048x1080 120p 500Mbps 40G2 110 125 C5 A3 D3 E9 C3* A3 A5* C5* D5*IPX-JP2K-Plus-Dec Decoder 2048x1080 120p 500Mbps 40G2 70 65 C5 A3 D3 E9 C3* A3 A5* C5* D5*IPX-JP4K-Plus-Enc Encoder 4096x2160 30p 500Mbps 40G2 180 190 C5 A3 D3 E9 C3* A3 A5* C5* D5*IPX-JP4K-Plus-Dec Decoder 4096x2160 30p 500Mbps 40G2 180 125 C5 A3 D3 E9 C3* A3 A5* C5* D5* IPX-JP1HD/2K-MLS-Enc Encoder 2048x1080 30p Math.Lossless 40G2 180 125 C5 A3 D3 E9 C3* A3 A5* C5* D5*IPX-JP1HD/2K-MLS-Dec Decoder 2048x1080 30p Math.Lossless 40G2 180 190 C5 A3 D3 E9 C3* A3 A5* C5* D5*IPX-JP2HD-MLS-Enc Encoder 2048x1080 60p Math.Lossless - - - - - - - - - - - -IPX-JP2HD-MLS-Dec Decoder 2048x1080 60p Math.Lossless - - - - - - - - - - - -IPX-JP4K-MLS-Enc Encoder 4096x2160 NA Math.Lossless 40G5/100G5 360 - C5 A3 D3 E9 C3* A3 A5* C5* D5*IPX-JP4K-MLS-Dec Decoder 4096x2160 NA Math.Lossless 40G5/100G5 360 - C5 A3 D3 E9 C3* A3 A5* C5* D5*
IPX-JPUHD-4K-Enc Encoder 4096x2160 60p 2Gbps - - - AVAILABLE2013 - - - - -IPX-JPUHD-4K-Dec Decoder 4096x2160 60p 2Gbps - - - AVAILABLE2013 - - - - -IPX-JPUHD-8K-Enc Encoder 8192x4320 60p 8Gbps - - - AVAILABLE2013 - - - - -IPX-JPUHD-8K-Dec Decoder 8192x4320 60p 8Gbps - - - AVAILABLE2013 - - - - -
* EstimationlimitedtodeviceavailabilityintheAlteraQuartustool(August-2012). SpeedgradeisC4intheArriaVfamily
