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1 Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics Kirk T. Lowe and Rao V. Arimilli Mechanical, Aerospace, and Biomedical Engineering University of Tennessee - Knoxville October 9, 2008 Presented at the COMSOL Conference 2008 Boston

Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Page 1: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

1

Application of Solution Mapping to Reduce Computational Time

in Actively Cooled Power Electronics

Kirk T. Lowe and Rao V. Arimilli

Mechanical, Aerospace, and Biomedical EngineeringUniversity of Tennessee - Knoxville

October 9, 2008

Presented at the COMSOL Conference 2008 Boston

Page 2: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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AcknowledgementsProject Sponsored by:

Oak Ridge National LaboratoryWork in support of Direct-Cooled Power Electronics Substrate Project funded by DOE FreedomCar Program

Page 3: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Problem DescriptionTypical packaging has many layersThermal resistance is largeCommercial applications can require a coolant temperature over 100°C Thermal resistance must be reduced

PE ChipSolder

DBC Substrate

Copper Base Plate TIM

Heat Sink

Typical PE Module Package

Page 4: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Proposed Solution

Front View Top View

Flow ChannelChip

Copper

Ceramic Substrate

A

B●

Provision Patent 61/037,129

Page 5: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Proposed Solution (ii)Embeds heat sink into ceramicEliminates TIM, copper base plate, one solder layer, and aluminum heat sinkThermal performance of coolant channel design is modeled to compare to design limitations.

Page 6: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Model SetupFluid Dynamics

Incompressible Navier-StokesContinuity

Heat TransferConduction and Convection

Constant PropertiesSteady State to predict worst-case-scenarioMaximum Temperatures

Fluid – 130°CInterface – 150°C

( )( )[ ]Tuupuu vvvv ∇+∇+Ι−⋅∇=∇⋅ ηρ

0=⋅∇ uv

TkQTuCp

2''' ∇+=∇⋅vvρ

Page 7: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Solution StrategySolve 2-D axisymmetric flow fieldMap solution to 3-D cylinders (Extrusion Coupling Variables)Apply thermal boundary conditionsSolve for temperature distribution

Page 8: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Boundary ConditionsInlet Velocity, ReD,in

Outlet, Pressure, no viscous stress, p0=0Walls, no slipChip Heat Load, 1.78e9 W/m3

Inlet Temperature, 105°CAll other boundaries thermally insulated

Page 9: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Solution MappingUseful for simple flow field in more complex structureSolve 2-D axisymmetric flow fieldMap solution to 3-D cylinder using Extrusion Coupling VariablesTranslate axis as necessarySeparate variables into directional componentsIncorporate into convection heat transferSolve temperature distribution

Page 10: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Solution Mapping (i)

xzy

Page 11: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Solution Mapping (iii)2-D axisymmetric solutionSolved parametrically to desired input velocity or Reynolds number

r,u

z,v

Page 12: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Solution Mapping (iv)

rzzxx ii =−+− 22 )()(

zy =

Page 13: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Solution Mapping (v)

Initial model update uses initialized (coarse) meshMesh refinement is necessary to transfer velocity data to convection regime

Page 14: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Solution Mapping (vi)

Fine mesh better resembles the accuracy of the 2-D solution

Page 15: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Solution Mapping (vii)

Page 16: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Solution Mapping (viii)

xzy

Page 17: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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ResultsHigh thermal conductivity ceramics produce lower maximum interface and fluid temperaturesChip temperatures are within design limitsWorking Fluid is above its boiling point

100

110

120

130

140

150

160

170

180

190

0 20 40 60 80 100 120 140 160 180

Thermal Conductivity, W/m-K

Tem

pera

ture

, o C

Interface Fluid

Maximum Interface and Fluid Temperatures of the Four Ceramic Materials at ReD,in

Page 18: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Results (ii)Increasing inlet ReD, decreases maximum temperaturesPressure drop is smallModel pressure drop coincides well with analytic calculations

105

110

115

120

125

130

135

140

145

150

0 1000 2000 3000 4000 5000 6000 7000

ReD

Tem

pera

ture

, o C

0

2000

4000

6000

8000

10000

12000

14000

Pres

sure

, Pa

Interface Temperature

Fluid Temperature

ΔP COMSOL

ΔP Analytic

Boiling Point

Variations of Maximum Interface and Fluid Temperatures and the Pressure for Ceramic 4

Page 19: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Results (iii)Large core of “cold” fluid at channel exit (41.3%)Diameter at mass manufacturing limitTo improve cooling

Surface enhancement Thermal conductivity enhancement

100

105

110

115

120

125

130

0.0000 0.1000 0.2000 0.3000 0.4000 0.5000 0.6000 0.7000 0.8000 0.9000 1.0000

Position along Diameter

Tem

pera

ture

, o C

Fluid Temperature Along Diameter at Outlet of Hottest Channel in Ceramic 4

Page 20: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Solution Accuracy

120

125

130

135

140

145

0 1000 2000 3000 4000 5000 6000 7000

ReD

Max

imum

Flu

id T

empe

ratu

re ,

o C

COMSOL

Analytic

Comparison of Maximum Fluid Temperature between COMSOL Solutions and Analytical Solution for a Constant Flux Tube

q''= constant

Page 21: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Solution Accuracy (ii)Analytic solution within 5% of simulation for all Reynolds numbersModel results are conservative

Larger maximum temperatures

Analytic solution provides good basis for initial sizing and feasibility

Page 22: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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ConclusionsNew package substrate can enable the use of high temperature coolantsHigh thermal conductivity ceramics are necessary to minimize thermal resistance for this coolant path design An increase in the nominal flow rate is required to meet the design limitationsSolution mapping significantly decreases the amount of time required to solve 3-D convective flowsWork continues to improve flow channel design and thermal conductivity of working fluid

Page 23: Kirk T. Lowe and Rao V. Arimilli - COMSOL Multiphysics · 1. Application of Solution Mapping to Reduce Computational Time in Actively Cooled Power Electronics. Kirk T. Lowe and Rao

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Questions?