KSZ8021RNL_KSZ8031RNL Eval Board Schematic Rev1.1

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B B

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Title

Size Document Number Rev

Date: Sheet of

Revision History 1.1

KSZ8021RNL / KSZ8031RNL Eval Board Revision 1.0

1 4Wednesday, July 28, 2010

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Date: Sheet of




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CONFIDENTIAL & PROPRIETARY

Table of ContentsPAGE 01: Revision History

REVISION HISTORY


PAGE 02: KSZ8021/31RNL Eval Board -- Block DiagramPAGE 03: KSZ8021/31RNL Device / UTP Interface / RMII Port

REVISIONDESCRIPTIONDATE

Initial Customer Release 1.05/8/10

PAGE 04: USB Port for MDC/MDIO Register Access7/28/10 Changed R5 (INTRP pull-up) from NC to 4.7K. 1.1

Deleted R43 and R44 (both re-work resistors are no longer needed).

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D D

C C

B B

A A

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KSZ8021/31RNL Eval Board - Block Diagram 1.1



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KSZ8021RNL / KSZ8031RNL EVAL BOARD - BLOCK DIAGRAM

MagneticsKSZ8021RNL /KSZ8031RNL

10Base-T / 100Base-TXRJ-45 Jack

RMII SignalsTX / RX pairs


R

M

I

I

P

o

r

t

C

o

n

n

e

c

t

o

r

3.3VLDO

1.8V/2.5V VDDIOLDO (option)

5V LDO(option for USB)

Pulse H1102

Port StatusLED Indicator

J

u

m

p

e

r

s

t

o

s

e

l

e

c

t

R

M

I

I

L

o

o

p

b

a

c

k

T

e

s

t

O

p

t

i

o

n

USB Port * 5V DC Power Input * MDC/MDIO PHY Register Access

RMII_5.0V

(input powerfrom RMII Port)

VoltageTranslator

MDC / MDIO

RESET

25/50 MHzSystem Clock option

25 MHz XTAL

25/50 MHzOscillator option

24-pin QFN

50MHz clock input to XI (pin 8)KSZ8021RNL

KSZ8031RNL

Device - RMII Configuration

Power-up default (unmanaged setting)

25MHz crystal / clock input to XI (pin 8)50MHz RMII reference clock output from REF_CLK (pin 16)

NOTE: After power-up, both devices can be programmed via MDC/MDIO bus to either 25MHz or 50MHz clock input mode.

USB_5.0V

(input powerfrom USB Port)

Jumpers

Populate Do Not Populate

R17, R19 R11, C16, C17, Y1

R17, R19R11, C16, C17, Y1

11

2

2

3

3

4

4

5

5

D D

C C

B B

A A

XO

REXT

R

S

T

#

TXP

RXD1

TXMRXP

MDIOMDC

INTRP

RXM

L

E

D

0

TXD1

TXD0

TXEN

TXD1_RMII

TXD0_RMII

TXEN_RMII

CRS_DV_RMII

RXD0_RMII

RXD1_RMII

RXER_RMII

REF_CLK_RMII

RXER

REF_CLK

CRS_DV

RXD0

RXD1

MDC

REF_CLK_RMIIRXER_RMII

CRS_DV_RMII

RXD1_RMIIRXD0_RMII

MDIO

TXD0_RMIITXD1_RMII

TXEN_RMII

SYS_CLK

XI

CRS_DV_RMII TXEN_RMII

TXD1_RMII

TXD0_RMIIRXD0_RMII

RXD1_RMII

MDC

MDIO

SYS_CLK_BTB

SYS_CLK SYS_CLK_BTB

CRS_DVREF_CLKRXER

TXEN

TXD1TXD0

RXD0

INTRP

TXP

RXP

RXM

TXM

G

N

D

E

N

E

T

_

C

G

N

D

ENET_CGND

TX+CMT

RX-

RX+

CMT

TX+TX-

TX-

RX-

CMR

RX+

CMR

RST#

LED0

RMII_5.0V

VDDIOVDDIO

VDDIOVDDIO

VDDIO

VDDA_3.3

VDD_1.2

1.8V_2.5V3.3V

3.3V

3.3V

VDDA_3.3 VDDIO

3.3V 1.8V_2.5V

5.0V 3.3V

USB_5.0V

RMII_5.0V

MDC (4)MDIO (4)

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KSZ8021/31RNL Device / UTP Interface / RMII Port 1.1



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Place 0402resistors onComponent Side

RMII Port

RMII Loopback Test Option

25/50MHz System Clock net to/from connecting board

System Clock options

Layout SMD footprint

ECS-3953M-250-BN (25MHz 50ppm) ECS-3953M-500-BN (50MHz 50ppm)

Device - RMII Configuration

TXD1 Input

TXD0

RXD1

19

KSZ8021/31RNLPHY RMII Signals

Input

Output

TXD1

REF_CLK

The RMII signal connections betweenKSZ8021/31RNL PHY and external MACare shown in the table to the right.

For RMII mode with 25MHz XTAL inputand 50MHz RMII Reference Clock output, 1. Connect J4 (RMII Port) to board with RMII MAC (e.g. Micrel KSZ8893MQL Eval Board).

2. Program KSZ8021/31RNL for RMII mode with 25MHz XTAL input and 50MHz RMII Reference Clock output.

3. Program other KSZ8021/31RNL configuration settings (ISOLATE, B-CAST_OFF, NWAYEN, SPEED, DUPLEX) to desired settings.

InputTXD0 Output

15

TXER

Output

Output

16

RXD0

CRS_DV

Input

RXD1

REF_CLK

RXER

TX_EN

Pin #

Input

RMII Mode KSZ88x3MAC RMII Signals

13

CRS_DV

Output

Input

20

TypeName

Output

TX_EN

Output

Name

Input

RXD0

12

17

21

Output

Type

Input

STEWARDHI1206N101R-00

Place ferrite bead ground bridge for ENET_CGND toGND (signal ground) return close to GND at inputpower to board.

GND

Align test pointshorizontally inbetween jumpers

1. Close jumpers (J1, J2, J3).

2. Program KSZ8021/31RNL for RMII Back-to-Back mode by setting register 22 (16h) bit [6] to '1'.

Active Low

PHY Hardware Reset

1.8V / 2.5V option for KSZ8021/31RNL VDDIO power.

For Adjustable Voltage Regulator (MIC5207YM5),use following formula to set VOUT.

VOUT = 1.24 X [ 1 + ( Rsel / R1 ) ] Rsel = R2 or R31.8V : close pins 1, 22.5V : close pins 2, 3

Board

[01]LINKLED0 LINK/ACT

LED Mode [00]

GND

Place GND test points evenly across PCB.

GND GNDGND


1.8V_2.5V : close pins 1, 23.3V : close pins 2, 3

RMII_5.0V : close pins 1, 2USB_5.0V : close pins 2, 3

See Table on schematic page 2.

5V DC Input Power Select

1. KSZ8021/31RNL has a Paddle Ground on bottom side of chip. Refer to datasheet for mechanical dimensions.

3. Place components (Y1, C16, C17, C18, R15) close to respective pins of U1.

2. KSZ8021/31RNL provides the 1.2V supply for VDD_1.2 (pin 1). Decouple 1.2V power rail as shown.

Notes:

R7 0R7 0

TP5TP5

J5

RJ-45 Jack

J5

RJ-45 Jack

87654321

T

H

1

T

H

2

JP23X1JP23X1

1

2

3

TP2TP2

+C1

10uF

+C1

10uF

JP1

3X1

JP1

3X1

12

3

C14

0.1uF

C14

0.1uF

+ C12

22uF

+ C12

22uF

R16

NC / 49.9

R16

NC / 49.9

R4

220

R4

220FB1

FBEAD

FB1

FBEAD

1 2

C3

0.1uF

C3

0.1uF

U3MIC39100-3.3WS / SOT-223U3MIC39100-3.3WS / SOT-223

IN1

G

N

D

T

A

B

OUT 3

G

N

D

2

R21

NC / 0

R21

NC / 0

D1

POWER_ON LED

D1

POWER_ON LED

2

1

TP4TP4

Y2

25/50MHz +/-50ppm

Y2

25/50MHz +/-50ppm

VCC4

NC1 GND 2

OUT 3

TP10TP10

C21

1000pF / 2kV

C21

1000pF / 2kV

C2

0.1uF

C2

0.1uF

C230.1uFC230.1uF

TP11TP11

C10

0.1uF

C10

0.1uF

+C24

10uF / TANT A

+C24

10uF / TANT A

+C4

10uF

+C4

10uF

LED1

LEDx1

LED1

LEDx1

1 2

R18

1.0K

R18

1.0K

+ C11

2.2uF

+ C11

2.2uF

J2 JUMPERJ2 JUMPER

R10 49.9R10 49.9

+ C15

22uF

+ C15

22uF

C220.1uFC220.1uF

R5

4.7K

R5

4.7K

U2MIC5207YM5U2MIC5207YM5

VIN1

GND2

EN3

VOUT 5

BYP/ADJ 4

R15

6.49K

R15

6.49K

R11 49.9R11 49.9

R6 0R6 0

JP3

3X1

JP3

3X1

12

3

+C7

47uF / TANT C

+C7

47uF / TANT C

C17

22pF

C17

22pF

R17

NC / 0

R17

NC / 0

R3

1.50K

R3

1.50K

R9 0R9 0

R2

680

R2

680

R13 49.9R13 49.9

J1 JUMPERJ1 JUMPER

FB2

FBEAD

FB2

FBEAD

1 2

D2

BAV16W-7 SOD-123

D2

BAV16W-7 SOD-123

2

1

R25 75R25 75

TP9TP9

J4

Male RMII Connector

J4

Male RMII ConnectorVCC1MDIO2MDC3RXD34RXD25RXD16RXD07RX_DV8RX_CLK9RX_ER10TX_ER11TX_CLK12TX_EN13TXD014TXD115TXD216TXD317COL18CRS19VCC20

VCC 21NC 22NC 23NC 24NC 25NC 26NC 27NC 28NC 29NC 30NC 31NC 32NC 33NC 34NC 35NC 36NC 37NC 38NC 39

VCC 40

C5

470pF

C5

470pF

Y125MHz

Y125MHz

+ C19

10uF

+ C19

10uF

C13

0.1uF

C13

0.1uF

R26

10K

R26

10K

R23 75R23 75

TP3TP3

C16

22pF

C16

22pF

R19

NC / 0

R19

NC / 0

R8 220R8 220

R22 75R22 75

C8

0.1uF

C8

0.1uF

T1Pulse H1102T1Pulse H1102

1

2

3

6

8

7

16

15

14

11

10

9

R24 75R24 75

C18

NC

C18

NC

+C6

47uF/16V TANT C

+C6

47uF/16V TANT C

R1

1.50K

R1

1.50K

TP8TP8

J3 JUMPERJ3 JUMPER

U1KSZ8021RNL / KSZ8031RNLU1KSZ8021RNL / KSZ8031RNL

RXM3RXP4TXM5TXP6

X

O

7

X

I

8

R

E

X

T

9

M

D

I

O

1

0

M

D

C

1

1

R

X

D

1

1

2

VDDIO 14CRS_DV 15

RXD0 13

RXER 17INTRP 18

REF_CLK 16

T

X

E

N

1

9

T

X

D

0

2

0

T

X

D

1

2

1

L

E

D

0

2

3

R

S

T

#

2

4

VDDA_3.32

P

_

G

N

D

2

5

G

N

D

2

2

VDD_1.21

S1

SW PUSHBUTTON

S1

SW PUSHBUTTON

1 23 4

C20

10nF

C20

10nF

R12 49.9R12 49.9

R20

NC / 49.9

R20

NC / 49.9

R14 49.9R14 49.9

C9

0.1uF

C9

0.1uF

TP1TP1

11

2

2

3

3

4

4

5

5

D D

C C

B B

A A

XTOUT

XTIN

RSTOUT#3V3OUTUSBDPUSBDM

MDC_USB

MDIO_USB

USB_CGND

RSTOUT#

USBDMUSBDP MDIO

MDC

MDIO_USB

MDC_USB

MDC_PHY

MDIO_PHY

RESET#_USB

MDC_PHY

MDIO_PHY

3.3V 3.3V_USB

3.3V_USB

3.3V_USB

3.3V_USB

3.3V_USB

VDDIO

3.3V_USB

USB_5.0V

5V_USB

5V_USB

5V_USB

USB_5.0V

5.0V 5V_Reg

5V_Reg

MDIO (3)

MDC (3)

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Date: Sheet of

USB Port for MDC/MDIO Register Access 1.1



Title


Date: Sheet of




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VSSOP-DCU

USB Configuration

U5 - FTDI FT2232DDecouple Pins (14, 31)



U5 - FTDI FT2232DDecouple Pins (3, 42)

* Multi-Protocol Synchronous Serial Engine (MPSSE) Mode


MDC / MDIO Voltage Translator

USB_5.0V (USB Port Powered)

* close JP4 pins 1, 2 * close JP5 pins 2, 3

RMII_5.0V (RMII Port Powered)

* close JP4 pins 2, 3 * close JP5 pins 1, 2

MIC5207-5.0YM5 has very low dropout voltage (typically 165mV @ 150mA).

FTDI FT2232D can operate down to +4.35V forits 5V input power (5V_USB).


* close JP6, JP7USB Port - MDC / MDIO Access

* open JP6, JP7RMII Port - MDC / MDIO Access

R40 27 0805R40 27 0805

C34

470pF

C34

470pF

+C28

10uF / TANT A

+C28

10uF / TANT A

JP7JP7

1 2

FB4

FBEAD

FB4

FBEAD

1 2

C32

0.1uF

C32

0.1uF

R29

4.7K

R29

4.7K

U4MIC5207-5.0YM5U4MIC5207-5.0YM5

VIN1

GND2

EN3

VOUT 5

BYP/ADJ 4

C27

0.1uF

C27

0.1uF

R36

10K

R36

10K

R30

1K

R30

1K

JP5

3X1

JP5

3X1

12

3

FB6

FBEAD

FB6

FBEAD

1 2

C37

0.1uF

C37

0.1uF

R38

10K

R38

10K

C40

10nF

C40

10nF

R27

200K

R27

200K

C29

0.1uF

C29

0.1uF

R39 1.5KR39 1.5K

C33

0.1uF

C33

0.1uF

FB5

FBEAD

FB5

FBEAD

1

2

R35

10K

R35

10K

R33 470R33 470

C39

33nF

C39

33nF

R42 0R42 0

C35 27pFC35 27pF

U6FTDI FT2232DU6FTDI FT2232D

E

E

C

S

4

8

EEDATA2

USBDM8GND9NOT_USED10GPIOH311GPIOH212

V

C

C

I

O

A

1

4

G

P

I

O

H

0

1

5

G

P

I

O

L

3

1

6

G

N

D

1

8

G

P

I

O

L

1

1

9

G

P

I

O

L

0

2

0

T

M

S

/

C

S

2

1

T

D

O

/

D

1

2

2

T

D

I

/

D

0

2

3

GND 25

NC 27NC 28NC 29

NC 32NC 33

GND 34NC 35NC 36

N

C

3

8

N

C

3

9

N

C

4

0

P

W

R

E

N

#

4

1

V

C

C

4

2

X

T

I

N

4

3

T

E

S

T

4

7

USBDP7

NOT_USED 26

T

C

K

/

S

K

2

4

G

P

I

O

L

2

1

7

G

P

I

O

H

1

1

3

3V3OUT6RSTOUT#5RESET#4VCC3

NC 30VCCIOB 31

N

C

3

7

X

T

O

U

T

4

4

A

G

N

D

4

5

A

V

C

C

4

6

EESK1

R32

4.7K

R32

4.7K

R37

10K

R37

10K

C30

0.1uF

C30

0.1uF

Y3

6MHz

Y3

6MHzC36 27pFC36 27pF

FB3

FBEAD

FB3

FBEAD

1 2

U5TI PCA9306U5TI PCA9306

GND1

VREF12

SCL13

SDA2 5SDA14

SCL2 6

VREF2 7

EN 8

C25

1.0uF

C25

1.0uF

R28

4.7K

R28

4.7K

+C26

10uF / TANT A

+C26

10uF / TANT A

JP6JP61 2

R34

4.7K

R34

4.7K

R31

4.7K

R31

4.7K

JP4

3X1

JP4

3X1

12

3

+C31

10uF / TANT A

+C31

10uF / TANT A

R41 27 0805R41 27 0805

CN1CN-USBCN1CN-USB

1234

5 6

C38

0.1uF

C38

0.1uF

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KSZ8021RNL_KSZ8031RNL Eval Board Schematic Rev1.1