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Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24

Lecture 24: Single stage amplifiers

Prof J. S. Smith

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Context

In today’s lecture, we will discuss general amplifier topology, and how to use transistors to make single stage amplifiers of various kinds

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Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Reading

For about a a week after spring break, we continuing in chapter 8 in the text, single stage amplifiers

There is no homework assignment over spring break.

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Lecture Outline

Review: Small Signal AnalysisTwo Port Circuits

– Voltage Amplifiers– Current Amplifiers– Transconductance Amps– Transresistance Amps

Example: MOS Amp Again!

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Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Small Signal Analysis

Step 1: Find DC operating point. Calculate (estimate) the DC voltages and currents (ignore small signals sources)

Substitute the small-signal model of the MOSFET/BJT/Diode and the small-signal models of the other circuit elements.

Solve for desired parameters (gain, input impedance, …)

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Amplifier TerminologySources: Signal, its source resistance, and bias voltage or currentLoad: Use resistor in Chap. 8, but could be a general impedancePort: A pair of terminals across which a voltage and an associated current are defined

Source, Load: “one port”Amplifier: “two port”

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Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

One-Port Models (EECS 40)A terminal pair across which a voltage and associated current are defined

CircuitBlockabv

+

−

abi

thevv

thevR

abv+

−

abi

thevithevRabv+

−

abi

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Small-Signal Two-Port Models

We assume that input port is linear and most of the time, that the amplifier is unilateral:

– Output depends on input but input is independent of output.

Output port: depends linearly on the current and voltage at the input and output ports Unilateral assumption is good as long as “overlap”capacitance is small (MOS)

inv+

−outv+

−

outiini

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Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Math 54 Perspective

Can write linear system of equations for either iout or voutin terms of two of iin, vin, iout, or vout: possibilities are

1 2out in outi v vα α= +

3 4out in outi i vα α= +

5 6out in outv v iα α= +

7 8out in outv i iα α= +

What is physical meaning of α1? of α6?

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

EE PerspectiveFour amplifier types: determined by the output signal and the input signal … both of which we select (usually obvious)

– Voltage Amp (V V)– Current Amp (I I)– Transconductance Amp (V I)– Transresistance Amp (I V)

We need methods to find the 6 α parameters for the four models and equivalent circuits for unilateral two ports

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Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Two-Port Small-Signal Amplifiers

si sR inR outR LRi inAi

ini

sv

sR

inR

outR

LRv inA vinv+

−

Current Amplifier

Voltage Amplifier

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Two-Port Small-Signal Amplifiers

sv

sR

inRoutR LRm inG v

inv+

−

si sR inR

outR

LRm inR i

ini

Transresistance Amplifier

Transconductance Amplifier

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Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Measuring the small signal parameters

The meaning of the small signal parameters can be made more clear by setting up measurements of them.For a single port model, we just need to set the voltage, and measure the currents, or set the curent, and measure the voltage and we will get a linear relationship

or But for a two port model, we need to decide what to

hold constant, what to vary, and what to measure

RIV = RVI /=

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Input Resistance Rin

Looks like a Thevenin resistance measurement, but note that theoutput port has the load resistance attached (for a unilateral device,The output resistance has no effect.)

attachedRremovedRt

tin

LSi

vR,

=

OR

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Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Output Resistance Rout

Looks like a Thevenin resistance measurement, but note that theinput port has the source resistance attached, (for a unilateral device the input resistance won’t have an effect)

attachedRremovedRt

tout

SLi

vR,

=

OR

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Finding the Voltage Gain Av

Key idea: the output port is open-circuited and the source resistance is shorted

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Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Measuring Av

By setting

By setting

sv

sR

inR

outR

LRv inA vinv+

−

Voltage Amplifier

sins vvR =⇒= ,0

svoutL vAvR =⇒∞= ,

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Finding the Current Gain Ai

Key idea: the output port is shorted and the sourceresistance is removed

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Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Finding the Transresistance Rm

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Finding the Transconductance Gm

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Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Common-Source Amplifier (again)

How to isolate DC level?

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

DC Bias

Neglect all AC signals

5 V

2.5 V

Choose IBIAS, W/L

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Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Load-Line Analysis to find Q

Q

D

DD outR

D

V VIR−

=

110k

slope =

0V10kDI =

5V10kDI =

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Small-Signal Analysis

inR = ∞

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Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

sv

sR

inRoutR LRm inG v

inv+

−

Two-Port Parameters:

Find Rin, Rout, Gm

inR = ∞

m mG g= ||out o DR r R=

Generic Transconductance Amp

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Two-Port CS Model

Reattach source and load one-ports:

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Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Common-Source Amplifier

Isolate DC level

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Maximize Gain of CS Amp

Increase the gm (more current)Increase RD (free? Don’t need to dissipate extra power)Limit: Must keep the device in saturation

For a fixed current, the load resistor can only be chosen so largeTo have good swing we’d also like to avoid getting to close to saturation

||v m D oA g R r= −

,DS DD D D DS satV V I R V= − >

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Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Current Source Supply

Solution: Use a current source!Current independent of voltage for ideal source

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

CS Amp with Current Source Supply

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Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Load Line for DC Biasing

Both the I-source and the transistor are idealized for DC bias analysis

Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

Two-Port Parameters

From currentsource supply

inR = ∞

||out o ocR r r=

m mG g=

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Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 24 Prof. J. S. Smith

P-Channel CS Amplifier

DC bias: VSG = VDD – VBIAS sets drain current –IDp = ISUP