Lecture on Integrated Circuits (ICs)

History• 19th Century - Solid-State Rectifiers

• 1907 - Application of Crystal Detector in Radio Sets

• 1947 - BJT Constructed by Bardeen and Brattain

• 1959 – Integrated Circuit Constructed by Kilby

• Complexity grows by Moore’s Law

In 1965, Gordon Moore predicted that the number of transistors that can be integrated on a die would double every 18 to 14 months .

Moore’s Law in Microprocessors

40048008

80808085 8086

286386

486Pentium® proc

P6

0.001

0.01

0.1

1

10

100

1000

1970 1980 1990 2000 2010

Tra

nsi

stor

s (M

T)

2X growth in 1.96 years!

64

256

1,000

4,000

16,000

64,000

256,000

1,000,000

4,000,000

16,000,000

64,000,000

10

100

1000

10000

100000

1000000

10000000

100000000

1980 1983 1986 1989 1992 1995 1998 2001 2004 2007 2010

Year

Kbit

capa

city

/chi

p

DRAM Chip Capacity

1.6-2.4 m

1.0-1.2 m

0.7-0.8 m

0.5-0.6 m

0.35-0.4 m

0.18-0.25 m

0.13 m

0.1 m

0.07 m

human memory

encyclopedia

book

page

4X growth every 3 years!

Resolution of Features of ICs

2.0

1.0

0.5

0.1

0.25

Chip technology described by the dimensions of line width and typical transistor size. Today, the chip resolution is around 50 nano meters, or 0.05 micron.

IC Design and Manufacturing Process

• Process Auto Process Auto • Lithography Lithography • Etch/Doping Etch/Doping • Diffusion Diffusion • Deposition Deposition

Back-End ManufacturingBack-End Manufacturing Front-End Manufacturing Front-End Manufacturing

Circuit Design Circuit Design by Toolsby Tools

Mask DesignMask Design

• Bonding Bonding • Packaging Packaging • Test equipment Test equipment

Intellectual Intellectual PropertiesProperties

WafersWafersPackagesPackages

IC Design Tasks

Physical ImplementationPhysical Implementation

Design PlanningDesign Planning

ExtractionExtraction

Physical VerificationPhysical Verification

Mask Synthesis / OPCMask Synthesis / OPC

Lan

guag

esL

angu

ages

Ass

erti

ons

and

Tes

tben

ches

Ass

erti

ons

and

Tes

tben

ches

VerificationVerification

Architecture DesignArchitecture Design

Mixed Signal / AnalogMixed Signal / AnalogV

erif

icat

ion

IP

Ver

ific

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n I

P

Des

ign

Dat

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Tim

ing

and

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nal

In

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Tim

ing

and

Sig

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In

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ity T

est

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Pow

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ower

Ph

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ical SynthesisSynthesis

IPIP

Silicon Crystal – Better than Gold

• Quartz, or Silica, consists of Silicon Dioxide• Sand contains many tiny grains of quartz• Silicon can be artificially produced by combining

silica and carbon in electric furnace• Practical integrated circuits can only be fabricated

from single-crystal material

Crystal Growth

• Solid seed crystal is rotated and slowly extracted from a pool of molten Si

• Requires careful control to give crystals desired purity and dimensions

Ingot

Getting Wafers from Ingot• Sliced by diamond-tipped saw into thin wafers

• Etch wafers in chemical to remove any unwanted

• Smooth surface

Photolithography

Photolithography is a technique that is used to define the shape of micro-machined structures on a wafer.

Lithography Machine

• Make “mask” defining electrical circuitry.• Coat wafer with “photoresist” (sensitive to UV light) where the mask is not present.

UV light

reduction lens

Wafer

Start

Stop

• Thick ( 1µm) oxides are used as insulation

Oxidation of Silicon (SiO2)

• Etching: Process where unwanted areas of films are removed by either dissolving them in a wet chemical solution. Wanted areas are protected by resist.

• Doping: Process where certain material is implanted into substrate.

Clean Room• First used for surgery room to avoid bacteria

contamination

• Adopted in semiconductor industry in 1950• Smaller device needs higher grade clean room• Less particle, more expensive to build

– Class 10: less than 10 particles with diameter larger than 0.5 m per cubic foot

– Class 1: less than 1 such particles per cubic foot.– 0.18 m device require higher than Class 1 grade clean room.

Effect of Particles

Particle on Mask

Film

Substrate

Cleanroom Structure

Process Area

Equipment Area

Class 1000Equipment Area

Class 1000

Raised Floor with Grid Panels

Return Air

HEPA Filter

Fans

Pump, RF and etc.

Process Tool

Process Tool

Makeup Air Makeup Air

Class 1

Wafer with Circuit Fabricated

Bonding Pad Configurations

Peripheral Bonding Pads

Area Array Bonding Pads

Pads Range from 125 m x 125 m down to 25 m x 25 m

Package Types

Single In Line Package (SIP)

Small Outline Transistor (SOY)

Quad Flat Pack a(DIP)

Zig Zag In Line Package (ZIP)

Dual In Line Package (DIP)

Pin Grid Array (PGA)

Ball Grid Array (BGA)

Ball Grid Array Solder

Gold Wire Bonding

Assembled IC

Ball Grid Array (BGA) Package

Using ICs on Circuit Board

Surface mount

Tombstone

Dead-bug

Via hole mount

Wave Soldering

IC PCB

What’s Next?

Who Work in IC Industry?• Mechanical engineers• Chemical engineers• Electrical engineers• Systems engineers• Civil engineers• Physicists• Chemists• Material Scientists• Mathematicians• Well, lawyers, finance majors, etc. too.

Good Luck and God Bless!!