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MOS Transistors Yannis Tsividis
CMOS Processes
These slides are based on Y. Tsividis and C. McAndrew, “Operation and Modeling of the MOS Transistor”, Copyright © Oxford University Press, 2011. They are meant to be part of a lecture, and may be incomplete or may not even make sense without the accompanying narration.
Based on Tsividis/McAndrew; Copyright © Oxford University Press, 2011 2
STI processes dominant today
CMOS (Complementary MOS) Fabrication processes
Triple-well STI
𝑛+ 𝑛+
poly poly 𝑝+ 𝑝+ STI oxide
𝑛+ 𝑛+
poly poly Oxide
STI (Shallow Trench Isolation) LOCOS (Local Oxidation of Silicon)
𝑛+ 𝑛+
poly poly
Oxide
𝑛+ 𝑛+ 𝑝+ 𝑝+
Oxide poly Oxide poly
𝑝 𝑛
SOI (Silicon on Insulator)
Based on Tsividis/McAndrew; Copyright © Oxford University Press, 2011 3
Top view:
Cross section:
Realistic relative dimensions
Based on Tsividis/McAndrew; Copyright © Oxford University Press, 2011 4
SEM images – Intel 45 nm process
nMOS pMOS
Copyright © 2008 by IEEE; courtesy of Intel Corporation (Auth et al., Proc. 2008 Symp. VLSI Technology, pp. 128-129)