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8/11/2019 Lecture04 Fabrication
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Lecture 4 ECE 425
Lecture 4 -- Fabrication
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Lecture 4 ECE 425
Outline
Fabrication Concepts Description of Process
Design rules
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Making Chips
It all starts with silicon
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Wafers
Ingots get cut into wafers, which are 1-2mm thick, and upto 12 in diameter
Entire wafers are processed, and then cut into chips whendone
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Processing Wafers
Relatively small number of things we can do to wafers Add atoms other than silicon
Ion bombardment Diffusion
Expose oxygen to grow SiO 2 Deposit metal or silicon to form wires Deposit SiO 2
Want to create very small structures, order 0.1 micron in size Cant just steer oxygen/metal/boron to the places we want it
Instead, expose whole wafer, block parts that we dont want to beaffected
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How Do We Do That? -- Photolithography
Photoresists are compounds whose solubility in a particular solvent changes when exposed to light
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Photolithography
Photoresist prevents ion bombardment or etching fromreaching regions of the chip Can then remove excess photoresist and start with
next layer
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Photolithography
Use masks to define the regions that get exposed to lightat each stage Mask set for a chip can exceed $1M to produce
Masks created by electron-beam cutting of materials
(usually)
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Typical Processes
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Other Processes
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Substrate Contacts
Need for both P- and N-FETs
P-FET substrate should be connected to V dd N-FET should connect to ground (V ss ) Get this backward, and youll turn on substrate-drain or
substrate-source junctions and fry the chip
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Vias
Each type of structure (wire, poly, gate, etc.) is typicallyconstructed as a separate layer of material Insulating glass deposited between layers
A via is a connection that punches through the glass to
electrically connect components on two layers Some processes allow stacked vias, others dont
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Design Rules
Fabrication processes have limits about how close parts of a circuitcan be together, minimum size of wires, transistors, etc. Driven by equipment precision, alignment between steps
Define Design Rules that tell the designer what is allowed by theprocess
Significant tradeoffs involved in creating design rules for a process Conservative rules give high yield Aggressive rules can improve performance, density
Design rules specified in either microns (process-specific) or !(process-independent) ! is defined as 1/2 the minimum dimension of a fabricated
structure Using ! -based rules can allow designs to be fabricated in multipleprocesses, at the cost of being conservative
This approach is also becoming less effective in deep-submicron processes
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Design Rules
Are not a guarantee of functionality Designs that follow the rules will still have chips that dont
work Designs that break the rules may still get chips that work
Chip designers sometimes negotiate exceptions to therules to improve performance at the cost of yield However, following the design rules maximizes the
chance that chips will work, and yield when you fabricatemany copies of a chip
For this class, well treat design rules as absolutes thatmust be obeyed
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Putting it all Together -- NAND Gate Layout
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N-Diffusion Mask
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P-Diffusion Mask
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Metal and Contacts
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The Full Gate
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Wrapping Up
Reading: 3.1-3.3 in your book, remainder of Chapter 3 if youre interested in more detail about modern fabrication
Next time: Layout of gates