Microelectronic Circuits

Common drain amplifier

C D AMPLIFIER---source follower

Small signal model

Active load

Rout---small

Gain by Thevenin equivalent

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Full implementation

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Gain from small signal model

Rs= ro here

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Av variation

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Level shifter

Vout dc= Vindc-Vgs

Vgs can be adjusted for a given Ibias by adjusting w/L

Used in push pull amplifier for shifting dc bias

How much shift?

Ex1-level shifter

Pmos requires high Vg, nmos requires low Vg

Vgs for both transistors are not optimized here.

vin

vin

Level shifter circuit

vin

Swing requirement

Ex2-level shifter

Charac. Of source follower

� Rin--high

� Rout--low

� Av ≈1

� It reduces Vswing of previous stage

� Non linearity due to gmb

Vmin at x node of successor

↓

constraint

Comparison of gain with CSA

= ½ →1 If gm1 large

= 1

50% signal loss--Not an efficient drivers for small load

Application Of Source Follower

� Voltage buffer--Bad driver as reduces signal

by half for small RL

� Level shifter--useful

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PMOS level shifter---shift up

C G AMPLIFIER

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Small signal model

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Input impedance Rin

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Rin for ideal cs load---infinite

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Rout

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Transconductance Gm

� Gm= gm+go+gmb

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Voltage gain

� Av= (gm+gmb) Rout

� No phase shift

Transconductance amplifier

Current amplifier

2 STAGE AMPLIFIER

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Cascode amplifier

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Cascode load

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Small signal model

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Cd-Cg cascade

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Voltage swing

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Ex– analysis using the equivalent

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Trans impedance

Analysis in stages

Gain calculation in stages

� Vout/ vin= [vout /vo1] [vo1/ vin]

� = [gm2 (ro2||RL)] [ gm1 [(1/gm2)||ro1)]]

Or

� Vout/ vin= [vout /vo1] [vo1/ vin]

� = [ [gm2 / (1+ gm2 (ro1||Rd1) ] X ( gm2 ro2 (ro1||Rd1)) || RL] ]

X [ gm1 (ro1||Rd1)]GM2

Rout2

Vo1/vin

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To compute overall gain using Norton equivalent

↓gm vin ro

i1

Input to second stage is current i1--So, draw first stage as Norton equivalent--Compute i1 by taking Rin2 loading into account--comput vout by taking i1 as input--vout = i1 Rd2--i1 = [Ro1/ (Ro1+ Rin2) ] (gm vin)Loading effect is considered only once

↑i1

Rin2= 1/gm2Rout1

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v1

↑i1

=

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Voltage gain using thevenin eq.

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Analysis in stages

Thevenin equivalent of first stage

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Thevenin equivalent

vo1

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V1 signal computation

Rin2

v1= ro1

v1 ≠ vin eqSignal loss takes place

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Circuit for Gm computation-2nd stage

This circuit can be used for Gm (= io/v1) calculation

Req will have no effect on Gm value

v1

v1short

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v1

This circuit can not be used for Rout computation

Reason----actual input is current signal

Analysis becomes clear when we use Nortons

equivalent circuit

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So Circuit for Rout computation- 2nd stage

v1short

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Comparison of cascode and CSA

� SAME VOLTAGE SWING, POWER

DISSIPATION

� CSA----- Av = [gm/2 ro ]---doubles

� CASCODE---- Av = (gmro)(gmro)

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Applications

� High gain amplifier

� High bandwidth

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Shielding property

� Negative feedback

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Current source load

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Double Cascode

� Voltage swing severely affected

CSA, CASCODE-- SAME GAIN

Differential amplifier

How ?

Differential input���� no cap reqd.

Comparison with csa –same power dissipation

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Differential amplifier— extra benefit

Extra node available

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Extra benefit ---input signal Noise cancellation

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CSA-CSA coupled at source

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CSA with Rs

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CD-CG cascade

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Characteristics—diff mode

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Characteristics—diff mode

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Lecture-5

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Transit Frequency

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MOS capacitances

� Cgs

� Cgd

� Cgb

� Csb

� Cdb

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MOS unity gain frequency wT

wT = (gm-sCgd) /[s (Cgs+Cgd)]

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Transit frequency

Wt=Wz

Wz Wt

I

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MOS unity gain frequency wT

� Limits for MOSFETs:

� Metric –C.S short-circuit current gain unit pt:

� wT = (gm-SCgd)/[s(Cgs+Cgd)]

� wT is approximately = gm/Cgs

� = 3 un(VGS -VT)/2L2

Where gm = (W/L) unCox(VGS -VT) and

Cgs = (2/3)WLCox

� so wT≈ 3 µn(VGS -VT)/2L2

� Design lessons –

� bias at large ID

� minimize L (w in as L2) , λ (= 1/L)increases, ROUT dec.

� use n-channel over p-channel , NOISE increases

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UNITY GAIN FREQUENCY

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BJT circuits