LECTURER LAB ASSISTANTS · • Design of basic linear and non-linear analog circuits including amplifiers, filters, oscillators, comparators, timers, pulse generators, and detectors

EE-595 Capstone Design Project Spring 2010

Syllabus

Page 1 J. Kautzer

LECTURER

LC 401, THURS 6:30-8:30PM, E225 Mr. Jeffrey A. Kautzer Office: EMS-E222 Phone: 229-5189 Hrs: Tues 7:00-8:00PM, Thur 8:30-9:30PM, (Alternate Wed 7-8PM) Email: [email protected] http://www.uwm.edu/~kautzer/

LAB ASSISTANTS

SEC-802, TUE 6:30-10:00PM, E203 SEC-801 WED 6:30-10:00PM, E203 Mr. Santhosh Yegnaraman Mr. Mones Omari Office: EMS-W210 or E203 Office: EMS-W210 or E203 Phone: 229-5174 Phone: 229-5174 Hrs: TBD Hrs: Thurs: 4:00-6:00PM Email: [email protected] Email: [email protected]

DESCRIPTION

Course Description: Capstone Design Project . 4 Credits U/G. Lecture/Laboratory. Team based design using real-world industrial constraints of an electronic based product including requirements capture, detailed design, prototyping, verification, safety, manufacturing, reliability, and sustainability. Major deliverables include oral presentation, project report and prototype.

TEXT BOOKS

Required This course will rely on the main texts as currently used in EE-330 and EE-335.

� 1. Electronics: Project Management & Design by Stadtmiller, 2nd Edition, Prentice Hall, ISBN 0-13-111136-1

(Earlier 1st Edition may also be used)

� 2. Electronics by Hambley, 2nd Edition, Prentice Hall, ISBN 0-13-691982-0

� 3. Schematic Capture With Cadence Pspice by Marc E. Herniter, 2nd Edition, Prentice Hall Inc, ISBN 0-13-

048400-8 (Earlier Edition may also be used)

� 4. Strategies for Engineering Communications by Stevenson, 1st Edition, Wiley, ISBN 0-471-12817-1

In addition, the following text is a manual of design theory and examples written and published specifically for the EE-595 (previously EE-355) course and is available for downloading from the class website. Recommended that students print out and retain relevant sections for use during the course and exams.

� 5. EE-355 Electronic Design Laboratory - Handbook of Design by Kautzer, ISBN 0-900-00701-B


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Reference

Finally, an optional helpful reference text, which is an expansion of text #1 above, chapters 9-11;

� Printed Circuit Assembly Design by Marks and Caterina, 1st Edition McGraw Hill, ISBN 0-07-014107-7

PREREQUISITE COURSES

� Senior Standing � ElecEng 335(P) or 332(P) � ElecEng 367(P)

Prerequisites by Topic

Students are expected to have skills in the following areas as a result of senior standing and prerequisite courses. • Design of basic linear and non-linear analog circuits including amplifiers, filters, oscillators, comparators, timers, pulse generators, and detectors • Design of basic linear power conversion circuits including basic transformer voltage conversion, passive ripple filtration and linear regulation • Design of basic digital logic circuits including multi-input/output combinatorial circuits and multi-input/output sequential state circuits • Design of basic microprocessor based circuits including interface of memory and I/O devices • Basic time domain and frequency domain simulation analysis utilizing Pspice • Prototyping (bread boarding) of simple analog and digital circuits • Verification of circuit functionality utilizing standard test equipment including DMM, DSO, logic analyzer, waveform generator, and frequency counter

COURSE OBJECTIVES

a) To provide students with the ability to design and analyze modern electronic circuits, systems and products for industry mass production.

b) To provide students with the ability to perform while on a project team with multiple complex design elements and tasks.

c) To provide students with the ability to document and communicate their design in both written and verbal forms.

d) To provide students with the ability to optimize and impact their designs with considerations for cost tradeoffs, safety, environmental, compliance, intellectual property, ethics, global and societal environment.

e) To provide students with the ability to formulate high level requirements, flowdown requirements to design element level, estimate resources and develop project plan, and track project execution.


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LEARNING OUTCOMES

1. Students will gain familiarity working in an industry engineering team environment including

requirement formulation and flowdown, project planning, constraints, interface specification, and prototype integration

2. Students will learn introductory project management estimating their team resources, project tasks and generating a basic project plan

3. Students will gain experience in preparing and giving technical multi-contributor presentations including integration of their contribution to the team project

4. Students will gain experience in authoring a multi-contributor technical report including documenting and integrating their design contribution

5. Students will gain ability to design and analyze analog and digital circuits for mass production using worst case performance including error voltages, bandwidth, interface compatibility and timing validations as specified in commercial environments

6. Students will be able to assimilate industry device data sheets, find relevant parameters for typical versus worst case operation over an operating environment

7. Students will learn to perform basic cost modeling of designs and perform component package-manufacturing cost and process tradeoffs

8. Students will understand the basics of surface mount and thru hole electronic assembly processes and industry standard electronic assembly quality standards

9. Students will understand the basic elements of a multilayer printed wiring board and ECAD design

10. Students will learn introductory reliability modeling, estimation and stress testing strategies 11. Students will learn about basic product safety and regulatory standards including

electromagnetic compliance, testing labs, US government agencies and global standards bodies 12. Students will learn about ramifications of designing products for a global market including

commercial power and environmental differences

TOPICS COVERED

• Basic Business Organization, Annual Cycles, Financial Flow, Costs and Contribution Margins • Business Cases for Product Development Justification • Product Development Processes, Life Cycles, Requirements, Verification and Validation • Requirement Allocation, Association and Flowdown • Safety Standards, Testing Labs and Regulatory Bodies • Electromagnetic Compliance and Global Power Standards • Review of Statistics and 6 Sigma Quality • Reliability distributions, predictions methods, growth strategies and product warranties • Task Estimating, Project Planning and Management • Prototyping Methods • Basic Thru Hold and Surface Mount Electronic Component Packaging • Printed Circuit Fabrication, Surface Mount and Thru Hole Electronic Assembly Processes • Printed Circuit Board Testing Strategies, IPC Electronic Assembly Quality Standards • Analog Circuit Design for Mass Production, Worst Case Analysis and Component Data Sheets • Mixed Signal Circuits, Analog to Digital Conversion Architectures and Component Data Sheets • Digital Circuit Design for Mass Production, Families, I/O Structures, and Worst Case Analysis • Sequential Logic Timing Analysis, Bus Cycles, Meta-stability, PLD Architectures • Obsolescence, Life Cycles and Sustainability of Electronic Designs • Technical Reports, Presentations and Communication


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EE-595 D2L SITE

D2L will be used for ALL course materials. Most of the semester course materials are available at this site at the

start of the semester. However, lab assignment files and lecture note files are subject to update prior to lecture or assignment date.

https://uwm.courses.wisconsin.edu/

D2L Document Types

Lecture: Lecture file in .pdf format

Lab: Lab assignment file in .pdf format

Supplement: Supplemental Information File in multiple formats

Worksheet: Excel worksheet file associated with a Lab assignment In addition to the above identification there are some other files in non-Lab modules including equipment manuals, course syllabus, exam reviews, presentation guides, etc.

LECTURE NOTE DISTRIBUTION Lab assignments and lecture note copies will be distributed in lecture. Lecture notes will be distributed in a 4:1 or 6:1 arrangement to conserve paper.

�� If any slide is not readable in the weekly handouts provided, it is student responsibility

to obtain or print a separate1:1 legible copy. All lecture materials are available for

download from D2L.

COMPONENT INFORMATION

At the following Internet sites, there are listings and links to many semiconductor manufacturers and related electronic suppliers. These sites are maintained by semiconductor or electronic industry consortiums or by other private companies.

http://ee.cleversoul.com/hotsheet.html

http://www.datasheetlocator.com/

http://www.questlink.com


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E203 LAB and EQUIPMENT

Student Accessibility (SAC) Needs

If you will need special accommodations as recognized by the UWM SAC policy in order to meet any of the requirements of this course, please contact the course lecturer or department administration as soon as possible at the semester start.

Computers

E203 is equipped with computer workstations each with flat panel displays. Students will utilize these PCs for much of the lab development work. Each PC should have the following tools

• MS Office tools including Powerpoint, Word, Excel

• Adobe Acrobat Reader

• MS Internet Explorer and Access

• Cadence eCAD package including schematic capture and Pspice simulation

• Lattice isp Lever PLD Development

• Altera Quartus VHDL Development SW

• Linear Tech LTSpice Free Schematic Capture and Analog Simulator

• Microchip MPLAB PIC Microprocessor Development Tools

• Express PCB Free Printed Circuit Board Layout Tools

Bench Station Test Equipment and Resources

Each lab station is intended to accommodate 2-3 students. Students should be supervised by appropriate personnel at all times when working with voltages above 60V and currents above 10A in E203. E203 is equipped with 6 complete stations of the following UL Listed equipment.

• Agilent DSO6032A, Dual Analog CH, 16 Dig CH, 300 Mhz DSO w/2 probes (in cabinet) These scopes offer waveform capture via USB to PC for inclusion in a report documentation

• Agilent 34401A, 61/2 Digit Digital Multi-meter,

• Agilent 33120A or 33220A, Waveform Generator with AM and FM Generation and 20 Mhz Output

• Elenco Dual Variable Regulated DC power supply, XP-650 & XP760 Models (1 at each bench)

• Variable Heat Soldering Station

• ESD (Blue) Mat and Protection Gnd Strap Connection Points All equipment user manuals are available on the course D2L site. User manuals are also to be kept on the cart behind the room door of E203. Please return them after usage.


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All Analog Scope and DSO probes, BNC-BNC cables, BNC-Clip cables, Banana Jack Wires, and Alligator Clips are kept locked in metal course cabinet and must be supplied by the Lab Assistant. It is YOUR RESPONSIBILITY to be sure that your test equipment is always functioning properly during experimentation and design. If you discover or suspect a faulty instrument, notify the Lab Assistant or the Instructor. The more familiar you become with the above test apparatus, the more successful you will become at achieving proper functionality.

Other Individual Test Equipment and Resources

The E203 bench stations are augmented with the following additional equipment, which can be utilized at

any point during lab with the consent of the TA.

• Agilent 54642A 500Mhz Dual Channel Digital Storage Oscilloscopes

• Agilent 54622A 100 Mhz Dual Channel DSO with waveform capture on 3.5” floppy

• HP16500A main frame 64 channel logic analyzer and 1 Ghz DSO system with top mounted printer on cart

• BP Microsystems PLD, EPROM and MICROCONTROLLER programmer (kept in storage)

• BK Precision 889A LCR/ESR (Inductance, Capacitance, Resistance Meter)

• Agilent E4430B 1 Ghz Waveform Generator

• Tektronix Type 576 Transistor-Diode Performance Curve Tracer

• 120 VAC power with 20 AMP circuit breaker protection on corner panel Backup Scopes from W219:

• Tektronix TDS350, 1 GSPS dual trace DSO w/2 probes (all probes are locked in cabinet)

• Hitachi, V-660, 60 Mhz dual trace analog oscilloscope with NTSC TV-V and TV-H triggering Backup DMM:

• Tenma 74-4020 including capacitance meter and frequency counter


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SAFETY

Supervision

Students should be supervised by appropriate personnel at all times when working with voltages above 60V or current levels above 10A in E203. Supervision should also be maintained if students are utilizing any equipment that is NOT part of the standard equipment list or is not UL listed or recognized. Students may utilize their own test equipment such as DMMs however they do so at their own risk to the equipment with no liability to CEAS.

ESD – Electro Static Discharge

E203 is now equipped with ESD protection systems on the lab bench tops. However, E203 is NOT equipped with any special humidity control system. Students are encouraged to utilize conductive foam/foil, static bag or tube storage devices to transport and hold sensitive devices and to keep all prototype work on the blue ESD anti-static pads. Avoid use of styrene or other static generating plastics to hold components that contain active devices. In addition, students should investigate the ESD protection levels of all components utilized within a design. If components with ESD level less than 1500V are utilized, special care may need to be taken depending on time of year and ambient humidity.

Power

The AC power sources in E203 are NOT equipped with any type of GFCI (Ground Fault Circuit Interruption) protection systems on the AC power receptacles. However, all wood bench receptacles are fully grounded and current limited via switching 20 AMP circuit breakers at the corner panel. Each lab station is numbered and its corresponding breaker set also numbered. CAUTION: These breakers have a switching time that exceeds several cycles of 60 Hz line. 50 Hz power is generally NOT available.

Eye Protection ��

Safety glasses SHALL BE WORN when performing the following activities both in E203 as well as outside of class. All of these activities are restricted to the bench tops and should not be performed on the class table’s surfaces or near any of the PCs.

� Soldering, Drilling, Sawing, Sanding, Gluing and Filing � Using of heat gun or other heat sources for tubing shrinkage or other assembly � When trimming leads of wires particularly on soldered connections � When using any type of power tools or performing any mechanical action resulting in airborne materials

Food and Drink Restrictions in E203

Food should NOT be placed on any of the equipment lab bench surfaces under any circumstances. Any food is restricted to the front class table in E203 and only upon lab assistant approval. The ESD bench tops are used for soldering and other activities that could possibly allow the contact and accumulation of lead (Pb). Students should always wash hands following any activities in which contact with lead based solders or components has occurred. Under no circumstances shall students leave food or drink containers or other trash in E203 after departing.


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EE-595 PROJECT TEAMS

During the first lab session, each student will be assigned to a capstone design team. Your ability to work both individually and with your design team is a critical part of a successful project and is a factor in your project grade as well as your lab performance grade.

� Project team members will grade each other’s contribution, 0 – 100%, on a relative scale.

� Each lab section is usually enrollment limited to 10 students that comprise at most 2 capstone project teams of 3-6 students each. Exceptions will be made if enrollment dictates.

� Members of each team shall belong to the same lab section. In order to maximize contact time, teams shall NOT be assembled from members belonging to differing lab sections.

� Project teams (see LPI role) will keep and submit attendance records for ALL out-of-class meetings.

Note: All members of project teams must be enrolled in the SAME lab section!!

No Exceptions!!


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EE-595 SEMESTER SCHEDULE

Week

Day Thur Tues WedL# = Project Lab Exercise with Deliverables

P# = Oral Presentation with Powerpoint Slide FileLab #

1EPM&D

4SFEC

OptPCAD

Teams ALL 1 & 2 3 & 4 Chap Chap Chap

Room E225 E203 E203

1 26-Jan 27-Jan L1A: Syllabus, Teams, Resources, Roles, Content L1A

1 28-Jan Business, Project Plan, Reqs, Blocks, Interfaces, Ethics 1-2 1-2 1-2, 8

2 2-Feb 3-Feb L1B: Idea Refinement, Requirements L1B

2 4-Feb Blocks, Allocations, Interfaces, Req Capture Tool, Safety 4-6 3-4 3

3 9-Feb 10-Feb L1C: P1 Project Proposal - Reqs, Interfaces L1C

3 11-Feb Global Power, EMC, Regulatory Compliance 3 1

4 16-Feb 17-Feb L2: Power, Safety Allocations, Interface Reqs L2

4 18-Feb Project Plan, Task Estimates, Prototyping 7, 10 8 5, 8

5 23-Feb 24-Feb L3: Prototyping, Project Planning and Tracking L3

5 25-Feb Analog Design for Mfg 8-9 5-8 4-7

6 2-Mar 3-Mar Working Lab Time, Detailed Design & Prototyping

6 4-Mar Analog Design Continued, Digital Design for Mfg 8-9 5-8 4-7

7 9-Mar 10-Mar L4: P2 System Design, Proj Plan, Block IFs, Diags L4

7 11-Mar Digital Design for Mfg 8-9 5-8 4-7


8 18-Mar Exam 1 - Thru Analog Design

23-Mar 24-Mar Spring Break, No Labs

25-Mar Spring Break, No Lecture


9 1-Apr PCB Tools, Assembly, Test, Mfg Process Design 10-11 4-6

10 6-Apr 7-Apr L5: PCB Exercise, Initial Product BOM, Mfg Process L5

10 8-Apr Digital & Mixed Signal Design for Mfg 8-9 5-8 4-7

11 13-Apr 14-Apr L6: P3 Detailed Design, DFM, Worst Case Analysis, BOM L6

11 15-Apr Statistics, 6Σ, Design for Reli, Sustaining Eng, User Manual 6, 12 5-6 App B

12 20-Apr 21-Apr L7: Reli Allocation & Calculation, Product Warranty L7

12 22-Apr Exam 2 -Thru Reliability

13 27-Apr 28-Apr L8: Obsolescence, Verification, User Manual, Abstract L8

13 29-Apr Patents, Sustaining Eng, Comp Life Cycles, Ver/Val 6, 12 5-6 7, App A

14 4-May 5-May L9 P4 Final Presentation, Prototyping Lab L9 13 5-8 7

14 6-May Presentation, Report Content Checklists 13 5-8 7

15 11-May 12-May L10 P4 Final Presentation: Prototype Integration L10 13 5-8 7

15 13-May Peer Evals, Senior Surveys, Course Evals

15 14-May EMS-E250: Faculty PresentationsFRIDAY


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GRADING POLICY The EE-595 grading policy is comprised of four major portions as defined below.

Description on Component Percentage Grade Range

1. Average of Project Lab Grades 20% 0 - 100

2. Average of Exam Grades 25% 0 - 100*

3. Individual Capstone Design Project Grade 50% 0 - 100

4. Average of Lab Performance Grades 5% 0 - 100

*Each Exam is graded using a 100% curve by subtracting the average of all grades from 87.0 and then adding this difference to each exam grade. The class average is thus forced to a minimum of a “B”. The maximum grade on any exam is always limited to 100 points. Standard Final Grading Scale ═════════════════════════════════════════════════════════

94.0 - 100.0 ..... A 78.0 - 83.99 ..... C

93.0 - 93.99 ..... A - 77.0 - 77.99 ..... C -

92.0 - 92.99 ..... B + 76.0 - 76.99 ..... D +

86.0 - 91.99 ..... B 70.0 - 75.99 ..... D

85.0 - 85.99 ..... B - 00.0 - 69.99 ..... F

84.0 - 84.99 ..... C +


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1. PROJECT LAB ASSIGNMENTS (20%) There are 9 to 10 numbered project (L1, L2, … etc) labs. Some labs stretch across multiple sessions and are listed accordingly as L1A, L1B, etc. The project labs form the basis for which teams move through the various phases of a product design. The labs are comprised of activities and assignments aimed at helping you and your team complete essential aspects of your overall project design.

Logistics Project lab deliverables are assigned during lecture as noted on the schedule, except during Exam weeks. Project lab deliverables are due as discussed below. �� Lab Filename Conventions: See Capstone Project – Filename Formats

Individual and Team Assignments on Labs The lab session corresponding to the design is always in the week following the lecture period. Project labs have 2 types of deliverables that vary depending on the lab number.

� Team Deliverables: Team Members receive common grade � Individual Deliverables: Team Members receive unique grade

� Team and Individual Grades Combined, each team member receives a unique grade (0-100pts) on each lab. � Lab Performance grades (0-100pts) are also assigned unique to each student for each lab.

Lab Assignment Deliverables Project labs have file deliverables that take on the following forms: 1. Powerpoint Slides: Meant to be largely reusable for final presentation. 2. MSWord docs in the form of lab reports meant to be largely reusable for the project final report. 3. Schematics, Layout and/or other file outputs from eCAD tools representing some aspect of the entire project or

team assignment 4. Excel worksheets not meant for direct presentation. Usually must be copied into excel as a picture to allow

proper sizing and visibility. Students should keep in mind that as more information is gathered and learned about a specific project, slide and report updates must be made to keep them current and reusable for final presentation and report.

Filename Formats

General Filename Format: Team#-SemesterXX-Docname.ext Where: # = The team number (assigned during week 1) Semester = Fall or Spring XX = 2 digit year Docname = See Docname Types Below (Presentation, Project-Report, User-Manual, Lab#, etc) ext = Proper Microsoft file extentions; ppt, doc, or xls


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Examples: Team5-Fall04-Presentation.ppt (Team 5 from Fall 2004, final ppt presentation file) Team3-Spring03-Lab7.doc (Team 3 from Spring 2003, 7

th Lab file)

Team6-Fall05-Project-Report.doc (Team 6 from Fall 2005, final project report file)

Docnames: Lab# Requirements Project-Plan DFM-Plan Verification Schematic BOM Presentation User-Manual Project-Report Data-Sheets

Lab Assignment Submission Rules

�� Lab Deliverables (slides, tables, documents, worksheets, etc) are due the day AFTER the lab is

conducted on the class syllabus.

�� Lab assignments are to be submitted using the D2L Dropbox setup by each lab assistant.

�� Dropbox availability will expire at the end of the due date. Late project lab deliverables must be

submitted via email or in person to the lab assistant and may be penalized up to 10pts per day unless

specific arrangements have been made in advance.

Lab Session Guidelines and Rules

Students MUST be present in E203 during the entire lab session or until dismissed by the

lab assistant for full attendance credit (lab performance grade).

At the end of the Lab session students shall,

• Show the lab assistant progress made and solicit any final feedback on the lab assignment

• Turn in Lab assignment deliverables electronically if completed

• Logout of ALL of the lab PC’s that may have been utilized

• Return any borrowed components directly to the lab assistant

• Return all probes, wires, clips, etc to their proper storage areas in the cabinets

• Return all equipment at the group’s lab station to proper arrangement

• Clean bench top and discard any wire clippings, insulation and other trash


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Permanent Circuit Construction

For capstone final projects, students are encouraged to construct prototype circuits using permanent or semi-permanent methods such as perf board soldering, wire wrap, or printed circuit board soldering. Soldering is restricted to the bench tops and should not be done on other class table surfaces.

Temporary Circuit Construction

Many components used for circuit design are “thru-hole” technology. For temporary circuit construction and prototyping a double channel breadboard is suggested which can accept industry standard 0.3" and 0.6" DIP (Dual In Line Package) devices as well as smaller diameter (18-26 AWG) through-hole leaded components. Breadboards are constructed from soft white plastic and damage easily if lower AWG (larger diameter) wire and leads are inserted. Leads can also break off and fall inside the framework conduction system causing intermittent short circuits so reasonable care should be taken when inserted and extracting all parts from these boards. Some passive components along with all discrete semiconductors and ICs are kept, issued by and must be returned to the TA. These are for temporary circuit construction only and not generally available for permanent prototyping. One of the leading causes for circuit malfunction is circuit construction with the wrong components. Always double check issued components for proper part number. If a faulty component is discovered (and/or created!) please discard it. Each design group has the responsibility to make sure that their passive components have correct nominal value marking in explicit numbers or in a coded form. If unfamiliar with these codes, please ask the instructor or the TA to explain them or request a guideline.

Recommended Lab Tools

Students should be prepared with a small number of electronic tools to assist in the construction and debug of circuit designs as well as construction of final project prototypes. Suggested tools are listed below however other Mfg part numbers are likely suitable.

RECOMMENDED BENCH TOOLS/BOARDS

╔═════════════════════╦═══╦═══════════╦════╦═══╦══════╦══════════════════════╗ ║ DESCRIPTION ║MFG║ MFG P/N ║DIST║QTY║ COST ║ COMMENTS ║ ╠═════════════════════╬═══╬═══════════╬════╬═══╬══════╬══════════════════════╣ ║Solderless Breadboard║ OK║ CM-280 ║ ADC║ 1 ║$15.99║ Holds 28 Dip-14 IC's ║OR ╠═════════════════════╬═══╬═══════════╬════╬═══╬══════╬══════════════════════╣ ║Solderless Breadboard║ACE║201K/923334║DGKY║ 1 ║$24.95║ Kit, Holds 12 Dip14's║ ╠═════════════════════╬═══╬═══════════╬════╬═══╬══════╬══════════════════════╣ ║Long Nose Pliers/Cut ║ RS║64-1847 ║ RS║ 1 ║ $4.99║ Cutter, Crimper ║ ╠═════════════════════╬═══╬═══════════╬════╬═══╬══════╬══════════════════════╣ ║Stripper-Cutter ║ RS║64-2129 ║ RS║ 1 ║ $2.99║ 12 to 24 AWG Wire ║ ╠═════════════════════╬═══╬═══════════╬════╬═══╬══════╬══════════════════════╣ ║Safety Glasses ║ ║ ║ ║ 1 ║ $1.99║ Plastic ║ ╠═════════════════════╬═══╬═══════════╬════╬═══╬══════╬══════════════════════╣ ║Potentiometer Tweaker║ RS║64-2230 ║ RS║ 1 ║ $3.99║ Small Screw Driver ║ ╠═════════════════════╬═══╬═══════════╬════╬═══╬══════╬══════════════════════╣ ║24 AWG Pre-Stripped ║ RS║276-173 ║ RS║ 1 ║ $4.95║ Kit, 140 assorted ║OR ╠═════════════════════╬═══╬═══════════╬════╬═══╬══════╬══════════════════════╣ ║22 AWG Colored Spool ║ RS║278-1221 ║ RS║ 1 ║ $4.49║ 90' Solid Wire Spool ║ ╚═════════════════════╩═══╩═══════════╩════╩═══╩══════╩══════════════════════╝ RS = Radio Shack, OK = OK Industries, ACE = ACE Inc, DGKY = Digi-Key, ADC = American Design Component


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2. EXAMS (25%) There will be 2 written exams that will test the student’s grasp of the technical design and associated information that is covered in the course lecture portion. Each exam will be approximately 2 hours in length, open book and open note. Additionally, the student may be required to demonstrate his/her understanding of the laboratory equipment functionality. All exams will be graded using standard deductions for mistakes and will be curved according to the following process. When all initial grades are tabulated, then the average grade will be subtracted from 87.0. The delta between the average grade and87.0 will then be added to all other exam grades to compute the curved grades for that exam. The final curved grade for the exam should be matched against the standard scale on the previous page for evaluation.

3. CAPSTONE PROJECT (50%)

General Guidelines

� ALL Electrical Engineering students are required to complete a “capstone” or final design project as part of graduation requirements.

� EE Projects shall have the following major deliverables which include;

� Product Requirements Flowdown (MS Excel)

� Project Plan (MS Excel or MSProject)

� Oral Presentation to Faculty plus short presentation to Industry (MS Powerpoint)

� Functional Prototype Demonstration to Faculty

� Project Report: (MSWord)

� Product User Manual (MSWord)

� Product Schematic (eCAD)

� Product Bill of Materials (MS Excel)

Projects shall be developed in consideration of the following important real-world aspects

• Economic: Elements to consider include overall business case, design costs, mfg costs, operating costs, maintenance, selling price, total market, % of market captured, warranty costs and disposal costs. Industry is rapidly moving to understand a complete product life cycle cost versus traditional shorter-term strategies.

• Political: Examples of these constraints include obtaining governmental approvals, union mfg considerations and commerce regulations such as import and exports rules.

• Ethical: Ethical considerations may include Intellectual Property and Patents, Privacy, Security, and contradictory constraints between product and development costs and product safety.

• Health and Safety: This area includes safety standards, potential user hazards, failure modes and effects analysis, and mitigation plans. Warnings and Labeling for products are another key element to providing safety to customers.

• Environmental: Of growing importance is the impact that a product may have on the environment. This effect must be considered while in operation as after product usefulness has elapsed and the product is disposed. Use of certain materials such as lead, cadmium, mercury and others will be prohibited for many product types in


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the near future in global markets. In addition the disposal process or recycle of a product must become part of the development and design of the product. Product audible noise, vibration, energy efficiency, thermal and electromagnetic output examples of areas of concern for a product to impact the surrounding environment while operating. Of equal importance is the verified product performance in all potential environments including thermal, humidity, atmospheric pressure, shock and vibration, and electromagnetic.

• Manufacturability: Sometimes referred to as DFM, designing a product that can be mass-produced is a fundamental engineering skill that is valued in many Industries. Component selection is critical for most areas of electrical engineering in this regard particularly for printed circuit board (PCB) packaging. Understanding standard manufacturing systems such as those for thru-hole and surface mount PCBs is critical in addition to the test processes utilized in mass production.

• Social: Aspects such as benefits, risks, human interface to machines, exclusion of classes of people, acceptability of a product within society, labeled uses versus potential off-label uses and socially responsible engineering.

• Sustainability: Another growing area of importance in product design is sustainability. This includes the life cycle availability of resources including components, mfg processes, and supply chain. Reliability of a product is another key element in this area including infantile failures, failure rate versus product age, warranty justification, wear out modes, overall expected life and life stress models. Labeling, Maintenance and Service of a product comprise another important area.

• Reliability: Students are required to perform basic parts count reliability analysis using standard component library values and considering the environmental and application factors. Although not extremely accurate for absolute reliability, the tools utilized are valuable in comparing design choices.

� All project teams must define a concise list of product or system level requirements in 2 areas.

1. Standard Requirements: Those common to all projects including power consumption, voltage/frequency range, mass production cost, parts count, physical size, weight, operating temp range, etc.

2. Performance Requirements: are those that differentiate your design from a competitive design. This includes a list of all requirements that describe the intended functionality including all operating controls/displays, electrical inputs/outputs, mechanical inputs/outputs, operational modes, and differentiating performance requirements. Performance attributes may includes speed, accuracy, ease of use, display readability, safety, ergonomics, etc.

� Each project’s content is to be unique and original among other current or recent projects as well as other

projects for other courses. The Lab Assistant or Instructor to improve the efficiency of a team may modify a project scope, content or requirement set at any time.

� Projects may be selected which align with outside work for Industry. Projects associated for previous credit

with other courses will NOT be allowed unless by special approval of the lecturer. � The Instructor shall assign project final grades. Project presentations shall be evaluated by attending

faculty members and peer students. � Project team members will grade each other’s contribution, 0 – 100%, on a relative scale.

� Project teams will keep and submit attendance records for ALL out-of-class meetings.

� Each team member must demonstrate requirement assignments, design to requirements, verification of

requirements, prototyping of design, and linkage to overall project in addition to consideration of the 8 real-world constraints (above).


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� Project overall grades shall be assigned by the Instructor using faculty, peer and team member

input as follows;

� MSWord Report (incl User Manual + Reqs + Plan) = 35% (Unique) � Average of Oral Presentation Faculty Group Evaluations = 10% (Common) � Average of Oral Presentation Faculty Individual Evaluations = 15% � Average of Teammate “Peer” Evaluations = 15% � Teaching Assistant Project Evaluation = 10% � Teaching Assistant Prototype Demo Evaluation = 15%

“INDIVIDUAL” FACULTY EVALUATION CRITERIA FOR PROJECT PRESENTATIONS

Rate the presentation on a scale of 1 (= Poor) to 5 (= Excellent)

1 Identification and formulation of the problem 1 2 3 4 5

2 Level of analysis of the problem and the solution(s) 1 2 3 4 5

3 Application of knowledge of math and science 1 2 3 4 5

4 Application of specialized engineering knowledge 1 2 3 4 5

5

Use of tools and techniques, including computer

fundamentals, appropriate for modern, specialized,

engineering analysis

1 2 3 4 5

6 Consideration of economic aspects 1 2 3 4 5

7 Consideration of societal aspects

(E.g. accessibility, cultural, gender issues) 1 2 3 4 5

8 Consideration of environmental, and

Health and safety issues 1 2 3 4 5

9 Consideration of ethical, political

and legal issues 1 2 3 4 5

10 Consideration of manufacturability

and sustainability 1 2 3 4 5

11 Appropriateness of the scope and level of

the project for a capstone experience 1 2 3 4 5

12 Quality of visual aids

(slides, transparencies, models) 1 2 3 4 5

13 Use of audience-appropriate content,

detail, style and vocabulary 1 2 3 4 5


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14 Use of charts, graphs and figures

in the presentation 1 2 3 4 5

15 Language usage (grammar, spelling) 1 2 3 4 5

16 Clarity and volume of speech 1 2 3 4 5

17 Technical credibility of material and effectiveness of

responses to questions and comments 1 2 3 4 5

18 Presenter’s contribution level versus team member peers and

overall project tasks 1 2 3 4 5

19 Presenter’s professionalism including appearance,

organization and manner 1 2 3 4 5

20 Presenter’s eye contact and ability to address the audience 1 2 3 4 5

Project Timeline – Time Approximate, See Schedule for Exact Dates

Weeks 1-3: Semester Kickoff, Project Definition Phase

• All teams shall submit team logistics and capability assessments.

• Each team shall also submit a roster which includes all team member contact numbers, email addresses, etc. This list shall be shared with all team members.

• Each team shall designate a project integrator who shall communicate progress reports on a weekly basis to the Lab Assistants. Lab Assistants shall meet once per week with teams as part of the weekly lab sections. During detailed design phases, lab assistant may meet one-on-one with team members as well.

• Each team member shall list his/her areas of study and expertise.

• Each team member shall list his/her availability of weekly time for project work. Each team shall compile the total man-hours of resources available to them to best understand their capability. This is to be regarded as a commitment to the project.

• Each group or team shall include at least 1 weekly working operating mechanism, which is signed by all team members agreeing to that arrangement. Lab Assistants will check and verify that all team members are keeping commitments

• Team members shall also be designated to compile and track a schedule for their team, compile and archive presentation slides, compile and archive report sections, manage any web resources used. Formal roles for the following should be assigned;

� Lead Project Integrator (LPI) � Lead System Designer (LSD) � Lead Presentation Mgr (LPM) � Lead Report Mgr (LRM) � Lead Mfg Mgr (LMM)


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Page 18 J. Kautzer

• Project descriptions shall (see guidelines) include a block diagram, which shall serve as the basis of work assignments. Each team member shall design, prototype and present a “substantial” block(s) of this diagram. Projects that fail to do so will be graded accordingly.

• Project proposals should also include complete descriptions with standard requirements for cost, size, power, etc, as well as specific functional requirements for speed, accuracy, error, functionality, etc.

• Each project must be approved by the Instructor (week 3). Project recommendations should be made by consensus of each team in their P1 submission.

Weeks 4-6: System Design Phase

• The project description shall also (see guidelines) include a block diagram that shall serve as the basis of work assignments. Each team member shall design, prototype and present a “substantial” block(s) of this diagram. Projects which fail to do so will be graded accordingly

Project System Design is completed when the team has the following items;

� Resource assessment � Sustained Operating Mechanism � Accepted Proposal � All High Level Standard and Performance Requirements Defined � Block Diagram � Allocation of Blocks to team members, allocation of high level requirements and all block

requirements � Block-to-Block Electrical and Mechanical Interfaces defined � Block Power Input Defined � Block Function including transfer functions, math functions, computation and control, etc � Task estimates of each block � Reconciliation of task estimates versus resources available. Prove you can do it! � Identification of Constraints � PPT Slides with the above content are presented in lab by each team as part of the P2

presentation

Weeks 7-10: Detailed Design Phase

• An initial detailed design of each diagram block should be completed by the close of this phase.

• All component procurement shall also be completed during this phase.

• During this phase, the various blocks of the project prototype should be initially prototyped (typically on a bread board) and bench tested.

• Worst Case Analysis and Design for Mfg is performed during this phase.

• Computer based simulations to support the design choices as well as above worst case analysis

• Package choices are made to support both prototype as well as production design with considerations for power dissipation and thermal management

• Schematics and Initial BOMs (bill of materials) are developed during this phase.


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Page 19 J. Kautzer

• PPT Slides of the above are part of the P3 presentation.

Weeks 11-14: Project Verification, Integration & Productization Phase

• Before all blocks are integrated, verification testing shall be conducted proving block functionality to provide maximum chance for success when integrated.

• Project team members need to formulate a detailed verification plan, execute the plan and detail the results.

• After all blocks in the prototype are fully integrated, the team shall perform final validation testing in which each requirement is validated.

• Each team shall submit a validation plan that outlines the testing method to be used to validate overall requirements. Special emphasis shall be given to potential failure modes and safety precautions. It is suggested that a failure modes and effects analysis also be performed for the design.

• During this phase, reliability and obsolescence estimation is conducted.

• User Manuals, Repair Strategies, Production package types, Mfg Asm and Test Process are defined.

• PPT Slides of the above are part of the P4 presentation

Week 14: Final Phase, Formal Presentations, Submission of Written Reports

• Each group shall present their project in a professional manner with an audience made up of interested students and various faculty members.

• Presentations are approximately 100 minutes including demonstration of the prototype (logistics will be published as semester progresses)

• All groups shall create a final presentation slide package using MS PowerPoint.

• Each group shall also prepare a written design project report using MS Word that outlines all design details and provides a theory of operation. The format for this report should follow the design problem guidelines contained herein.

• Each team member shall evaluate the overall contribution and performance of all other team members and submit these anonymously to the lab assistants.

• Faculty Presentations shall be conducted during the last week of class (see schedule). Final design project written reports are due as shown on the schedule. Late projects will be graded accordingly and will be subject to the grading penalties.


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4. LAB PERFORMANCE GRADE (5%) Laboratory performance is primarily based upon the student's success rate, contributions during the working lab sessions, and presence in E203 during the lab. In addition, the lab assistant will also assess how well each student works with their respective team members. Assignments vary on a weekly basis (see schedule) and may include preparation of Powerpoint slides, Excel requirement templates, circuit design and initial prototype construction. Knowledge of the laboratory test equipment, as well as how well prepared students are with respect to final project work including prototyping are also factors. Additionally, students must maintain a high standard of circuit construction using short neat wiring techniques and not "rats nest" methods. Finally, all students are required to

return components to the TA and/or instructor, return equipment to its proper place, and logoff any PC placed in use during the session. Students will be graded on keeping their laboratory and computer station clean and in proper setup when finished. Verification success, circuit construction evaluation, check off for component and equipment returns, participation levels on final project teams, attendance, and proper setup of the laboratory bench will be assessed by the TA for

each student. DO NOT leave a lab session before being dismissed (checked off) by the lab assistant. The lab assistant will assign the lab performance grade for each student as 0 to 100 points.


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Page 21 J. Kautzer

Text and Reference Book Chapter Listings

Electronics: Project Management & Design by Stadtmiller, 2

nd Edition, Prentice Hall, ISBN 0-13-111136-1

Table of Contents

1. The Project Environment. 2. Managing Electronic Development Projects. 3. Approval Agencies. 4. The Six Steps. 5. Step One: Research and Gathering Information. 6. Step Two: Define the Problem (Develop Design Specifications). 7. Step Three: Develop a Solution Plan (Project Scheduling). 8. Step Four: Execution (The Preliminary Design). 9. Step Four: Execution (Component Selection). 10. Step Four: Execution (The Design Breadboard). 11. Step Four: Execution (Prototype Development). 12. Step Five: Verify the Solution (The Design Verification). 13. Step Six: Conclusion (Design Improvements and Project Performance Monitoring). Appendix A. Component Reference Information. Appendix B. Test Equipment. Appendix C. Miscellaneous Contact Information.


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Page 22 J. Kautzer

Electronics by Hambley, 2

nd Edition, Prentice Hall, ISBN 0-13-691982-0

Table of Contents

What is electronics? 6

The pre-electric world 8

Electricity and magnetism 10

Electromagnetic waves 12

The importance of frequency 14

Resistors 16

Inductors and transformers 18

Capacitors 20

Building circuits 22

Communicating with electricity 24

Moving electrons 26

Using electrons 28

Amplifiers 30

Oscillators 32

How filters work 34

Semiconductors 36

Development of the transistor 38

High frequencies 40

Translating useful signals 42

The visual connection 44

Analog and digital 46

Signals and codes 48

Logical rules 50

Integrated circuits 52

Making microchips 54

How electronic devices remember 56

Microprocessors 58

A different way of life 60

The future of electronics 62

Index 64


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Page 23 J. Kautzer

Schematic Capture With Cadence Pspice by Marc E. Herniter, 2

nd Edition, Prentice Hall Inc, ISBN 0-13-048400-8 (Earlier Edition may also be used)

Table of Contents

1 Editing a Basic Schematic with Orcad Capture 1

2 Introduction to Probe 93

3 DC Nodal Analysis 157

4 DC Sweep 193

5 AC Sweep 278

6 Transient Analysis 327

7 Creating and Modifying Models Using Capture 429

8 Digital Simulations 473

9 Monte Carlo Analyses 504

10 Project Management with Orcad Capture CIS 548

A Installing Orcad Lite Version 9.2 598

B Scale Multipliers for PSpice and Capture 606

C Functions Available with Probe 607

D Schematic Errors 608

E Listing of Class.Lib Library 619

Index 628

Strategies for Engineering Communications by Stevenson, 1

st Edition, Wiley, ISBN 0-471-12817-1

Table of Contents

1 Planning and Inventing Strategies 1

2 Drafting and Revising Strategies 41

3 Rhetorical Strategies 72

4 Strategic for Teamwork and Workplace Communication 109

5 Oral Presentation Strategies 147

6 Stylistic Strategies 188

7 Format Strategies 245

8 Document Strategies and Sample Documentation 291


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Page 24 J. Kautzer

Index 363

Printed Circuit Assembly Design by Marks and Caterina, 1

st Edition McGraw Hill, ISBN 0-07-014107-7

Table of Contents

Preface

Ch. 1 Introduction 1

Ch. 2 Key Factors Influencing Design 25

Ch. 3 Design Process Flow 31

Ch. 4 Circuit Board Layout 101

Ch. 5 Design Quality 175

Ch. 6 Documentation 221

Ch. 7 Design Revisions 275

Ch. 8 Design Organization and Management 301

App. A: Glossary 317

App. B CCA Failure Mechanisms and Reliability Issues 349

Index 415

Electronic Design Laboratory - Handbook of Design by Kautzer, ISBN 0-900-00701-B

Table of Contents Ch 1: Transistors & Applications Ch 2: Op Amp Fundamentals & Design Considerations Ch 3: Linear Op Amp Applications Ch 4: Active Filter Design Ch 5: Linear Oscillator Design Ch 6: Non-Linear Op Amp Applications, Comparators, Timers Ch 7: Power Amplifiers Ch 8: AM/FM Communications Ch 9: Digital Design Interfacing, Families, Metastability & EMC Considerations Ch 10: Programmable Logic Devices Ch 11: Microprocessor Fundamentals Ch 12: Microprocessor Interfacing Ch 13: Data Conversion Circuits

Documents

LECTURER LAB ASSISTANTS · • Design of basic linear and non-linear analog circuits including amplifiers, filters, oscillators, comparators, timers, pulse generators, and detectors