LLRF-ATCA LOW LEVEL APPLICATIONS

XFELThe EuropeanX-Ray Laser Project X-Ray Free-Electron Laser

Tomasz Czarski, Maciej Linczuk, Institute of Electronic Systems, WUT, WarsawLLRF ATCA Meeting, December 3, 2007

LLRF-ATCA LOW LEVEL APPLICATIONS

Tomasz Czarski Maciej Linczuk Institute of Electronic Systems, WUT, Warsaw

Tomasz Czarski, Maciej Linczuk, Institute of Electronic Systems, WUT, WarsawLLRF ATCA Meeting, 4-5.12.2007 2


AGENDA

1. Introduction

2. Requirements

3. Concept and design

4. Algorithms

5. ATCA architecture

6. Applications

7. Interfaces

8. Experimental results

9. Development proposal

10.Conclusions



Low Level Applications introduction

TASKS:• Implementation of the procedures and data processing to

provide Control Data and parameters for the Controller

• Monitoring and Exception Handling for safety requirements

The part of Software adjacent to the Controller

responsible for the arrangement of the control algorithms

CONTROLLERLOW & HIGH

LEVEL APPLICATIONS

e x e c u t i o na r r a n g i n g

RF SYSTEM

C o n t r o l a l g o r i t h m s

DOOCS

managing field control



Multi – channel ADC

MULTI – CAVITY MODULEVectorModulator

Multi–channel Down-Converter

Control Data & Parameters

probes

Klystron

DAC

RF

SY

STE

M

Outline of the LLRF control structure

Tunercontrol

Beamdetector

C O N T R O L

DATA Preprocessing

SYSTEM MODEL IDENTIFICATIONLOW LEVEL

APPLICATIONS

Exception Detection and HandlingController Core

reflectedforward

forward

C T

R L

Con

trol

Dat

a&

Par

amet

ers

COMMUNICATION

IQ

Data Acquisition Memory

I/O Data

HIGH LEVEL APLICATIONTS D O O C S

MONITORING



RequirementsFunctional modes

Control - provides Control Data between pulsesSimulation – for testingVM offset compensation – on requestVector Sum calibration – always for new operation condition

PerformanceControl Data meet requirements for cavity field control:filling: energy efficiency = stored/expanded energy

optimal target ~74% for 0.5 ms fillingflattop: field stability : 10-5 in amplitude, 0.01° in phase

Reliability robust algorithms

Usabilityuser friendly, context DOOCS GUI, on/off button operability

Interfaceinput/outputs to Controller, High Level Applications and DOOCS

Safetymonitoring: gradient, klystron power, quench detectionexception handling: controller off, beam off



out

The LLA Concept & Design

Coefficients GainSimulation

Error CORRECTOR Feed-back

I/Q DETECTOR

VectorSum

–+

CALIBRATOR DACADC +

CONTROLLER CORE

Inverse Model

Set-Point Feed-Forward

Model Structure

Parameters

Cavity

I/Q DetectionCalibrationEstimation

Controller

Estimation

Klystron

I/Q DetectionEstimation

DOOCS

Cavity gradientVector Sum

Estimation

Controller

Input/outputDATA

Beam

Estimation

C O N T R O L

DATA p r e - p r o c e s s i n g

•Klystron feature•Detuning•Half-bandwidth•Coupling factors•VM offset

SystemIdentification

~IF IQ

DA

Q

Mem

ory

Set-Point Loop gain

Monitoring



xk

System Model for Identification Algorithm

Calibrator

Ei

Internal CAVITY model

uk = Dk·xk

SPk

{ vik+1 = Ai

k·vik + Bi·uk }

Aik = 1-T(ωi

1/2)k + i·T∆ωik

– +

N - channels

FFk

Correctorerror

phasor

feedback

phasor+

Klystron Output

{vik}

Controllerphasor

vk

uk

∑ {vik}

Multi-Cavity model

klystron

phasor

Cavity

phasor

Vector Sum

∑

CalibrationEi·Ci

= 1

Gk Ci

CiGk

vk+1 = Ak·vk + B·uk

Ak = 1-T(ω1/2)k + i·T∆ωk

vk+1 = Ak·vk + Fk·xk Fk = B·Dk

vk = ∑i (vik) Ak·vk = ∑i(Ai

k·vik) B = ∑i (Bi)



ATCA based implementation of LLA

MULTI - CAVITYRF SYSTEM

CONTROLLER Core

SYSTEM MODELIDENTIFICATION

LLA - DSP

CONTROL TABLES

CONTROLLER - FPGA

DAQ MEMORY

CONTROL DATA

PRE-PROCESSING

C O M M U N I C A T I O N



Set of Low Level Applications

SYSTEM IDENTIFICATION

CONTROL MONITORING

VM offset

Klystron characteristics

Coupling factor

Cavity detuning

Half-bandwidth

System complex gain

Calibration coefficients

Beam parameters

Set-Point

Feed-Forward

Corrector Gain

Field gradient

Klystron power

Loaded Q

Detuning

EXCEPTION HANDLING: controller off, beam off



Interfaces

Low Level Applications

CONTROLLER

Feed-ForwardSet-PointCorrector GainCalibration coefficientsSimulation

ADC data:klystron outcavity probeVector SumController out

High Level Applications & DOOCS

Operation modeControl setting:pulse, field, gainBeam parametersCavity gradient

Monitoring dataException signals



System Identification - Experimental resultsACC1 – cavity 4 (gradient ~11 MV/m)

0 500 1000 1500 20000

10

20

30

40

KW

Power estimationfor single cavity

forward

reflected

0 500 1000 1500 2000-50

0

50

100

150

200

250

time [10-6 s]

Detuning and half-bandwidth estimation

Hz

detuning

half-bandwidth

200 400 600 800 1000 12000

0.2

0.4

0.6

0.8

1

Normalized Klystron characteristics

Abs [ ]

Phase [rad]

500 600 700 800 900 1000 1100 1200

0

0.5

1

1.5

System Gain for flattop

time [10-6 s]

Abs [ ]

Phase [rad]



System Identification - ACC1 Model verification

500 600 700 800 900 1000 1100 120010.95

11

11.05Cavity amplitude - real & model (gain=0)

MV

real

model

500 600 700 800 900 1000 1100 1200-5

0

5x 10

-3

rad

Cavity phase - real & model (gain=0)

realmodel

0 100 200 300 400 500-0.2

-0.15

-0.1

-0.05

0

time [10-6 s]

rad

Phase of cavity and klystronclose to resonance filling (gain=0)

klystron

cavity

500 600 700 800 900 1000 1100 120013.9

13.95

14

14.05

14.1

time [10-6 s]

Vector Sum Controlon stability limit for loop gain = ~300

MV



Development team ISE Employees

Tomasz Czarski, MSc Maciej Linczuk, PhD Wojciech Zabolotny, PhD Krzysztof Pozniak, PhD

IPJ Employees Jaroslaw Szewinski, MSc

DESY Employees/ISE PhD stud. Waldemar Koprek, MSc Piotr Pucyk, MSc

DMCS PhD Student Wojciech Jałmużna, MSc

Tasks realization Low Level Applications

Data pre-processing System Model Identification Control Data & Parameters Monitoring

Integration with „Communication” LLA Simulation and integration with controller

firmware simulation

Schedule for 2008-2009(tightly integrated with controller design)

Development of the existing algorithm - 12 m. Tests in simulation - 15 m. (in the background) Operability development – 6 m. DOOCS server integration – 6 m. DSP implementation – 12 m.

Development activity proposal



CONCLUSIONS

1. The Low Level Applications algorithms has been verified experimentally for feed-forward and feedback modes

2. ATCA carrier board with AMC modules is scaleable and flexible platform for implementation of the control algorithms with possible upgrade of future development

3. The Low Level Applications strongly influence the architecture of the Controller and Communication structure and shares the same hardware platform

4. The integrated design – packages Controller and LLA, managing by the unified team, without any division, is the only reasonable solution for the LLRF – XFEL development

Documents

LLRF-ATCA LOW LEVEL APPLICATIONS