LN004 / JohnStone / 2013-02-20

V1

Page 2 of 26

Exzerpt

This document describes a fast switching FET driver circuit dedicated to asymmetric motors.

List of Contents

Scope of this document: ............................................................................................. 4

Basic Knowledge ........................................................................................................ 4

Overview ..................................................................................................................... 6

Circuit ......................................................................................................................... 7

Opto (Section C) ...................................................................................................... 7

Signal Conditioning & Power on Disable (Section D) .............................................. 8

FET driver (Section E) ........................................................................................... 10

FET Stage (Section F) ........................................................................................... 12

Circuit Board ............................................................................................................. 15

Bread board .............................................................................................................. 17

Assembly .................................................................................................................. 17

Wiring Procedure ...................................................................................................... 18

Precautions at Different Circuit Areas ....................................................................... 19

Basic Testing of the Circuit ....................................................................................... 23

Some Hints out of the Forum .................................................................................... 23

Testing and Tuning ................................................................................................... 25

Further knowledge .................................................................................................... 25

APPENDIX ............................................................................................................... 26

Page 3 of 26 Author

Name: John Stone

Profession: Engineer in electronics and humble apprentice in radiant science

Location: Somewhere in a rural area in the global village

The author performs this research in order to bring honor to the creator and help protect his creation.

Disclaimer

The contents described herein are for education only. You are not encouraged to replicate items

described herein. The author takes no responsibility for any damage, injury or other disadvantage

occurring.

Policies:

Anybody is encouraged to copy and forward this document at will as long as the content is not

modified.

Quotations are allowed unmodified only with added reference (title and version) and internet link if

possible.

Intellectual Properties

As far as the author is aware there are no facts described herein pending to any intellectual property

being protected.

All contents are open source and MUST NOT be patented or claimed to be private in any way.

Glossary

FET field effect transistor

Page 4 of 26

Scope of this document:

Due to the fact that many members of energetic forum are not educated in electronic

matters this document shall help anybody to build a high quality driver dor own

experiments.

Basic Knowledge

The notions below were published in Energetic Forum by the author in Oct. 2012.

Everybody shall understand that the matter is far complicated but these notions may

suffice in order to get the basic understanding for building drivers like presented

herein.

“1. FETs are modern electric valves with some very superior properties compared to

transistors. This makes them a primary choice in order to switch high currents along low

loss.

But FETs will perform well only if they are kept within their area of wellness.

Unfortunately many of you do not now these conditions and therefore you torture them

without any malicious intention.

2. Any valve performs well only if you switch it fast. Any intermediate state will perform

excessive losses. You experienced it before if a switch (valve) in your home does not

perform well and the contacts get hot - and possibly ignite your home. So the question

is: How do we get FETs hurry up in their switching time.

3. FETs are extremely fast electric valves. They can perform (but not easily) within ps

(picoseconds = 10 power -12 seconds) - But they show up some drawbacks we need to

take in account.

4. For better understanding let's recall the connections of a FET (exactly a N-FET). This is

the type we usually use. The leg being connected to electrical minus or GND or ground is

called the "source". The leg where you connect your load is called "drain". Where you

control the FET is the "gate".

5. The abbreviation FET stands for Field Effect Transistor. This term tells you that you

can change the state of ON /Off by controlling an electric field within the structure of the

FE-Transistor - see additionally This might give you the notion that a FET will not draw

current but the field will be sufficient. This notion is true and false at same time - sorry -

given at what time you look at your FET.

6. Gate capacitance: There is no FET (or transistor) without it (app. 1nF = 1 nanaofarad).

As you possibly know a capacitance is a bin for electrons where you can put them in and

extract them later on (in reality it is not - but let's take it as thinking model). We charge

a capacitor and discharge it. In this respect it behaves like a rechargeable battery. If you

have lots of current you can charge it within short time and if you have a weak power

supply you need to wait long time in order to use the charged object.

Now please understand that you can have no natural feeling of what is slow or fast for a

FET and what currents will flow. All this matter defies your daily experience and therefore

we need to talk about it.

7. Charging a capacitance is no linear job but the more charge you have gathered in the

Page 5 of 26 cap the slower it will increase its voltage. So please understand that it will be no good

idea to supply your FET driver with 12V while your FET needs 10V for full ON state.

Additionally your driver will eat up some voltage and supply somewhat less than your

battery supplies.

And beware of long thin wires - they will kill the rest of your switching quality.

For discharge you unfortunately have no negative voltage in order to speed up the cycle.

Then the low driver stage needs to be strong enough.

8. Oscillations are another enemy of your FETs. As you learned above every transition

generates losses and you can imagine that some additional oscillations (wires are

inductance, capacitance and act along FET capacitance) will add losses and eat up

performance of your PWM circuit. These oscillations may go up to MHz! But there is a

drug for this - an additional resistor (10....30 Ohm) - look forward to schematic coming

soon.

9. Now let's recall some usual nominal properties of a FET.

Threshold voltage for ON state : higher than ca. 10V

Threshold voltage for OFF state: lower than ca. 4V

This tells you that you need to travel as fast as possible through the lossy zone between

4V and 10V and vice versa and additionally exceed the thresholds by some volts in order

to stay in a secure zone.

The bad news is that you do not have a certain amount of loss once only but at every

transition ON/OFF and OFF/ON. The frequency of 10 KHz tells you i.e. that a FET will

experience 20000 times pulses of heat every second because of switching only. Imagine

these facts like driving your car without oil in the engine /gear -> friction + heat +

damage.

I do not want to derange you with math. If you want to know more see this calculator.

Any way you can understand that if we have a weak, slow current source as driver and

possibly no good conductors it will take longer time to switch a FET ON/OFF.

As you own no oscilloscope it is of no value for you to enter into calculations and figures.

Let's focus on what we can do in order to enhance your FET driving.

10. There are some other facts to be considered but stay with this knowledge for now.

Page 6 of 26

Overview

The FET driver described herein incorporates an opto coupler at input in order to

separate the PWM generator from the noisy driver circuit. A simple opto will not

transfer clean signals with steep edges. Therefore the opto output feeds aome gates

for signal conditioning along power on disable. Both measures are necessary in order

to prevent stress and damage of the FET stage itself.

An essential part of this circuit is the FET driver itself being able to charge and

discharge the gate capacitance very fast. This action requires high current flow and

builders shall provide conductors with corresponding diameter in this section.

The final FET stage contains some protection means from high voltage.

An overcurrent protection is not designed in this version of circuit but can be added

later on.

Page 7 of 26

Circuit

This circuit was tuned in order to serve as safe unit for research purpose at

asymmetric motors. Some simplifications can be performed before using it in real

use. Anybody untrained person is warned to modify it. Low performance might result.

Please consult the corresponding forum for further knowledge.

Opto (Section C)

The input connector at left hand side provides aresistor and opto with separated

leads on a post each in order to be easily adapted to the PMW generator. If this

circuit is not connected the FETs are – for safety controlled to switched off.

Activating the opto at input will draw pin 3 at output to 5V performing as HIGH signal

to the signal conditioning stage.

Pin 6 at connector is not connected to the circuit. It sits there just in case you need to

connect PSU from generator.

Page 8 of 26

Signal Conditioning & Power on Disable (Section D)

The gates are of Schmitt trigger type. They prevent randomly switching at output if

noisy signals are fed at input.

The circuit serves as power on disable in order to protect the setup from unsolicited

switching. After switch on C18, R4, D3 disable the gate pin 10 up to the time when

the capacitor is being charged above the switching level of the gate. In case of power

off procedure the diode enables fast discharge of the capacitor in order to be

prepared soon for next switch on procedure.

Gate IC4d performs as simple inverter. There are two gates left in IC4.They can be

used for later additions. All inputs are tied to +5V in order to prevent unsolicited

switching and noise.

Page 9 of 26 Note: The voltage for this circuit is 5V fed by a separated voltage regulator LM7805.

This measure was chosen in order to prevent any crosstalk of the noisy circuitry

originating from FET switching.

Builders are advised to not omit capacitors shown in the diagram. They are essential

in order to provide smooth DC voltage. Every type of capacitor performs in a certain

proprietary frequency range. Thus a cluster of capacitors covers a wider range of

frequencies. They get charged / discharged at spikes and crosstalk and load

changes as well.

Page 10 of 26

FET driver (Section E)

FET drivers are designed for sudden source / sink of several amps. This special type

performs 12A within 50ns. Special precautions were taken by the manufacturer in

order to prevent crosstalk form output to input. Input section was separated from

output section.

C17 / C2 guarantee smooth DC voltage for input circuitry. This cluster is being fed

from 12V regulator and this is the only connection to the output cluster.

Same procedure at GND connections. input separated from output – one single lead

in-between.

You are advised to solder this IC to PCB directly (no socket) in order to guarantee

maximum current flow.

The LED D1 performs as monitor for switching actions.

Page 11 of 26

The circuit gets 12V from a separated voltage regulator LM7812. It is advised to feed

this regulator by a galvanically separated PSU i.e. a simple socket charger.

This regulator feeds the 5V regulator as well (see baove).

Page 12 of 26

FET Stage (Section F)

R8, R9 shall prevent spurious oscillations at FET side. They grow up along gate

capacitance and inductivity of the leads between driver and FET. Therefore it is

essential to have them as short as possible. The resistor values need to be

determined at the setup itself. You are advised to check before with wire jumpers

only.

The drawback of these resistors is -> they prevent high currents to flow and thus

reduce the switching speed. The resistors should be of metal film type or SMD.

Normal carbon resistors contain a helical structure and thus add inductance to the

gate (danger of oscillations)

C9 / D2 and C15/D7 perform as overvoltage protection for the gate. In order to

separate the capacitance and its influence to switching speed, overvoltage is being

fed through low capacitance diodes 1N4148 (D1, D6). Once C9 or C15 is charged

Page 13 of 26 there is no further interaction with the gate, except in case of overvoltage. Then D2

will conduct and prevent damage to the gate.

D4, D5, D8, D9 perform as overvoltage protection for the DS junction. They conduct

in case of overvoltage and feed charge to the gate. Thus the FET will open again for

short time and conduct the overvoltage to GND. The double diode design is intended

in order to reduce capacitance by series connection of the diode capacitance.

NOTE: This protection was designed for these specific FETs in diagram (600V). The

values for these diodes need to be adapted to about 80% of maximum voltage drain /

source.

K2, K3 are contacts for connecting meters.

This circuit shows no high current contacts because builders will have very different

arrangements for FETs along heat sinks. The FETs were prepared to be assembled

on bottom side in order to give space for extensive heat sinks if requested.

Mounting FETS off PCB is not recommended because the wiring from driver to gates

and source pins needs to be AS SHORT AS POSSIBLE.

NOTE:

It is essential to perform the connections from driver to FETS exactly like shown

below. Else low switching performance will be observed.

Please note this current path marked in red and blue will perform up to 12A for short

time. It needs to be performed EXACTLY like in layout below. Wires need to be

covered with massive solder.

Page 14 of 26

Page 15 of 26

Circuit Board

As component placing and wiring are in some extent essential, this setup shall serve

as template for easy building and proper function.

The circuit board below was setup primary for replicating the circuit on a breadboard

(instruction below) but may be built as true PCB.

Page 16 of 26

Please note the FETs are positioned mirrored in order to get gate pins as close

together as possible. Thus heat sinks shall be applied on both sides.

Page 17 of 26

Bread board

The board was developed in 1/10” (2.54mm) pitch. Thus any commercial breadboard

(“pad per hole”) board may be used.

The dimensions are about 94mm x 64mm

Assembly

Step 1:

• Print the assembly print in scale 1:1 on paper. (template in correct size-> see

appendix)

• Check if dimensions ore OK, else correct your printer setup.

• Adjust the printout on the breadboard: holes in board shall fit to fiducial marks.

• Fix paper with pins on corners through holes first and then with glue.

• Puncture the assembly holes.

• Assemble a cluster of components at a time (not all at once) i.e. 12V voltage

regulator along related components.

• Ceramic 100nF capacitors were used of different pitch. You may use all the

same and bend wires conforming the corresponding hole distance.

• Proceed with wiring (see next paragraph).

• After wiring finished proceed with next cluster.

Page 18 of 26

Wiring Procedure

The wiring was performed like a single sided circuit board. The position of

components was guided by having short and well-arranged wiring. The layout may be

used as printed template for marking wires soldered. (see pic below – bottom view)

Perform short wires first. Blank wires may be used there.

For some longer wires insulated ones may be advised.

Wiring: bottom view

Page 19 of 26

Precautions at Different Circuit Areas

Some circuit areas need to be wired with massive wire in order to allow high

amperage to flow in time.

GROUNDs

The GND wires related to gate drive are marked in pink color. Be advised to perform

those wires at left hand side from driver as massive wires in order to let up to 12A

flow.

The gate resistors shall be accompanied by ground lines in order to prevent

oscillations and spurious nose.

Hint: Solder thin blank wires and cover them with solder later on in order to get

massive metal connections. Pause in-between in order to not kill components by

heat.

Remember the jumper (grey line above)

Page 20 of 26 GATE DRIVE

Same procedure like above

Page 21 of 26 DIGITAL GROUND

This part may be wired without covering with solder like above.

Page 22 of 26 FET (SOURCE / DARIN)

Source and drain pins are prepared for high curents up to 300A peak. Conducting

such current can not be performed by simple PCB or wiring. Thus the wiring for

source and drain will be done differently – off PCB surfce at top side.

Note: Soldering needs to be done hot and fast in order to prevent damage inside the

FETS ba heat.

It is essential to perform this “triangle” for drain wires (connected to load later on)

symmetrically in order to load both FETs equally.

Same procedure for wires to source pins at FET. Keep both triangles well insulated.

The circuit might be loaded up to 650V.

Page 23 of 26

Basic Testing of the Circuit

After assembly and wiring thorough testing shall be performed. It is advised to do

testing step by step. The input needs to be controlled either by a frequency generator

or by a simple toggle switch. All sections shall be tested.

• 12V regulator (note: regulators of type 78xx need minimum 2 volts higher at

input than their output rating)

• 5V regulator

• Opto part

• Signal conditioning / power on disable

• FET driver

• FET stage (add a resistive load (i.e. 20W bulb / 12V) and do not exceed 12V

voltage at load for safety of the circuit in case of malfunction) Check for steep

edges and missing oscillations at switching time. In case of oscillations gate

resistors need to be added and increases up to smooth switching.

Some Hints out of the Forum

Link

1. Action: Do not use coils in the very first switch on but a resistor or car lamp or similar ohmic load. Calculate the max. current at permanently switched on stat to not be grater than 80 % of the max. current out of data sheet. Mount your FETs on a heatsink. Check: At every test check temperature. 2. Action: Attatch the overvoltage protection to FETs 3. Action: Start with 12V first. 4. Action: Operate the FET stage manually first - disconnect from generator. Thus you can measure with simple DVM and thoroughly. 5. Action: Connect input lead to GND. Check: Measure if your FETs have less than 1 V on gate. Light at output OFF! If not: measure where the the voltage originates. 6. Action: Connect input lead to 12V Check: Measure if FETs have 10V minimum at gate. Light at output ON! If not: search for the loss of voltage. 7. Action: Connect generator with low frequency ca. 1Hz Check: Watch function: on / off / on ...... 8. Action: Add in series to bulb at output a coil. Replace the output load by a moderate coil. Attach a neon (overvoltage protection) across SD of the FET. 9. Action: Operate generator faster i.e. 100Hz. Connect a home brew peak detector,

Page 24 of 26 connect DVM. Check: If neon lights at this step you have too big coil or too low frequency. Wait DVM reading being stable. Now you have the exact peak voltge less 0.6V beacuse of the diode. Action: Discharge the cap from peak detector after every check. 10. Action: Remove the bulb at output. and connect coil between Battery and FET directly. Repeat #9. 11. Action: Increase battery voltage or use bigger coil (or motor). Repeat #8 Check. Neon on? procede with #12. If you have now not your final load increse load step by step until neon gets on dimmly. 12. Action: Neon is now on dimmly while FET stage running. Note the peak voltage. 13. Action: Check the data sheet for max. voltage DS. Take 80% of this voltage and devide it by the neon voltage + 1V noted before. The integer number is the number of SAME neons you can connect in series between DS of FET in order to get a reliable protection from overvoltage. Check. Neons shall not light up at all while normal operation. Measure the peak voltage to be below 80% of FET voltage and note the voltage red. 14. Action: Discionnect overvoltge protection (cap/resistor) Check: Recheck like #13. 15: Increase freqeuncy step by step. Check: Temperature, neons to be off, voltge at peak detector.... Hint: - When operating assymetric motors high voltage spikes are intended. Therefore neones shall light for exceptional protection only. If the lihgt up you should replace FETs by higher rated components. Calculate the cont of neons again (#13) - Recheck overvoltage protection if you make your FETs switch faster as well. The calculation for voltage spikes depends on switching speed as well. They are build up by load voltge, amps being switched off and switching speed. Small 12V motors can develop spikes up to 150V and more. An ignition coil being fed with 12V / 3A will produce up to 300V spikes. - Your setup will not be protected while you read this text. YOU MUST DO IT YOURSELF!

Page 25 of 26

Testing and Tuning

Once the driver board proved to perform basic functions it needs to be tested at

dedicated load. Remember the advice to start tuning with removed gate resistors and

added wire jumpers.

It is essential to test the driver board with resistive load only because any inductivity

oscillates at switching time and will override deadly self-oscillations at gates.

Resistive load: Get a bulb from car head lamp H4 (or two H7), parallel filaments and connect as load with short wires. You can pulse it at 36V with 40% duty and get plenty of amps for testing while not overloading the bulb.

Check for smooth switching like above.

Recheck if the overvoltage diodes fit to max. voltage of the FETs used.

Further knowledge

This driver is being discussed in Energetic Forum “my-motors-got-me-tap-into-radiant-energy” starting with post # 1745.

~o0o~

Page 26 of 26

APPENDIX

Opto

couple

r

5V

supply

Section

B:

12V

supply

Section

A:

Pow

er

FE

Ts

Section F

:F

ET

driver

Section E

:D

igital gate

sS

ection D

:S

ection

C:

500

V

300A

sin

gel p

ulse

100A

con

tinuo

us

V5.1

1K

R8

1K

R7

LE

D r

ed 3

mm

D11

1N4007 D10

1K

R6

1K

R5

P6KE250CA

D9

P6KE250CA

D8

K3

K1X

02

K2

K1X

02

P6KE15

D7

100nF

C15

10K

R4

23:2

708

.02.

13

20:1

508

.02.

13

Mon

ster

Driv

er -

V5.1

- 20

1302

08 p

rere

leas

e.T3

001

130,

00%

Ver

sion

:

Cha

nge:

Pro

ject

: Asy

met

ric U

fo M

otor

Item

: Mon

ster

Driv

er

She

et: 1

/1...

...

File

:

Sca

le:

+5V

+5V

100nF C2

100nF C7

P6KE250CA

D5

P6KE250CA

D4

P6KE15

D2

1R

R3

1R

R9

1N4148

D6

IPW60R041C6

T2K

1K

1X06

1µF C18

+

1N4148D3

100nF

C9

IPW60R041C6

T1V

_GE

N

K8

K1X04

1µF

C5+

1N4148

D1

1K R2

+12

V

1µF C17 +

1µF C10+

10µF C3+

470

R1

+5V

+5V

+5V

100nFC1

1µF

C14+

1µF

C11 +

+12

V

100nFC13

100nFC12

100nFC8

100nFC4

VC

CV

CC

MIC

4452Y

N

IC7

GN

DO

UT

2O

UT

1

GN

DN

CIN

10µFC6+

7812

IC6

GND

INO

UT

7805

IC5

GND

INO

UT

SFH

617A

-3

IC3

E CKA

IC4

IC4b

74H

C132N

IC4d

74H

C132N

IC4c

74H

C132N

IC4a

74H

C132N

OP

TO

_K

OP

TO

_A

Rout

Rin

V_G

EN

AU

X_P

WR

GN

DG

ND

GN

D

GN

DG

ND

GN

D

IN

MD5.1 - BOM prereleasePos Cont Name Value Case DATASHEET

1 5 R2,R5,R6,R7,R8 1K 0207

2 1 D10 1N4007 D_RM12,7_DM3

3 3 D1,D3,D6 1N4148 DO35 http://datasheet.octopart.com/1N4148-Fairchild-datasheet-521777.pdf

4 2 R3,R9 1R 0204_MET for tuning only

5 6 C5,C10,C11,C14,C17,C18 1µF C_ELKO_RM5,08_DM6 pitch 5.08 mm / diameter 6mm / voltage > 20V

6 1 R4 10K 0207

7 2 C3,C6 10µF D6R2,54_ELKO pitch 2.54 mm / diameter 6mm / voltage > 20V

8 1 IC4 74HC132N DIL14 http://focus.ti.com/lit/ml/mpdi002c/mpdi002c.pdf

9 2 C2,C7 100nF 3X13R7,62 same like next line! but bent for pitch 7.62 mm for use at MIC4452YN

10 7 C1,C4,C8,C9,C12,C13,C15 100nF 6X3R5,08 pitch 5.08 mm / diameter 6mm / voltage > 20V

11 1 R1 470 0207

12 1 IC5 7805 TO220 http://datasheet.octopart.com/L7812CV-STMicroelectronics-datasheet-10835933.pdf

13 1 IC6 7812 TO220 http://datasheet.octopart.com/L7812CV-STMicroelectronics-datasheet-10835933.pdf

14 2 T1,T2 IPW60R041C6 TO247 http://datasheet.octopart.com/IPW60R041C6-Infineon-datasheet-10026896.pdf

15 2 K2,K3 K1X02 1X02

16 1 K8 K1X04 1X04

17 1 K1 K1X06 1X06

18 1 D11 LED red 3mm LED_3MM_RED

19 1 IC7 MIC4452YN DIL8 http://datasheet.octopart.com/MIC4452YN-Micrel-datasheet-12335.pdf

20 2 D2,D7 P6KE15 DO15 http://datasheet.octopart.com/P6KE15A-STMicroelectronics-datasheet-14475.pdf

21 4 D4,D5,D8,D9 P6KE250CA DO15 http://datasheet.octopart.com/P6KE250CA-Fairchild-datasheet-3040.pdf

Please buy diodes above fitting to the Vds of your FETs. These ones refer to T1/T2 . Both diodes in series shall be well below the max. Voltage of your FETs!

22 1 IC3 SFH617A-3 DIL4 http://datasheet.octopart.com/SFH617A-3-Vishay-datasheet-8399721.pdf

63,5 mm93,9

8 m

m

63,5

mm

93,98 mm