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7/31/2019 Logarithmic Amplifier2
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DESIGN MASTER
Laboratory #2 Homework 441G
Marica Rzvan-Mihai
Toader Mihai-Silviu
Vlaic Iuliana-Maria
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A log amplifier (logarithmic converter) is one for which the output voltage Vout is K
times the natural log of the input voltage Vin
This circuit outputs the negative log of the input. The first op-amp attempts to keep its
input at ground, which means the current across the 1k resistor must be proportional to the
input voltage. This current goes across a transistor, so the op-amp must keep its output
voltage at a level which satisfies the Ebers-Moll equations, which means that eV
out is
proportional to the input current. This means that output voltage must be proportional to the
log of the input current (and thus the input voltage).
We consider the following circuit:
=>
=>
Where: - base-emittor voltage
- thermal voltage
- input voltage
- output voltage
- collectors current
- leakage current
We know the following terms:
= 25 mV
= 5 V
= 48 nA
R= 1k
http://en.wikipedia.org/wiki/Logarithmhttp://en.wikipedia.org/wiki/Amplifierhttp://en.wikipedia.org/wiki/Natural_loghttp://en.wikipedia.org/wiki/Logarithmhttp://en.wikipedia.org/wiki/Bipolar_junction_transistor#Ebers.E2.80.93Moll_modelhttp://en.wikipedia.org/wiki/Bipolar_junction_transistor#Ebers.E2.80.93Moll_modelhttp://en.wikipedia.org/wiki/Logarithmhttp://en.wikipedia.org/wiki/Natural_loghttp://en.wikipedia.org/wiki/Amplifierhttp://en.wikipedia.org/wiki/Logarithm7/31/2019 Logarithmic Amplifier2
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Inserting them into the output voltage equation we will obtain = -0.288 V (in the
ideal case).
If we want to be sure that our circuit performance is high and the failures that occur
during operation are minimum, we must implement a worst case situation scenario.
Worst-case circuit analysis (WCCA or WCA) is a cost-effective means of screening
a design to ensure with a high degree of confidence that potential defects and deficiencies are
identified and eliminated PRIOR TO and DURING test, production, and delivery. It is a
quantitative assessment of the equipment performance, accounting for manufacturing,
environmental and aging effects. In addition to a circuit analysis, a WCCA often includes
stress and derating analysis, Failure Modes and Effects Criticality (FMECA) and Reliability
Prediction (MTBF).
The specific objective is to verify that the design is robust enough to provide operation
which meets the system performance specification over design life under worst-caseconditions and tolerances (initial, aging, radiation, temperature, etc.).
Stress and De rating Analysis is intended to increase reliability by providing sufficient
margin compared to the allowable stress limits. This reduces overstress conditions that may
induce failure, and reduces the rate of stress-induced parameter change over life. It determines
the maximum applied stress to each component in the system.
A worst case circuit analysis should be performed on all circuitry that is safety and
financially critical. Worst case circuit analysis is an analysis technique which, by accounting
for component variability, determines the circuit performance under a worst case scenario
(under extreme environmental or operating conditions). Environmental conditions are definedas external stresses applied to each circuit component. It includes temperature, humidity or
radiation. Operating conditions include external electrical inputs. Component quality level,
interaction between parts, and drift due to component aging.
In order to perform this analysis, we must implement our circuit in a program called
Design Master and we will obtain the results for this situation.
DESIGN MASTER features
Based upon the Worst Case Analysis Plus (WCA+) methodology developed by
Design/Analysis Consultants, Inc., Design Master (DM) is used for design validation, risk
assessment, and optimization. Design Master:
Solves design equations, including the combined effects of all variables:
o Output includes minimum, average, typical, maximum, standard deviation, and
Cpk (capability index) values.
o Accounts for the effects of dependent variables to ensure that unrealistically
pessimistic results are eliminated.
o Accounts for the effects of dynamic (application) variables to avoid unrealistically
optimistic results.
http://en.wikipedia.org/wiki/Deratinghttp://en.wikipedia.org/wiki/FMECAhttp://en.wikipedia.org/wiki/MTBFhttp://en.wikipedia.org/wiki/MTBFhttp://en.wikipedia.org/wiki/FMECAhttp://en.wikipedia.org/wiki/Derating7/31/2019 Logarithmic Amplifier2
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Generates the estimated probability distribution of the equation's range of results, and
provides an estimate of the probability of occurrence for any out-of-specification
results.
Tabulates the normalized sensitivity of the equation to each of its variables.
Calculates the optimum value for each variable. Generates graphs of the equation for each variable.
Min/Average/Typical/Max
Solutions
WORST CASE
RISK
ASSESSMEN
DESIGN
OPTIMIZATIO
Probability of
Exceeding
Specification
Interactive
Probability
Sensitivity
of Each
Optimum
Value for
Each
Graphs
for Each
Automatic Generation ofWorst Case Formulas
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In the WorkSheet screen we will intorduce the parameters that are deduced using certain
formulas: , and .
Output voltage:
Base-emitter voltage:
Collectors current:
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In the Variables screen we introduce the parameters that are known:R, , , .
Resistance:R
Input voltage:
Thermal voltage:
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Leakage current:
After we compile the program we will obtain the analysis results for: , and .
Analysis for the output voltage:
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Analysis for the base-emitter voltage:
Analysis for the collectors current:
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Graph (Is, Vo)
Graph (R, Vo)
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Graph (Vi,Vo)
Graph (Vth,Vo)
To conclude, after succesive parameter adjustments we have been able to obtain the
individual sensitivities for each component so that the overall circuit sensitivitie fits within the
acceptance limits.