Low-Temperature Oxidation/Nitridation Processes enabling ... · enabling Advanced Junctions Wilhelm Kegel, Wilfried Lerch, Jeff Gelpey centrotherm photovoltaics AG, Blaubeuren, Germany

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SemiconductorPhotovoltaics

Semiconductor

Low-Temperature Oxidation/Nitridation Processes enabling Advanced Junctions

Wilhelm Kegel, Wilfried Lerch, Jeff Gelpeycentrotherm photovoltaics AG, Blaubeuren, Germany

NCCAVS Junction Technology GroupSemicon West 2013 MeetingSan Francisco, July 11th 2013

© centrotherm photovoltaics AG Company CONFIDENTIAL July 2013 2

Motivation for low-temperature oxidation

Ambient control during annealing

Dopant outdiffusion in novel 3D FIN structures

Temeprature causes deactivation

The PlasmoxLT hardware concept

Microwave plasma generation and oxidation mechanism

Summary

Contents


Motivation

Geometrical Scaling in 2D: (More Moore, comes to a physical end) Thermal budget reduction for smaller feature size and for deactivation reduction:

RTP and ms-annealing (MSA) Plasma-assisted technologies for process temperature reduction

Transistion planar to 3D Gate Structures: (technology challengesoccurring) Extreme conformality required Excellent dopant activation

IEEE, 2011


Oxidation Enhanced Diffusion during Flash Annealing, pMOS

0 5 10 15 20 25 30 35 401018

1019

1020

1021

1022

EB

(A) as-implanted100 ppm O2: (B) Flash (C) Flash & Spike10% O2: (D) Flash (E) Flash & Spike

AD

Bor

on c

once

ntra

tion

(cm

-3)

Depth (nm)

C

B: 448 /sq.D: 395 /sq. C: 453 /sq. E: 463 /sq.

Flash: 750°C / 1300°CSpike: 950°C

c-Si, 500 eV B+ 1·1015 cm-2

For (D) less dissolution of immobile peak compared to (B).In case of 100 ppm O2 ~20 % reduced retained dose. Ideal case: 10% O2 during Flash and 100 ppm O2 during

Spike to avoid outdiffusion (dopant loss).Advanced Activation Trends for Boron and Arsenic by Combinations of Single, Multiple Flash Anneals and Spike Rapid Thermal Annealing W. Lerch, S. Paul, J. Niess, S. McCoy, J. Gelpey, F. Cristiano, F. Severac, P. F. Fazzini, A. Martinez-Lima, P. Pichler, H. Kheyrandish, D. BolzeMaterials Science and Engineering B 154-155 (2008) 3-13


Dose Protection during “Oxidizing” Flash Annealing, nMOS

B: 649 /sq., Rs

Hall = 660 /sq.,C: 649 /sq.,

RsHall = 663 /sq.

Flash: 750°C / 1300°Cc-Si, 1 keV As+ 1·1015 cm-2

Dopant loss reduced by 30%, similar mobility values of 40 cm2V-1s-1. In case of (B) the activation is 44 % and 30 % for (C). No impact on profile due to use of oxidizing ambient except reduced

outdiffusion (reduction of dopant loss).

0 5 10 15 201018

1019

1020

1021

1022

A

B

(A) as-implanted(B) 100 ppm O2

(C) 100.000 ppm O2

Ars

enic

con

cent

ratio

n (c

m-3)

Depth (nm)

C

W. Lerch, et al. Materials Science and Engineering B 154-155 (2008) 3-13


Dopant Activation by Annealing Strategies, nMOS

B: 648 /sq., C: 591 /sq., D: 694 /sq., E: 693 /sq.

Spike + Flash optimum strategy regarding Xj and Rs Annealing ambient of paramount importance or a

low-T oxide capping layer to avoid As evaporation

0 5 10 15 201018

1019

1020

1021

1022

EB

(A) as-implanted(B) Flash 1300°C(C) Spike 950°C & Flash 1300°C(D) Flash 1300°C & Spike 950°C(E) Flash 950°C/1300°C

A D

Ars

enic

con

cent

ratio

n (c

m-3)

Depth (nm)

C

c-Si, 1 keV As+ 1·1015 cm-2

For arsenic implants in c-Si the defect density after flash and spike + flash is below TEM-WBDF detection limit.

W. Lerch, et al. Materials Science and Engineering B 154-155 (2008) 3-13


Felch et al., IWJT Kyoto (Jp) and Semicon 2011

The difficulty for the activation and anneling process is that plasma doping profiles of either B and As reside directly under the surface and it is of paramount importance to deposit a capping layer at low-temperature to avoid massive dopant out-diffusion during the suitable annealing condition for controlled dopant redistribution and activation.


Deactivation a Driver for Low-Temperature Oxidation

1 10 100 1000500

550

600

650

700

750

800

750°C 800°C 850°C 900°C Flash 1300°C

She

et re

sist

ance

(

/sq.

)

Time (s)

W. Lerch, S. Paul, J. Niess, S. McCoy, T. Selinger, J. Gelpey, F. Crisitiano, F. Severac,M. Gavelle, S. Boninelli, P. Pichler, D. Bolze Materials Science and Engineering B 124-125 24-31 (2005)

Deactivation / “reactivation” process for t / T regime Time dependent increase in Rs followed by marked drop Max. Rs decrease with T suggesting a thermally

activated process

1 10 100 1000400

450

500

550

600

650

700

750

800

Spike 1000°C & Flash 1300°C

She

et re

sist

ance

(

/sq.

)

Post flash annealing time (s)

750°C 800°C 850°C 900°C

Probably SiAs clusters and As-V cluster formation cause Rs increase within 3 s

W. Lerch, S. Paul, J. Niess, S. McCoy, J. Gelpey, D. Bolze, F. Cristiano, F. Severac,P.F. Fazzini, A. Martinez, P. Pichler 15th IEEE EDS International Conference on Advanced Thermal Processing of Semiconductors, RTP 2007, Catania, Italy, 15 191-196 (2007)

Rs-Evolution (t / T) for highly activated 500 eV Boron, 1 keV Arsenic Profiles


Interim Conclusions

Outdiffusion needs to be controlled in shallow junctions Use of higher oxygen concentration during anneal Use a low temperature cap layer

Post anneal process temperatures must be limited to prevent deactivation


HEAT: A Blunt Instrument for Device Fabrication?

Historically HEAT enabled: Reaction Phase change Bond rearrangement Atomic diffusion

Sometimes we want these changes, sometimes not

But HEAT alone is not the only possible driver

Kinetics & reaction path must be optimized by design of thermal cycle and ambient conditions

Non-thermal energy (photons, PLASMA, particle beams) providedesirable alternative reaction paths


Plasma Apparatus Schematic

Plasma Microwavedischarge unitChamber

DoorSi-wafer

Gas Inletto pump

Wafer support

Microwavegenerator

Flexible coax cable

Quartz encapsulation

Concept of a plasma chamber with microwave plasma generation and possible wafer preheating by lamps


OuterConductor Quartz

Tube

InnerConductor

Plasma stick

High electron concentration around the plasma source

Advantages of Microwave Plasma Generation

Shielding of microwave radiation by this high electron concentration

Plasma damage is greatly reduced, even near the plasma sticks

Less heating of the wafer

A ~100x higher frequency than RF results in a ~104 times higher degree of dissociation

Oxygen IonElectron

Neutral atoms/molecules and radicals are not shown,

number of particles are adjusted for the sketch and do not

represent real situation!

Max. electron concentration6 – 8 mm around quartz tube

Plasma Ignition


Growth Curves

oxide thickness = f (time)

Oxide growth up to 4 nm with wafertemperature below 200 °C

(wafer heated up by plasma, no preheat by lamps)

20 30 40 50 60 70 802,00

2,25

2,50

2,75

3,00

3,25

3,50

3,75

4,00

4,25O

xide

thic

knes

s [n

m]

Time [sec]

60 °C

108 °C

195 °C

155 °C

1000 W

W. Lerch, W. Kegel, J. Niess, A. Gschwandtner, J. Gelpey and Fuccio Cristiano (Invited) Scaling Requires Continuous Innovation in Thermal Processing; ECS Trans. (2012) Vol. 45, Issue 6, Pages 151-161


Comparison Plasma and Thermal Oxidation

Oxide growth up to 30 nm with elevated wafer temperature up to 800 °C(wafer preheated by lower lamp field, gaseous ambient O2 and H2)

Comparison Plasma and Thermal Oxidation

400 600 800 1000 1200 14000

5

10

15

20

25

30

35

SiO

2 Thi

ckne

ss (

nm)

Wafer-Temperatur (°C)

Plasmaoxidation RTO

t=const=80 s

T ~ 500 °C

J. Niess W. Kegel, W. Lerch, to be published in phys. stat. solidi 2013


TEM Interface Characterization

c-SiSiO2

-Si

Temperature < 400 °CTime: 80 s in O2tox = 5.1 nm

Si-SiO2interface roughness on atomic scale. Equivalent to high-T furnaceNo plasma- /microwave-damage observed!

c-SiSi02

-Si

Low temperature plasma oxidation

W. Lerch, W. Kegel, J. Niess, A. Gschwandtner, J. Gelpey and Fuccio Cristiano (Invited) Scaling Requires Continuous Innovation in Thermal Processing; ECS Trans. (2012) Vol. 45, Issue 6, Pages 151-161


TEM Oxide Growth CharacterizationNitride

ReoxidizedNitride

Silicon

Silicon

SiO2

SiO2

STI structure (AR 3.2:1) with CAP nitride

580

nm

3.58 nm SiO2

3.70 nmSiO2

3.55 nm SiO2

Conformal oxide growth on the sidewall for bothoxidation of silicon and reoxidation of nitride

Nitride

Silicon

t: p:

80 sec260 mTorr

O2 Plasma

-Si

-Si

-Si


CMOS device scaling will require extremely low-temperature processing (close to room temperature) or very high temperature/very short time processing as anenabling technology

Conclusions

Interface engineering, gaseous ambient control, dopant outdiffusion control, topography control and reduction of parasitic resistances will become increasingly important as new device structures, especially 3D, and new materials are integrated

Non-thermal energy sources and new reactive species provide enablingcapabilities like the low-T plasma oxidation apparatus Excellent corner rounding Atomically flat interface Nearly orientation independent oxidation Low thermal budget processing Excellent electrical isolation characteristic

More-Moore, More-than-Moore and especially 3D devices will be enabled by low thermal budget processing


Our personal thanks to ……. our colleagues in centrotherm for their

patience while preparing for talks…. Zsolt Nenyei for continuous inspiring and helpful discussions…. Fred Roozeboom for providing the sophisticated

extremely deep trench samples…. CEMES-CNRS laboratory especially F. Cristiano for his

great TEM pictures

Acknowledgments

Hier Claim eingeben

Thank you very much for yourattention!

centrotherm photovoltaics AGJohannes-Schmid-Str. 889143 [email protected]

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Low-Temperature Oxidation/Nitridation Processes enabling ... · enabling Advanced Junctions Wilhelm Kegel, Wilfried Lerch, Jeff Gelpey centrotherm photovoltaics AG, Blaubeuren, Germany