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FUJITSU MICROELECTRONICS EUROPE
Development tools for 16LX Family
CPU BoardUser Guide
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D E V E L O P M E N T T O O L S F O R 1 6 LX F A M I LY
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What is in This Guide ...............................................................................................................................................................................................................2
What is not included in this guide.....................................................................................................................................................................................2
Where to find news, options, OTHER beans, OTHER CPU boards, latest FAQ and support..............................................................................3
CPU Board Features and Technical Specification ..............................................................................................................................................................4
Features .................................................................................................................................................................................................................................4
Flash It! .....................................................................................................................................................................................................................................5
Overview of the DevKit16 FLASH Programming Tool ...............................................................................................................................................5
CPU Board Description............................................................................................................................................................................................................6
CPU board overview ...........................................................................................................................................................................................................6
Connectors ............................................................................................................................................................................................................................6
Jumpers, buttons and switches.........................................................................................................................................................................................9
Default HW settings...........................................................................................................................................................................................................12
CPU Board Power Supply Requirements .............................................................................................................................................................................13
Warranty and Disclaimer.......................................................................................................................................................................................................14
Revision and Error List ..........................................................................................................................................................................................................15
Appendix ..................................................................................................................................................................................................................................16
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What you’ll find inside this guide and few words about itsorganization
PU Board in its interface to the Devkit16 Mainboard is designed in such a waythat it is possible to use different CPU boards (with various members of the16LX family) with the same Mainboard. This guide describes how to use theCPU board as a standalone board.
� &38 ERDUG IHDWXUHV DQG WHFKQLFDO VSHFLILFDWLRQ FKDSWHU providesnecessary technical and operational information
� )/$6+ ,W� FKDSWHU explains how to store final application in DevKit16 CPU orexternal FLASH.
� &38 %RDUG 'HVFULSWLRQ FKDSWHU provides explanation how to control the CPUboard configuration and detailed description of CPU board including all DIPswitches, jumpers and connectors.
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� $SSHQGL[ includes schematics of the CPU board and other technical references
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This guide is not detailed manual for the CPU, parts and software tools. Please find morein the following resources:
� MCU, Softune Workbench and tools –FUJITSU Micros CD ROM (Ver 3.0 or higher)
� Processor Expert(TM) and tools – DEVKIT16 Software CD ROM
� Parts and other HW components – datasheets of their producers
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Please visit DevKit16 WEB site www.processorexpert.com/devkit16 for news andgiveaways. You can also register in order to obtain news by mail.
For MCUs and Fujitsu technologies please visit FUJITSU WEB site http://ww.fujitsu-fme.com.
When you need additional CPU personality board please call your nearest FUJITSUsubsidiary or authorised FUJITSU distributor. You should specify:
� version of CPU you need
� CPU soldered or in socket. Socket version is provided for users who want touse the FUJITSU emulator
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This chapter introduces features of CPU board and providesnecessary technical and operational information for DevKit16.
he CPU board was designed as a replaceable part of the Devkit16. So, itcontains only few features and the rest is provided by the Devkit16Mainboard.
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� Position for a PQFP 100 processor or NQPACK socket
� connectors for all CPU pins
� a Bus Interface connector for main board connection
� a Device Bus connector
� a power supply supervisor IC with reset generation
� RST, HST buttons
� DIP switch for setting the CPU mode
� High speed (in socket) and low speed quartzes
� Serial port connector
� power supply regulators 5V or 3.3V, depending on CPU used
� power supply connector for external power source and DC power supply circuitry
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If the CPU mounted on the CPU board has a FLASH memory, theDevKit16 FLASH Programming Tool can be used to program it.
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) / $ 6 + 3 5 2 * 5 $ 0 0 , 1 * 7 2 2 /
DevKit16 FLASH Programming Tool provides standard operations(check/program/verify) for CPU Internal FLASH memory, Mainboard FLASH or both.
With the standalone CPU board, it is possible to program only the internal FLASH. Thecheck-box "External bus free ?" should be set to "no" (this tells the SW not to use theFPGA UART). The Flashtool will guide you to set the proper mode on the CPU boardDIP switches. The communication will run on 9600Bd only, and only CPU FLASH canbe programmed.
For further information, please see the DevKit16 FLASH Programming Tool onlineHelp.
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This chapter provides detailed description of CPU board includingall DIP switches, jumpers and connectors.
CPU board can work standalone or in connection with the Mainboard. If the Mainboard isin use, please switch all switches on CPU board configuration DIP to OFF.
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CPU board is designed as low cost board, which provides compatibility on Interface Busand the Device Bus level for different CPUs. Additionally, headers pin compatible to CPUpins are provided.
This part contains description of CPU board for MB90F543CPU.
� Connectors
� Jumpers, buttons and switches
� Board layout
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This connector serves for connecting the CPU board to the Mainboard.
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This connector provides connection to CPU peripherals.
Note: For the pinout of these connectors, please see the attachments section of thismanual.
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The serial interface connector should be used only when the CPU board is not connectedto the mainboard, because mainboard connects its own serial (RS232) interface to theUART0 and UART1 CPU signals. To be able to use the K7 connector, please refer to thedescription of J7, J8, J9 jumpers later in this section.
Warning : if you want to use the K7 connector when Mainboard isconnected to the CPU board, you have to disconnect the serial interfaceselected by J7-J9 from the RS232 drivers on the Mainboard. To achieve this,remove jumpers on positions 3-4, 5-6 from both the J21 and J22 headers onthe Mainboard. Also, when the Async. Serial programming mode is set onthe Mainboard System control DIP switches, the FPGA UART RS232 driveris connected to UART0 or UART1 (depending on the setting of theUART0/1 switch) after reset. If you want to use K7 also in that case, removethe 3-4, 5-6 jumpers on the J23 as well.
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Before applying the power to the Devkit16, check the polarity of your power chord plug –the GND must be in the center, while the +9V on the shell of the connector. Even thoughtthe DevKit16 power lines are protected by a diode on the power input, do not ever applypower with the opposite polarity. Also, make sure that the power supply complies to thespecifications in chapter CPU board Power Supply Requirements.
AD00 1
MD0 3
SERRES 5
SOT 7
VCC 9
2 AD01
4 MD2
6 SIN
8 SCK
10 GND
GND
+9V
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A16 �
A18 �
A20 �
A22 �
ALE �
GND ��
#WRH ��
#HAK 15
CLK 17
SCK0 19
SIN1 21
FVCC 23
SOT2 25
2 A17
4 A19
6 A21
8 A23
10 #RD
12 #WRL
14 HRQ
16 RDY
18 SOT0
20 SIN0
22 SCK1
24 SOT1
26 SCK2
SOT2 25 26 SIN2
INT4 25 26 INT5
INT6 31
ADTG 33
AVR+ 35
AVss 37
AN1 39
AN3 41
AN4 43
AN6 45
TIN0 47
MD0 49
32 INT7
34 AVCC
36 AVR-
38 AN0
40 AN2
42 Vss
44 AN5
46 AN7
48 TOT0
50 MD1
MD2 51
IN0 53
IN2 54
IN4 57
OUT2/IN6 59
PPG0 61
PPG2 63
OUT0 65
TIN1 67
INT0 69
INT2 71
TX0 73
TX1 75
52 #HST
54 IN1
56 IN3
58 IN5
60 OUT3/IN7
62 PPG1
64 PPG3
66 OUT1
68 TOT1
70 INT1
72 INT3
74 RX0
76 RX1
RST 77 78 PA0
X1A 79 80 X0A
VSS 81
X1 83
AD00 85
AD02 87
AD04 89
AD06 91
AD08 93
AD10 95
AD12 97
AD14 99
82 X0
84 VCC
86 AD01
88 AD03
90 AD05
92 AD07
94 AD09
96 AD11
98 AD13
100 AD15
1: GND2: GND3: GND4: GND5: GND6: GND
1: VCC2: VCC3: VCC4: VCC
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When SHORT, the +5V from the voltage regulator is connected to board VCC. Thisjumper must be removed when using an external +5V power supply to avoid currentflowing back to the regulator.
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When SHORT, the VCC is connected to CPU’s VCC pins. Before removing this jumper,remove the J3 (AVCC to CPU) jumper as well to completely disconnect the power fromthe CPU.
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When SHORT, board’s VCC is connected to CPU’s AVcc pin.
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When SHORT, board’s GND is connected to CPU’s AGND pin.
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When SHORT, board’s VCC is connected to CPU’s AVR+ pin. When removed, thevoltage at the AVR+ pin is set to 4V
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When SHORT, board’s GND is connected to CPU’s AVR- pin. When removed, thevoltage at the AVR- pin is set to 0.9V.
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These jumpers select, which of the two UART0, UART1 interfaces signals will beconnected to the pins of the K7 connector. If all of these jumpers are in
1-2 position - the UART1 interface signals will be connected to the K7
2-3 position – the UART0 interface signals will be connected to the K7 connector.
Default setting: the UART1 signals are connected to the K7.
Note: The J7 jumper selects between SCK1 and SCK0, J8 between SIN1 and SIN0and J9 between SOT1 and SOT0
Warning : if you want to use the K7 connector when Mainboard isconnected to the CPU board, you have to disconnect the selected serialinterface (UART0 or UART1) from the RS232 drivers on the Mainboard. Toachieve this, remove jumpers on positions 3-4, 5-6 from both the J21 and J22headers on the Mainboard. Also, when the Mainboard is connected to theCPU board and the Async. Serial programming mode is set on the MainboardSystem control DIP switches, the FPGA UART is connected to UART0 orUART1 (depending on the setting of the UART0/1 switch) after reset. If youwant to use K7 also in that case, remove the 3-4, 5-6 jumpers on the J23.
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These jumpers allow to use Mainboard’s I2C connector/EEPROM memory even in thecase, when CPU itself doesn’t provide the I2C interface. When both of these jumpers areSHORT, the CPU’s HRQ signal is connected to the Mainboard’s SDA signal (via J19) and#HAK signal is connected to SCL signal. An user can then program the #HAK, HRQsignals to behave as I2C interface.
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When short, these jumpers connect the 32.768 kHz crystal to the Bus Interface connectorX1A, X0A pins.
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When short, these jumpers connect the 4MHz crystal to the Bus Interface connector X0,X1 pins.
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This button can be used for reseting the CPU.
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While this button is pressed, the CPU stays in the standby mode (all oscillators arestopped, all I/O pins are set to high impedance state, special purpose registers such as theaccumulator are reset to their default values, but content of internal RAM is preserved)
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1: MD02: MD13: MD24: S-R5: S-H6: H-R7: AD00 (P00)8: AD01 (P01)
These switches should be used only when using the CPU board without Mainboard, orwith the FPGA disabled (see the description of J29 in the Mainboard section).
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MD2 MD1 MD0 AD00/P00
AD01/P01
Mode name Reset vector area External databus witdth
ON ON ON OFF OFF External vector mode 0 External 8ON ON OFF OFF OFF External vector mode 1 External 16ON OFF ON OFF OFF External vector mode 2 External 16ON OFF OFF OFF OFF Internal vector mode Internal (Mode data)OFF ON ON X X ReservedOFF ON OFF X X ReservedOFF OFF ON ON ON Async serial programmingOFF OFF OFF X X Reserved
8 7 6 5 4 3 2 1
ON
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4: S-R – if ON, this switch connects the RES pin of the K7 connector to the CPU’s #RSTsignal.
5: S-H – if ON, this switch connects the RES pin of the K7 connector to the CPU’s #HSTsignal.
6. H-R – if ON, the #RST and #HST signals are connected together.
7: AD00, 8:AD01 – if ON, the AD00/P00 and AD01/P01 signals are pulled to log. ‘0’level. This setting must be done for bringing processor to the Serial programming mode.
Figure 1: CPU board layout and default jumper settings
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These jumpers come in the SHORT position as a default factory setting:
J2: The CPU is connected to the +5V power supply through this jumperJ3: The CPU AVCC supply pin is connected +5V power supply through this jumperJ4: The CPU AGND supply pin is connected to the GND through this jumperJ5: The CPU AVR+ pin is connected to the +5V voltage through this jumperJ6: The CPU AVR- pin is connected to the 0V voltage through this jumperJ7-9: The CPU UART1 signals are connected to the K7 connectorJ13: The board is powered from the +5V from the power supply voltage regulatorJ19: The CPU HRQ pin is connected to the SDA Mainboard signalJ20: The CPU #HAK pin is connected to the SCL Mainboard signal
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CPU board does not come with power supply, please check, if yourpower supply match the requirements before you plug it to the CPUboard!
Power supply voltage: 9V
Power supply current (CPU board MB90F543 with Main board connected):
� Single chip CPU mode, no external peripheral connected: 290mA max.
� External bus mode, no peripheral connected: 350mA
� External bus with:
� keyboard connected: 450mA typical, but can vary with the keyboard used(most of modern AT keyboard uses max. 100mA. User should check hiskeyboard current requirements before connecting the keyboard to theDevKit16 Mainboard).
� keyboard and VGA interface connected: 650mA
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Warning: If the DevKit16 is powered using the on-board stabilizer, thesupply current must not exceed the 1A limit of the stabilizer. Beforeconnecting any peripheral to the DevKit16, please check that its powersupply current requirements doesn’t does not cause this limit to be exceeded.
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To the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbHrestricts its warranties and its liability for the DEVKIT16 and all its deliverables (eg. software,application examples, target boards, evaluation boards, etc.), its performance and any consequentialdamages, on the use of the Product in accordance with (i) the terms of the License Agreement and theSale and Purchase Agreement under which agreements the Product has been delivered, (ii) thetechnical descriptions and (iii) all accompanying written materials. In addition, to the maximum extentpermitted by applicable law, Fujitsu Microelectronics Europe GmbH disclaims all warranties andliabilities for the performance of the Product and any consequential damages in cases of unauthoriseddecompiling and/or reverse engineering and/or disassembling. Note, the DEVKIT16 and all itsdeliverables are intended and must only be used in an evaluation laboratory environment.
1. Fujitsu Microelectronics Europe GmbH warrants that the Product will perform substantially inaccordance with the accompanying written materials for a period of 90 days form the date of receiptby the customer. Concerning the hardware components of the Product, Fujitsu MicroelectronicsEurope GmbH warrants that the Product will be free from defects in material and workmanshipunder use and service as specified in the accompanying written materials for a duration of 1 yearfrom the date of receipt by the customer.
2. Should a Product turn out to be defect, Fujitsu Microelectronics Europe GmbH´s entire liability andthe customer´s exclusive remedy shall be, at Fujitsu Microelectronics Europe GmbH´s solediscretion, either return of the purchase price and the license fee, or replacement of the Product orparts thereof, if the Product is returned to Fujitsu Microelectronics Europe GmbH in originalpacking and without further defects resulting from the customer´s use or the transport. However,this warranty is excluded if the defect has resulted from an accident not attributable to FujitsuMicroelectronics Europe GmbH, or abuse or misapplication attributable to the customer or anyother third party not relating to Fujitsu Microelectronics Europe GmbH.
3. To the maximum extent permitted by applicable law Fujitsu Microelectronics Europe GmbHdisclaims all other warranties, whether expressed or implied, in particular, but not limited to,warranties of merchantability and fitness for a particular purpose for which the Product is notdesignated.
4. To the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH´s andits suppliers´ liability is restricted to intention and gross negligence.
NO LIABILITY FOR CONSEQUENTIAL DAMAGES
To the maximum extent permitted by applicable law, in no event shall FujitsuMicroelectronics Europe GmbH and its suppliers be liable for any damages whatsoever(including but without limitation, consequential and/or indirect damages for personal injury,assets of substantial value, loss of profits, interruption of business operation, loss of information,or any other monetary or pecuniary loss) arising from the use of the Product.
Should one of the above stipulations be or become invalid and/or unenforceable, the remainingstipulations shall stay in full effect.
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The following bugs have been found with the board and need to beobserved when working with this tool:
Date Revisions - Errors RevisedVersion
05.11.1999 Version 1.2 is valid for CPU Board ver. 1.3 V1.213.02.2000 The table “Device Bus (K2) and Interface Bus (K1 ) connectors
pins” (pages 16, 17, 18) was not consistent with the schematics.V1.21
Table1: List of found errors and revisions for version V1.2
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Here you will find Interface bus and Device Bus description and CPUboard schematics.
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DIN Conn.PIN
Device Bus Interface Bus
PIN NO. CPU Pin Nr. Function CPU PIN Nr. SIGNAL 2nd Function
A1 18 SOT0 85 AD00 P00
B1 19 SCK0 86 AD01 P01
C1 20 SIN0 87 AD02 P02
A2 24 SOT1 88 AD03 P03
B2 22 SCK1 89 AD04 P04
C2 21 SIN1 90 AD05 P05
A3 91 AD06 P06
B3 92 AD07 P07
C3 93 AD08 P10
A4 69 INT0 94 AD09 P11
B4 70 INT1 95 AD10 P12
C4 71 INT2 96 AD11 P13
A5 72 INT3 97 AD12 P14
B5 29 INT4 98 AD13 P15
C5 30 INT5 99 AD14 P16
A6 31 INT6 100 AD15 P17
B6 32 INT7 1 A16 P20
C6 25 SOT2 2 A17 P21
A7 26 SCK2 3 A18 P22
B7 28 SIN2 4 A19 P23
C7 5 A20 P24
A8 6 A21 P25
B8 7 A22 P26
C8 8 A23 P27
A9 9 ALE P30
B9 10 \RD P31
C9 12 \WRL P32
A10 13 \WRH P33
B10 14 HRQ P34
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DIN Conn.PIN
Device Bus Interface Bus
PIN NO. CPU Pin Nr. Function CPU PIN Nr. SIGNAL 2nd Function
C10 15 \HAK P35
A11 47 TIN0 16 RDY P36
B11 48 TOT0 17 CLK P37
C11 GND GND GND
A12 67 TIN1 18 SOT0 P40
B12 68 TOT1 19 SCK0 P41
C12 20 SIN0 P42
A13 24 SOT1 P45
B13 53 IN0 22 SCK1 P44
C13 54 IN1 21 SIN1 P43
A14 55 IN2 25 SOT2 P46
B14 56 IN3 26 SCK2 P47
C14 57 IN4 28 SIN2 P50
A15 58 IN5 SDA
B15 59 OUT2/IN6 SCL
C15 60 OUT3/IN7 61 PPG0 P80
A16 65 OUT0 62 PPG1 P81
B16 66 OUT1 67 TIN1 P86
C16 VCC VCC
A17 59 OUT3/IN7 33 ADTG P55
C17 60 OUT2/IN6 68 TOT1 P87
C17 AVCC 34 AVCC
A18 35 AVR+
B18 36 AVR-
C18 AGND 37 AGND
A19 38 AN0 P60
B19 39 AN1 P61
C19 GND GND GND
C20 40 AN2 P62
A21 41 AN3 P63
C20 43 AN4 P64
A21 44 AN5 P65
B21 45 AN6 P66
C21 46 AN7 P67
A22 61 PPG0 77 \RST
B22 62 PPG1 52 \HST
C22 63 PPG2 69 INT0 P90
A23 64 PPG3 70 INT1 P91
B23 71 INT2 P92
C23 72 INT3 P93
A24 73 TX0 29 INT4 P51
B24 74 RX0 30 INT5 P52
C24 75 TX1 31 INT6 P53
A25 76 RX1 32 INT7 P54
B25 53 IN0 P70
C25 54 IN1 P71
A26 55 IN2 P72
B26 56 IN3 P73
C26 59 OUT2/IN6 P76
A27 60 OUT3/IN7 P77
B27 NC(SGO)
C27 NC(SGA)
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DIN Conn.PIN
Device Bus Interface Bus
PIN NO. CPU Pin Nr. Function CPU PIN Nr. SIGNAL 2nd Function
A28 73 TX0 P94
B28 74 RX0 P95
C28 75 TX1 P96
A29 76 RX1 P97
B29 79 X1AJ
C29 80 X0AJ
A30 82 X0J
B30 83 X1J
C30 VCC VCC
A31 49 MD0
B31 50 MD1
C31 NC
A32 51 MD2
B32 NC
C32 GND GND
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Title
Number RevisionSize
A3
Date: 8-Dec-1999 Sheet of File: D:\Cpuboard13.ddb Drawn By:
P00/AD0085
P01/AD0186
P02/AD0287
P03/AD0388
P04/AD0489
P05/AD0590
P06/AD0691
P07/AD0792
P10/AD0893
P11/AD0994
P12/AD1095
P13/AD1196
P14/AD1297
P15/AD1398
P16/AD1499
P17/AD15100
P20/A161
P21/A172
P22/A183
P23/A194
P24/A205
P25/A216
P26/A227
P27/A238
P32/#WRL/#WR12 P31/#RD10 P30/ALE9
P33/#WRH13
P34/HRQ14
P35/#HAK15
P36/RDY16
P37/CLK17
P40/SOT0 18
P41/SCK0 19
P42/SIN0 20
P43/SIN1 21
P44/SCK1 22
P45/SOT1 24
P46/SOT2 25
P47/SCK2 26
P50/SIN2 28
P51/INT4 29
P52/INT5 30
P53/INT6 31
P54/INT7 32
P55/ADTG 33
P56/TIN0 47
P57/TOT0 48
AVcc 34
AVR+ 35
AVR- 36
AVss 37
P60/AN0 38
P61/AN1 39
P62/AN2 40
P63/AN3 41
P64/AN4 43
P65/AN5 44
P66/AN6 45
P67/AN7 46
C 27
P86/TIN1 67P85/OUT1 66
P90/INT069
P91/INT170
P92/INT271
P93/INT372
P94/TX073
P95/RX074
P96/TX175
P97/RX176
P70/IN0 53
P71/IN1 54
P72/IN2 55
P73/IN3 56
P74/IN4 57
P75/IN5 58
P76/OUT2/IN6 59
P77/OUT3/IN7 60
#RST77
PA078
X1A79
X0A80
#HST52
XO82
P80/PPG0 61
P81/PPG1 62
P82/PPG2 63
P83/PPG3 64
P84/OUT0 65
MD251 MD150 MD049
X183
P87/TOT1 68
VSS 81
VCC 23
VSS 42VSS 11
VCC 84
IC1
MB90540
C1
B1
A1
C2
B2
A2
C3
B3
A3
C4
B4
A4
C5
B5
A5
C6
B6
A6
C7
B7
A7
C8
B8
A8
C9
B9
A9
C1
0B
10
A1
0
C1
1B
11
A1
1
C1
2B
12
A1
2
C1
3B
13
A1
3
C1
4B
14
A1
4
C1
5B
15
A1
5
C1
6B
16
A1
6
C1
7B
17
A1
7
C1
8B
18
A1
8
C1
9B
19
A1
9
C2
0B
20
A2
0
C2
1B
21
A2
1
C2
2B
22
A2
2
C2
3B
23
A2
3
C2
4B
24
A2
4
C2
5B
25
A2
5
C2
6B
26
A2
6
C2
7B
27
A2
7
C2
8B
28
A2
8
C2
9B
29
A2
9
C3
0B
30
A3
0
C3
1B
31
A3
1
C3
2B
32
A3
2
K1DIN_41612
GN
D
VC
C
AD
00
AD
01
AD
03
AD
02
AD
04
AD
05
AD
06
AD
07
AD
08
AD
09
AD
10
AD
11
AD
12
AD
13
AD
14
AD
15
A1
6A
17
A1
8A
19
A2
1A
22
A2
3
AL
E#
RD
#W
RL
#W
RH
HR
Q#
HA
K
RD
YC
LK
#R
ST
#H
ST
GN
D
AN
7A
N6
AN
5
AN
4
AG
ND
AN
3A
N2
AN
1A
N0
AV
CC
AV
R+
AV
R-
A2
0AD00AD01AD02AD03AD04AD05AD06AD07
AD08AD09AD10AD11AD12AD13AD14AD15
A16A17A18A19A20A21A22A23
ALE#RD#WRL#WRHHRQ#HAKRDYCLK
INT0INT1INT2INT3TX0RX0TX1RX1
#RST
PA0
MD0MD1MD2
#HST
X1
X0
X1A
X0A GND
TOT1TIN1OUT1OUT0PPG3PPG2PPG1PPG0
OUT3/IN7OUT2/IN6IN5IN4IN3IN2IN1IN0
AN7AN6AN5AN4AN3AN2AN1AN0
AGND
AVR-
AVR+
AVCC
TOT0TIN0ADTGINT7INT6INT5INT4SIN2
SCK2SOT2SOT1SCK1SIN1SIN0SCK0SOT0
GND
C110M/25V
GND
X14MHz
X2
32.768KHz
C7 22pF
C6 22pF
C9 22pFC8 22pF
GND
GND
GND
GND
1
J2JUMPER2
VCC
C4100N
C3100N
C510M/25V
#RST
1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 30
K3
HEADER 15X2
1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 30
K5
HEADER 15X2
1 23 45 67 89 1011 1213 1415 1617 1819 20
K4
HEADER 10X2
1 23 45 67 89 1011 1213 1415 1617 1819 20
K6
HEADER 10X2
A16A18A20A22ALEGND#WRH#HAKCLKSCK0SIN1FVCCSOT2CINT4
INT6ADTGAVR+AGNDAN1AN3AN4AN6TIN0MD0
A17A19A21A23#RD#WRLHRQRDYSOT0SIN0SCK1SOT1SCK2SIN2INT5
INT7AVCCAVR-AN0AN2GNDAN5AN7TOT0MD1
MD2IN0IN2IN4OUT2/IN6PPG0PPG2OUT0TIN1INT0INT2TX0TX1#RSTX1A
GNDX1AD00AD02AD04AD06AD08AD10AD12AD14
#HSTIN1IN3IN5OUT3/IN7PPG1PPG3OUT1TOT1INT1INT3RX0RX1PA0X0A
X0FVCCAD01AD03AD05AD07AD09AD11AD13AD15
R4220R
R31K
R1220R
R21K
1
J5JUMPER2
1
J6JUMPER2
AK
D1
1N
41
48 S
MD
AV
CC
C1010M/25V
1 23 45 67 89 10
K7BOXHEADER 5X2
VCC
GND
1
J3JUMPER2
1
J4JUMPER2
VCC
GND
A KD2
1N4148 SMD
1
J7 JUMPER3
1
J8 JUMPER3
SOT1
SOT0
SIN0
SIN1
C1
B1
A1
C2
B2
A2
C3
B3
A3
C4
B4
A4
C5
B5
A5
C6
B6
A6
C7
B7
A7
C8
B8
A8
C9
B9
A9
C1
0B
10
A1
0
C1
1B
11
A1
1
C1
2B
12
A1
2
C1
3B
13
A1
3
C1
4B
14
A1
4
C1
5B
15
A1
5
C1
6B
16
A1
6
C1
7B
17
A1
7
C1
8B
18
A1
8
C1
9B
19
A1
9
C2
0B
20
A2
0
C2
1B
21
A2
1
C2
2B
22
A2
2
C2
3B
23
A2
3
C2
4B
24
A2
4
C2
5B
25
A2
5
C2
6B
26
A2
6
C2
7B
27
A2
7
C2
8B
28
A2
8
C2
9B
29
A2
9
C3
0B
30
A3
0
C3
1B
31
A3
1
C3
2B
32
A3
2
K2DIN_41612
SO
T0S
CK
0S
IN0
SIN
1S
CK
1S
OT1
INT6
INT7
SO
T2
TIN
0TO
T0
VC
C
TIN
1TO
T1
IN0
IN1
IN2
IN3
IN4
IN5
OU
T2/IN
6O
UT3
/IN7
OU
T3/IN
7O
UT2
/IN6
OU
T0O
UT1
PP
G1
PP
G2
PP
G3
RX
0
VC
C
TX1
RX
1
PP
G0
TX0
C2100N
SERRES
#HST
SW1PB1720
GND
VCC
C12100N
GND
SO
T0S
CK
0S
IN0
SIN
1S
CK
1S
OT1
SO
T2S
CK
2
INT0
INT1
INT2
INT3
INT4
INT5
INT6
INT7
TX0
RX
0TX
1
RX
1
C11100N
R61K
AK
D3LED 5mm
VCC
GND
R11 10KR12 10K
GN
D
GN
D
GN
D
VC
C
GN
D
MD
0M
D1
MD
2
AG
ND
AV
CC
SW2PB1720
C13100N
GND
GND
FVCC
C
R163K6
R1510K
GND
12345678
161514131211109
SW3
SW DIP-8
MD0MD1MD2
AD00AD01
SERRES
GND
R8 10KR9 10KR10 10K
VCC
R14 10KR13 10K
#RST
#RST#HST#HST #RST
C18100M/25V
C16100N
C15100N
A KD7
1N4007 SMD
GNDGND GND GND
1
J13JUMPER2
VCC
1 2
K9K375A
GND
PWRD
12
CH1
SK 129 25.4mm
ININ OUT OUT
GN
DG
ND
IC3LM7805
SD
AS
CL
AD
TG
X0
JX
1J
X0
AJ
X1
AJ
1
J18JUMPER2
1
J17JUMPER2
1
J15JUMPER2
1
J16JUMPER2
X0A
X1A
X0
X1
X0AJ
X1AJ
X0J
X1J
SIN
2
SDA
HRQ
SCL
#HAK
IN0
IN1
IN2
IN3
OU
T2/IN
6
OU
T3/IN
7S
GO
SG
A
PP
G0
PP
G1
TIN
1
TOT1
SOUND
1
J19JUMPER2
1
J20JUMPER2
INT0
INT1
INT2
INT3
INT4
INT5
SC
K2
SIN
2
CT1
VSC2
OUTC3
GND4
RESET 8
VSA 7
VSB/RESIN 6
VCC 5
IC2
MB3771GND
1
J9 JUMPER3SCK1
SCK0
Devkit16 - CPU Board
A KD4
1N4007 SMD
A KD6
1N4007 SMD
A KD5
1N4007 SMD
1234
J10
HEADER 4
123456
J11
HEADER 6
GNDVCC
AD00MD0
AD01MD2
21PL2 +5V
21
PL1 +5VGND
21 PL3
+5V
Ver. 1 3